A dual-redundancy ARINC429 bus control circuit
By using high-speed isolation chip and CPLD logic processing in the ARINC429 bus control circuit, the bus impedance mismatch problem when multi-device connection is solved, efficient isolation and automatic switching of ARINC429 bus signals are realized, and communication reliability and stability are improved .
Patent Information
- Application Number
- CN202111336811.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-11-12
- Publication Date
- 2024-12-27
- Estimated Expiration
- 2041-11-12
AI Technical Summary
When multiple ARINC429 communication and transmission devices are connected on the same bus, the bus impedance mismatch is caused, affecting the normal communication function. The existing analog switch control method has low reliability and high on-resistance, which cannot meet the external impedance requirements of the ARINC429 bus.
Design a dual-solution ARINC429 bus control circuit, adopts high-speed isolation chip and CPLD logic processing, and uses the ARINC429 control signal isolation switching circuit and the bus main and backup switching signal logic circuit to realize signal isolation and switching between the main and backup CPM modules. Ensure stable transmission of bus signals.
It realizes efficient isolation and automatic switching of ARINC429 bus signals, improves the reliability and stability of bus control, meets the external impedance requirements of ARINC429 bus, and ensures normal communication between multiple devices.
Smart Images

Figure CN114063503B_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the field of aviation bus communication, and in particular relates to a dual-redundancy ARINC429 bus control circuit. Background Art
[0002] The ARINC429 bus topology is point-to-point interconnection. Only one transmitter is allowed on the bus, but there can be multiple receivers, supporting one-transmit-one-receive or one-transmit-multiple-receive interconnection modes.
[0003] Since the CPM module adopts a dual-redundancy design, each redundant CPM module needs to be designed to interact with the cross-linking equipment ARINC429 bus function. However, the sending ports of multiple ARINC429 bus chips HI-3593 cannot be directly connected to the same bus, which will cause bus impedance mismatch and affect normal communication functions.
[0004] Using analog switches to switch ARINC429 bus signals is a common dual-redundancy control method, that is, the ARINC429 bus communication circuit is dual-redundant, and the two ARINC429 transmission ports are isolated from the outside through analog switches. The analog switches control the switching of the main and standby ARINC429 transmission ports through the enable signal of the control module. However, the analog switch has low reliability and high switch on-resistance, while the ARINC429 bus has high requirements for external impedance. Summary of the invention
[0005] The purpose of the present invention is to solve the problem of redundancy switching when multiple ARINC429 communication sending devices are connected to the same bus. The dual-redundancy ARINC429 bus control circuit designed by the present invention effectively solves the above problem.
[0006] Technical solution of the present invention:
[0007] A dual-redundancy ARINC429 bus control circuit, comprising a master / standby CPM module, an ARINC429 communication circuit, an ARINC429 control signal isolation switching circuit, and a bus master / standby switching signal logic circuit;
[0008] The invention is characterized in that the master / standby CPM module realizes the control function and the master / standby switching function of the ARINC429 bus; the ARINC429 communication circuit realizes the bus communication function; the ARINC429 control signal isolation switching circuit isolates the master / standby CPM module and the ARINC429 communication circuit through a high-speed isolation chip on the one hand, and realizes the signal switching between the master CPM module and the standby CPM module on the other hand; the bus master / standby switching signal logic circuit enables the master / standby channel in the ARINC429 control signal isolation switching circuit according to the master / standby switching signal sent by the CPLD inside the master / standby CPM module, so as to realize the dual-redundancy ARINC429 bus control.
[0009] The invention is characterized in that the ARINC429 communication chip of the ARINC429 communication circuit uses HI-3593.
[0010] The invention is characterized in that the ARINC429 communication chip sends the ARINC429 bus signal to the outside through a sending module, the crystal oscillator frequency is 1MHz, and the SPI bus signal control end, the receiving interrupt signal control end, the reset signal control end, and the chip select signal control end of the HI-3593 are respectively connected to the corresponding ports in the ARINC429 control signal isolation switching circuit.
[0011] It is characterized in that the SPI bus signal control end, the receive interrupt signal control end, the reset signal control end, the chip select signal control end of the high-speed isolation chip in the ARINC429 control signal isolation switching circuit, and the enable end of the high-speed isolation chip are respectively connected to the corresponding ports of the main / standby CPM module.
[0012] The invention is characterized in that the enable signal of the high-speed isolation chip in the ARINC429 control signal isolation switching circuit comes from the main CPM module, the standby CPM module and the ARINC429 bus main-standby switching signal logic circuit respectively.
[0013] The invention is characterized in that the main channel and the standby channel are respectively enabled through the enable end of the high-speed isolation chip in the ARINC429 control signal isolation switching circuit.
[0014] The invention is characterized in that the HRGD40 chip is used in the ARINC429 control signal isolation switching circuit through a high-speed isolation chip.
[0015] The invention is characterized in that the ARINC429 bus master-slave switching signal logic circuit receives the enable signal from the master / slave CPM module through the isolation optical coupler, isolates the enable signal from the master / slave CPM module, generates one master enable signal and one standby enable signal, and enables one main channel and one standby channel of the ARINC429 control signal isolation switching circuit.
[0016] Beneficial effects of the invention:
[0017] The ARINC429 control signal isolation switching circuit of the present invention adopts a high-speed isolation chip with an enable function, which can have the ARINC429 bus control signal isolation function. The high-speed isolation chip will not affect signals such as SPI, and the enable function can switch the bus control signal in time. The ARINC429 bus master-slave switching signal logic circuit adopts CPLD for logic processing, so that the bus control right can be automatically switched when the master-slave switch is made; different high-speed isolation chips are enabled by switching the signal through an isolation optical coupler to realize the control right switching. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 The ARINC429 communication circuit of the present invention
[0019] Figure 2 This is the HI-3593 control signal isolation switching circuit of the present invention
[0020] Figure 3 The present invention is the ARINC429 bus master-slave switching signal logic circuit
[0021] Figure 4 This is the principle block diagram of the dual-redundancy ARINC429 bus control circuit of the present invention DETAILED DESCRIPTION
[0022] A dual-redundancy ARINC429 bus control circuit proposed by the present invention is described in detail below with reference to the accompanying drawings and specific embodiments.
[0023] Figure 1 The invention discloses an ARINC429 communication circuit, which is composed of an ARINC429 communication chip HI-3593, a power module and a crystal oscillator. The power module provides 3.3V power to the HI-3593, and the crystal oscillator provides 1MHz crystal oscillator frequency to the HI-3593.
[0024] Figure 2 The invention discloses a HI-3593 control signal isolation switching circuit. The HI-3593 control signal isolation switching circuit is composed of a high-speed isolation chip with an enable function. When the enable signal is low, the isolation chip output is high impedance; when the enable signal is high, the isolation chip output changes with the input. The high-speed isolation chip ensures the effective transmission of high-speed signals such as SPI. The circuit realizes the isolation of HI-3593 control signals: SPI bus, receiving interrupt, reset signal, enable signal and other signals from the DSP end. The stability of the HI-3593 input and output signals is guaranteed, and the reliability of the circuit is guaranteed.
[0025] Figure 3It is the ARINC429 bus master-slave switching signal logic circuit of the present invention, which performs logic processing on the enable control signal of the high-speed isolation chip. Among them, EN_429_M is the enable signal of the main CPM module control signal, which is output by the CPLD logic device, and its value is set to the inversion of the main CPM module DSP reset signal. EN_429_S is the enable signal of the standby CPM module control signal, which is output by the CPLD logic device, and its value is set to the inversion of the standby CPM module DSP reset signal. The isolation optocoupler ensures that EN_429_M1 is in the same state as EN_429_M, and EN_429_S1 is in the same state as EN_429_S.
[0026] Figure 4 The invention is a principle block diagram of a dual-redundancy ARINC429 bus control circuit. The master / standby CPM module realizes the control function of the ARINC429 bus, i.e., the master-standby switching function; the ARINC429 communication circuit realizes the bus communication function; the ARINC429 control signal isolation switching circuit isolates the control signal of the ARINC429 communication chip from the CPM module end through a high-speed isolation chip and has sufficient bandwidth; the bus master-standby switching signal logic circuit processes the product master-standby switching signal through the logic in the CPLD, thereby enabling different high-speed isolation chips to realize dual-redundancy ARINC429 bus control.
Claims
1. A dual-redundancy ARINC429 bus control circuit, comprising a master / standby CPM module, an ARINC429 communication circuit, an ARINC429 control signal isolation switching circuit, and a bus master / standby switching signal logic circuit; It is characterized in that The master / standby CPM module realizes the control function and master / standby switching function of the ARINC429 bus; the ARINC429 communication circuit realizes the bus communication function; the ARINC429 control signal isolation switching circuit isolates the master / standby CPM module and the ARINC429 communication circuit through a high-speed isolation chip on the one hand, and realizes the signal switching between the master CPM module and the standby CPM module on the other hand; the bus master / standby switching signal logic circuit enables the master / standby channel in the ARINC429 control signal isolation switching circuit according to the master / standby switching signal sent by the CPLD inside the master / standby CPM module, thereby realizing dual-redundancy ARINC429 bus control; The ARINC429 communication chip of the ARINC429 communication circuit uses HI-3593; The ARINC429 communication chip sends the ARINC429 bus signal to the outside through a sending module. The crystal frequency is 1MHz. The SPI bus signal control terminal, receive interrupt signal control terminal, reset signal control terminal, and chip select signal control terminal of HI-3593 are respectively connected to the corresponding ports in the ARINC429 control signal isolation switching circuit.
2. A dual-redundancy ARINC429 bus control circuit as claimed in claim 1, characterized in that: The SPI bus signal control terminal, the receive interrupt signal control terminal, the reset signal control terminal, the chip select signal control terminal of the high-speed isolation chip in the ARINC429 control signal isolation switching circuit, and the enable terminal of the high-speed isolation chip are respectively connected to the corresponding ports of the main / standby CPM module.
3. A dual-redundancy ARINC429 bus control circuit as claimed in claim 2, characterized in that: The enable signals of the high-speed isolation chip in the ARINC429 control signal isolation switching circuit come from the main CPM module, the standby CPM module and the ARINC429 bus main-standby switching signal logic circuit respectively.
4. A dual-redundancy ARINC429 bus control circuit as claimed in claim 3, characterized in that: In the ARINC429 control signal isolation switching circuit, the main channel and the backup channel are enabled respectively through the enable terminal of the high-speed isolation chip.
5. A dual-redundancy ARINC429 bus control circuit as claimed in claim 4, characterized in that: The HRGD40 chip is used in the ARINC429 control signal isolation switching circuit through a high-speed isolation chip.
6. A dual-redundancy ARINC429 bus control circuit as claimed in claim 5, characterized in that: The ARINC429 bus master / slave switching signal logic circuit receives the enable signal from the master / slave CPM module through the isolation optocoupler, isolates the enable signal from the master / slave CPM module, generates one master enable signal and one backup enable signal, and enables one main channel and one backup channel of the ARINC429 control signal isolation switching circuit.
Citation Information
Patent Citations
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