Control device, control method, power supply, and computer-readable storage medium

Abstract

Control apparatus, control method, power supply, and computer-readable storage medium are disclosed. A power supply includes a primary winding, a secondary winding, a switch, and a controller. The secondary winding is magnetically coupled to the primary winding. The switch is coupled to the secondary winding and controls a state of current through the secondary winding. The controller controls the state of the switch based on an integrator voltage derived from monitoring a voltage from the secondary winding. For example, the controller activates the switch to an on state in response to detecting a condition in which a magnitude of the monitored voltage of the secondary winding crosses a threshold, such as a magnitude of an output voltage generated from the secondary winding.

Description

Technical Field

[0001] This disclosure generally relates to the field of power control, and specifically to control devices, control methods, power supplies, and computer-readable storage media. Background Technology

[0002] In today's market, there are two main types of synchronous rectification (SR) technology. These technologies include direct sensing methods and voltage balancing methods. Regardless of the method used for SR operation, it is expected that the corresponding SR power FET (field-effect transistor) will be turned on once the system enters the corresponding demagnetization phase.

[0003] However, when the system is fully demagnetized, resonant ringing associated with the voltage generated by the power supply windings can occur. Such ringing can lead to incorrect triggering events that cause the corresponding secondary winding switches to turn on during power delivery cycles. In other words, the ringing present on the winding voltage prevents it from being used to detect triggering conditions. Summary of the Invention

[0004] This disclosure includes novel methods for providing improved performance of a voltage converter, wherein the voltage converter generates a corresponding output voltage to power a load.

[0005] More specifically, according to embodiments herein, the power supply includes a primary winding, a secondary winding, a switch, and a (power) controller. The secondary winding is magnetically coupled to the primary winding. The switch is coupled to the secondary winding. The power controller: i) monitors the voltage of the secondary winding magnetically coupled to the primary winding; ii) obtains an integrator voltage based on the monitored voltage from the secondary winding; and iii) controls the state of the switch at least in part based on the integrator voltage obtained from monitoring the voltage from the secondary winding. For example, in one embodiment, the controller generates an enable window based on the integrator voltage. During the enable window, the controller monitors the voltage from the secondary winding. In response to detecting a condition that the magnitude of the monitored secondary winding voltage crosses a threshold (e.g., the magnitude of the output voltage generated from the secondary winding), the controller activates the switch to the ON state during the enable window.

[0006] As described herein, an enable window obtained by monitoring the voltage of the secondary winding prevents incorrect activation of the switch. More specifically, in one embodiment, the monitored voltage of the secondary winding repeatedly crosses a threshold during the corresponding control cycle from which the output voltage supplying power to the load is generated from the secondary winding. Detection of the enable window and enabling control of the switch during the enable window prevents incorrect activation of the switch at undesired times during the control cycle.

[0007] In other words, some implementations of this document include preventing the switch from being activated outside of an enable window. Therefore, this window provides a way to filter triggering events that would lead to the activation of the switch.

[0008] According to a further example embodiment, the monitored voltage from the secondary winding is received from a node associated with the secondary winding that couples the switch and the secondary winding. Therefore, embodiments of this document include monitoring the voltage of the corresponding winding at the node that connects the switch and the secondary winding.

[0009] The generation of the secondary winding voltage and the integrator voltage can be achieved in any suitable manner. In one embodiment, the controller includes a voltage-to-current converter. The voltage-to-current converter supplies current to the capacitor that generates (stores) the integrator voltage.

[0010] In one implementation, the current supplied to the capacitor is proportional to the difference between the monitored voltage from the secondary winding and the output voltage generated by the secondary winding.

[0011] Another example implementation of this article includes generating an integrator voltage by integrating the difference between the monitored voltage from the secondary winding and the output voltage generated by the secondary winding via an integrator.

[0012] Further example implementations of this document include resetting the integrator voltage generated by the monitor in response to detecting one or more conditions. For example, implementations of this document include resetting the integrator voltage during: i) a resonant condition where the magnitude of the voltage at the node is less than the output voltage generated by the secondary winding, ii) a diode conduction condition, etc.

[0013] According to a further example embodiment, the switch for coupling to the secondary winding is a first switch (secondary-side switch). Some embodiments of this document also include a second switch (primary-side switch) for controlling the current through the primary winding. In one embodiment, in addition to controlling the first switch (secondary-side switch) based on the integrator voltage, embodiments of this document also include controlling the second switch (primary-side switch) and controlling the corresponding current to the primary winding. Therefore, embodiments of this document include using the integrator voltage to identify the activation state of the secondary-side switch.

[0014] Another example implementation of this document includes one or more comparators to generate an enable signal (window) and detect the crossover of the monitored voltage with respect to a threshold voltage. For example, in one implementation, the monitor / controller compares the integrator voltage with a threshold voltage via a first comparator. Based on this comparison, the controller generates an enable signal to activate the switch during a time window in which the integrator voltage is detected to be above the threshold voltage. The controller detects a trigger condition (e.g., a zero-crossing condition associated with the monitored voltage of the switch) within the time window via a second comparator. In response to the detection of the zero-crossing condition within the time window, the controller activates the switch to the ON state.

[0015] In one implementation, the controller activates the switch associated with the secondary winding to the ON state within a time window in response to a detection condition where the amplitude of the monitored secondary winding voltage crosses the amplitude of the output voltage generated from the secondary winding (zero voltage crossover).

[0016] The embodiments described herein are more advantageous than conventional techniques. For example, conventional techniques are prone to incorrectly activating the secondary winding switch due to the repeated crossings of the monitored secondary winding voltage with corresponding thresholds, potentially leading to erroneous switching trigger conditions. Compared to conventional techniques, embodiments of the present invention include an integrator that determines a specific window in the switching cycle that allows switching of the secondary winding switch at an appropriate time after activation of the primary-side switch.

[0017] These implementation methods and other more specific implementation methods are disclosed in more detail below.

[0018] Note that, in addition to potentially being implemented as analog controllers and corresponding analog circuitry / components as described herein, embodiments described herein include implementations of the described circuitry via digital controllers / monitors. More specifically, note that any resources discussed herein may include digital circuitry that performs and / or supports the operation of any or all of the methods disclosed herein, such as one or more computerized devices, apparatuses, hardware, etc. In other words, one or more computerized devices or processors may be programmed and / or configured to operate as explained herein to perform the various embodiments described herein.

[0019] Other embodiments of this document include software programs for performing the steps and / or operations outlined above and detailed below. One such embodiment includes a computer program product comprising a non-transitory computer-readable storage medium (i.e., any computer-readable hardware storage medium) on which software instructions are encoded for subsequent execution. When executed in a computerized device (hardware) having a processor, the instructions and / or program cause the processor (hardware) to perform the operations disclosed herein. Such arrangements are typically provided as software, code, instructions, and / or other data (e.g., data structures) arranged or encoded on firmware in a non-transitory computer-readable storage medium such as an optical medium (e.g., a CD-ROM), floppy disk, hard disk, memory stick, storage device, etc., or as application-specific integrated circuits (ASICs), etc. Software or firmware or other such configurations may be installed on a computerized device to cause the computerized device to perform the techniques described herein.

[0020] Therefore, the embodiments described herein are for methods, systems, computer program products, etc., that support the operations discussed herein.

[0021] One embodiment includes a computer-readable storage medium and / or system storing instructions thereon for generating an output voltage to supply power to a load. When executed by a computer processor, the instructions cause the computer processor to: monitor the voltage of a secondary winding; obtain an integrator voltage based on the monitored voltage from the secondary winding; and control the operating state of a switch based on the integrator voltage.

[0022] For clarity, the order of the above operations has been added. Note that any processing steps as discussed in this article can be performed in any suitable order.

[0023] Other embodiments of this disclosure include software programs and / or corresponding hardware to perform any of the method implementation steps and operations outlined above and detailed below.

[0024] It should be understood that the systems, methods, devices, instructions on computer-readable storage media discussed herein can also be strictly implemented as software programs, firmware, a mixture of software, hardware and / or firmware, or as separate hardware, for example, within a processor (hardware or software), within an operating system, or within a software application.

[0025] It should also be noted that although the embodiments discussed herein are applicable to controlling switches in a power supply operable to generate an output voltage, the concepts disclosed herein can be advantageously applied to any other suitable voltage converter topology.

[0026] Furthermore, it should be noted that although each of the different features, techniques, configurations, etc., described herein may be discussed in different places within this disclosure, it is intended that each of these concepts may optionally be implemented independently of each other or in combination with each other, where appropriate. Therefore, one or more of the inventions described herein can be practiced and observed in many different ways.

[0027] Additionally, it should be noted that the preliminary discussion of embodiments herein (Summary of the Invention) intentionally does not specify every embodiment and / or new aspect of this disclosure or the claimed invention. Instead, the Summary of the Invention presents only general embodiments and corresponding points of novelty relative to conventional technology. For additional details and / or possible perspectives (alternatives) of the invention, the reader will be directed to the Detailed Description section (which is an overview of the embodiments) and the corresponding drawings of this disclosure, as further discussed below. Attached Figure Description

[0028] Figure 1 This is an example general diagram illustrating power supply and switching control according to an embodiment of this document.

[0029] Figure 2 This is a more detailed example diagram illustrating the power supply and switching control according to the embodiments described herein.

[0030] Figure 3 This is an example timing diagram of the monitor and switch control signals according to the embodiments described herein.

[0031] Figure 4 This is an example flowchart illustrating the operation of a power supply according to an embodiment of this document.

[0032] Figure 5 This is an example timing diagram illustrating multiple control cycles according to an embodiment of this document.

[0033] Figure 6 This is an example diagram illustrating an integrator according to an embodiment of this document.

[0034] Figure 7 This is an example diagram illustrating a zero-crossing detector according to an embodiment of this document.

[0035] Figure 8 This is an example diagram illustrating a computer architecture operable to perform one or more operations according to embodiments described herein.

[0036] Figure 9 This is an example diagram illustrating a method according to an embodiment of this document.

[0037] Figure 10 This is an example diagram illustrating the manufacture of a corresponding power supply system and related circuitry according to the embodiments described herein.

[0038] As illustrated in the accompanying drawings, the foregoing and other objectives, features, and advantages of the embodiments described herein will become apparent from the more detailed description below, in which similar reference numerals refer to the same parts throughout different views. The drawings are not necessarily drawn to scale, but are intended to illustrate embodiments, principles, concepts, etc. Detailed Implementation

[0039] According to one embodiment, the power supply includes a primary winding, a secondary winding, a switch, and a controller. The secondary winding is magnetically coupled to the primary winding. The switch is coupled to the secondary winding. The controller controls the state of the switch based on an integrator voltage obtained by monitoring the voltage from the secondary winding. For example, the controller generates an enable window based on the integrator voltage. During the enable window, the controller activates the switch to the ON state in response to detecting a condition that the amplitude of the monitored voltage from the secondary winding crosses a threshold, such as the amplitude of the output voltage generated from the secondary winding.

[0040] Now, more specifically, Figure 1 This is an example diagram illustrating a power supply according to an embodiment of this document.

[0041] As shown in this example embodiment, the power supply 100 (e.g., device, electronic device, etc.) includes a transformer 120, switches S1 and S2, a monitor 130, a controller 140, an output capacitor 136, and a load 118. The transformer 120 includes a primary winding 121 and a secondary winding 122.

[0042] In this example embodiment, the primary winding 121 is magnetically coupled to the secondary winding 122. Therefore, current flowing through the primary winding 121 results in the storage of corresponding magnetic energy E in the transformer 120. The secondary winding 122 uses the energy received from the primary winding to generate an output voltage 123. In one embodiment, current flows through the inherent diode (approximately 0.7 volt drop) of switch S2 (extending between the source (anode of the diode) and drain (cathode of the diode)). However, activation of switch S2 reduces the voltage difference between the drain and source nodes of switch S2, providing higher conversion efficiency.

[0043] The primary winding 121 and the switch S1 are connected in series and coupled to the input voltage source V. IN Between and the ground reference.

[0044] The secondary winding 122 and the switch S2 are connected in series to generate a corresponding output voltage 123 to power the load 118.

[0045] Monitor 130 monitors the voltage 161 at node 125 that couples the secondary winding 122 to switch S2. Monitor 130 generates a voltage 162 (e.g., voltage V) based on this monitoring, which is provided to controller 140 or used by monitor 130 to generate a window signal. INTEGRATOR ).

[0046] Output capacitor 136 stores output voltage 123.

[0047] Normally, during operation, the switch S1 is activated by the corresponding controller function on the primary side (left side of winding 121), causing the input voltage source (V) to be activated. IN The current flows through the primary winding 121 and the switch S1. Based on the current flow during the first part of the control cycle, the primary winding 121 stores magnetic energy E in the transformer.

[0048] During the second part of the control cycle, controller 140 activates switch S2. The activation of switch S2 enables secondary winding 122 to more efficiently convert the energy E received from primary winding 121 into output voltage 123 supplied by load 118.

[0049] As further shown, and as its name suggests, monitor 130 monitors voltage 161 associated with node 125, which provides coupling between the axial end of secondary winding 122 and the drain node of switch S2, such as switch S2.

[0050] In one embodiment, the monitor 130 includes an integrator that obtains a voltage 162 based on the received voltage 161. Additional details regarding the generation of the integrator voltage 162 based on the winding voltage 161 are discussed further below.

[0051] As further shown, in the second part of the corresponding control cycle, the controller 140 controls the state of switch S2 based at least in part on a voltage 162 (e.g., integrator voltage) obtained from monitoring a voltage 161 from the secondary winding 122. As discussed further below, in one embodiment, the monitor 130 and / or the controller 140 generate an enable window based on the integrator voltage 162. During the enable window, the controller 140 monitors the voltage 161 and triggers switch S2 to the ON state in response to a condition that detects the amplitude of the monitored voltage 161 from the secondary winding 122 crosses a threshold (e.g., the amplitude of the output voltage 123 generated from the secondary winding 122). In one embodiment, the control of switch S2 provides the desired zero-voltage switching.

[0052] The implementation described herein is more advantageous than conventional techniques. For example, conventional techniques are prone to incorrectly activating secondary winding switches such as S2 due to the repeated crossings of the monitored secondary winding voltage with the corresponding threshold, resulting in erroneous switching triggering conditions. In contrast to conventional techniques, the implementation described herein includes a monitor 130 determining a specific window in the switching cycle via an integrator function, within which the switch S2 is allowed to be switched to the ON state.

[0053] Figure 2 This is a more detailed example diagram illustrating the power supply according to the embodiments described herein.

[0054] In this example embodiment, the power supply 100 includes a rectifier 210, a capacitor 215, a buffer circuit 220, a transformer 120, a switch S1, a primary-side controller 141, a feedback network 299, a monitor 130, a controller 140, and a switch S2.

[0055] As previously described, transformer 120 includes a primary winding 121 and a secondary winding 122. The secondary winding 122 is magnetically coupled to the primary winding 121.

[0056] During operation, rectifier 210 receives AC input voltage 212. Rectifier 210 includes diodes D1, D2, D3, and D4.

[0057] Power supply 100 generates input voltage 121-1 (DC voltage or quasi-DC voltage) via rectifier 210. As further shown, input voltage 121-1 is input to winding 121 of transformer 120. As a result of switching, buffer circuit 220 reduces voltage spikes across winding 121.

[0058] In the first part of the corresponding control cycle, the primary-side controller 141 activates switch S1 (e.g., field-effect transistor, bipolar junction transistor, etc.) for a period of time, so that current flows through winding 121 and into switch S1 to the ground reference. When switch S1 is activated to the on state, switch S2 is deactivated to the off state.

[0059] Activating switch S1 to the ON state causes energy E to be stored in the primary winding 121, which is magnetically coupled to the secondary winding 122. In one embodiment, the primary-side controller 141 controls the operation of switch S1 based on one or more feedback parameters, such as the amplitude of the output voltage 123 provided by the feedback network 299.

[0060] As further shown, power supply 100 includes a monitor 130 and a controller 140. The monitor 130 and controller 140 together control the operation of switch S2. For example, after temporarily activating switch S1 to the ON state, controller 140 temporarily activates switch S2 to more efficiently convert the energy E received from primary winding 121 into the corresponding output voltage 123. In other words, temporarily activating switch S2 in each of the plurality of corresponding control cycles as described herein results in a more efficient conversion of the energy E from primary winding 121 into output voltage 123.

[0061] As further shown, the activation of switch S2 after temporarily activating switch S1 is determined based on output voltage 123 and a corresponding voltage 161 associated with winding 122. In one embodiment, the amplitude of voltage 161 associated with winding 122 varies during the corresponding control cycle. Monitor 130 is implemented in a manner that allows controller 140 to identify an appropriate time window in which zero-crossing conditions are monitored by comparing and monitoring output voltage 123 and voltage 161.

[0062] As a more specific example, monitor 130 includes a difference function 235, a converter 240, a capacitor 245, a switch S3, and a comparator 250.

[0063] Typically, in this example implementation, the monitor 130 generates a corresponding enable window signal 252, enabling the controller 140 to activate the switch S2 upon detecting a zero-crossing condition. The enable window signal 252 is logic high when the amplitude of the integrator voltage 162 is greater than the threshold voltage 249.

[0064] Therefore, in one embodiment, the voltage 161 monitored from the secondary winding 122 is received from the node 125 associated with the secondary winding 122, which couples the switch S2 and the secondary winding 122.

[0065] As further shown, the monitor 130 obtains the enable window signal 252 based on the integrator voltage 162 stored in the capacitor 245.

[0066] The enable window signal 252 can be generated in any suitable manner. In one embodiment, the monitor 130 generates the integrator voltage 162 based on the voltage 161 and the output voltage 123.

[0067] More specifically, as its name suggests, the difference function 235 (e.g., an addition function, a subtraction function, etc.) generates a signal 247 based on the difference between the amplitudes of the winding voltage 161 and the output voltage 123. For example, in one embodiment, the difference function 235 subtracts the amplitude of the output voltage 123 from the amplitude of the voltage 161 to generate the signal 247 provided to the converter 240.

[0068] Converter 240 converts signal 247 (e.g., the voltage difference discussed earlier) into a corresponding current that drives capacitor 245 to generate integrator voltage 162. The magnitude of the corresponding current output from converter 240 is proportional to the difference between the magnitude of voltage 161 and the magnitude of output voltage 123. Therefore, the voltage 162 stored in capacitor 245 increases as switch S3 is deactivated (off state).

[0069] Therefore, the embodiments described herein include generating an integrator voltage 162 by integrating the difference between the monitored voltage 161 from the secondary winding 122 and the output voltage 123 generated by the secondary winding 122 through an integrator function associated with the monitor 130.

[0070] As further shown, switch S3 controls the discharge of integrator voltage 162. Controller 140 and / or monitor 130 activate switch S3 at various times, for example, when switch S1 and / or switch S2 are deactivated. In the following... Figure 3 Additional details are shown in the timing diagram.

[0071] Refer again Figure 2 The monitor 130 also includes a corresponding comparator 250. The comparator 250 generates an enable window signal 252 based on a comparison between the integrator voltage 162 (stored in capacitor 245) and a threshold 249.

[0072] For example, when the amplitude of the integrator voltage 162 is greater than the threshold voltage 249, the comparator 250 generates a high-state (enable trigger condition state) window signal. Therefore, embodiments of this document include using the integrator voltage 162 to identify the state that activates the second switch S2.

[0073] As further shown, the controller 140 includes a comparator 255 that controls the activation of the switch S2.

[0074] In one implementation, a comparator 255 associated with the controller 140 compares the magnitude of the winding voltage 161 with the magnitude of the output voltage 123. Based on the comparison, the comparator 255 generates a corresponding signal 257.

[0075] For example, when the amplitude of winding voltage 161 drops below the output voltage 123, comparator 255 generates a logic high signal 257. In this case, assuming signal 252 is also logic high (e.g., during the corresponding enable window), AND gate 260 also generates a logic high signal 277. This causes flip-flop 265 to generate a high control signal 105, causing switch S2 to turn on. After switch S2 has been activated for an appropriate amount of time in the corresponding control cycle, controller 140 resets flip-flop 265 via signal 278. This causes control signal 105 to go low and turn off the corresponding switch S2.

[0076] Therefore, embodiments of this document include one or more comparators to generate an enable window signal 252 (window signal) and to detect the crossover of the monitored voltage 161 with respect to a threshold such as the output voltage 123. More specifically, in one embodiment, controller 140 and monitor 130 compare the integrator voltage 162 with a threshold 249 via a first comparator 250. Comparator 250 generates the enable window signal 252, enabling switch S2 to be activated, based on this comparison during a time window in which the integrator voltage 162 is detected to be above the threshold voltage 249. Controller 140 detects a trigger condition (e.g., a zero-crossing condition) within the time window via a second comparator 255. In response to detecting a zero-crossing condition within the time window indicated by signal 257, controller 140 activates switch S2 in the manner described above.

[0077] Figure 3 This is an example timing diagram of signals according to the embodiments described herein.

[0078] Between time T1 and time T9, reset signals R1, R2, R3, and R4 reset voltage 162 on capacitor 245 via activation of switch S3. More specifically, switch S3 is activated between time T1 and time T2 (the reset duration of R1); switch S3 is activated between time T3 and time T4 (the reset duration of R2); switch S3 is activated between time T5 and time T6 (the reset duration of R3); and switch S3 is activated between time T7 and time T8 (the reset duration of R4). As previously stated, activation of switch S3 prevents integrator voltage 162 from rising above threshold 249.

[0079] Further exemplary embodiments of this document include resetting the integrator voltage 162 on capacitor 245 in response to detecting one or more conditions. For example, embodiments of this document include resetting the integrator voltage 162 during: i) a resonant condition where the magnitude of voltage 161 at node 125 is less than the output voltage 123 generated by secondary winding 122, ii) a diode conduction condition, etc.

[0080] Between time T9 and time T11, switch S1 is activated to allow current to flow through the primary winding 121. Under these conditions, the amplitude of integrator voltage 162 increases monotonically between time T9 and T11. At time T10, the amplitude of integrator voltage 162 exceeds the threshold 249. This causes enable window signal 252 to be set to a logic high state.

[0081] At or approximately at time T11, switch S1 is deactivated. The embodiments described herein include activating switch S2 immediately after or at the zero-crossing of voltage 161 relative to output voltage 123. Therefore, in one embodiment, there is a small delay between the activation of switch S1 and the activation of switch S2. This rapid switching results in no diode conduction.

[0082] Similarly, at or around time T11, since the enable window signal 252 output from comparator 250 is already logic high, the first input of AND gate 260 is set to logic high.

[0083] As previously described, comparator 255 controls the second input of AND gate 260. Therefore, signal 277 will not enter a logic high state (turning on switch S2) until comparator 255 detects that voltage 161 becomes less than output voltage 123. At this time, signal 257 becomes logic high, causing signal 277 to be set to logic high, which in turn causes the output Q of flip-flop 265 to drive switch S2 to the ON state.

[0084] Controller 140 controls signal 105 and the corresponding switch S2 to be in the ON state between time T11 and time T13. At this time, as expected, the integrator voltage 162 steadily decreases. This completes the function of activating the first switch S1 between time T9 and time T11 and subsequently activating switch S2 between time T11 and time T13.

[0085] Between time T15 and the end of the corresponding control cycle, the voltage 161 at node 125 continues to oscillate around (resonate) the output voltage 123. However, as previously mentioned, the voltage 162 on capacitor 245 is prevented from rising above the threshold voltage 249 due to reset duration R5 (between time T14 and time T15), reset duration R6 (between time T17 and time T18), etc.

[0086] In this way, the generation of integrator voltage 162 and the corresponding enable window signal 252 between times T10 and T12 is used as the basis for which crossover of enable and control voltage 161 relative to output voltage 123 (threshold) is used as the basis for activating switch S2.

[0087] As described herein, an enable window signal 252, derived from the monitored voltage 161 of the secondary winding 122, prevents incorrect activation of the switch S2. More specifically, in one embodiment, the monitored voltage 161 of the secondary winding 122 repeatedly crosses a threshold 249 during the corresponding control cycle in which an output voltage 123 is generated from the secondary winding 122 to power the load 118. Enabling control of the switch S2 during the enable window signal 252 (between T11 and T13) prevents incorrect activation of the switch S2 at undesired times during the control cycle. In other words, as described herein, embodiments of this invention include preventing activation of the switch S3 outside the enable window (T11 to T13).

[0088] Figure 4 This is an example flowchart illustrating the operation of a power supply according to an embodiment of this document.

[0089] Flowchart 400 illustrates the operation performed by the power supply to support zero-voltage switching of switch S2 on the secondary side of power supply 100.

[0090] In operation 410, controller 140 activates the function of monitoring the activation of switch S1.

[0091] In operation 420, monitor 130 monitors voltage 161 to determine the time window during which integrator voltage 162 is above threshold 249. In one embodiment, as previously described, activation of switch S1 causes integrator voltage 162 to rise above threshold 249 and generates enable window signal 252.

[0092] In operation 430, during the period when the integrator voltage 162 is above a threshold (e.g., during the corresponding time window), the controller 140 compares the voltage 161 with the output voltage 123 to determine the corresponding zero-voltage crossover condition associated with the voltage 161 at node 125 for activating switch S2.

[0093] In operation 440, in response to detecting a zero-voltage crossover condition associated with voltage 161 during the time window of signal 252 obtained from integrator voltage 162, controller 140 activates switch S2 to the ON state.

[0094] Figure 5 This is an example timing diagram illustrating multiple control cycles according to an embodiment of this document.

[0095] As shown in this example implementation, control cycle #1 occurs between time T9 and time T29.

[0096] The portion of control cycle #1 between times T9 and T11 represents the approximate amount of time during which switch S1 is activated to the ON state (while switch S2 is deactivated to the OFF state). The time between T11 and T13 represents the approximate amount of time during which switch S2 is activated to the ON state (while switch S1 is deactivated to the OFF state). The time between T15 and T29 represents the duration during which both switches S1 and S2 are deactivated to the OFF state and the amplitude of voltage 161 varies according to the corresponding resonant frequency.

[0097] As shown in this example implementation, control cycle #2 occurs between time T29 and time T49.

[0098] The portion of control cycle #2 between times T29 and T31 represents the approximate amount of time during which switch S1 is activated to the ON state (while switch S2 is deactivated to the OFF state). The time between T31 and T33 represents the approximate amount of time during which switch S2 is activated to the ON state (while switch S1 is deactivated to the OFF state). The time between T35 and T49 represents the duration during which both switches S1 and S2 are deactivated to the OFF state and the amplitude of voltage 161 varies according to the corresponding resonant frequency.

[0099] In a similar manner to that previously discussed, power supply 100 repeats the following process: generating an enable window signal 252, and then activating the second switch S2 based on a zero crossing detected shortly after deactivating switch S1, avoiding cross-conduction and delay.

[0100] Figure 6 This is an example diagram illustrating an integrator according to an embodiment of this document. Generally, Figure 6 The circuit concept of the second voltage balance integral is shown.

[0101] To ensure good noise performance of the VDSR pin (voltage 161), current sensing is used to detect the VDSR voltage. In one implementation, this is achieved by clamping the VDSR pin to VCP_VDSR (typically 1.8V). The advantage of this method is its ability to sense both positive and negative currents. The same method is used to detect VSENSE (aka Vout) for better matching.

[0102] In this example implementation, Figure 6 The implementation of an integrator circuit including a difference function 235, a voltage-to-current converter 240, a capacitor 245, and a switch S3 is shown.

[0103] For example, the combination of the difference function 235 and the voltage-to-current converter 240 is realized via resistor R61, transconductance amplifier 661, digital-to-analog converter 635, gain stage 671, resistor R62, transconductance amplifier 662 and gain stage 672.

[0104] Resistor R61 sets the gain of transconductance amplifier 661. Resistor R62 sets the gain of transconductance amplifier 662.

[0105] During operation, the combination of resistor R61, transconductance amplifier 661 and gain stage 671 produces a corresponding current 681 that is proportional to the magnitude of the output voltage 123.

[0106] The combination of resistor R62, transconductance amplifier 662 and gain stage 672 produces a corresponding current 682 that is proportional to the magnitude of the output voltage 123.

[0107] As discussed above, the magnitude of the voltage 162 across capacitor 245 is the integral of the difference between voltage 161 and output voltage 123.

[0108] Note that, since it is difficult to ensure that the transconductance is ideally matched, the implementation described herein includes a reset function applied to switch S3 to ensure that the SR integrator (voltage across capacitor 245) will start from the appropriate voltage when a PWM (pulse width modulation) pulse is present. Capacitor 245 is reset via activation of switch S3. The reset signal (R1, R2, R3, R4, R5, R6, etc.) applied to switch S3 is activated under the following conditions:

[0109] 1. Diode conduction time at the end of demagnetization

[0110] 2. Before generating ZVS pulses

[0111] 3. Rising edge of SR ZC comparator (250)

[0112] Figure 7 This is an example diagram illustrating a zero-crossing detector according to an embodiment of this document.

[0113] In this example implementation, controller 140 includes resistor R7, offset voltage source 720, and comparator 255. In this case, the sensed current from the VDSR pin (voltage 161) and the VSENSE pin (also known as VOUT or output voltage 123) is as follows: Figure 7 The comparison shown internally (e.g., current I via VSENSE) VSENSE Current I with VDSR VDSR ).

[0114] In this case, the matching can be done internally. When a zero crossing occurs, I...VDSR and I VSENSE They are equal. Therefore, there will be no voltage drop across the 100KΩ resistor R7. In response to the detection of a zero crossing in the manner previously discussed, signal 257 goes high.

[0115] Figure 8 This is an example block diagram of a computer system for implementing any of the operations previously discussed, according to embodiments of this document.

[0116] Any resources discussed herein (such as controller 140, monitor 130, etc.) can be configured to include computer processor hardware and / or corresponding executable instructions to perform the different operations discussed herein.

[0117] For example, as shown, the computer system 800 of this example includes an interconnect 811 coupled to a computer-readable storage medium 812 such as a non-transitory type medium (which may be any suitable type of hardware storage medium capable of storing and retrieving digital information), a processor 813 (computer processor hardware), an input / output interface 814, and a communication interface 817.

[0118] Multiple input / output interfaces 814 support connection to voltage converter 110.

[0119] The computer-readable storage medium 812 can be any hardware storage device, such as a memory, optical memory, hard disk drive, floppy disk, etc. In one embodiment, the computer-readable storage medium 812 stores instructions and / or data.

[0120] As shown, the computer-readable storage medium 812 may be encoded with a controller application 140-1 (e.g., including instructions) to perform any operation as discussed herein.

[0121] During operation in one implementation, processor 813 accesses computer-readable storage medium 812 via interconnect 811 to initiate, run, implement, interpret, or otherwise execute instructions in controller application 140-1 stored on computer-readable storage medium 812. Execution of controller application 140-1 produces controller process 140-2 to perform any operations and / or processes as discussed herein.

[0122] Those skilled in the art will understand that the computer system 800 may include other processes and / or software and hardware components, such as an operating system that controls the allocation and use of hardware resources to execute the controller application 140-1.

[0123] Note that, depending on the implementation, the computer system can reside in any of a variety of devices, including but not limited to: power supplies, switched-capacitor converters, power converters, mobile computers, personal computer systems, wireless devices, wireless access points, base stations, telephone devices, desktop computers, laptop computers, notebook computers, netbook computers, mainframe computers, handheld computers, workstations, network computers, application servers, storage devices, consumer electronics devices (e.g., cameras, camcorders, set-top boxes, mobile devices, video game consoles, handheld video game devices), peripheral devices (e.g., switches, modems, routers, set-top boxes, content management devices, handheld remote controls), any type of computing or electronic device, etc. The computer system 800 can reside anywhere or can be included in any suitable resource in any network environment to achieve the functions discussed herein.

[0124] Now will be via Figure 9 The flowcharts below discuss the features supported by different resources. Note that the steps in the flowcharts below can be performed in any suitable order.

[0125] Figure 9 This is a flowchart 900 illustrating an example method according to an embodiment of this document. Note that there will be some repetition of the concepts discussed above.

[0126] In processing operation 910, controller 140 (via corresponding monitor 130) monitors voltage 161 of secondary winding 122.

[0127] In processing operation 920, monitor 130 obtains integrator voltage 162 based on the voltage 161 received from secondary winding 122 via integrator 245.

[0128] In processing operation 930, controller 140 controls the operating state of switch S2 based on integrator voltage 161.

[0129] Figure 10 This is an example diagram illustrating an assembly of a circuit board including a current monitor and a controller according to an embodiment of this document.

[0130] In this example embodiment, assembly 1040 accommodates substrate 1010 (such as a circuit board).

[0131] Assembly 1040 further secures (couples) components of power supply 100 (e.g., including monitor 130, controller 140, switch S2, transformer 120, etc.) to substrate 1010.

[0132] Assembly 1040 or other suitable entity couples power supply 100 to load 118 via one or more circuit paths 1022 (e.g., one or more traces, conductors, cables, wires, etc.).

[0133] Note that components such as transformer 120, monitor 130, controller 140, switch S2, etc., can be fixed or coupled to the base plate 1010 in any suitable manner. For example, one or more components of the power supply 100 can be soldered to the base plate, inserted into one or more corresponding sockets on the base plate 1010, etc.

[0134] Note further that the substrate 1010 is optional. If needed, the components of the power supply 100 and the corresponding circuit paths can be arranged in cables or other suitable resources.

[0135] Assembly 1040 provides a connection from power supply 100 to load 118 via one or more circuit paths (e.g., one or more traces, cables, connectors, wires, conductors, conductive paths, etc.). In one embodiment, circuit path 1022 delivers an output voltage 123 from power supply 100 to load 118.

[0136] Therefore, embodiments of this document include a system comprising: a substrate 1010 (such as a circuit board, a stand-alone board, a motherboard, a stand-alone board intended to be coupled to the motherboard, a host, etc.); a power supply 100 including the corresponding components described herein; and a load 118. As previously described, the load 118 is powered based on the transmission of an output voltage 123 over one or more paths 1022.

[0137] It should be noted again that the techniques described in this article are well-suited for power supply applications. However, it should be understood that the implementations described herein are not limited to such applications, and the techniques discussed herein are also well-suited for other applications.

[0138] Although the invention has been specifically shown and described with reference to preferred embodiments thereof, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit and scope of the invention as defined by the appended claims. These variations are intended to be covered by the scope of this application. Therefore, the embodiments of the invention described above are not intended to be limiting. Rather, any limitations on the invention are presented in the appended claims.

Claims

1. A control device, comprising: The power controller operates as follows: Monitor the voltage of a secondary winding magnetically coupled to a primary winding, the secondary winding being configured to receive energy from the primary winding; The integrator voltage is obtained based on the monitored voltage from the secondary winding; The operating state of the first switch coupled to the secondary winding is controlled based on the integrator voltage. as well as The power controller is further configured to activate the first switch to the ON state in response to detecting that the amplitude of the monitored voltage crosses the first threshold during a time window when the amplitude of the integrator voltage is higher than the second threshold.

2. The control device according to claim 1, wherein, The voltage monitored from the secondary winding is received from a node associated with the secondary winding, the node coupling the first switch and the secondary winding.

3. The control device according to claim 1, wherein, The power controller includes an integrator that is configured to generate an integrator voltage by integrating the difference between a monitored voltage from the secondary winding and an output voltage generated by the secondary winding.

4. The control device according to claim 1, wherein, The power controller includes a voltage-to-current converter configured to supply current to a capacitor configured to store the integrator voltage. The supplied current is proportional to the difference between a monitored voltage from the secondary winding and an output voltage generated by the secondary winding.

5. The control device according to claim 1, wherein, The power controller is further configured to use the integrator voltage to identify the state of activation of the second switch, which controls the current through the primary winding.

6. The control device according to claim 1, wherein, The power controller is further configured to: The integrator voltage is reset when it is not in use, and the reset is lifted when the magnetizing current is expected to cross zero.

7. The control device according to claim 3, wherein, The integrator voltage is a ramp voltage generated by the integrator based on the difference between the monitored voltage from the secondary winding and the output voltage generated by the secondary winding.

8. The control device according to claim 7, wherein the power controller is further configured to: The amplitude of the integrator voltage is compared with a threshold value via a comparator to generate a comparison signal. The state of the comparison signal controls the operation of the first switch and the current through the secondary winding.

9. The control device of claim 1, wherein the amplitude of the integrator voltage rises above a threshold in response to activation of a second switch to an ON state, the second switch being configured to control the current through the primary winding.

10. The control device of claim 9, wherein the amplitude of the integrator voltage decreases during the period when the second switch is deactivated to the off state and the first switch is activated to the on state.

11. The control device according to claim 1, wherein the first threshold is an output voltage generated by the secondary winding.

12. The control device of claim 1, wherein the amplitude of the integrator voltage increases during the period when the second switch is activated to the ON state and the first switch is deactivated to the OFF state; and wherein the amplitude of the integrator voltage decreases during the period when the first switch is activated to the ON state and the second switch is deactivated to the OFF state.

13. The control device of claim 1, wherein the monitored voltage of the secondary winding repeatedly crosses the first threshold outside a time window during the corresponding control cycle from which the output voltage is generated; and The power controller is further configured to disable control of the first switch outside the time window to prevent activation of the first switch during periods when the monitored voltage of the secondary winding repeatedly crosses the first threshold outside the time window.

14. The control device of claim 1, wherein the power controller is further configured to determine an event to activate the second switch to the on state based on the magnitude of the integrator voltage.

15. The control device according to claim 1, wherein the amplitude of the integrator voltage is a cumulative value obtained from the monitored voltage.

16. A control device, comprising: The power controller operates as follows: Monitor the voltage of a secondary winding magnetically coupled to a primary winding, the secondary winding being configured to receive energy from the primary winding; The integrator voltage is obtained based on the monitored voltage from the secondary winding; as well as The operating state of the switch coupled to the secondary winding is controlled based on the integrator voltage. The power controller includes a first comparator configured to compare the integrator voltage with a threshold; and The power controller is further configured to generate an activation signal that enables the switch to activate during a time window in which the integrator voltage is detected to be above the threshold.

17. The control device according to claim 16, wherein, The power controller includes a second comparator that operates to activate the switch to an ON state in response to detecting a zero-crossing condition of the monitored voltage within the time window.

18. The control device according to claim 16, wherein, The power controller includes a second comparator that is configured to activate the switch to an ON state within the time window in response to a condition that the amplitude of the monitored voltage crosses with the amplitude of the output voltage generated from the secondary winding.

19. A control device, comprising: The power controller operates as follows: Monitor the voltage of a secondary winding magnetically coupled to a primary winding, the secondary winding being configured to receive energy from the primary winding; The integrator voltage is obtained based on the monitored voltage from the secondary winding; The operating state of the switch coupled to the secondary winding is controlled based on the integrator voltage; The power controller is further configured to activate the switch to the ON state in response to a condition that the amplitude of the monitored voltage crosses with the amplitude of the output voltage generated from the secondary winding.

20. A power supply, comprising: The primary winding, secondary winding, and power controller according to claim 1.

21. A control method, comprising: Monitor the voltage of the secondary winding magnetically coupled to the primary winding, wherein the secondary winding receives energy from the primary winding; The integrator voltage is obtained based on the monitored voltage from the secondary winding; The operating state of the switch coupled to the secondary winding is controlled based on the integrator voltage; The integrator voltage is compared with a threshold value via a first comparator; as well as During the time window during which the integrator voltage is detected to be higher than the threshold, an enable signal is generated to activate the switch.

22. The control method according to claim 21, further comprising: The monitored voltage is received from the node associated with the secondary winding that couples the switch and the secondary winding.

23. The control method according to claim 21, further comprising: The integrator voltage is generated by integrating the difference between the monitored voltage from the secondary winding and the output voltage generated by the secondary winding.

24. The control method according to claim 21, further comprising: The switch is activated to the ON state in response to the detection of a zero-crossing condition within the time window.

25. The control method according to claim 21, further comprising: In response to the condition that the amplitude of the monitored voltage crosses with the amplitude of the output voltage generated from the secondary winding, the switch is activated to the ON state within the time window.

26. The control method according to claim 21, further comprising: Current is supplied to a capacitor via a voltage-to-current converter. The capacitor is configured to store the integrator voltage. The supplied current is proportional to the difference between the voltage detected from the secondary winding and the output voltage generated by the secondary winding.

27. The control method according to claim 21, wherein, The switch is a first switch, and the method further includes: The state of the second switch is activated by the integrator voltage identification, and the second switch controls the current through the primary winding.

28. A control device, comprising: The power controller operates as follows: Monitor the voltage of a secondary winding magnetically coupled to a primary winding, the secondary winding being configured to receive energy from the primary winding; The integrator voltage is obtained based on the monitored voltage from the secondary winding; The operating state of the first switch coupled to the secondary winding is controlled based on the integrator voltage. The power controller is further configured to determine, based on the amplitude of the integrator voltage, an event to activate the second switch to the on state; and The power controller is configured to detect the activation of the second switch to the on state based on the detection that the amplitude of the integrator voltage is higher than a threshold.

29. The control device of claim 28, wherein the power controller is further operable to activate the first switch during a time window following the activation of the second switch, the activation of the second switch controlling the duration of the time window.

Images