Disposal of Reinforcement Structure

Abstract

A processing method may be performed to produce a semiconductor structure that may include a high-k dielectric material. The method may include delivering a nitrogen-containing precursor or an oxygen-containing precursor to a substrate contained in a semiconductor processing chamber. The method may include forming a reactive ligand on an exposed surface of the substrate with the nitrogen-containing precursor or the oxygen-containing precursor. The method may also include forming a high-k dielectric material overlying the substrate.

Description

[0001] Cross - Reference to Related Applications

[0002] This application claims the benefit and priority of U.S. Patent Application No. 16 / 403,312, filed on May 3, 2019, the content of which is hereby incorporated by reference in its entirety for all purposes. Technical Field

[0003] The present technology relates to semiconductor systems, processes, and equipment. More particularly, the present technology relates to enhancing the treatment of materials formed in gate structures.

[0004] Background

[0005] Logic gate performance involves the material properties used, as well as the thickness and area of the structural layers. However, as some gate characteristics are adjusted to accommodate device scaling, challenges arise. For example, in silicon oxide gate dielectrics, capacitance can be improved as the thickness is reduced, which can lead to higher channel mobility and faster device performance. However, as the thickness continues to decrease, gate leakage can affect the device and can result in a reduction in device yield. High - k materials have been employed for gate dielectrics to reduce the effective oxide thickness while limiting the impact on gate leakage. Efforts to maximize a particular high - k material are limited due to morphological issues associated with the formation of the high - k material.

[0006] Accordingly, there is a need for improved systems and methods that can be used to maximize the performance of high - k materials and are capable of producing high - quality devices and structures. These and other needs are addressed by the present technology.

[0007] Summary

[0008] Processing methods can be implemented to produce semiconductor structures that can include a high - k dielectric material. The methods can include delivering a nitrogen - containing precursor or an oxygen - containing precursor to a substrate contained within a semiconductor processing chamber. The methods can include introducing a reactive ligand on an exposed surface of the substrate with the nitrogen - containing precursor or the oxygen - containing precursor. The methods can further include forming a high - k dielectric material covering the substrate.

[0009] In some embodiments, the nitrogen-containing precursor can be or include a first nitrogen-containing precursor, and the oxygen-containing precursor can be or include a first oxygen-containing precursor. The method can further include disposing a high-k dielectric material with a second nitrogen-containing precursor or a second oxygen-containing precursor after forming the high-k dielectric material. The second nitrogen-containing precursor can be or include a thermally activated nitrogen-containing precursor or a plasma-enhanced nitrogen-containing precursor. The disposal can incorporate nitrogen into the high-k dielectric material in an amount less than or about 10 atomic %. The method can further include performing a thermal annealing after forming the high-k dielectric material. Forming the high-k dielectric material can include performing an atomic layer deposition process. The nitrogen-containing precursor can be or include ammonia. While delivering ammonia, the substrate can be maintained at a temperature higher than or about 300 °C. The substrate can be or include a silicon-containing material. The high-k dielectric material can be or include at least one element selected from the group consisting of hafnium, zirconium, silicon, lanthanum, aluminum, titanium, and strontium.

[0010] Some embodiments of the present technology can further include a method of forming a semiconductor structure. The method can include pre-treating the substrate by contacting the substrate with a nitrogen-containing precursor or an oxygen-containing precursor. The method can include forming a high-k dielectric material covering the pre-treated substrate in a first semiconductor processing chamber housing the pre-treated substrate. The method can include transferring the substrate to a second semiconductor processing chamber. The method can further include post-treating the high-k dielectric material.

[0011] In some embodiments, the post-treatment can include exposing the substrate and the high-k dielectric material to an oxygen-containing precursor or a nitrogen-containing precursor. The method can include annealing the high-k dielectric material after the post-treatment. Transferring the substrate to the second semiconductor processing chamber can include transferring the substrate between two chambers on a multi-chamber processing system. The transfer can be performed while maintaining vacuum conditions on the multi-chamber processing system. The nitrogen-containing precursor for pre-treatment can be or include ammonia. While delivering ammonia to the substrate, the substrate can be maintained at a temperature lower than about 700 °C. The pre-treatment can be performed for less than or about one minute. The substrate can be or include a silicon-containing material, and the exposed surface layer of the silicon-containing material can be silicon. The silicon-containing material can be or include silicon oxide. The high-k dielectric material can be or include at least one element selected from the group consisting of hafnium, zirconium, silicon, lanthanum, aluminum, titanium, and strontium.

[0012] Some embodiments of the present technology can further include a method of forming a semiconductor structure. The method can include pre-treating a substrate including a silicon-containing material by contacting the substrate with a nitrogen-containing precursor or an oxygen-containing precursor while maintaining the substrate at a first temperature greater than or about 400 °C. The method can include forming a high-k dielectric material covering the pre-treated substrate while maintaining the pre-treated substrate at a second temperature lower than the first temperature. The method can further include post-treating the high-k dielectric material with an annealing performed at a third temperature greater than the first temperature or approximately the same as the first temperature.

[0013] Such techniques can provide several advantages over conventional systems and techniques. For example, the process can produce a more preferred structure of a high-k dielectric material. Additionally, the resulting high-k material can be characterized by reduced gate leakage compared to the same high-k dielectric material formed conventionally. These and other embodiments, along with many of their advantages and features, are described in more detail in conjunction with the following description and drawings.

[0014] Brief Description of the Drawings

[0015] A further understanding of the nature and advantages of the disclosed technology can be realized by reference to the remainder of the specification and drawings.

[0016] Figure 1 According to an embodiment of the present technology, a top plan view of an exemplary processing system is shown.

[0017] Figure 2 According to an embodiment of the present technology, selected operations in a method of forming a semiconductor structure are shown.

[0018] Figures 3A - 3C According to an embodiment of the present technology, a schematic cross-sectional view of an exemplary substrate is shown.

[0019] The drawings include several figures as schematic diagrams. It should be understood that these figures are for illustrative purposes only and should not be regarded as to scale, unless specifically stated to be to scale. Additionally, as schematic diagrams, these figures are provided to aid understanding and may not include all aspects or information compared to a real-world presentation and may include exaggerated material for illustrative purposes.

[0020] In the drawings, like components and / or features may have the same reference numerals. Furthermore, various components of the same type may be distinguished by following the reference numeral with a letter that differentiates among the similar components. If only the first reference numeral is used in the specification, the description may apply to any one of the similar components having the same first reference numeral, regardless of the letter.

[0021] Detailed Description

[0022] As logic gate structures are scaled down to smaller dimensions, new material structures are sought to provide improvements. Using a high-k dielectric increases the dielectric constant of the gate stack structure compared to a conventional gate stack structure using a material such as silicon oxide. However, similar to silicon oxide, as the thickness of the material decreases, gate leakage increases. For example, gate leakage increases as the effective oxide thickness decreases. Thus, the inverse relationship between gate leakage and effective oxide thickness can place limitations on the performance of the transistors and devices produced.

[0023] High-k dielectric materials can provide greater channel mobility at a similar thickness compared to silicon oxide. As the industry continues to seek smaller effective oxide thicknesses without increasing gate leakage, efforts to maximize the k-value of known high-k materials will reach a limit due to morphological characteristics. Conventional techniques have been struggling to overcome the natural properties of high-k materials, which may set an upper limit on the dielectric constant and subsequent attempts to incorporate new films into device architectures.

[0024] The present technology overcomes these problems by modifying the properties of the high-k dielectric material itself. By producing a high-k dielectric material that exhibits a specific morphology or grain structure according to an embodiment of the present technology, a higher dielectric constant and subsequent improved device performance can be achieved. To control the formation of grains in exemplary devices, treatments can be implemented to provide an activated substrate surface, which can initiate specific grain growth, and to stabilize the film after formation, which can result in a higher dielectric constant.

[0025] Although the remainder of the disclosure will use the disclosed technology to routinely determine specific deposition and treatment processes, it will be readily understood that the systems and methods can be equivalently applied to various other processes that occur within the chamber. Accordingly, the technology should not be considered limited to use only with the described treatment and deposition processes. Before describing the operations of an exemplary process sequence according to the present technology, the present disclosure will discuss one possible system that can be used with the present technology to implement certain elements of the deposition or treatment operations. It should be understood that the technology is not limited to the described equipment, and the discussed processes can be implemented in any number of processing chambers and systems.

[0026] Figure 1 A top plan view of one embodiment of a processing system 100 showing a deposition, etch, bake, and / or cure chamber according to an embodiment. Figure 1 The tool or processing system 100 depicted therein can include a plurality of process chambers 114A - 114D, a transfer chamber 110, a service chamber 116, an integrated metrology chamber 117, and a pair of load lock chambers 106A - 106B. The process chambers can include any number of structures or components, as well as any number of processing chambers or combinations of processing chambers.

[0027] To transfer substrates between chambers, the transfer chamber 110 may include a robotic transfer mechanism 113. The transfer mechanism 113 may have a pair of substrate transfer blades 113A attached to the distal ends of arms 113B that are capable of extending. The blades 113A may be used to carry individual substrates into and out of process chambers. In operation, one of the substrate transfer blades (e.g., blade 113A of transfer mechanism 113) may retrieve a substrate W from one of the load lock chambers such as chambers 106A - 106B and carry the substrate W to a first stage of processing, such as a disposition process as described below in chambers 114A - 114D. Chambers may be included to perform individual or combined operations of the techniques. For example, while one or more chambers may be configured to perform deposition or formation operations, one or more other chambers may be configured to perform pre - treatment operations and / or one or more of the post - treatment operations described. The present technique encompasses any number of configurations and may also perform any number of additional fabrication operations typically performed in semiconductor processing.

[0028] If the chamber is occupied, the robot may wait until processing is complete and then remove the processed substrate from the chamber with one blade 113A and insert a new substrate with a second blade (not shown). Once the substrate is processed, the substrate may then move to a second stage of processing. For each move, the transfer mechanism 113 may generally have one blade carrying a substrate and one empty blade to perform substrate replacement. The transfer mechanism 113 may wait at each chamber until replacement can be completed.

[0029] Once processing is complete within the process chamber, the transfer mechanism 113 may move the substrate W from the last process chamber and transfer the substrate W to a cassette within the load lock chambers 106A - 106B. From the load lock chambers 106A - 106B, the substrate may move to the factory interface 104. The factory interface 104 is generally operable to transfer substrates between the pod loaders 105A - 105D and the load lock chambers 106A - 106B in a clean environment at atmospheric pressure. The clean environment within the factory interface 104 is typically provided by an air filtration process, such as, for example, HEPA filtration. The factory interface 104 may also include a substrate orienter / aligner (not shown) that may be used to properly align the substrate prior to processing. At least one substrate robot such as robots 108A - 108B may be positioned within the factory interface 104 to transfer substrates between various positions / locations within the factory interface 104 and transfer substrates to other locations in communication with the factory interface 104. The robots 108A - 108B may be configured to travel along a track system within the factory interface 104 from a first end of the factory interface 104 to a second end.

[0030] The processing system 100 may further include an integrated metrology chamber 117 to provide control signals, which may provide adaptive control of any process implemented in the processing chamber. The integrated metrology chamber 117 may include any of a variety of metrology devices to measure various film properties such as thickness, roughness, composition, and the metrology device may further be capable of characterizing grating parameters, such as critical dimension, sidewall angle, and feature height, in a vacuum in an automated manner.

[0031] Each of the processing chambers 114A - 114D may be configured to perform one or more processing steps in the fabrication of semiconductor structures, and any number and combination of processing chambers may be used on the multi - chamber processing system 100. For example, any processing chamber may be configured to perform a number of substrate processing operations, including any number of deposition processes (including cyclic layer deposition, atomic layer deposition, chemical vapor deposition, physical vapor deposition) and other operations (including etching, pre - cleaning, pre - treatment, post - treatment, annealing, plasma processing, degassing, orientation, and other substrate processes). Some specific processes that may be performed in any chamber or in any combination of chambers may be metal deposition, surface cleaning and preparation, thermal annealing (such as rapid thermal processing), and plasma processing. Any other processes may be similarly performed in specific chambers incorporated into the multi - chamber processing system 100, including any of the processes described below, as will be readily understood by those skilled in the art.

[0032] Figure 2 A method 200 of forming a semiconductor structure is illustrated. The operations of method 200 may be performed, for example, in one or more of the chambers incorporated in the multi - chamber processing system 100 described previously. Before beginning the method operations, method 200 may include one or more operations, including front - end processing, deposition, etching, polishing, cleaning, or any other operations that may be performed prior to these operations. The method may include a number of optional operations as indicated in the figure, which may or may not be specifically associated with the method according to the present technology. For example, many operations are described to provide a broader range of structure - forming processes, but these operations are not critical to the technology or may be performed by alternative methods as will be further discussed below. Method 200 describes the operations outlined in Figures 3A - 3C and the illustration of these operations will be described in conjunction with the operations of method 200. It should be understood that FIG. 3 only illustrates a partial schematic view, and the substrate may contain any number of transistor partitions and additional materials having aspects as shown in the figure.

[0033] Method 200 may involve optional operations to develop the semiconductor structure to a particular fabrication operation. Although in some embodiments method 200 may be performed on a base structure, in some embodiments, the method may be performed after other materials are formed. AsFigure 3A As illustrated in the figure, the semiconductor structure may represent the device 300 after certain processing. For example, the substrate 305 may be a planar material or a structured device. The substrate 305 may include one or more materials configured or defined as columns, channels, or other structures that will be understood to be similarly included by this technology. The substrate 305 may include any number of materials, including silicon or silicon-containing materials, such as silicon oxides, silicon nitrides, and silicon carbides, as well as any other materials that can be incorporated into the structure.

[0034] One or more material layers may be formed over a portion of the substrate 305 or over the entire substrate, and at least partially within the substrate, to produce a structure of materials that may be planarized or structured in an embodiment. As a non-limiting example, the substrate 305 may be or include silicon, or may include a surface amount of silicon formed over additional materials, such as silicon oxide, and may be a reduced portion of the silicon oxide, leaving a silicon-exposed surface. The material exposed at the surface of the substrate 305 may be etched, planarized, or otherwise processed to produce an intermittent pattern in some embodiments. Although illustrated as a single instance, it should be understood that the device 300 may include smaller partitions of greater process integration and may include any number of additional partitions that may be similar to or different from the objects shown. The substrate 305 may be housed or positioned in the processing region of a semiconductor processing chamber, and method 200 may be implemented to produce semiconductor materials, such as high-k dielectric materials, on the substrate.

[0035] In operation 205, method 200 may include delivering a pre-treatment precursor to the substrate. The pre-treatment precursor may be or include a nitrogen-containing precursor or an oxygen-containing precursor. The precursor may contact the substrate and may form or introduce reaction ligands on the exposed surface of the substrate, which is shown as ligand 310 in Figure 3. Different from conventional techniques, this technology may utilize a pre-treatment configured to produce an ordered growth of high-k dielectric materials in subsequent operations.

[0036] For example, in some embodiments, the substrate may be or include an exposed surface of silicon. The substrate 305 may itself be silicon or may be some other silicon-containing material that has been reduced or modified to exhibit a silicon surface. As a non-limiting example, in the case where the substrate 305 may include silicon oxide, an initial pre-treatment may include, for example, removing oxygen from the surface of the structure (such as with a hydrogen-containing precursor). A thin surface layer of silicon may then be exposed. Without being bound by any particular theory, silicon may provide improved underlying properties for accommodating nitrogen-containing precursors relative to silicon oxide in some embodiments. This may give rise to superior formation of certain high-k dielectric materials.

[0037] The pre-treated precursor can be or include any nitrogen-containing or oxygen-containing precursor. The oxygen-containing precursor can be characterized by a hydroxyl group [-OH], which can be incorporated on the surface of the substrate 305. The nitrogen-containing precursor can be characterized by an amino group [-NH 2 , or other nitrogen-containing group. For example, the nitrogen-containing precursor can be or include a nitrogen- and hydrogen-containing precursor (such as ammonia as a non-limiting example) or a nitrogen- and oxygen-containing precursor, or any other precursor containing nitrogen.

[0038] In some embodiments, the surface terminus can be or include a surface with hydroxyl or amino termini. At operation 210, method 200 can then include forming a high-k dielectric material over the substrate. The present technology can encompass any formation or deposition of high-k materials, although in some embodiments formation operation 210 can be or include atomic layer deposition or any other atomic layer deposition chamber. The formation can be carried out directly after pre-treating the substrate surface and can be carried out in the same chamber as the pre-treatment or in an additional chamber, such as an additional chamber incorporated on the same system (such as system 100). In some embodiments, vacuum conditions can be maintained while transferring the substrate from the pre-treatment chamber to the deposition or formation chamber, which can limit the exposure of the substrate to air.

[0039] In the case of carrying out an atomic layer deposition process to form a high-k dielectric material, a metal-containing precursor can be delivered to the substrate to react with the pre-treated surface. For example, a transition-metal-containing precursor, a poor-metal-containing precursor, or a lanthanide-metal-containing precursor can be delivered to the processing chamber to interact with the reactive ligands exposed from the pre-treatment on the substrate. The oxygen-containing precursor can then be delivered in a second operation, such as after purging the metal-containing precursor. This can produce an oxide layer by atomic layer deposition, such as Figure 3B the layer 315 illustrated in. In a non-limiting example, a hafnium-containing precursor can be delivered in the first operation and an oxidizer can be delivered in the second operation to produce a hafnium oxide film. Additional metal-containing precursors can include zirconium-containing precursors for producing zirconium-containing materials, and any other number of metal-containing precursors for producing additional metal oxide structures. For hafnium-containing precursors, and similarly for any alternative metals, the precursor can be or include a halogen-containing precursor, an oxygen-containing precursor, a hydrogen-containing precursor, or a carbon-containing precursor, incorporating hafnium in any of these precursors.

[0040] For the oxidant, any oxygen-containing precursor can be used, and the oxygen-containing precursor can react with the metal-containing material. For example, the oxygen-containing precursor can be or include water, diatomic oxygen, ozone, hydroxyl-containing precursor or alcohol, nitrogen- and oxygen-containing precursor, plasma-enhanced oxygen (including locally or remotely enhanced oxygen), or any other material including oxygen that can be incorporated into a metal such as hafnium to produce a metal oxide material layer covering the substrate. Again, any of the metal-containing materials described above can be used in embodiments of the present technology, and can include any group of metals, which can include and are not limited to hafnium, zirconium, silicon, lanthanum, aluminum, titanium, strontium, or combinations of these materials, such as materials like hafnium silicate.

[0041] When performing a pre-treatment according to an embodiment of the present technology, the structure of the metal-containing material can be formed or deposited in an ordered manner to produce a more uniform grain structure. This can be achieved by forming reaction ligands of the pre-treatment precursor above a more structured surface material such as silicon. Additionally, by performing the pre-treatment exposure under certain conditions, additional improvements can be imparted.

[0042] The pre-treatment can be performed at a certain temperature configured to activate the precursor and / or the surface of the substrate. For example, in cases where a nitrogen- and hydrogen-containing precursor can be used as the pre-treatment precursor, the substrate can be maintained at a temperature greater than or approximately 300 °C while delivering the precursor. Similarly, a pre-treatment with an oxygen-containing precursor can also be performed while maintaining the substrate at a temperature greater than or approximately 300 °C. For any pre-treatment operation, the substrate can also be maintained at a temperature greater than or approximately 400 °C, greater than or approximately 500 °C, greater than or approximately 600 °C, greater than or approximately 700 °C, greater than or approximately 800 °C, or a higher temperature. As the temperature used for pre-treatment decreases to below or approximately 500 °C, the effectiveness may decrease. Similarly, as the temperature increases to above or approximately 700 °C, nucleation may not be improved, and excessive precursor can be incorporated onto the surface, which can deteriorate the mobility of the device. Therefore, in some embodiments, the temperature can be maintained between approximately 500 °C and approximately 700 °C during pre-treatment.

[0043] Similarly, the exposure time can affect the amount of nitrogen precursor incorporated and thus limit the mobility loss of the resulting device. The precursor exposure can be less than or about 3 minutes, and in some embodiments the exposure time can be less than or about 2.5 minutes, less than or about 2 minutes, less than or about 1.5 minutes, less than or about 1 minute, less than or about 45 seconds, less than or about 30 seconds, less than or about 15 seconds, or less. Once an appropriate amount of amino groups have been incorporated, formation can be carried out. The formation, including atomic layer formation, can be carried out at any temperature, although in some embodiments atomic layer deposition can be carried out at a temperature lower than or about the temperature at which the pre-treatment was carried out, regardless of whether the operations are carried out in the same or different chambers. For example, atomic layer deposition can be carried out at a second temperature relative to the pre-treatment temperature, and in embodiments, the formation temperature can be less than or about 500 °C, and can be less than or about 450 °C, less than or about 400 °C, less than or about 350 °C, less than or about 300 °C, less than or about 250 °C, or lower.

[0044] After forming or depositing a layer of the high-k material, one or more post-treatments can be carried out. In some embodiments, at optional operation 215, the substrate can be transferred from the deposition chamber to another chamber or a set of chambers for post-treatment of the material. Similar to that explained above, the transfer can occur on a single processing system having multiple chambers, and thus the transfer from any of these chambers or between any of these chambers can be carried out while maintaining vacuum conditions. Method 200 can then include one or more additional post-treatment operations represented by optional operation 220. The post-treatment operations can include one or more operations carried out in one or more chambers, the one or more chambers including multiple chambers on the same cluster tool. The post-treatment operations can include oxidation, nitridation, and / or thermal annealing.

[0045] As described above, a pre-treatment operation can be carried out to provide sufficient end portions to give the previously described uniform growth while limiting excessive precursor incorporation into the substrate. For example, the incorporated nitrogen interface can reduce the mobility of the resulting transistors or reduce the speed at which carriers can move through the structure. Although the pre-treatment described above can further improve the scaling of the high-k film, if not controlled, the pre-treatment can actually degrade the mobility of the device. However, in some embodiments, a post-treatment can include oxidizing the formed high-k material with a second oxygen-containing precursor relative to the first oxygen-containing precursor that can be used in the pre-treatment operation.

[0046] For example, an oxidation operation using any of the above-described oxygen-containing precursors can be performed to further oxidize the film after formation. The deposition or formation of the high-k film can result in a porous film or a film that includes cavities in its structure. By performing the oxidation operation, oxygen species can permeate the film to fill the voids and generate an oxide material at the interface of the high-k material, such as the optional layer 320 illustrated in Figure 3C . This can improve the underlying interface to prevent amine end groups, which can increase the mobility performance of the device. To limit the excessive growth of the underlying oxide layer, the oxidation operation can be performed for a limited period of time and can be performed within any of the time ranges described previously.

[0047] The post-treatment operation can additionally include contacting the substrate further with a second nitrogen-containing precursor that, when used, is relative to the pre-treatment nitrogen-containing precursor. The second nitrogen-containing precursor can include any of the nitrogen-containing precursors described above and can include nitrogen gas, as well as any nitrogen-containing precursors described elsewhere. The second nitrogen-containing precursor can include a plasma-activated or enhanced nitrogen-containing precursor, thermally-activated nitrogen, or some other nitrogen precursor, which can allow nitrogen radicals or nitrogen atoms to be incorporated into the high-k structure, which can stabilize the film or bring the film towards an equilibrium state. Different from the oxidation operation, nitridation does not increase the thickness of the underlying layer (such as silicon oxide), and can also slightly increase the k value of the resulting film.

[0048] The incorporation of nitrogen can be controlled to limit the incorporation in the film in order to maintain the structural and electrical properties. In some embodiments, the post-treatment nitridation can incorporate less than or about 20 atomic % nitrogen at the surface region of the high-k film, and can incorporate less than or about 15 atomic %, less than or about 10 atomic %, less than or about 8 atomic %, less than or about 6 atomic %, less than or about 4 atomic %, less than or about 2 atomic % nitrogen or less. In some embodiments, incorporating between about 3 atomic % and about 7 atomic % can maintain a higher k value compared to higher nitrogen incorporation, and can better stabilize the film compared to lower nitrogen incorporation. The surface region can refer to the exposed surface of the material, although nitrogen incorporation can extend to any distance within the film and can be uniform or form a decreasing gradient through the material.

[0049] The post-treatment oxidation or nitridation can be performed at any of the temperatures described previously, although in some embodiments the post-treatment oxidation and / or nitridation can be performed in a temperature range below or about 500 °C, and can be performed in a temperature range below or about 400 °C, below or about 300 °C, below or about 200 °C, below or about 100 °C, or lower depending on the operation being performed.

[0050] Post-disposal annealing can be carried out after any operation (including any of the aforementioned post-disposal operations). Post-disposal annealing can be carried out in any chamber in which a previous operation was carried out, or can involve transfer to a different chamber, e.g., a chamber configured to carry out a rapid thermal annealing process. Again, the chamber can be incorporated on the same platform as other chambers, which can allow transfer between chambers while maintaining vacuum conditions. Post-disposal annealing can further align the film bonding and further stabilize the film. In an embodiment, post-disposal annealing can be carried out at a third temperature relative to a first temperature, where the third temperature can be higher than or approximately the first temperature. For example, post-disposal annealing can be carried out at a temperature higher than or approximately 400 °C, and in an embodiment can be carried out at a temperature higher than or approximately 500 °C, higher than or approximately 600 °C, higher than or approximately 700 °C, higher than or approximately 800 °C, higher than or approximately 900 °C or higher.

[0051] By carrying out pre-disposal and / or post-disposal according to embodiments of the present technology, improved high-k materials can be produced. The layer of the high-k material can be produced to any thickness, including up to or approximately a number of nanometers. However, due to the better grain structure produced by the present technology, a thinner effective oxide thickness can be produced without loss of gate leakage performance. The high-k material produced according to the present technology can be characterized by a k value greater than or approximately 10, and can be characterized by a k value greater than or approximately 15, greater than or approximately 20, greater than or approximately 21, greater than or approximately 22, greater than or approximately 23, greater than or approximately 24, greater than or approximately 25 or greater.

[0052] As described above, the present technology further allows an improved dielectric constant compared to conventional technologies. In addition, due to the grain structure produced, the gate leakage current associated with the film can be less than or approximately one-tenth of the gate leakage current of a film of a similar thickness of silicon oxide, and the gate leakage current can be less than or approximately one-hundredth of the gate leakage current of a film of a similar thickness of silicon oxide, less than or approximately one-thousandth of the gate leakage current of a film of a similar thickness of silicon oxide, less than or approximately 1 / 5,000 of the gate leakage current of a film of a similar thickness of silicon oxide, less than or approximately 1 / 10,000 of the gate leakage current of a film of a similar thickness of silicon oxide, less than or approximately 1 / 20,000 of the gate leakage current of a film of a similar thickness of silicon oxide, less than or approximately 1 / 50,000 of the gate leakage current of a film of a similar thickness of silicon oxide, less than or approximately 1 / 100,000 of the gate leakage current of a film of a similar thickness of silicon oxide, or less. By producing a film according to embodiments of the present technology, a formed film with beneficial morphology can be produced, which can enhance the electrical properties of the film compared to conventional technologies.

[0053] In the foregoing description, for purposes of explanation, numerous details have been set forth in order to provide an understanding of the various embodiments of the present technology. However, it will be apparent to one of ordinary skill in the art that certain embodiments may be practiced without some of these details, or with additional details.

[0054] Numerous embodiments have been disclosed, and those of ordinary skill in the art will recognize that various modifications, alternative constructions, and equivalents can be used without departing from the spirit of the present disclosure. In addition, several well-known processes and elements have not been described in order to avoid unnecessarily obscuring the present technology. Therefore, the foregoing description should not be construed as limiting the scope of the technology.

[0055] When a range of values is provided, unless the context clearly indicates otherwise, it is to be understood that each intermediate value (to the smallest fraction of the lower limit unit) between the upper and lower limits of that range is also specifically disclosed. Any narrower range including any unstated intermediate value or intermediate values within any stated value or range and any other stated value or intermediate value within the stated range is included. The upper and lower limits of these smaller ranges may independently be included in or excluded from the range, and each range that includes either, or both, of the upper and lower limits where any limit values are specifically excluded in the stated range is also included in the present technology. When the stated range includes one or both of the limit values, ranges excluding either or both of the included limit values are also included.

[0056] As used herein and in the appended claims, the singular forms "a", "an", "the", and "said" include plural referents unless the context clearly dictates otherwise. Thus, for example, a reference to "a layer" includes a plurality of such layers, and a reference to "the precursor", "said precursor" includes a reference to one or more precursors and equivalents of one or more precursors known to those of ordinary skill in the art, and so forth.

[0057] Moreover, when used in this specification and the appended claims, the terms "comprise", "comprising", "contain", "containing", "include", and "including" are intended to specify the presence of the stated features, integers, components, or operations, but they do not preclude the presence or addition of one or more other features, integers, components, operations, acts, or groups.

Claims

1. A method for forming a semiconductor structure, the method comprising the following steps: delivering a nitrogen-containing precursor or an oxygen-containing precursor to a substrate contained in a semiconductor processing chamber, wherein the nitrogen-containing precursor comprises a first nitrogen-containing precursor and the oxygen-containing precursor comprises a first oxygen-containing precursor, and wherein the substrate comprises a silicon-containing material; Introducing reactive ligands onto the exposed surface of the substrate with the nitrogen-containing precursor or the oxygen-containing precursor; forming a high-k dielectric material overlying the substrate; and The high-k dielectric material is treated with a second nitrogen-containing precursor or a second oxygen-containing precursor, and wherein the treating step incorporates nitrogen into the high-k dielectric material in an amount less than or about 10 atomic percent. 2 . The method of forming a semiconductor structure as claimed in claim 1 , wherein the second nitrogen-containing precursor comprises a thermally activated nitrogen-containing precursor or a plasma-enhanced nitrogen-containing precursor.

3. The method for forming a semiconductor structure as claimed in claim 1, further comprising the step of: performing thermal annealing after forming the high-k dielectric material.

4. The method for forming a semiconductor structure as claimed in claim 1, wherein the step of forming a high-k dielectric material comprises the following step: performing an atomic layer deposition process.

5. The method of forming a semiconductor structure of claim 1, wherein the nitrogen-containing precursor comprises ammonia, and wherein the substrate is maintained at a temperature greater than or about 300°C while delivering the ammonia.

6. The method of forming a semiconductor structure of claim 1, wherein the high-k dielectric material comprises at least one element selected from the group consisting of hafnium, zirconium, silicon, lanthanum, aluminum, titanium, and strontium.

7. A method for forming a semiconductor structure, the method comprising the following steps: pre-treating the substrate by contacting the substrate with a nitrogen-containing precursor or an oxygen-containing precursor; forming a high-k dielectric material covering the pre-treated substrate in a first semiconductor processing chamber housing the pre-treated substrate; transferring the substrate to a second semiconductor processing chamber; and The high-k dielectric material is post-treated, wherein the post-treatment step comprises the steps of: exposing the substrate and the high-k dielectric material to an oxygen-containing precursor or a nitrogen-containing precursor, and wherein the post-treatment step incorporates nitrogen into the high-k dielectric material in an amount of less than or about 10 atomic percent.

8. The method of forming a semiconductor structure as claimed in claim 7, further comprising the step of annealing the high-k dielectric material after the post-treatment step.

9. The method of forming a semiconductor structure of claim 7, wherein the step of transferring the substrate to a second semiconductor processing chamber comprises the step of transferring the substrate between two chambers on a multi-chamber processing system, and wherein the step of transferring is performed while maintaining vacuum conditions on the multi-chamber processing system.

10. The method of forming a semiconductor structure of claim 7, wherein the nitrogen-containing precursor used for the pre-treatment comprises ammonia, and wherein the substrate is maintained at a temperature below about 700° C. while the ammonia is delivered to the substrate, and wherein the pre-treatment step is performed for less than or about one minute.

11. The method of forming a semiconductor structure of claim 7, wherein the substrate comprises a silicon-containing material, and wherein an exposed surface layer of the silicon-containing material comprises silicon.

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