Gallium nitride transistor epitaxial structure for increasing surface electron concentration and preparation method thereof

Abstract

The present invention discloses a gallium nitride transistor epitaxial structure for improving the surface electron concentration and a preparation method thereof, comprising the following steps: depositing a plurality of gradually changing composition ScAlN layers on a heterogeneous substrate as a buffer layer, forming nucleation centers by performing high-temperature recrystallization on this buffer layer, and then performing three-dimensional growth and three-dimensional to two-dimensional combined growth of GaN materials to form a bottom structure, and growing epitaxial structures such as a high-resistance GaN material, a GaN channel layer, a ScAlN barrier layer, and a GaN cap layer thereon. The beneficial effects of the present invention are as follows: The bottom layer of the sample is transitioned by a lattice-matched ScAlN buffer layer, making the crystal quality of the GaN bulk material layer higher and the surface smoother; at the same time, before growing the ScAlN material barrier layer, the buffer layer at the bottom layer can release stress for the second time, enabling the entire epitaxial structure to be in a zero-stress state, improving the interface quality between layers, and enabling the transistor to have a higher surface electron concentration under the polarization effect of GaN / ScAlN, which is suitable for the application of acousto-optic devices.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor materials, and specifically to a high surface electron concentration transistor epitaxial structure and a preparation method thereof. Background Art

[0002] With the rapid development of third-generation semiconductor materials and devices represented by GaN and SiC, the demand for high-quality GaN thin film materials is becoming increasingly urgent. Since GaN single crystal hetero-substrates are relatively expensive, currently the mainstream GaN thin film materials are obtained by hetero-epitaxial methods on hetero-substrates. The dislocation density of the crystal quality of this thin film material is on the order of 10 8 cm -2 magnitude, and there is still a large room for improvement. Currently, the mainstream method of hetero-epitaxy is the two-step growth method, and (Al)GaN materials are selected as the buffer layer, which is used as the transition between the hetero-substrate and the epitaxial layer. However, the lattice matching and stress matching effects of such materials on the subsequent GaN thick film are limited, restricting the growth of high-quality and low-stress GaN thin films in the later stage, and having a great impact on the development of high-performance GaN devices that require thicker films, especially for two-dimensional devices that require high interfaces and utilize the polarization effect to generate high-concentration electrons and high mobility. Summary of the Invention

[0003] The purpose of the present invention is to provide a gallium nitride transistor epitaxial structure with increased surface electron concentration and a preparation method thereof, so as to solve the problems raised in the above background art.

[0004] A preparation method for a gallium nitride transistor epitaxial structure with increased surface electron concentration includes the following steps: depositing multiple layers of gradually changing ScAlN layers as a buffer layer on a hetero-substrate in sequence, forming nucleation centers by performing high-temperature recrystallization on this buffer layer, and then performing three-dimensional growth and three-dimensional to two-dimensional merging of GaN materials to form a GaN bulk material layer. Using the GaN bulk material layer as the bottom structure, then growing a high-resistance GaN material layer, a GaN channel layer, a ScAlN barrier layer, and a GaN cap layer on it in sequence.

[0005] Preferably, the ScAlN multi-layer buffer layer structure with different Sc components can regulate the lattice and stress according to the target GaN bulk material layer and device structure.

[0006] Preferably, the Sc component in the ScAlN barrier layer is the average Sc component of the ScAlN multi-layer buffer layer in the bottom structure.

[0007] Advantageous Effects

[0008] The provided gallium nitride transistor epitaxial structure for increasing the surface electron concentration and its preparation method have a narrower full width at half maximum of the sample, a higher peak intensity, a better lattice matching transition, improved crystal quality of the material. From the sapphire hetero-substrate to the low-component ScAlN, then to the high-component ScAlN, and finally to the gallium nitride material layer with perfect lattice matching, the buffer structure effectively releases the stress between the hetero-substrate and the epitaxial layer, resulting in the thick-film gallium nitride not being affected by stress, with a flat surface and no cracks, thus alleviating stress and improving the crystal quality of the epitaxial layer. Growing a high-resistance GaN material, a GaN channel layer, a ScAlN barrier layer, and a GaN cap layer thereon to form a transistor structure. Due to the sufficient crystal quality and stress release, the high-quality interface creates a higher ScAlN / GaN polarization electric field, exciting more electrons and increasing the surface electron concentration of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 Schematic diagram of the gallium nitride transistor epitaxial structure of the present invention;

[0010] Figure 2 SEM image of the surface morphology of sample B in the present invention;

[0011] Figure 3 SEM image of the surface morphology of sample A in the prior art;

[0012] Figure 4 Schematic diagram for comparing the rocking curves of the prior art and the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0013] The following are specific embodiments of the present invention in combination with the drawings to further describe the technical solutions of the present invention, but the present invention is not limited to these embodiments.

[0014] Embodiment 1

[0015] A method for preparing a gallium nitride transistor epitaxial structure for increasing the surface electron concentration, used to prepare the gallium nitride transistor epitaxial structure as shown in Figure 1 . On the hetero-substrate, the following are sequentially arranged: a buffer layer composed of multiple layers of ScAlN layers with gradually changing components, a GaN bulk material layer, a high-resistance GaN material layer, a GaN channel layer, a ScAlN barrier layer, and a GaN cap layer. The preparation method includes the following steps:

[0016] Step 1: Deposit a buffer layer of multiple layers of ScAlN with gradually changing components on the hetero-substrate, with a total thickness of 20 - 50 nm and 2 - 10 layers;

[0017] Step 2: Form nucleation centers by performing high-temperature recrystallization on this buffer layer, and grow a GaN bulk material layer on the buffer layer, with a thickness of about 1 - 2 μm;

[0018] Step 3: Grow a highly resistive GaN material layer doped with Fe or C on the GaN bulk material layer, with a thickness of about 2 - 6 μm;

[0019] Step 4: Grow an undoped GaN channel layer on the highly resistive GaN material, with a thickness of about 300 - 1000 nm;

[0020] Step 5: Grow a ScAlN barrier layer on the GaN channel layer, with a thickness of about 10 - 50 nm;

[0021] Step 6: Grow a GaN cap layer on the ScAlN barrier layer, with a thickness of about 1 - 5 nm.

[0022] The preferred solution in this embodiment is that the percentage of Sc component in the ScAlN layer increases upward from the hetero-substrate in the buffer layer.

[0023] Embodiment 2

[0024] A method for preparing a gallium nitride transistor epitaxial structure for increasing the surface electron concentration, the growth of which includes the following steps:

[0025] Step 1: Deposit 10 nm of ScAlN with 10% Sc component, 10 nm of ScAlN with 15% Sc component, and 10 nm of ScAlN with 20% Sc component on the sapphire hetero-substrate in sequence at a reaction chamber pressure of 200 torr and a temperature of 700 °C;

[0026] Step 2: Increase the pressure to 500 torr and the temperature to 1070 °C, and maintain the temperature for 5 minutes, then cool down to 1040 °C, introduce TMGa for three-dimensional growth, with a thickness of about 500 nm, and then reduce the pressure to 200 torr and increase the temperature to 1090 °C for three-dimensional to two-dimensional combined growth to form a GaN bulk material layer as the bottom material layer;

[0027] Step 3: Introduce C3H8 for C doping of the GaN material to form a growth of highly resistive GaN material of about 4 μm;

[0028] Step 4: Close C3H8 and grow an undoped GaN channel layer, with a thickness of about 500 nm;

[0029] Step 5: Close the Ga source, introduce the Sc source and the Al source, and grow the ScAlN material, controlling the Sc component to be about 15% and the thickness to be about 20 nm;

[0030] Step 6: Close the Sc source and the Al source, introduce TMGa, and grow the GaN cap layer, with a thickness of about 2 nm.

[0031] For the convenience of comparison, the sample generated in Example 2 is marked as Sample B, and the epitaxial structure of the traditional high electron mobility transistor is marked as Sample A.

[0032] Sample A is a GaN buffer layer with a thickness of 30 nm deposited on a sapphire hetero-substrate, and the barrier layer is an AlGaN material with an Al composition of 20% and a thickness of 20 nm. Other epitaxial growth conditions remain the same.

[0033] Perform X-ray diffraction tests and microscopic observations on Samples A and B. Figure 2 This is the SEM image of the surface morphology of Sample B in the present invention. Figure 2 In [the figure], no obvious cracks are seen on the surface morphology of Sample B. From the sapphire hetero-substrate to the low-component ScAlN, then to the high-component ScAlN, until the Sc component reaches 20%, the lattice is completely matched to the gallium nitride material layer. This buffer structure releases the stress between the hetero-substrate and the epitaxial layer well, resulting in the thick film gallium nitride not being affected by stress, with a flat surface and no cracks, which plays a good role in relieving stress and improving the crystal quality of the epitaxial layer. Apply Hall tests to measure the electrical properties of the two samples, and the surface electron concentration of Sample B is 3.4×10 13 cm -2 , while the surface electron concentration of Sample A is 8.5×10 12 cm -2 . The surface electron concentration of Sample B is 4 times that of Sample A, which is the manifestation of the enhanced polarization of the ScAlN / GaN material brought about by the high surface flatness and low stress at the interface. It proves the feasibility of this zero-stress, high-flatness epitaxial junction ScAlN structure transistor and its potential application in photoacoustic devices in the future.

[0034] Figure 3 This is the SEM image of the surface morphology of Sample A in the prior art. Figure 3 As can be seen, due to the influence of the huge stress between the thick film gallium nitride layer and the hetero-substrate, cracks are formed on the thin film. As Figure 4 shown, through the rocking curves of the two, it can be seen that the full width at half maximum of Sample B is narrower and the peak intensity is higher, indicating a better lattice matching transition and improved crystal quality of the material.

[0035] Finally, it should be noted that the above are only the preferred embodiments of the present invention and are not used to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for preparing a gallium nitride transistor epitaxial structure with increased surface electron concentration, characterized in that, It includes the following steps: Under the conditions that the reaction chamber pressure is 200 torr and the temperature is 700 °C, deposit multiple layers of ScAlN layers with gradually changing components on the heterogeneous substrate in sequence as a buffer layer; increase the pressure to 500 torr and increase the temperature to 1070 °C, and form nucleation centers by performing high-temperature recrystallization on the buffer layer; then cool down to 1040 °C and perform three-dimensional growth of GaN material; reduce the pressure to 200 torr and increase the temperature to 1090 °C to perform three-dimensional to two-dimensional merging growth to form a GaN bulk material layer. Take the GaN bulk material layer as the bottom structure and then grow a high-resistance GaN material layer, a GaN channel layer, a ScAlN barrier layer, and a GaN cap layer on it in sequence.

2. The method for preparing a gallium nitride transistor epitaxial structure for increasing the surface electron concentration according to claim 1, wherein It includes the following steps: Step 1: Deposit a multi-layer ScAlN buffer layer with gradually changing components on the heterogeneous substrate, with a total thickness of 20 - 50 nm and 2 - 10 layers. Step 2: Form nucleation centers by performing high-temperature recrystallization on this buffer layer, perform three-dimensional growth and three-dimensional to two-dimensional merging growth on the buffer layer to complete the growth of the GaN bulk material layer with a thickness of 1 - 2 μm. Step 3: Grow a high-resistance GaN material layer doped with Fe or C on the GaN bulk material layer, with a thickness of 2 - 6 μm. Step 4: Grow an undoped GaN channel layer on the high-resistance GaN material, with a thickness of 300 - 1000 nm. Step 5: Grow a ScAlN barrier layer on the GaN channel layer, with a thickness of 10 - 50 nm. Step 6: Grow a GaN cap layer on the ScAlN barrier layer, with a thickness of 1 - 5 nm.

3. The method for preparing a gallium nitride transistor epitaxial structure for increasing the surface electron concentration according to claim 2, characterized in that: In the said Step 1, the ScAlN multi-layer buffer layer structure with different Sc components adjusts the lattice and stress according to the target GaN bulk material layer and device structure. Along the direction from the heterogeneous substrate to the GaN bulk material layer, the Sc component gradually changes from low to high.

4. The method for preparing a gallium nitride transistor epitaxial structure for increasing the surface electron concentration according to claim 2, wherein: In the said Step 5, the Sc component in the ScAlN barrier layer is the average Sc component of the ScAlN multi-layer buffer layer in the bottom structure.

5. A gallium nitride transistor epitaxial structure for increasing the surface electron concentration, including a hetero-substrate, characterized in that: Use the method for preparing a gallium nitride transistor epitaxial structure for increasing the surface electron concentration as described in Claim 1 to sequentially set on the heterogeneous substrate: a buffer layer composed of multiple layers of ScAlN layers with gradually changing components, a GaN bulk material layer, a high-resistance GaN material layer, a GaN channel layer, a ScAlN barrier layer, and a GaN cap layer.

6. The gallium nitride transistor epitaxial structure for increasing the surface electron concentration according to claim 5, characterized in that: The total thickness of the buffer layer is 20 - 50 nm and the number of layers is 2 - 10 layers.

7. The gallium nitride transistor epitaxial structure for increasing the surface electron concentration according to claim 5, characterized in that: The thickness of the GaN bulk material layer is 1 - 2 μm, the thickness of the high-resistance GaN material layer is 2 - 6 μm, the thickness of the GaN channel layer is 300 - 1000 nm, the thickness of the ScAlN barrier layer is 10 - 50 nm, and the thickness of the GaN cap layer is 1 - 5 nm.

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