Wafer Detection System and Wafer Detection Equipment

Abstract

The present invention discloses a wafer detection system and a wafer detection device thereof, which include a carrying device, a probe card, and a bridging module. Among them, the carrying device includes a carrying unit for placing a wafer to be tested; the probe card includes a detection part and a conductive part, and the conductive part is arranged around the detection part and has a contact surface; the bridging module includes a plurality of conduction units that protrude upward, are adjacent to the wafer placement area, and are coupled to the carrying unit. When the detection part contacts the measurement points of the wafer to be tested, the contact surface of the conductive part can simultaneously form a coupling relationship with the conduction units, so that the test signal can be transmitted back to the probe card via the conduction units and the conductive part to form a test loop. In this way, the path length of the loop can be shortened, the correctness of signal transmission can be improved, and the detection accuracy can also be enhanced.

Description

Technical Field

[0001] The present invention relates to a detection system and device for semiconductor components, and particularly to a wafer detection system and wafer detection device for detecting wafers.

Background Art

[0002] The manufacturing process of semiconductor components is usually divided into a front-end process and a back-end process. The front-end process mainly includes a wafer fabrication process (Wafer Fabrication, Wafer Fab) and a wafer probe process (Wafer Probe), and the back-end process mainly includes several steps such as an IC packaging process (IC Packaging) and a test process with initial test (Initial Test) and final test.

[0003] Among them, the wafer probe process can perform electrical function tests on each die in the wafer, so as to confirm the dies with poor electrical functions before the IC packaging process, thereby avoiding such defective dies from entering the back-end process and achieving the purpose of reducing production costs.

[0004] The steps of the wafer probe process are to bring the probes of the probe card into contact with the test points serving as input ends on the wafer (such as the pads on the die), and then input test signals to the corresponding dies through the probes to detect the electrical conditions of the circuits for judging the quality of the dies. The bottom of the wafer is the grounding end of each die, and the carrier plate (such as a copper plate) carrying the wafer is conductive and serves as the shared ground for each die. Conventionally, an additional cable is connected to the carrier plate, and the other end of the cable is connected to the probe card to form a test loop for performing one-by-one tests on each die on the wafer.

[0005] However, for example, when the test conditions for the die require a short pulse and high-current signal, since this is a pulse signal with an extremely short action time and extremely high current (it may even be necessary to provide a current greater than 10A within a time period less than 1 μs), the path length of the test loop is crucial for the quality of the test signal and also has a great impact on the correctness of the test result. Conventionally, the configuration of connecting the probe card and the carrier plate by a cable will make the path of the test loop longer. In addition to the influence of the cable material itself on the transmitted signal, the longer conduction path is more likely to be affected by the inductance effect, resulting in serious deformation and distortion of the waveform of the short pulse and high-current signal, thereby causing inaccurate detection and even possible invalidation.

Summary of the Invention

[0006] An object of the present invention is to shorten the path of the test loop.

[0007] Another object of the present invention is to provide a path for a high-current test loop.

[0008] Another object of the present invention is to reduce the waveform distortion degree of the test signal and improve the correctness of the signal with short pulses and large current when transmitted in the test loop.

[0009] Another object of the present invention is to improve the correct rate of wafer detection.

[0010] To achieve the above and other objects, the present invention provides a wafer detection system, comprising: a loading device, a probe card, and a bridging module. Among them, the loading device includes a loading unit for placing a wafer to be tested, and the loading unit defines a wafer placement area; the probe card is configured to be relative to the loading device, the probe card includes a detecting portion and a conductive portion, and the conductive portion is disposed around the detecting portion and has a contact surface; the bridging module is provided to be suitable for being installed together with the loading device, the bridging module includes a plurality of conducting units protruding upward and adjacent to the wafer placement area, and the plurality of conducting units are coupled to the loading unit. Among them, when the detecting portion of the probe card contacts a measurement point on the top surface of the wafer to be tested, the contact surface of the conductive portion can form a coupling relationship with at least one of the plurality of conducting units, so that after the test signal output by the probe card passes through the wafer to be tested and is transmitted from the bottom surface to the loading unit, it can be transmitted back to the probe card via at least one of the plurality of conducting units and the conductive portion, forming a test loop.

[0011] In an embodiment of the present invention, the probe card may include a substrate, and the conductive portion may be a conductive layer disposed on the bottom surface of the substrate.

[0012] In an embodiment of the present invention, the conductive layer may have a through hole, and the detecting portion protrudes from the through hole.

[0013] In an embodiment of the present invention, the through hole of the conductive layer may be located at the central portion of the conductive layer, and the extension length from the edge of the through hole of the conductive layer to the outer edge of the conductive layer may be greater than or equal to the radius of the wafer to be tested.

[0014] In an embodiment of the present invention, the bridging module may include a fixing frame for mounting on the loading device, and each of the conducting units may be disposed on the fixing frame.

[0015] In an embodiment of the present invention, the fixing frame may be in a ring shape surrounding the wafer placement area.

[0016] In an embodiment of the present invention, each of the conducting units may be installed in the loading unit, and one end of each of the conducting units protrudes from the upper surface of the loading unit.

[0017] In an embodiment of the present invention, each of the conduction units may be an elastic element.

[0018] In an embodiment of the present invention, each of the conduction units may be a spring probe (Pogo Pin).

[0019] In an embodiment of the present invention, one end of each of the conduction units may be directly connected to the carrier unit.

[0020] In an embodiment of the present invention, the plurality of conduction units may be distributed around the wafer placement area. When the probe card sequentially detects each test point of the wafer under test, at least one of the plurality of conduction units can be coupled to the conductive part of the probe card.

[0021] To achieve the above and other objectives, the present invention further provides a wafer detection device, which can be used to detect a wafer under test placed on a carrier device. The wafer detection device includes: a probe card and a bridging module. The probe card includes a detection part and a conductive part disposed around the detection part; the bridging module is provided to be adapted to be installed together with the carrier device. The bridging module includes a plurality of conduction units protruding upward and adjacent to the placement position of the wafer under test, and the plurality of conduction units are used to couple to the carrier device. Wherein, the plurality of conduction units are provided to be adapted such that when the detection part of the probe card contacts the wafer under test, the conductive part can be coupled to at least one of the plurality of conduction units.

[0022] In an embodiment of the present invention, the probe card may include a substrate, and the conductive part is a conductive layer disposed on the bottom surface of the substrate, and one side surface of the conductive layer can be used for the other ends of the plurality of conduction units to contact.

[0023] In an embodiment of the present invention, the substrate has a window corresponding to the through hole, and a light detection device disposed on the top side of the substrate can receive the light emitted by the wafer under test through the window.

[0024] Accordingly, in the wafer detection system and the wafer detection device disclosed in the present invention, when the probe card is moved to make the detection part contact the wafer under test, by means of the coupling relationship between the conductive part of the probe card and the conduction units of the bridging module, a conduction path can be established around the placement position of the wafer under test, so that the test signal sent from the probe card can be transmitted back to the probe card via the bridging module and the conductive part, shortening the path length of the test loop, improving the correctness of the test signal transmission, and also enhancing the correct rate of wafer detection.

Description of the Drawings

[0025] Figure 1 It is a side cross-sectional view of a wafer detection system in an embodiment of the present invention;

[0026] Figure 2 For Figure 1 Schematic diagram of an embodiment in the state of forming a test circuit;

[0027] Figure 3 For Figure 1 Schematic diagram of an embodiment in a top view;

[0028] Figure 4 For Figure 3 Cross-sectional view of an embodiment along the AA' section line;

[0029] Figure 5 Bottom schematic diagram of the probe card in an embodiment under an elevation view;

[0030] Figure 6 Bottom schematic diagram of the probe card in another embodiment under an elevation view;

[0031] Figure 7 Side cross-sectional view of a wafer inspection system in another embodiment of the present invention;

[0032] Figure 8 Side cross-sectional view of a wafer inspection system in yet another embodiment of the present invention;

[0033] Figure 9 For Figure 8 Partial perspective schematic diagram of the wafer inspection system of the embodiment;

[0034] Figure 10 Side cross-sectional view of a wafer inspection system in yet another embodiment of the present invention; In the above figures, each reference numeral represents:

[0035] 100 Carrying device

[0036] 110 Carrying unit

[0037] 111 Carrier tray

[0038] 112 Carrier

[0039] 120 Wafer placement area

[0040] 200 Bridging module

[0041] 210 Conducting unit

[0042] 220 Fixing bracket

[0043] 300 Probe card

[0044] 310 Detecting part

[0045] 320 Conductive part

[0046] 322 Through-hole

[0047] 330 Substrate

[0048] 340 Window

[0049] 400 Wafer

[0050] 410 Die

[0051] 500 Optical detection device

[0052] AA’ Section line

[0053] CR The shortest distance from the inner edge to the outer edge of the conductive part

[0054] TP Test circuit

[0055] VM Vertical direction

Detailed implementation manners

[0056] To fully understand the purpose, features and effects of the present invention, the following specific embodiments are now combined with the attached drawings to make a detailed description of the present invention as follows:

[0057] In this article, the terms "comprising", "including", "having" or any other similar terms are not limited to only these elements listed in this article, but may include other elements that are not explicitly listed but are usually inherent in the described unit, component, structure, device, module, system, part or area.

[0058] In this article, the terms "a" or "one" are used to describe units, components, structures, devices, modules, systems, parts or areas, etc. This is just for convenience of description and provides a general meaning for the scope of the present invention. Therefore, unless otherwise clearly indicated, such a description should be understood to include one or at least one, and the singular also includes the plural.

[0059] In the attached drawings, the dimensions and proportions of each unit, component, structure, device, module, system, part or area, etc. are shown only for illustration and not for limitation.

[0060] Please refer to Figure 1 and Figure 2 , Figure 1 which is a side view of a wafer detection system in an embodiment of the present invention, Figure 2 and Figure 1 is a schematic diagram of the embodiment in the state of forming a test circuit.

[0061] The wafer inspection system includes: a carrier device 100, a probe card 300, and a bridging module 200 including a conduction unit 210. The bridging module 200 is provided to be adapted to be installed together with the carrier device 100. The bridging module 200 can be adapted to provide a coupling relationship between the carrier device 100 and the probe card 300, so as to provide an electrical connection loop between the carrier device 100 and the probe card 300. The bridging module 200 can be in a form assembled on the carrier device 100 or in a form integrated with the carrier device 100.

[0062] There can be a certain degree of movement relationship between the carrier device 100 and the probe card 300. Usually, by driving the carrier device 100, the measured points of the wafer can be brought close to the probe card 300 for the needle detection step. However, performing the needle detection step by moving the probe card 300 closer to the wafer, or moving both the carrier device 100 and the probe card 300, etc., are all applicable to the embodiments of the present invention.

[0063] On the other hand, between the carrier device 100 and the probe card 300, they are usually arranged in a relatively opposite configuration in terms of detection, so as to facilitate the wafer 400 to be applicable to the needle detection step of the probe card 300. During the wafer inspection process, the probe card 300 is operated above the carrier device 100, and through the movement relationship between the carrier device 100 and the probe card 300, each die of the wafer 400 is sequentially inspected. As Figure 1 shown, after confirming the position of the die to be detected, a Figure 2 coupling relationship as exemplified can be formed by moving in the vertical direction VM, and then the test loop TP is established. Subsequently, the probe card 300 can be controlled by, for example, a test machine (not shown in the figure) to perform various electrical test items.

[0064] The carrier device 100 includes a carrier unit 110 for placing the wafer 400 and a wafer placement area 120 defined on the carrier unit 110. The carrier unit 110 can be, for example, a combination of a carrier 112 (chuck) providing functions such as clamping or adsorption and a carrier plate 111 (carrier) for carrying the wafer, or other devices or equipment that can be used to hold the wafer 400. In the Figure 1 and Figure 2 example, the carrier unit 110 is exemplified by a combination of the carrier 112 and the carrier plate 111. In other embodiments, only a single carrier 112 or other single device or equipment can also be used to carry the wafer 400. In addition, the carrying area of the carrier plate 111 can be approximately greater than or equal to the area of the wafer 400, Figure 1 and Figure 2 and in a side view, the carrying diameter of the carrier plate 111 is approximately equal to the diameter of the wafer 400 as an example.

[0065] The bridging module 200 includes a plurality of conductive units 210 coupled to the carrier unit 110. The conductive units 210 can be configured to protrude upward and be adjacent to the wafer placement area 120. By virtue of the carrier unit 110 having electrical conduction ability (for example, the carrier surface of the carrier unit 110 is made of metal), the conductive units 210 can be further coupled to the wafers placed on the carrier unit 110. Based on the configuration of the conductive units 210 adjacent to the wafer placement area 120, the loop path between the carrier device 100 and the probe card 300 can be shortened. In addition, the conductive units 210 can be adjacent to the wafer placement area 120. However, in other embodiments, there can also be other objects spaced between the conductive units 210 and the wafer placement area 120.

[0066] The probe card 300 includes a detection portion 310, a conductive portion 320, and a substrate 330. After the alignment and movement steps in the detection procedure are completed, the detection portion 310 can contact the selected die under test so that test signals can be transmitted into the die under test. The detection portion 310 Figure 1 and Figure 2 only exemplify a single probe, but are not limited thereto. The detection portion 310 can be fixed to the substrate 330. The substrate 330 is generally configured to have various electronic components on the top surface and have related circuits laid out on the top surface and inside of the substrate. As for the bottom surface of the substrate, it has an insulating layer.

[0067] In an embodiment of the present invention, the bottom surface of the substrate 330 is suitable for attaching a conductive portion 320, and the conductive portion 320 can be configured around the detection portion 310. The conductive portion 320 disposed on the bottom surface of the substrate 330 can be coupled to the electronic components on the probe card 300 through the circuits arranged on and / or inside the substrate 330, so that signals can be transmitted back to the corresponding functional modules for subsequent electrical analysis steps. The conductive portion 320 is, for example, a conductive layer disposed on the bottom surface of the substrate 330, and is, for example, formed below the insulating layer, thereby forming a contact surface for coupling to the conductive unit 210 at the bottom of the probe card 300.

[0068] The test loop TP includes a path in which a test signal output from the detection portion 310 of the probe card 300 passes through the die of the wafer under test and is transmitted from the bottom surface of the die to the carrier unit 110, and then is transmitted to the conductive portion 320 of the probe card 300 through at least one conductive unit 210, so that the signal can be transmitted back to the probe card 300 for subsequent analysis.

[0069] Next, please refer to Figure 3 and Figure 4 , Figure 3 which is Figure 1 a schematic diagram of the embodiment in a top view, Figure 4 and Figure 3 is a cross-sectional view of the embodiment along the AA' section line. In Figure 3In the figure, for ease of explanation, the probe card 300 is presented in a dashed and perspective manner. Figure 3 It exemplifies the state where the detection portion 310 of the probe card 300 is located above the left-side die of the wafer 400. Since the dies 410 are distributed throughout the wafer 400, the relative positions of the probe card 300 and the wafer 400 will change with the die 410 to be detected. The conduction units 210 of the bridging module 200 are provided to enable the conductive portions 320 of the probe card 300 to be coupled to at least one conduction unit 210 during the detection of the die 410.

[0070] In one embodiment, the shortest distance CR from the inner edge to the outer edge of the conductive portion 320 adjacent to the detection portion 310 in the conductive portion 320 is at least the radius of the wafer 400. For example, in this embodiment, the conductive portion 320 has a through hole 322 for the detection portion 310 to protrude, and the extension length from the edge of the through hole 322 to the outer edge of the conductive portion 320 is greater than or equal to the radius of the wafer 400 to be measured. In this way, the detection portion 310 can be approximately located at the central part of the conductive portion 320, and the area of the conductive portion 320 and the number of the conduction units 210 can be more evenly configured. However, it is not limited thereto, and other shaped conductive portions 320 can be applicable as long as they can make electrical connection with at least one conduction unit 210 during the probing step. In addition, the larger the area of the conductive portion 320 is configured, the fewer the number of the conduction units 210 can be; correspondingly, the more the number of the conduction units 210 is configured, the area of the conductive portion 320 can be limitedly reduced.

[0071] Figure 4 The state shown is that the probe card 300 is located on the left relative to the wafer 400. When the relative position of the probe card 300 moves to the right, the left-side conduction units 210 will fail to contact the conductive portions 320. At this time, the right-side conduction units 210 can establish a conduction path.

[0072] The described conduction units 210 can be elastic elements having the ability to deform (such as the deformability of the material itself) or the ability to expand and contract (such as being assembled by components such as springs). The conduction units 210 with such characteristics can provide a certain degree of additional connection length to ensure the coupling between the conductive portions 320 and the conduction units 210. For example, in the positional relationship during the probing contact, the distance between the conductive portion 320 and the carrier unit 110 is a first length, and the length configured by the conduction units 210 is longer than the first length. In this way, during the probing step, the coupling relationship between the conductive portion 320 and the conduction units 210 can be ensured to be established.

[0073] Next, please refer to Figure 5 and Figure 6 , Figure 5Schematic diagram of the bottom of the probe card in an embodiment under an elevation view. Figure 6 Schematic diagram of the bottom of the probe card in another embodiment under an elevation view. Figure 5 And Figure 6 In [figures], the bottom surface of the probe card 300 has different patterned conductive parts 320. In addition, the configuration of the positions of the detection parts 310 is also different.

[0074] Figure 5 It shows that with the arrangement of an appropriate number of conduction units, the conductive part 320 can have other different configuration methods, rather than being limited to the way of covering the entire bottom surface of the probe card 300. With the combination of the area of the detection part 310 and the number and configuration positions of the conduction units, during the detection steps of different chips, the conduction units can still be coupled to the conductive part 320. Figure 6 It shows another arrangement of the conductive part 320, and at least one conduction unit can be coupled to the conductive part 320 during the probing step, and all are applicable.

[0075] Next, please refer to Figure 7 And Figure 8 , Figure 7 Side cross-sectional view of the wafer detection system in another embodiment of the present invention. Figure 8 Side cross-sectional view of the wafer detection system in yet another embodiment of the present invention. These two embodiments illustrate different configuration relationships between the bridging module 200 and the carrier device 100.

[0076] As Figure 7 shown, the bridging module 200 is assembled with the carrier device 100 in a non-detachable manner. The bridging module 200 includes a fixing frame 220 installed on the carrier device 100. In Figure 7 , the fixing frame 220 passes through the carrier plate 111 and the carrier 112 and is installed therein. The conduction unit 210 can protrude from the surface of the carrier device 100. The conduction unit 210 can be electrically connected to the carrier device 100 and the wafer 400 placed thereon through the fixing frame 220. For example, one end of the conduction unit 210 can be directly connected to the carrier unit 110.

[0077] As Figure 8 shown, the bridging module 200 is assembled with the carrier device 100 in a detachable manner. The bridging module 200 includes a fixing frame 220 installed on the carrier device 100. The fixing frame 220 can be fixed to the carrier device 100 by means of a tenon, a buckle, clamping, magnetic attraction or other means. The conduction unit 210 can be electrically connected to the carrier device 100 and the wafer 400 placed thereon through the fixing frame 220. Figure 8Examples can be applied to the addition to existing automated machines, without affecting or blocking the existing wafer placement process. After the wafer 400 is placed, the bridging module 200 can be installed on the carrier device 100, and with the probe card disclosed in the embodiments of the present case, a short-path test loop can be established.

[0078] Next, please refer to Figure 9 , which is Figure 8 a partial perspective view of the wafer detection system according to an embodiment. Figure 9 It shows the configuration relationship among the carrier device 100, the bridging module 200, and the wafer 400. Figure 9 The conduction unit 210 of is exemplified by a spring probe (PogoPin). Figure 9 The exemplified fixing frame 220 can surround the wafer placement area 120 after being installed on the carrier device 100, and thus can be annular according to the shape of the wafer 400. After the wafer 400 is placed in the wafer placement area 120, the detachable bridging module 200 is installed on the carrier device 100.

[0079] Next, please refer to Figure 10 , which is a side cross-sectional view of the wafer detection system in another embodiment of the present invention. In the testing of some wafers, the wafers to be tested may have the characteristic of emitting light. For example: when the tested die receives a test signal at the signal receiving point, a light-emitting effect will correspondingly occur at the light-emitting point of the die. The signal receiving point and the light-emitting point may be located at different positions of the die. Figure 10 In the example of , the substrate 330 has a window 340 that can correspond to the through hole 322, so that the light emitted by the tested die can pass through the window 340, and thus can be detected by the light detection device 500 arranged on the other side (or the top side) of the substrate 330. In other words, the central part of the probe card 300 can be hollow based on the existence of the window 340, so that the light generated when the wafer 400 to be tested is being tested can be detected by the optical-related test equipment arranged above the probe card 300.

[0080] In summary, through the arrangement at the bottom of the probe card (directly coating a conductive layer or adding a conductive layer or other similar methods), and through the configuration of the bridging module, the test signal can be transmitted back to the probe card via the conduction unit of the bridging module and the conductive part at the bottom of the probe card, forming a test loop, which not only shortens the path length of the loop, improves the correctness of signal transmission, but also enhances the detection accuracy rate.

[0081] The present invention has been described above by way of preferred embodiments. However, those skilled in the art should understand that the embodiments are only used to illustrate the present invention and should not be construed as limiting the scope of the present invention. It should be noted that all equivalent changes and substitutions to the embodiments should be considered as covered within the scope of the present invention. Therefore, the scope of protection of the present invention shall be defined by the claims.

Claims

1. A wafer detection system, comprising: A loading device, including a loading unit for placing a wafer to be detected, wherein the loading unit defines a wafer placement area; A probe card, configured to be relative to the loading device, the probe card includes a detection part and a conductive part disposed around the detection part and having a contact surface; and A bridging module, including a fixing frame and a plurality of conduction units disposed on the fixing frame, the fixing frame is configured to be detachably mounted on the loading device, so that the bridging module is mounted on the loading device after the wafer to be detected is placed on the loading unit, and the bridging module mounted on the loading device causes the plurality of conduction units to be coupled to the loading unit; Among them, When the detection part of the probe card contacts a measurement point on the top surface of the wafer to be detected, the contact surface of the conductive part forms a coupling relationship with at least one of the plurality of conduction units, so that a test signal output by the probe card, after passing through the wafer to be detected and being transmitted from the bottom surface to the loading unit, is transmitted back to the probe card via at least one of the plurality of conduction units and the conductive part, forming a test loop.

2. The wafer inspection system according to claim 1, wherein, The probe card includes a substrate, and the conductive part is a conductive layer disposed on the bottom surface of the substrate.

3. The wafer inspection system according to claim 2, wherein, The conductive layer has a through hole, and the detection part protrudes out from the through hole.

4. The wafer inspection system according to claim 3, wherein, The through hole of the conductive layer is located at the central part of the conductive layer, and the extension length from the edge of the through hole of the conductive layer to the outer edge of the conductive layer is greater than or equal to the radius of the wafer to be detected.

5. The wafer inspection system according to claim 3, wherein, The substrate has a window corresponding to the through hole, for a light detection device disposed on the top side of the substrate to receive the light emitted by the wafer to be detected through the window.

6. The wafer inspection system according to claim 1, wherein, The lower edge of the fixing frame matches the outer shape of the upper edge of the loading device, so that the fixing frame is mounted on the upper edge of the loading device in a socketed manner.

7. The wafer inspection system according to claim 6, wherein, The fixing frame is in a ring shape.

8. The wafer inspection system according to claim 1, wherein, Each of the conduction units is an elastic element.

9. The wafer inspection system according to claim 1, wherein, Each of the conduction units is a spring probe (PogoPin).

10. The wafer inspection system according to claim 1, wherein, The plurality of conduction units are distributed around the wafer placement area. When the probe card sequentially detects each measurement point of the wafer to be detected, the conductive part of the probe card can be coupled to at least one of the plurality of conduction units.

11. A wafer detection device, used for detecting a wafer to be detected placed on a loading device, the wafer detection device comprising: A probe card, including a detection part and a conductive part disposed around the detection part; and A bridging module, including a fixing frame and a plurality of conduction units disposed on the fixing frame, the fixing frame is configured to be detachably mounted on the loading device, so that the bridging module is mounted on the loading device after the wafer to be detected is placed on a loading unit, and the bridging module mounted on the loading device causes the plurality of conduction units to be coupled to the loading unit; Among them, The plurality of conduction units are adapted to couple the conductive part to at least one of the plurality of conduction units when the detection part of the probe card contacts the wafer to be detected.

12. The wafer inspection device according to claim 11, wherein, The probe card includes a substrate, the conductive portion is a conductive layer disposed on the bottom surface of the substrate, and one side surface of the conductive layer is for the contact of one end of the plurality of conduction units.

13. The wafer inspection apparatus according to claim 12, wherein, The conductive layer has a through hole, and the detection portion protrudes from the through hole.

14. The wafer inspection device according to claim 13, wherein, The through hole of the conductive layer is disposed at the central portion of the conductive layer, and the length from the edge of the through hole of the conductive layer to the outer edge of the conductive layer is greater than or equal to the radius of the wafer to be measured.

15. The wafer inspection device according to claim 13, wherein, The substrate has a window corresponding to the through hole, for a light detection device disposed on the top side of the substrate to receive the light emitted by the wafer to be measured through the window.

16. The wafer inspection device according to claim 11, wherein, Each of the conduction units is an elastic element.

17. The wafer inspection device according to claim 11, wherein, Each of the conduction units is a spring probe (PogoPin).

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