Embedded Inductor Structure and Its Manufacturing Method

Abstract

The present invention discloses an embedded inductor structure and a manufacturing method thereof. The inductor structure includes a substrate having trenches with a certain depth. On the bottom of the trenches, a plurality of coil structures are sequentially arranged at intervals along the depth direction of the trenches. The coil structure includes a metal layer, and a first dielectric layer and an adhesion layer sequentially wrapped on the side walls of the metal layer. The coil structure is attached to the side walls of the trenches through the adhesion layer, and the adhesion layer also covers the bottom surfaces of the metal layer and the first dielectric layer. Two adjacent and spaced coil structures are connected by a metal connecting column, and a plurality of coil structures are connected by metal connecting columns to form an inductor structure embedded in the substrate. The DRIE and depth endpoint detection process are used to form trenches with vertical side walls. The number of turns of the coil structure can be adjusted according to requirements, and variable control of the inductance value can be achieved, ultimately achieving the goal of optimizing the performance.

Description

Technical Field

[0001] The present invention relates to the field of inductors, and particularly to an embedded inductor structure and a manufacturing method thereof. Background Art

[0002] With the progress and development of technology, technologies such as 5G wireless communication and GPS have emerged, and the technical requirements for high-performance radio frequency circuits, passive devices (IPD), etc. have gradually increased. As an electronic device commonly used in fields such as high-performance radio frequency circuits and passive devices, inductors play an important role in semiconductor circuit manufacturing.

[0003] Inductors are also a key part of the integrated filter manufacturing process. The inductance value of the inductor is the main factor determining the target frequency of the filter, and the magnitude of the inductance value is determined by the thickness of the dielectric layer and the number of turns of the coil. The current 3D coil technology is based on the thickness of the wafer and forms a vertical inductor by winding through the TWV (Through Wafer Via) process. One turn of the inductor is formed between two etching holes in the wafer. If the number of turns of the coil increases, more groups of etching holes need to be expanded in space to form more turns of the coil. Therefore, the vertical inductor has low space utilization rate and low utilization rate of metal wires, which is not conducive to integration, and the inductance value is not easy to control. Summary of the Invention

[0004] The purpose of the present invention is to overcome the deficiencies existing in the prior art and provide an embedded inductor structure and a manufacturing method thereof.

[0005] To achieve the above purpose, the technical solution of the present invention is as follows:

[0006] An embedded inductor structure includes a substrate having a trench with a certain depth. Along the depth direction of the trench, a plurality of coil structures are sequentially provided at intervals on the bottom of the trench, a metal layer, and a first dielectric layer and an adhesion layer around the metal layer. The first dielectric layer and the adhesion layer sequentially wrap the side walls of the metal layer. The coil structure is attached to the side wall of the trench through the adhesion layer, and the adhesion layer also covers the bottom surfaces of the metal layer and the first dielectric layer. Two adjacent and spaced coil structures are connected by a metal connection column.

[0007] In an optional embodiment, a second dielectric layer or an air cavity is provided between two adjacent and spaced coil structures. The thickness of the second dielectric layer or the height of the air cavity is 1 - 10 μm, and the material of the second dielectric layer is SiO2, Si3N4, or polyimide.

[0008] In an optional embodiment, the adhesion layer is Si or a seed layer, and the material of the seed layer includes TiW / Au or Ti / Cu.

[0009] In an alternative embodiment, the thickness of the first dielectric layer is 100 nm to 2000 nm, and the material of the first dielectric layer includes SiO2 or Si3N4.

[0010] In an alternative embodiment, the depth of the trench is 10 μm to 100 μm, and the angle between the sidewall and the bottom of the trench is 88° to 92°.

[0011] In an alternative embodiment, the thickness of the metal layer is 1 to 5 μm, and the material of the metal layer includes at least one of Au, Cu, Pt, Ag, Ni, Co, or an alloy or compound containing at least one of the above metals.

[0012] In an alternative embodiment, the projected pattern of the trench on the substrate is an annular shape with an opening, and the metal layer extends from the opening of the annular shape to be provided with a lead connected to the metal connection post.

[0013] A method for manufacturing an embedded inductor includes the following steps:

[0014] 1) Etch a trench with a certain depth on the substrate by using DRIE combined with depth endpoint detection technology;

[0015] 2) Form an adhesion layer and a first dielectric layer on the sidewall and the bottom of the trench by using atomic layer deposition technology;

[0016] 3) Remove the first dielectric layer at the bottom and expose the adhesion layer;

[0017] 4) Fabricate a metal layer on the adhesion layer to form a first layer of coil;

[0018] 5) Remove the adhesion layer and the first dielectric layer on the sidewall of the trench above the metal layer;

[0019] 6) Deposit a second dielectric layer on the metal layer;

[0020] 7) Etch contact holes in a preset area on the second dielectric layer;

[0021] 8) Repeat steps 2-7 to fabricate multiple layers of coils to form an inductor structure.

[0022] In an alternative embodiment, the thickness of the second dielectric layer is 1 to 10 μm, and the material of the second dielectric layer is SiO2, Si3N4, polyimide or a sacrificial material; when the second dielectric layer is a sacrificial material, step 8 further includes: after completing the fabrication of the upper layer of coil, forming an air cavity between adjacent spaced upper and lower layer coils by opening holes and removing the sacrificial material.

[0023] In an alternative embodiment, the adhesion layer is Si or a seed layer. When the adhesion layer is a seed layer, the material of the seed layer includes TiW / Au or Ti / Cu, and the electroplating process is used to fabricate the metal layer in step 4; when the adhesion layer is Si, the self-aligned silicide process is used to fabricate the metal layer in step 4.

[0024] Compared with the prior art, the present invention has the following beneficial effects:

[0025] (1) The embedded inductor structure of the present invention adopts an embedded design in the wafer. By integrating multiple layers of coils on the trenches of the wafer and arranging them along the depth direction of the trenches, the depth of the wafer thickness can be effectively utilized. The increase in the number of turns of the coil is only adjusted within the depth of the trench, which will not affect the area of the inductor. Applying the inductor in the circuit can effectively reduce the area of the inductor structure.

[0026] (2) The number of turns of the coil in the inductor structure and the thickness of the dielectric layer between the multiple layers of coils can be elastically adjusted according to the device requirements, realizing the diversity of device design and the variable control of the inductance value, and achieving the goal of performance optimization.

[0027] (3) The DRIE process is adopted for the embedded inductor structure of the present invention, which can ensure the perpendicularity of the trench sidewalls. Coupled with the depth endpoint detection technology, the measurement of the substrate etching depth can be carried out to accurately control the depth of the trench. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 Schematic diagrams of the embedded inductor structures of Embodiments 1 and 2 of the present invention;

[0029] Figure 2 Stereogram of the trench of the embedded inductor structure of Embodiment 1 of the present invention on the substrate;

[0030] Figures 3a - 3f Schematic diagram of the manufacturing process of the embedded inductor structure of Embodiment 1 of the present invention;

[0031] Figure 4 Schematic diagrams of the embedded inductor structures of Embodiments 3 and 4 of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0032] The following further explains the present invention in conjunction with the attached drawings and specific embodiments. The various drawings of the present invention are only for illustration to make it easier to understand the present invention, and their specific proportions can be adjusted according to the design requirements. For the up and down relationships of the relative components and the definitions of the front / back in the described figures, those skilled in the art should understand that they refer to the relative positions of the components, so they can all be flipped to present the same components, and all of these should belong to the scope disclosed in this specification.

[0033] Embodiment 1

[0034] Reference Figure 1 In the embodiment of the present application, the proposed embedded inductor structure includes a substrate 1, a coil structure 2, and a second dielectric layer 3. Among them, a trench 11 with a certain depth is provided on the substrate 1, and a plurality of coil structures 2 and the second dielectric layer are stacked in the trench 11 to form an embedded inductor. Wherein, the thickness of the substrate 1 is 625-665 μm, and the material of the substrate 1 includes Si or GaAs. The depth of the trench 11 is 10 μm-100 μm, and the side wall of the trench 11 has a certain perpendicularity in the substrate 1. Specifically, the included angle between the side wall of the trench 11 and the bottom of the trench 11 is 88°-92°. The coil structures 2 are arranged at intervals along the depth direction of the trench 11 from the bottom of the trench 11 to form multiple layers of coils, and a second dielectric layer 3 is provided between two adjacent coil structures 2. The material of the second dielectric layer 3 includes SiO2, Si3N4 or polyimide, and the thickness is 1-10 μm. From a partial cross-section of one layer of the coil, the coil structure 2 includes a middle metal layer 21 and an adhesion layer 22 and a first dielectric layer 23 around the metal layer 21. The side wall of the metal layer 21 is sequentially wrapped by the first dielectric layer 23 and the adhesion layer 22. The coil structure 2 is attached to the side wall of the trench 11 through the adhesion layer 22. Specifically, the adhesion layer 22 is provided on the side wall of the trench 11 and the bottom of the metal layer 21. The first dielectric layer 23 is provided between the side wall of the trench 11 and the adhesion layer 22 for insulation. The side of the metal layer 21 is covered with the first dielectric layer 23, and the bottom surface of the metal layer 21 and the first dielectric layer 23 and the side of the first dielectric layer 23 are all covered with the adhesion layer 22. In each coil structure, the metal layer 21 and the top of the adhesion layer 22 and the first dielectric layer 23 on the side wall of the trench are in the same plane. The thickness of the first dielectric layer 23 is 100 nm-2000 nm, and the material of the first dielectric layer 23 includes SiO2 or Si3N4. The adhesion layer 22 is a seed layer, and the seed layer includes TiW / Au or Ti / Cu, and the thickness is 100 nm-2000 nm. The material of the metal layer 21 can be at least one of Au, Cu, Pt, Ag, Ni, Co, or an alloy or compound containing at least one of the above metals. The thickness of the metal layer 21 is 1-5 μm. Specifically, when the seed layer is TiW / Au, the metal layer 21 is Au; when the seed layer is Ti / Cu, the metal layer 21 is Cu.

[0035] Reference Figure 2, the projected pattern of the trench 11 on the substrate is an annular shape with an opening, and two adjacent and spaced coil structures 2 are connected by metal connection posts 4 to form a multi-layer coil structure. In a specific embodiment, leads connected to the metal connection posts extend from the opening of the ring of the metal layer. Preferably, leads respectively connected to the metal layer 21 and the metal connection posts 4 extend horizontally at the opening of the ring, and can extend outward or inward, avoiding filling materials such as seed layers during the production of the metal connection posts 4, facilitating processing without affecting the production and performance of the inductance structure.

[0036] Reference Figures 3a - 3f As shown in the flowchart, the above structure is prepared by the following method:

[0037] 1) See Figure 3a , a first photoresist is coated on the substrate 1, and after exposure and development, a photoresist with a coil-shaped pattern is obtained. The coil-shaped pattern includes an annular shape with an opening, and a trench 11 with a depth of 10 μm to 100 μm is etched using DRIE combined with depth endpoint detection technology, and then the photoresist is removed by using oxygen plasma (O2 plasma) and solvent cleaning. The thickness of the substrate 1 is 625 - 665 μm, and the material of the substrate 1 includes Si or GaAs. The deep reactive ion etching (DRIE) process can etch out vertical and smooth hole sidewalls, and the depth endpoint detection technology can measure the etching depth. By using the Bosch process of DRIE in combination with the depth endpoint detection technology, a trench with vertical sidewalls of a certain depth is etched. Combining these two technologies can ensure the perpendicularity of the trench 11. Specifically, the angle between the sidewall of the trench 11 and the bottom of the trench 11 is 88° - 92°.

[0038] 2) See Figure 3b , an adhesion layer 22 with a thickness of 100 nm to 2000 nm and a first dielectric layer 23 with a thickness of 100 nm to 2000 nm are formed on the sidewall and bottom of the trench 11 by atomic layer deposition (ALD) process. The atomic layer deposition (ALD) process belongs to an atomic-level covering method, so a uniform structure surface can be obtained. Among them, the material of the first dielectric layer 23 includes SiO2 or Si3N4, the adhesion layer 22 is a seed layer, and the seed layer includes TiW / Au or Ti / Cu.

[0039] 3) See Figure 3c , ICP or RIE is used to remove the first dielectric layer 23 at the bottom and expose the seed layer 22. ICP or RIE has high directionality. When using the ICP process, the low pressure is 1 - 5 mTorr. After etching the first dielectric layer 23 at the bottom of the trench 11, the etching products are removed by solvent cleaning, exposing the underlying seed layer.

[0040] 4) See Figure 3d , apply a second photoresist, and through exposure and development, form a photoresist for the electroplating pattern. On the seed layer, fabricate a metal layer 21 with a thickness of 1 - 5 μm by electroplating. The metal layer 21 serves as the main body of the inductor coil to form the first layer of the coil. When the seed layer is TiW / Au, the metal layer 21 is Au; when the seed layer is Ti / Cu, the metal layer 21 is Cu. After electroplating, remove the photoresist by solvent cleaning.

[0041] 5) See Figure 3e , use wet etching or isotropic plasma to remove the seed layer and the first dielectric layer 23 on the sidewalls of the trench 11 above the metal layer 21. At this time, the top of the metal layer 21 is in the same plane as the seed layer and the top of the first dielectric layer 23 on the sidewalls of the trench.

[0042] 6) See Figure 3f , deposit a second dielectric layer 3 with a thickness of 1 - 10 μm by plasma enhanced chemical vapor deposition (PECVD) process, apply a third photoresist, and through exposure and development, obtain a photoresist covering the top of the metal layer 21 and the seed layer and the first dielectric layer 23 on the sidewalls of the trench. Etch away the excess second dielectric layer 3, and then use oxygen plasma (O2 plasma) and solvent cleaning to remove the photoresist. Finally, the second dielectric layer 3 is deposited on the surface of the top of the metal layer 21 and the seed layer and the first dielectric layer 23 on the sidewalls of the trench. The material of the second dielectric layer is SiO2, Si3N4, or polyimide.

[0043] 7) Apply a fourth photoresist, and through exposure and development, define contact holes (not shown). Use dry etching process to etch contact holes in the preset area on the substrate 1. The contact holes are of an upper-wide and lower-narrow structure. Then use oxygen plasma (O2 plasma) and solvent cleaning to remove the photoresist. The finally obtained contact holes are used to connect the upper and lower layer coils. The contact holes are arranged at the horizontal extension of the annular opening of the metal layer 21 and can extend outward or inward, avoiding filling materials such as the seed layer during the manufacturing process, facilitating processing without affecting the manufacturing and performance of the inductor structure.

[0044] 8) Repeat steps 2 - 7. As the metal layer 21 in the upper layer coil is fabricated, the contact holes are filled with metal, thus forming metal connection posts. Finally, the fabricated multi-layer coil forms an inductor structure as shown in Figure 1 shown.

[0045] The above manufacturing method can obtain an embedded inductance structure, effectively utilize the depth of the wafer thickness to obtain trenches, and the number of turns of the inductor can be elastically adjusted according to needs within the trenches. The shape of the inductor can also be designed and changed according to requirements, and the area of the inductor can be effectively reduced to achieve adjustable control of the inductance value, further optimizing the performance of the product.

[0046] Embodiment 2

[0047] Reference Figure 1 , another embedded inductance structure, which is different from Embodiment 1 in that the adhesion layer is Si, and the self-aligned silicide (Salicide) process is used to fabricate the metal layer in Step 4. Therefore, in the case where the adhesion layer is Si, the metal layer is deposited on the surface of the Si layer and is in contact with the surface of the Si layer. Then, a thermal process is performed to form a silicided metal layer on the surface of the contacting metal layer and the silicon layer. In Step 5, the first dielectric layer and the Si layer on the sidewall of the trench above the silicided metal layer are removed, and the metal layer can be selected.

[0048] Embodiment 3

[0049] Reference Figure 4 , another embedded inductance structure, which is different from Embodiment 1 in that there is an air cavity 5 between two adjacent and spaced coil structures. Specifically, in Step 6, a sacrificial material is filled between two adjacent and spaced coil structures, and the second dielectric layer is set as the sacrificial layer. In the manufacturing method, Step 8 further includes: after completing the fabrication of the upper-layer coil, an air cavity 5 is formed between the upper and lower-layer coils that are adjacent and spaced by opening a hole and removing the sacrificial layer. The sacrificial material can be selected as SOG.

[0050] Embodiment 4

[0051] Reference Figure 4 , another embedded inductance structure, which is different from Embodiment 1 in that the adhesion layer is Si, and there is an air cavity 5 between two adjacent and spaced coil structures. First, since the adhesion layer is Si, the self-aligned silicide (Salicide) process is used to fabricate the metal layer in Step 4. The metal layer is deposited on the surface of the Si layer and is in contact with the surface of the Si layer. Then, a thermal process is performed to form a silicided metal layer on the surface of the contacting metal layer and the silicon layer. In Step 5, the first dielectric layer and the Si layer on the sidewall of the trench above the silicided metal layer are removed, and the metal layer can be selected from one of Ti, Co, and Ni.

[0052] In step 6, a sacrificial material is filled between two adjacent and spaced coil structures, and the second dielectric layer is set as a sacrificial layer. In the manufacturing method, step 8 further includes: after the production of the upper layer of coils is completed, an air cavity 5 is formed between the upper and lower layer coils that are adjacent and spaced by opening holes and removing the sacrificial layer. The sacrificial material can be SOG.

[0053] The above embodiments are only used to further illustrate an embedded inductor structure and its manufacturing method of the present invention, but the present invention is not limited to the embodiments. Any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention all fall within the protection scope of the technical solution of the present invention.

Claims

1. An embedded inductor structure, characterized in that, A substrate including a trench with a certain depth, on the bottom of the trench, coil structures are sequentially arranged at multiple layers spaced along the depth direction of the trench, a second dielectric layer or an air cavity is provided between two adjacent and spaced coil structures, and multiple coil structures and the second dielectric layer or the air cavity layer are stacked in the trench to form an embedded inductor. The coil structure includes a metal layer, and a first dielectric layer and an adhesion layer around the metal layer. The first dielectric layer and the adhesion layer sequentially wrap the side walls of the metal layer. The coil structure is attached to the side wall of the trench through the adhesion layer. The adhesion layer also covers the bottom surfaces of the metal layer and the first dielectric layer. Two adjacent and spaced coil structures are connected by a metal connecting column.

2. The embedded inductor structure according to claim 1, wherein The thickness of the second dielectric layer or the height of the air cavity is 1 - 10 μm, and the material of the second dielectric layer is SiO2, Si3N4 or polyimide.

3. The embedded inductor structure according to claim 1, characterized in that The adhesion layer is Si or a seed layer, and the material of the seed layer includes TiW / Au or Ti / Cu.

4. The embedded inductor structure according to claim 1, wherein The thickness of the first dielectric layer is 100 nm - 2000 nm, and the material of the first dielectric layer includes SiO2 or Si3N4.

5. The embedded inductor structure according to claim 1, wherein The depth of the trench is 10 μm - 100 μm, and the included angle between the side wall of the trench and the bottom of the trench is 88° - 92°.

6. The embedded inductor structure according to claim 1, wherein The thickness of the metal layer is 1 - 5 μm, and the material of the metal layer includes at least one of Au, Cu, Pt, Ag, Ni, Co, or an alloy or compound containing at least one of the above metals.

7. The embedded inductor structure according to claim 1, wherein The projected pattern of the trench on the substrate is an annular shape with an opening, and the metal layer extends from the opening of the annulus to be provided with a lead connected to the metal connecting column.

8. A manufacturing method of an embedded inductor structure, characterized in that, Including the following steps: 1) Etch a trench with a certain depth on the substrate by using DRIE combined with depth endpoint detection technology; 2) Form an adhesion layer and a first dielectric layer on the side wall and the bottom of the trench by using atomic layer deposition process; 3) Remove the first dielectric layer at the bottom and expose the adhesion layer; 4) Fabricate a metal layer on the adhesion layer to form the first layer of coil; 5) Remove the adhesion layer and the first dielectric layer on the side wall of the trench above the metal layer; 6) Deposit a second dielectric layer on the metal layer; 7) Etch a contact hole in a preset area on the substrate; 8) Repeat steps 2 - 7 to fabricate multiple layers of coils to form an inductor structure.

9. The manufacturing method of the embedded inductor structure according to claim 8, wherein The thickness of the second dielectric layer is 1 - 10 μm, and the material of the second dielectric layer is SiO2, Si3N4, polyimide or a sacrificial material; when the second dielectric layer is a sacrificial material, step 8 further includes: after completing the fabrication of the upper layer of coil, form an air cavity between adjacent and spaced upper and lower layers of coils by opening a hole and removing the sacrificial material.

10. The manufacturing method of the embedded inductor structure according to claim 8, characterized in that, The adhesion layer is Si or a seed layer. When the adhesion layer is a seed layer, the material of the seed layer includes TiW / Au or Ti / Cu, and in step 4, the metal layer is fabricated by using electroplating process; when the adhesion layer is Si, in step 4, the metal layer is fabricated by using self - aligned silicide process.

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