Selective deposition of silicon oxide films

Abstract

Embodiments described herein generally provide a method for filling features formed on a substrate. In one embodiment, a method for selectively forming a silicon oxide layer on a substrate is provided. The method includes selectively depositing a silicon oxide layer in a patterned feature formed on a surface of the substrate, wherein the patterned feature may include a deposition surface and one or more sidewalls, wherein the one or more sidewalls may comprise silicon oxide or silicon nitride material. The deposition surface may consist essentially of silicon, and the selectively deposited silicon oxide layer may be formed by flowing tetraethoxysilane (TEOS) and ozone over the patterned feature, wherein the silicon oxide layer is selectively deposited on the deposition surface of the substrate.

Description

[0001] This application is a divisional application of the Chinese patent application with application number 201680028403.4, entitled “Selective Deposition of Silicon Oxide Films” (PCT application number PCT / US2016 / 035302), filed on June 1, 2016. Technical Field

[0002] Embodiments disclosed herein generally relate to methods for forming films on semiconductor surfaces. Background Art

[0003] Since the introduction of semiconductor devices decades ago, their geometries have been significantly reduced in size. Modern semiconductor manufacturing equipment routinely produces devices with 45nm, 32nm and 28nm feature sizes, and new equipment has been developed and implemented to enable devices with even smaller geometries. Reducing device size results in structural features having a reduced aspect ratio, or the width of features within the formed device is reduced relative to their height. As features shrink in width, gap filling and patterning become more challenging.

[0004] Filling features with lower aspect ratios becomes challenging due to the risk of voids. Voids occur when deposited material adheres not only to the bottom of the feature but also to the sidewalls, growing across the feature before it is completely filled. These voids reduce the reliability of integrated circuits.

[0005] Selective deposition of silicon oxide films on other dielectric films is important for bottom-up gapfill and patterning applications. One effective method for selective deposition of silicon oxide films involves flowing tetraethoxysilane (TEOS) and ozone over a substrate under sub-atmospheric pressure. Using this method, while silicon oxide films will grow on silicon surfaces, they will also grow on silicon nitride or thermal silicon oxide surfaces.

[0006] Therefore, there is a need for improved methods of selectively filling patterned semiconductor structures formed by silicon nitride and silicon oxide layers. Summary of the Invention

[0007] The embodiments described herein generally relate to the deposition and processing of thin films for gapfill applications. More specifically, the embodiments described herein relate to the selective deposition of silicon oxide films for feature fill applications.

[0008] One embodiment of the present disclosure provides a method for selectively forming a silicon oxide layer on a substrate, comprising selectively depositing the silicon oxide layer in a patterned feature formed on a surface of the substrate, wherein the patterned feature may include a deposition surface and one or more sidewalls, wherein the one or more sidewalls may comprise silicon oxide or silicon nitride. The deposition surface may be essentially composed of silicon, and the selectively deposited silicon oxide layer may be formed by flowing tetraethoxysilane (TEOS) and ozone over the patterned feature, wherein the silicon oxide layer is selectively deposited on the deposition surface of the substrate.

[0009] Another embodiment of the present disclosure provides a method for selectively forming a silicon oxide layer on a substrate, comprising selectively depositing the silicon oxide layer in a patterned feature formed on a surface of the substrate, wherein the patterned feature may include a deposition surface and one or more sidewalls, wherein the one or more sidewalls may comprise silicon oxide or silicon nitride. The deposition surface may be essentially composed of silicon, and the selectively deposited silicon oxide layer may be formed by flowing tetraethoxysilane (TEOS) and ozone over the patterned feature, wherein the silicon oxide layer is selectively deposited on the deposition surface of the substrate. The method may further include etching the selectively deposited silicon oxide layer, and repeating the steps of flowing tetraethoxysilane (TEOS) and ozone over the patterned feature and etching the selectively deposited silicon oxide layer one or more times.

[0010] Another embodiment of the present specification provides a method for selectively forming a silicon oxide layer on a substrate, comprising selectively depositing the silicon oxide layer in a patterned feature formed on a surface of the substrate, wherein the patterned feature may include a deposition surface and one or more sidewalls, wherein each of the sidewalls may have a base and a cap, and the cap of the one or more sidewalls may comprise a silicon nitride material. The surface area of ​​the cap may comprise at least one-third of the surface area of ​​the sidewall. The deposition surface may consist essentially of silicon. The selectively deposited silicon oxide layer may be formed by flowing tetraethoxysilane (TEOS) and ozone over the patterned feature, wherein the silicon oxide layer is selectively deposited on the deposition surface of the substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The features of the present invention have been briefly summarized above and discussed in more detail below. They can be better understood by reference to the embodiments of the invention illustrated in the accompanying drawings. However, it should be noted that the accompanying drawings depict only typical embodiments of the present invention and are not to be construed as limiting the scope of the invention, as the invention may admit to other equally effective embodiments.

[0012] Figure 1 is a schematic cross-sectional view of a processing chamber according to one embodiment.

[0013] Figure 2A is a block diagram of a method for selectively depositing a silicon oxide layer according to one embodiment.

[0014] Figures 2B-2D By using the combination Figure 2A A side cross-sectional view of a feature formed on a surface of a substrate while in accordance with the frame in question.

[0015] FIG3 is a histogram comparing wet etch rates on a silicon substrate and a silicon nitride substrate.

[0016] Figure 4 is a schematic cross-sectional view of a film deposited according to one embodiment.

[0017] 5 is a method for selectively depositing a directional treatment film for silicon oxide according to one embodiment.

[0018] Figure 6 is a schematic cross-sectional view of a substrate having patterned features for selective deposition according to one embodiment.

[0019] Figure 7 Voids are shown, which may result from growth on the sidewalls of the features rather than simple bottom-up growth.

[0020] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment may be beneficially utilized on other embodiments without further recitation. DETAILED DESCRIPTION

[0021] The embodiments described herein generally provide a method for filling features formed on a substrate. Specifically, the embodiments described generally provide a method for selectively depositing a silicon oxide material into a patterned dielectric-containing feature on a substrate.

[0022] Figure 1 FIG2 is a schematic cross-sectional view of a process chamber 100 for selectively depositing films according to one embodiment. In one configuration, the process chamber 100 can include a Producer GT chamber, available from Applied Materials, Inc., Santa Clara, California, USA. Generally, the process chamber 100 includes two process regions 118, 120. The chamber body 102 includes sidewalls 112, inner walls 114, and a bottom wall 116, which define the process regions 118, 120. The bottom wall 116 in each of the process regions 118, 120 defines at least two channels 122, 124, through which stems 126 of a heater pedestal 128 and rods 130 of a wafer lift pin assembly are disposed, respectively.

[0023] Sidewall 112 and inner wall 114 define two cylindrical annular processing zones 118 and 120. Peripheral pumping channels 125 are formed in the chamber walls defining processing zones 118 and 120. Peripheral pumping channels 125 are used to exhaust gases from processing zones 118 and 120 and control the pressure within each zone 118 and 120. The pumping channels 125 of each processing zone 118 and 120 are preferably connected to a shared exhaust pump via a shared exhaust channel (not shown) and exhaust conduits (not shown). Each zone is preferably evacuated to a selected pressure via a pump, and the connected exhaust system allows for pressure equalization within each zone. The pressure within the processing chamber during operation can range from 200 Torr to 700 Torr.

[0024] Each processing region 118, 120 preferably includes a gas distribution assembly 108 disposed through the chamber lid 104 to deliver gases to the processing regions 118, 120. The gas distribution assembly 108 of each processing region includes a gas inlet passage 140 that delivers gases to a showerhead assembly 142. A gas source (not shown) is connected to the gas inlet passage 140 and is configured to deliver one or more precursor gases (e.g., TEOS, ozone, ammonia) and / or an inert gas (e.g., nitrogen) through the showerhead assembly 142 to the processing regions 118, 120. An RF feedthrough provides a bias potential to the showerhead assembly 142 to facilitate generating a plasma between the showerhead assembly 142 and the heater pedestal 128.

[0025] A heater pedestal 128 is movably disposed in each processing region 118, 120 by a rod 126 connected to the underside of the support plate and extending through the bottom of the chamber body 102, where it connects to the drive system 103. The rod 126 moves upward and downward within the chamber 106 to move the heater pedestal 128 to position wafers thereon or remove wafers therefrom for processing.

[0026] The chamber body 102 defines a plurality of vertical gas passages for delivering various reactant and purge gases appropriate for the selected process within the chamber via a gas distribution assembly 108. Gas inlet connections 141 are provided at the bottom of the chamber 106 to connect the gas passages formed in the chamber walls to gas inlet lines 139. The gas inlet lines 139 are in turn connected to gas source lines (not shown) and are controlled for delivering gases to the various processing regions 118, 120.

[0027] The vacuum control system used in the process chamber 100 of the present disclosure may include multiple vacuum pumps in communication with various zones of the process chamber 100, wherein each zone has its own set point pressure. An RF power delivery system is used to deliver RF energy to each processing zone 118, 120 through each gas distribution assembly 108.

[0028] Figure 2A is a block diagram 200 of a method for selectively depositing a silicon oxide layer according to one embodiment. Figures 2B-2D By combining Figure 2A A side cross-sectional view of features formed on the surface of substrate 280 in accordance with the block in question. At block 210, the silicon wafer is pre-cleaned in preparation for deposition. Because bare silicon oxidizes in air and forms an undesirable native oxide layer, pre-cleaning may be necessary in some cases. To ensure good results, the wafer surface can be stripped of the native oxide layer and replaced with a hydrogen-terminated surface using a wet or dry cleaning process.

[0029] At block 220, a silicon-containing layer 282 is deposited on the silicon substrate 280. The silicon-containing layer 282 may include, for example, silicon oxide (SiO2) or silicon nitride (SiN). Such a silicon-containing layer 282 may be deposited by flowing a silicon precursor and oxygen or nitrogen gas or plasma into a processing chamber.

[0030] At block 230, the silicon-containing layer is patterned, resulting in one or more features 284 being formed in the silicon-containing dielectric layer 282. The patterning process may include, for example, applying a photoresist, exposing and developing the photoresist to form a pattern on the silicon-containing layer, wet or dry etching the exposed portion of the silicon-containing layer, removing the photoresist, and cleaning the patterned surface (e.g., Figure 2C Those skilled in the art will appreciate that the patterning process may vary depending on the specific conditions and objectives of the process.

[0031] If a silane precursor is used to form the silicon-containing layer 282 at block 220, the resulting silicon oxide layer may have a high order of silicon-hydrogen bonding. A typical deposition process may include delivering flows of monosilane SiH4, molecular oxygen O2, and H2, but it should be understood that other precursor gases may be used. The selective deposition of silicon oxide in the patterned features 284 formed in the silicon-containing layer 282 (which is performed at a later block) depends at least in part on the fact that the deposited silicon-containing dielectric layer 282 has little or no hydrogen bonding on its exposed surfaces. Therefore, any silicon oxide-containing layer having a hydrogen-terminated surface (such as a silicon-containing layer formed with silane) may require further processing to prevent the deposition of the silicon oxide film selectively deposited during block 250 from growing on these surfaces (such as feature sidewalls and field regions). In some embodiments, further processing may include exposing the patterned surface of the silicon-containing layer (formed during block 220) to a plasma during block 240 to displace the hydrogen-terminated surface. For example, the plasma treatment at block 240 may include exposing the surface of the silicon-containing layer to a plasma containing NH 3 or N 2 to remove hydrogen bonds from the formed silicon-containing layer (eg, SiO 2 layer).

[0032] Alternatively, a tetraethoxysilane (TEOS) precursor can be used to form the silicon-containing layer 282 deposited at block 220 to form a dielectric layer, such as a SiO or SiN layer. It is believed that the silicon-containing layer 282 formed using a TEOS precursor will have significantly fewer or no hydrogen bonds on its surface, so the optional plasma treatment in block 240 can be omitted.

[0033] At block 250, a silicon oxide layer 286 is selectively deposited in the patterned features 284. The silicon oxide layer 286 is deposited by flowing TEOS and ozone (O3) into a process chamber. The deposition process can be a thermal process or a plasma-enhanced process. The thermal process can be performed using a deposition process that uses ozone (O3) and TEOS in a temperature range of approximately 350-500°C and a pressure range of 20 to 620 Torr. In a plasma-enhanced process, a controlled plasma can be formed near the substrate 280 by applying RF energy from an RF power supply. Tetraethoxysilane (TEOS) can be flowed into the process chamber at a rate of between approximately 400 milligrams per minute and 2 grams per minute. Ozone can be flowed into the process chamber at a rate of approximately 10% to 18% by mass.

[0034] Because the height of feature 284 can be much greater than the width of feature 284, it is important to ensure that feature 284 is filled from the bottom up. If growth occurs on the sidewalls 283 of feature 284, voids or seams may be created, which results in a less uniform and therefore less reliable integrated circuit. For example, Figure 7 Void 350 is depicted, which may result from growth on sidewall 283 of feature 284 rather than simple bottom-up growth.

[0035] It has been observed that the selective deposition process performed during block 250 can minimize or prevent the formation of voids and seams by creating growth conditions on the bottom 281 of feature 284 and limited or no growth conditions on the sidewalls 283 of feature 284. In this embodiment, feature 284 (in which the selectively deposited film is formed) is composed of silicon oxide or silicon nitride, or a combination thereof. Due to the post-processing of the patterned dielectric layer formed in block 220 or the use of a particular type of patterned silicon oxide layer (i.e., a TEOS-based layer) formed in block 220, the surface of the patterned silicon-containing layer will have fewer Si-H bonds and, therefore, provide fewer nucleation sites for promoting the initiation of growth of the selectively deposited layer. In contrast, feature 284 ( Figure 2D ) can be made of silicon, which has a high Si-H bonding rate and thus provides many nucleation sites to promote growth. Therefore, in block 250, the TEOS and ozone treatment causes deposition to preferentially occur on the bottom 281 of the feature 284, where the substrate 280 is made of silicon. The selectively deposited silicon oxide layer 286 ( Figure 2D ) does not adhere well to the sidewalls 283 of feature 284, which are composed of silicon nitride, silicon oxide, or a combination thereof. Therefore, a silicon oxide layer 286 selectively deposited using TEOS and ozone preferentially forms and adheres to silicon substrate 280, resulting in uniform growth of the silicon oxide layer from bottom to top without significant growth or adhesion to sidewalls 283. This process results in minimization of voids.

[0036] A substrate having Si-H bonds on its surface will provide nucleation sites that allow uniform or conformal growth on the substrate surface. Without Si-H bonds to promote growth, any growth of selectively deposited layers on these types of surfaces will be non-uniform or island-like. Because growth occurs preferentially on substrate 280, growth begins at the bottom 281 (i.e., the deposition surface) of patterned features 284 on the surface of substrate 280. This results in uniform growth of silicon oxide layer 286 with minimal porosity. By comparison, the silicon oxide formed by the process disclosed in block 250 is not uniformly deposited, for example, on a silicon nitride surface or on the surface of a conventional thermal silicon oxide layer. As a result, silicon oxide layer 286 selectively grows from the bottom 281 of patterned features 284, thereby reducing porosity by using a bottom-up fill process.

[0037] In some embodiments, the silicon oxide layer 286 formed during block 250 may undesirably adhere to and grow on the sidewalls 283 of features 284 (e.g., trenches). To address this issue, at block 260, the selectively deposited silicon oxide layer may be optionally etched using dilute hydrofluoric acid (DHF) to remove the low-quality and thin formed layer on the sidewalls 283 and field regions 285. After this optional etch in block 260, the substrate may again undergo the selective deposition process of block 250. These two blocks may be periodically repeated to improve selectivity in, for example, nitride-capped features, as discussed below.

[0038] After the selective deposition of the silicon oxide layer at block 250 and the optional periodic deposition and etching at block 260, the substrate may be optionally annealed, such as by heat treatment using a lamp or other heat source, at block 270. The temperature in the substrate may be between 300 degrees Celsius and 480 degrees Celsius during the annealing block 270. The substrate may be optionally etched by dry etching or wet etching.

[0039] One advantage of the selective deposition of silicon oxide is the relative improvement in the wet etch rate of the film formed during block 250. Generally speaking, a higher wet etch rate can indicate a lower density and / or higher porosity of the dielectric material. Thus, SiO on a Si surface is more porous than SiN on a Si surface. x The much lower wet etch rate highlights the improved uniformity and thus higher quality of the SiO layer. Figure 3A and 3B Indicates the effectiveness of etching a selectively deposited silicon oxide layer. Figure 3A In the embodiment, a silicon-containing layer 310 is deposited on a substrate 300, as in Figure 2A In block 220 of , the silicon-containing layer 310 is patterned to form features 320, as in Figure 2A Next, a silicon nitride cap 330 is provided on the patterned silicon-containing layer 310. The process for this frame is discussed in more detail below. Next, a silicon oxide layer 340 is selectively deposited in the features 320 of the patterned silicon-containing layer 310, as in Figure 2A As discussed, the silicon oxide layer 340 formed in the feature 320 is a high quality layer due to the selective preferential growth of silicon oxide on the silicon substrate and forming a layer. Figure 3B The membrane is then etched, which can be achieved by exposing it to a 100:1 DHF. Due to the inferior quality and low density of the silicon oxide layer 340 from the silicon nitride cap 330, the DHF preferentially etches the silicon oxide layer 340 from the silicon nitride cap 330, while the silicon oxide layer 340 residing in the feature 320 adjacent to the silicon-containing layer 310 remains intact due to its improved material properties.

[0040] Figure 4 It is a histogram comparing the wet etch rate on silicon substrate and the wet etch rate on silicon nitride substrate. Figure 4 Assume the wet etching condition of 100:1 DHF. Figure 4 As shown in Figure 1, the DHF wet etching rate of SiN is more than twice that of Si. Therefore, the much lower wet etching rate of SiO on a Si surface compared to SiN on a Si surface demonstrates the improved uniformity and, therefore, higher quality of the SiO layer. In other words, the film quality of the selectively grown film layer is higher than that of the portion of the film selectively grown on a nitride film or an unprepared oxide film.

[0041] Figures 5A-5D A method for selectively depositing and directionally treating films for silicon oxide according to one embodiment is shown to form a silicon nitride cap 330 atop a patterned silicon-containing layer 310. An advantage of the silicon nitride cap 330 is that it prevents SiO deposition on the sidewalls of the feature 320 during processing described in conjunction with block 250, resulting in enhanced bottom-up feature fill with minimized porosity and improved quality of the resulting film. One method for depositing the silicon nitride cap 330 is by directionally treating the substrate with a nitride-containing plasma. Examples of such nitride-containing plasmas may be NH3 or N2. Figure 5A shows a patterned substrate before nitridation treatment.

[0042] exist Figure 5B In the embodiment of the present invention, plasma 510 is directed at an angle at patterned silicon-containing layer 310. Patterned silicon-containing layer 310 shields lower portions of adjacent features from the directional plasma treatment, creating a shadowing effect. As a result, only the top portion of each feature 320 is exposed to the directional plasma treatment.

[0043] exist Figure 5C In the embodiment, the plasma 510 is directed from another angle at the patterned silicon-containing layer 310 or the substrate is rotated relative to the impingement beam to ensure a uniform nitridation process across the surface of the substrate.

[0044] exist Figure 5D 3. Thus, the directional plasma treatment produces a silicon-containing layer 310 having a feature 320, wherein the top portion of the patterned silicon-containing layer 320 is nitrided. Because of the preferential growth of silicon oxide over silicon nitride on the silicon substrate, when the directionally treated substrate is exposed to the precursor gas described in block 250, the resulting silicon oxide film begins to preferentially grow at the surface of the silicon substrate to fill the feature. This bottom-up preferential growth prevents growth from the sidewalls and produces a higher quality film with minimal voids in the feature 320.

[0045] In some embodiments, to achieve the desired preferential growth, the surface area of ​​nitride cap 330 may be formed on substrate 310 such that it amounts to at least about one-third of the total surface area of ​​feature 320 . Figure 6 is a schematic cross-sectional view of a substrate 300 having a patterned silicon-containing layer 310 and a feature 320 for selective deposition, wherein a nitride cap 330 has a surface area totaling at least about one-third of the surface area of ​​the feature 320 according to one embodiment.

[0046] Embodiments disclosed herein provide for preferential bottom-up growth of silicon oxide by selectively depositing silicon oxide films using TEOS and ozone at subatmospheric pressure. Oxide films deposited by this process grow on bare silicon surfaces and exhibit no growth / island growth on silicon nitride and thermal silicon oxide surfaces. Because of the preferential growth of silicon oxide over silicon nitride on silicon substrates, when the directionally treated substrate is exposed to the precursor gas, the resulting silicon oxide film begins to preferentially grow at the surface of the silicon substrate to fill features. This preferential bottom-up growth prevents growth from the sidewalls and produces higher quality films with minimal voids in the features.

[0047] While the foregoing is directed to embodiments of the present invention disclosed, other and further embodiments of the present invention may be devised without departing from the basic scope thereof, and the scope of the invention is determined by the claims that follow.

Claims

1. A method for selectively forming a silicon oxide layer on a substrate, comprising the following steps: selectively depositing the silicon oxide layer in a patterned feature formed on a surface of the substrate, wherein the patterned feature includes one or more sidewalls and a deposition surface at a bottom of the patterned feature, and each of the one or more sidewalls has a base and a cap, wherein the cap comprises silicon nitride and the base comprises silicon oxide, and a surface area of ​​the cap is at least one-third of a surface area of ​​the sidewall and a surface area of ​​the base is at least a portion of a surface area of ​​the sidewall, wherein the deposition surface consists essentially of silicon, and the silicon oxide layer is formed on the deposition surface by exposing the patterned feature to tetraethoxysilane (TEOS) and ozone to fill the patterned feature from the bottom of the patterned feature such that the silicon oxide layer is adjacent to the base and the cap; as well as The silicon oxide layer within the patterned features is etched to a depth that exposes one or more portions of each sidewall corresponding to each respective cap portion and leaves unexposed one or more portions of each sidewall corresponding to each respective base portion.

2. The method of claim 1 , further comprising the steps of: pre-cleaning the substrate; depositing a silicon-containing layer on the substrate; as well as The silicon-containing layer is patterned to form the patterned features.

3. The method of claim 1, further comprising the steps of: After selectively depositing the silicon oxide layer in the patterned features, the silicon oxide layer is annealed.

4. The method of claim 3, wherein the temperature during annealing the silicon oxide layer is between 300 degrees Celsius and 480 degrees Celsius.

5. The method of claim 3, further comprising the steps of: After annealing the silicon oxide layer, the silicon oxide layer is wet etched.

6. The method of claim 1, wherein the tetraethoxysilane (TEOS) flows into the processing chamber at a rate between 400 mg / min and 2 g / min, and the ozone flows into the processing chamber at a rate of 10% to 18% by mass.

7. The method of claim 1, wherein the TEOS and the ozone flow into a processing chamber, and a pressure in the processing chamber is between 200 Torr and 700 Torr during operation.

8. The method of claim 1, further comprising the steps of: Prior to selectively depositing the silicon oxide layer in the patterned features, the patterned features are exposed to a nitrogen-containing plasma, wherein exposing the patterned features to the nitrogen-containing plasma comprises directionally treating the patterned features with an ion beam formed from the nitrogen-containing plasma.

9. The method of claim 8, wherein the patterned features are processed with the ion beam directed at an angle relative to the one or more sidewalls for a shadowing effect.

10. The method of claim 9, wherein the patterned feature is processed with the ion beam directed at a second angle relative to the one or more sidewalls.

11. A method for selectively forming a silicon oxide layer on a substrate, comprising the steps of: selectively depositing the silicon oxide layer in a patterned feature formed on a surface of the substrate, wherein the patterned feature includes one or more sidewalls and a deposition surface at a bottom of the patterned feature, and each of the one or more sidewalls has a base and a cap, wherein the cap comprises silicon nitride and the base comprises silicon oxide, the deposition surface consists essentially of silicon, and the silicon oxide layer is formed on the deposition surface by flowing tetraethoxysilane (TEOS) and ozone over the patterned feature, thereby filling the patterned feature from the bottom of the patterned feature such that the silicon oxide layer is adjacent to the base and the cap; After filling the patterned features, etching the silicon oxide layer to preferentially etch the silicon oxide layer from each cap portion in the patterned features to expose one or more portions of each sidewall corresponding to each cap portion, while the silicon oxide layer along each base portion remains intact and unexposed; as well as The steps of flowing tetraethoxysilane (TEOS) and ozone over the patterned features and thereafter etching the silicon oxide layer are repeated.

12. The method of claim 11, further comprising the steps of: After selectively depositing the silicon oxide layer in the patterned features formed on the surface of the substrate, the silicon oxide layer is annealed.

13. The method of claim 12, wherein a temperature during annealing the silicon oxide layer is between 300 degrees Celsius and 480 degrees Celsius.

14. The method of claim 12, further comprising the steps of: After annealing the silicon oxide layer, the silicon oxide layer is wet etched.

15. The method of claim 11, wherein the tetraethoxysilane (TEOS) flows into the processing chamber at a rate between 400 mg / min and 2 g / min, and the ozone flows into the processing chamber at a rate of 10% to 18% by mass.

16. The method of claim 11, wherein the TEOS and the ozone flow into a processing chamber, and a pressure in the processing chamber during operation is between 200 Torr and 700 Torr.

17. The method of claim 11, further comprising the steps of: Prior to the step of selectively depositing the silicon oxide layer in the patterned features formed on the surface of the substrate, flowing a nitrogen-containing plasma over the patterned features, wherein the step of flowing the nitrogen-containing plasma over the patterned features includes the step of directionally treating the patterned features with an ion beam formed from the nitrogen-containing plasma.

18. A method for selectively forming a silicon oxide layer on a substrate, comprising the steps of: selectively depositing the silicon oxide layer in patterned features formed on the surface of the substrate, wherein the patterned feature comprises one or more sidewalls and a deposition surface at a bottom of the patterned feature, and each of the one or more sidewalls has a base and a cap, wherein the cap portion of each of the one or more sidewalls comprises silicon nitride and the base portion comprises silicon oxide, and the cap portion of each of the one or more sidewalls has a surface area that is at least one-third of a surface area of ​​each sidewall and the base portion of each of the one or more sidewalls has a surface area that is at least a portion of the surface area of ​​each sidewall, the deposition surface consists essentially of silicon, and the silicon oxide layer is formed on the deposition surface by flowing tetraethoxysilane (TEOS) and ozone over the patterned features; etching the silicon oxide layer within the patterned features to a depth that exposes one or more portions of each sidewall corresponding to each respective cap portion and leaves unexposed one or more portions of each sidewall corresponding to each respective base portion; as well as The silicon oxide layer is annealed.

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