Display panel and manufacturing method thereof

Abstract

The present invention discloses a display panel and a manufacturing method thereof, which includes: an array substrate, including: a transistor device layer for forming a thin film transistor; and a photosensitive device layer, wherein the photosensitive device layer and the transistor device layer are distributed in different functional areas of the display panel, and the photosensitive device layer includes a photosensitive structural member for sensing ambient light; wherein the transistor device layer includes an active layer, the photosensitive structural member includes at least one semiconductor layer, and at least one of the semiconductor layers of the photosensitive structural member and the active layer belong to the same structural layer.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof. Background Art

[0002] An ambient light sensor, primarily composed of a photosensor, detects ambient light conditions and signals the processing chip to automatically adjust the display backlight brightness, reducing power consumption. For example, in mobile devices like phones and laptops, the display can consume up to 30% of the battery's total charge. Using an ambient light sensor can maximize battery life and conserve energy. Furthermore, an ambient light sensor helps the display provide a softer image, improving the user's visual experience. When ambient light is high, LCD displays using an ambient light sensor automatically adjust to high brightness; when the ambient light is low, the display adjusts to low brightness.

[0003] Ambient light sensors are essential for smartphones. The phone screen is typically the most power-consuming component, so using an ambient light sensor to automatically adjust screen brightness can further extend battery life while reducing user visual fatigue. However, current ambient light sensors in smartphones are external modules placed on the top edge of the phone, hindering the phone's screen-to-body ratio and exhibiting low ambient light sensitivity.

[0004] Therefore, there are defects in the existing technology, which need to be solved urgently. Summary of the Invention

[0005] An embodiment of the present invention provides a display panel in which a photosensitive structural component for sensing ambient light is integrated into an array substrate, and the structure is simple.

[0006] To solve the above technical problems, an embodiment of the present invention provides a display panel, comprising:

[0007] An array substrate, comprising:

[0008] a transistor device layer for forming a thin film transistor; and

[0009] A photosensitive device layer, wherein the photosensitive device layer and the transistor device layer are distributed in different functional areas of the display panel, and the photosensitive device layer includes a photosensitive structural member for sensing ambient light; wherein the transistor device layer includes an active layer, and the photosensitive structural member includes at least one semiconductor layer, and at least one semiconductor layer of the photosensitive structural member and the active layer belong to the same structural layer.

[0010] In one embodiment of the present invention, the functional area includes at least a sensing area for sensing ambient light, at least one semiconductor layer is located in the sensing area and there are two of them, and the photosensitive structure is a photosensitive diode formed by stacking or arranging two semiconductor layers of different materials.

[0011] In one embodiment of the present invention, the display panel includes a display area, the display area includes at least one sensing area, the transistor device layer includes a first thin film transistor formed in the display area, the photosensitive structure is located in at least one of the sensing areas and includes a lower semiconductor layer and an upper semiconductor layer formed on the surface of the lower semiconductor layer, and the upper semiconductor layer and the active layer of the first thin film transistor belong to the same structural layer.

[0012] In one embodiment of the present invention, the functional area also includes a border area located outside the display area, the transistor device layer also includes a second thin film transistor formed in the border area, the second thin film transistor includes a second active layer, and the second active layer of the second thin film transistor and the first active layer of the first thin film transistor are located in different layers.

[0013] In one embodiment of the present invention, the lower semiconductor layer and the second active layer of the second thin film transistor belong to the same structural layer.

[0014] In one embodiment of the present invention, the array substrate includes an opening, the opening exposes the lower semiconductor layer of the photosensitive device layer, and the upper semiconductor layer is formed on the surface of the lower semiconductor layer exposed by the opening.

[0015] In one embodiment of the present invention, there are a plurality of first thin film transistors, and at least one of the plurality of first thin film transistors is electrically connected to the photosensitive structural component.

[0016] In one embodiment of the present invention, the first thin film transistor includes a first source and drain layer, the photosensitive device layer includes a first electrode located on one side of the photosensitive structure, the first electrode and the first source and drain layer are arranged in the same layer, and the first electrode is connected to the lower semiconductor layer of the photosensitive structure through a via.

[0017] In an embodiment of the present invention, the display panel further includes an electrode control layer located on one side of the array substrate, and the electrode control layer is directly connected to the photosensitive structural component or connected through a conductive hole.

[0018] In one embodiment of the present invention, the photosensitive device layer includes a second electrode located on the other side of the photosensitive structure, the electrode control layer includes a lower electrode layer and an upper electrode layer spaced apart from the lower electrode layer, and the upper electrode layer also covers the surface of the upper semiconductor layer to serve as the second electrode.

[0019] The invention also relates to a method for manufacturing a display panel.

[0020] A method for manufacturing a display panel, comprising:

[0021] forming a transistor device layer, the transistor device layer including a thin film transistor, the thin film transistor including an active layer; and

[0022] A photosensitive device layer is formed, wherein the photosensitive device layer includes a photosensitive structure for sensing ambient light; the photosensitive structure includes at least one semiconductor layer, and the at least one semiconductor layer of the photosensitive structure and the active layer are formed using the same photomask.

[0023] Beneficial effects of the present invention: A display panel provided by the present invention includes an array substrate, the array substrate includes a transistor device layer for forming a thin film transistor; and a photosensitive device layer, including a photosensitive structural member for forming a photosensitive structural member for sensing ambient light; wherein, the transistor device layer includes an active layer, the photosensitive structural member includes at least one semiconductor layer, and at least one of the semiconductor layers of the photosensitive structural member and the active layer belong to the same structural layer, the structure is simple, and the display effect of the display panel is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The technical solutions and other beneficial effects of the present invention will be made apparent by describing in detail the specific embodiments of the present invention in conjunction with the accompanying drawings.

[0025] Figure 1 A schematic plan view of a display panel provided by an embodiment of the present invention;

[0026] Figure 2-9 This is a schematic diagram of a manufacturing process of a display panel according to a first embodiment of the present invention, wherein: Figure 9 yes Figure 1 A cross-sectional view of the display panel along the BB direction is provided;

[0027] Figure 10 A schematic cross-sectional view of a display panel provided in accordance with a second embodiment of the present invention.

[0028] Description of Reference Numerals

[0029] 100, 200-display panel;

[0030] 1 - array substrate; 2, 32 - electrode control layer; 10 - transistor device layer; 20 - photosensitive device layer; 22, 322 - photosensitive structural member; 101 - display area; 103 - frame area; 105 - sensing area; 12 - thin film transistor; 14 - functional layer; 120, 320 - first thin film transistor;

[0031] 130 - second thin film transistor; 140 - substrate; 141 - light shielding layer;

[0032] 142 - buffer layer; 143 - interlayer insulating layer; 144 - gate insulating layer;

[0033] 145-first protective layer; 146-flat layer;

[0034] 1410-first light shielding portion; 1412-second light shielding portion; 110-gate layer

[0035] 121 - first gate; 122 - first active layer; 123, 423 - first source and drain layer;

[0036] 124 - first source; 125 - first drain; 138 - first via hole;

[0037] 131 - second active layer; 132 - second gate; 133 - second source-drain layer; 134 - second source;

[0038] 135 - second drain; 137 - electrical connection portion; 136 - channel portion; 24 - first electrode;

[0039] 26 - second electrode; 220 - lower semiconductor layer; 222, 332 - upper semiconductor layer;

[0040] 21-lower electrode layer; 23, 323-upper electrode layer; 25-insulating layer; 210-conductive hole;

[0041] 1140 - first opening; 1142 - second opening; 112 - third opening; 114 - fourth opening;

[0042] 116 - fifth opening; 110 - touch electrode. DETAILED DESCRIPTION

[0043] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0044] The disclosure below provides many different embodiments or examples for realizing different structures of the present invention. In order to simplify the disclosure of the present invention, the components and settings of specific examples are described below. Of course, they are merely examples and are not intended to limit the present invention. In addition, the present invention may repeat reference numbers and / or reference letters in different examples. Such repetition is for the purpose of simplicity and clarity and does not in itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present invention provides examples of various specific processes and materials, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0045] The embodiment of the present invention provides a display panel 100, please refer to Figure 1 and Figure 9 The display panel 100 includes: an array substrate 1, the array substrate 1 includes a transistor device layer 10 for forming a thin film transistor 12, and a photosensitive device layer 20. The photosensitive device layer 20 includes a photosensitive structure 22 for sensing ambient light; wherein, the transistor device layer 10 includes an active layer, and the photosensitive structure 22 includes at least one semiconductor layer, and at least one semiconductor layer of the photosensitive structure 22 and the active layer included in the transistor device layer 10 belong to the same structural layer but are located in different functional areas of the display panel. In the present invention, the functional areas include a display area 101 for displaying images, a sensing area 105 for sensing ambient light, and a border area 103 located outside the display area 101 and used to set the display panel control circuit.

[0046] In actual applications, ambient light sensors are essential for smartphones, as they are typically included in existing display panels 100. The phone screen is typically the most power-consuming component, so using an ambient light sensor to automatically adjust the screen brightness can further extend the phone's battery life while reducing user visual fatigue. However, current ambient light sensors in smartphones are external modules placed on the top edge of the phone, hindering the phone's screen-to-body ratio and exhibiting low ambient light sensitivity.

[0047] Therefore, in the embodiment of the present invention, at least one semiconductor layer of the photosensitive structural member 22 and the active layer belong to the same structural layer, and thus can be formed using the same photomask, which has a simple structure and can increase the screen-to-body ratio of the display area 101 of the display panel 100.

[0048] Specifically, see Figure 9The following describes in detail the schematic structural diagram of the display panel 100 provided in accordance with an embodiment of the present invention, in conjunction with specific embodiments. The display panel 100 may be an organic light-emitting diode (OLED) or a liquid crystal display (LCD). In this embodiment, an LCD is used as an example for illustration.

[0049] The display panel 100 includes an array substrate 1 and an electrode control layer 2 located on one side of the array substrate 1 .

[0050] The array substrate 1 includes a transistor device layer 10 for forming a thin film transistor 12 and a photosensitive device layer 20. The display panel 100 includes a display area 101, a frame area 103 located outside the display area 101, and at least one sensing area 105 located at the edge of the display area. The photosensitive device layer 20 is located in at least one of the sensing areas 105. Figure 1 In the figure, only one sensing area 105 is shown. It can be understood that in order to improve the accuracy of ambient light sensing, there can be multiple sensing areas 105 distributed at different edges of the display area.

[0051] Specifically, the transistor device layer 10 includes a thin film transistor 12 and a functional layer 14 covering the thin film transistor 12 . The thin film transistor 12 includes a first thin film transistor 120 located in the display area 101 and a second thin film transistor 130 located in the frame area 103 .

[0052] The functional layer 14 includes a substrate 140, a light shielding layer 141 disposed on one side of the substrate 140, a buffer layer 142 disposed on the surface of the light shielding layer 141, an interlayer insulating layer 143 disposed on the side of the buffer layer 142 away from the substrate 140, a gate insulating layer 144 disposed on the side of the interlayer insulating layer 143 away from the buffer layer 142, and a first protective layer 145 disposed on the side of the gate insulating layer 144 away from the interlayer insulating layer 143. The light shielding layer 141 includes a first light shielding portion 1410 corresponding to the position of the second thin-film transistor 130 and a second light shielding portion 1412 corresponding to the position of the photosensitive device layer 20. The second light shielding portion 1412 is intended to block light emitted from the backlight module from reaching the photosensitive device layer 20, thereby preventing the light emitted from the backlight module from affecting the accuracy of the photosensitive device layer 20's sensing of ambient light. It is understood that when the display panel 100 is an OLED, since the light-emitting layer is disposed above the array substrate 1, the second light shielding portion 1412 can be omitted.

[0053] The first thin film transistor 120 includes a first gate electrode 121 located on a surface of an interlayer insulating layer 143, a first active layer 122 corresponding to the first gate electrode 121 and disposed on the gate insulating layer 144, and a first source-drain electrode layer 123 disposed on a surface of the first active layer 122 and covered by a first protective layer 145. The first source-drain electrode layer 123 includes a first source electrode 124 and a first drain electrode 125 spaced apart from each other.

[0054] In this embodiment, the first active layer 122 is made of a metal oxide semiconductor material, for example, indium gallium zinc oxide (IGZO). IGZO is an amorphous oxide containing indium, gallium and zinc, mainly composed of In2O3, Ga2O3 and ZnO, and is an N-type semiconductor material. In this step, physical vapor deposition or laser pulse deposition can be used, followed by exposure, development, etching and stripping processes to obtain a patterned IGZO layer covering the gate insulating layer 144. In other embodiments, the first active layer 122 can also be selected from IZO, ZTO, Al-IZO, and N-IZO. Since the first active layer 122 is IGZO, the first thin film transistor 120 is an IGZO thin film transistor 12.

[0055] The second thin film transistor 130 includes a second active layer 131 disposed on the buffer layer 142 and covered by the interlayer insulating layer 143, a second gate electrode 132 disposed on the interlayer insulating layer 143 corresponding to the second active layer 131 and covered by the gate insulating layer 144, and a second source-drain electrode layer 133 disposed on the gate insulating layer 144 and covered by the first protective layer 145. The second gate electrode 132 and the first gate electrode 121 are in the same structural layer, and the second source-drain electrode layer 133 is disposed in the same layer as the first source-drain electrode layer 123. The second source-drain layer 133 includes a second source electrode 134 and a second drain electrode 135 spaced apart from each other. The second source electrode 134 and the second drain electrode 135 are respectively located above and on either side of the second active layer 131. The second active layer 131 includes a channel portion 136 corresponding to the second gate electrode 132, and two electrical connection portions 137 located on either side of the channel portion 136 and corresponding to the second source electrode 134 and the second drain electrode 135, respectively. The second source electrode 134 and the second drain electrode 135 are respectively connected to the two electrical connection portions 137 on either side of the second active layer 131 via first vias 138 that pass through the gate insulating layer 144 and the interlayer insulating layer 143. It should be noted that the orthographic projection of the channel portion 136 on the substrate 140 is located within the coverage area of the orthographic projection of the first light shielding portion 1410 on the substrate 140.

[0056] The first light shielding portion 1410 is positioned opposite the second active layer 131, effectively blocking backlight and protecting the second active layer 131. The buffer layer 142 can be made of silicon nitride or silicon oxide, providing both buffering and protection. The gate insulating layer 144 can be made of insulating materials such as silicon oxide and silicon nitride. The interlayer dielectric layer can be made of at least one of silicon oxide, silicon nitride, and silicon oxynitride.

[0057] Since the second thin film transistor 130 is located in the border region 103, the gate scan driver circuit of the display panel 100 is formed using GOA (Gate Driver on Array) technology. GOA technology, also known as array substrate 1 row driving technology, utilizes a thin film transistor (TFT) array process to fabricate a gate scan driver circuit on the TFT array substrate 1 of an LCD or OLED display device.

[0058] The photosensitive device layer 20 includes a photosensitive structure 22 for sensing ambient light, and a first electrode 24 and a second electrode 26 located at both ends of the photosensitive structure 22. In this embodiment, at least one of the semiconductor layers is two, that is, the photosensitive structure 22 is a heterojunction formed by stacking two semiconductor layers of different materials.

[0059] More specifically, the photosensitive structure 22 includes a lower semiconductor layer 220 and an upper semiconductor layer 222 formed on the surface of the lower semiconductor layer 220. The array substrate 1 includes a second opening 1442, which exposes the lower semiconductor layer 220 of the photosensitive device layer 20. The upper semiconductor layer 222 is formed on the surface of the lower semiconductor layer 220 exposed by the second opening 1442.

[0060] The lower semiconductor layer 220 and the second active layer 131 of the second thin-film transistor 130 are co-existing, and the upper semiconductor layer 222 and the first active layer 122 of the first thin-film transistor 120 are co-existing. In this embodiment, the lower semiconductor layer 220 is made of P-type polycrystalline silicon, and the upper semiconductor layer 222 is made of IGZO. That is, the lower semiconductor layer 220 of the photosensitive structure 22 is formed simultaneously with the formation of the second active layer 131 of the second thin-film transistor 130, and the upper semiconductor layer 222 of the photosensitive structure 22 is formed simultaneously with the formation of the first active layer 122 of the first thin-film transistor 120. The photodiode formed by P-type polycrystalline silicon and N-type IGZO forms a PN junction at the junction. A photodiode operates under the action of a reverse voltage. In the absence of light, the reverse current is extremely weak, known as dark current. In the presence of light, the reverse current rapidly increases to tens of microamperes, known as photocurrent. The greater the light intensity, the greater the reverse current. The greater the intensity of the received light signal, the greater the photocurrent generated. If the photodiode receives a light signal, when light shines on the diode, electron-hole pairs will be generated. Under the action of the built-in electric field, the electron-hole pairs separate to form a photocurrent.

[0061] When light is incident on the PN junction, a large number of free electrons are released near the PN junction due to light absorption, and the same number of holes are generated accordingly. As the number of free electron-hole pairs continues to increase, the photocurrent also continues to increase, generating a photocurrent that is proportional to the light signal. The direction of the photocurrent is from the N pole to the P pole.

[0062] In this embodiment, there are multiple first thin-film transistors 120, and at least one of the multiple first thin-film transistors 120 is electrically connected to the photosensitive structural component 22. In other words, the first thin-film transistors 120 located in the display area 101 are used to control the light-emitting pixels to emit light, and at least one first thin-film transistor 120 located in the display area 101 and close to the sensing area 105 is electrically connected to the photosensitive structural component 22 to serve as a control switch for the photosensitive structural component 22.

[0063] In this embodiment, the upper semiconductor layer 222 does not completely cover the upper semiconductor layer 222, the first electrode 24 is formed simultaneously with the first source and drain layer 123 and the second source and drain layer 133, and the first electrode 24 is connected to the lower semiconductor layer 220 connected to the upper semiconductor layer 222 through a second via hole.

[0064] The first protective layer 145 is used to protect the first source-drain layer 123, the second source-drain layer 133 and the channel of the first thin-film transistor 120 of the array substrate 1. Because the IGZO channel of the first thin-film transistor 120 is particularly sensitive to water vapor, the first protective layer 145 can isolate the first source-drain layer 123 and the second source-drain layer 133 from the influence of external oxygen or water molecules, and play a protective role in the stability of the first source-drain layer 123, the second source-drain layer 133 and the IGZO channel of the first thin-film transistor 120.

[0065] In order to form the electrode control layer 2 on the surface of the first protective layer 145, a planar layer 146 is further formed on the surface of the first protective layer 145. This is because the material of the planar layer 146 is a polymer material.

[0066] In this embodiment, the electrode control layer 2 includes a lower electrode layer 21, an upper electrode layer 23 spaced apart from the lower electrode layer 21, and an insulating layer 25 located between the lower electrode layer 21 and the upper electrode layer 23. The lower electrode layer 21 and the upper electrode layer 23 may be made of indium tin oxide (ITO). More specifically, the lower electrode layer 21 is formed on the surface of the planar layer 146 and is covered by the insulating layer 25, and the upper electrode layer 23 is formed on the surface of the insulating layer 25.

[0067] In this embodiment, the upper electrode layer 23 also covers the surface of the upper semiconductor layer 222 to serve as the second electrode 26 of the photosensitive structure 22. The first electrode 24 and the second electrode 26 are connected to the circuit loop. When light shines on the diode, electron-hole pairs are generated. Under the action of the built-in electric field, the electron-hole pairs separate, forming a photocurrent.

[0068] Please refer to the figure, Figure 1 The display panel 100 can be formed by the following steps:

[0069] Step 1: Please refer to Figure 2 , provide a substrate 140, form a light-shielding layer 141 at a predetermined position of the substrate 140, and pattern it by exposure and etching to obtain a first light-shielding portion 1410 and a second light-shielding portion 1412, wherein the first light-shielding portion 1410 may not be formed at a position corresponding to the subsequent setting of the second thin film transistor 130.

[0070] Step 2: Please refer to Figure 3 A buffer layer 142 is formed on the surface of the light-shielding layer 141, and an amorphous silicon layer is formed on the surface of the buffer layer 142. After the amorphous silicon layer is annealed by an excimer laser, the amorphous silicon layer is converted into a polycrystalline silicon layer, and a pattern is formed by an exposure and etching method to form the second gate 132 of the second thin film transistor 130 and the lower semiconductor layer 220 of the photosensitive structure.

[0071] Step 3: See Figure 4 An interlayer insulating layer 143 is deposited on the surface of the patterned polysilicon layer, and a gate layer is formed on the surface of the interlayer insulating layer 143. The patterned polysilicon layer located in the border region 103 is doped with boron ions using the insulating gate as a shield, forming a P+ doped region in the polysilicon layer in the border region 103. The patterned polysilicon layer doped with boron particles serves as the second active layer 131 of the second thin film transistor 130 and the lower semiconductor layer 220 of the photosensitive structure 22. The gate layer includes a first gate 121 for forming the first thin film transistor 120 and a second gate 132 for forming the second thin film transistor 130.

[0072] Step 4: Please refer to Figure 5 A gate insulating layer 144 is deposited on the surface where the first gate 121 and the second gate 132 are located. The gate insulating layer 144 may be made of SiNx, SiOx, or a SiNx / SiOx composite film. A first opening 1440 and two second openings 1442 are formed by exposure and etching. The first opening 1440 exposes the P+ doped region, and the two spaced-apart second openings 1442 expose different regions of the lower semiconductor layer 220.

[0073] Step 5: See Figure 6 A metal oxide semiconductor layer is formed on the surface of the gate insulating layer 144. The metal oxide semiconductor layer is also formed in the second opening 1442. The metal oxide semiconductor layer corresponding to the position of the first gate 121 serves as the first active layer 122 of the first thin film transistor 120. The metal oxide semiconductor layer located in the second opening 1442 serves as the upper semiconductor layer 222 of the photosensitive structure 22. In this embodiment, IGZO is used for the metal oxide semiconductor layer.

[0074] Step 6: See Figure 7 A first source / drain layer 123, a second source / drain layer 133, a touch electrode 110 on the side of the second source / drain layer 133 away from the first source / drain layer 123, and the first electrode 24 of the photosensitive device layer 20 are formed on the surface of the gate insulating layer 144. The second source / drain layer 133 is electrically connected to the electrical connection portion 137 (P+ doped region).

[0075] In this embodiment, the drain included in the first source-drain layer 123 also overlaps the surface of the upper semiconductor layer 222 surrounding the second opening 1442 to achieve electrical connection between the first thin film transistor 120 of the display area 101 and the photosensitive structure 22, so as to utilize the first thin film transistor 120 of the display area 101 as a switch for the photosensitive structure 22.

[0076] Step 7: See Figure 8A first protective layer 145 is deposited on the common surface of the first source / drain layer 123, the second source / drain layer 133, the touch electrode 110 and the first electrode 24, an organic planarizing layer 146 is deposited on the surface of the first protective layer 145, the lower electrode layer 21 is deposited on the surface of the planarizing layer 146, and the insulating layer 25 is deposited on the surface of the lower electrode layer 21; a third opening 112 is formed in the insulating layer 25 to expose a portion of the lower electrode layer 21, a fourth opening 114 is formed to penetrate the insulating layer 25, the planarizing layer 146 and the first protective layer 145 to expose the touch electrode 110, and a fifth opening 116 is formed to penetrate the insulating layer 25, the planarizing layer 146 and the first protective layer 145 to expose the upper semiconductor layer 222. The lower electrode layer 21 serves as a common (Com) electrode for display in the display area 101.

[0077] Step 9: See Figure 9 An upper electrode layer 23 is deposited on the insulating layer 25. The upper electrode layer 23 also fills the third opening 112, the fourth opening 114, and the fifth opening 116. The upper electrode layer 23 in the display area 101 serves as a pixel electrode, and the upper electrode layer 23 in the seventh opening serves as the second electrode 26 of the photosensitive device layer 20. The second electrode 26 covers the upper semiconductor layer 222, thereby obtaining the display panel 100. In this embodiment, both the upper electrode layer 23 and the lower electrode layer 21 are made of a transparent conductive material, such as indium tin oxide (ITO). This achieves conductivity without affecting the display.

[0078] See also Figure 10 , Figure 10 A display panel 200 is provided in the second embodiment of the present application. The display panel 200 provided in the second embodiment has a substantially identical structure to the display panel 100 provided in the first embodiment, with the difference being that, in this embodiment, the first thin-film transistor 320 is not directly connected to the photosensitive structural component 322. Instead, a conductive hole 210 is provided in the electrode control layer 32, extending from the upper electrode layer 323 to the first protective layer 145 and exposing a portion of the first source-drain electrode layer 423. Because the upper electrode layer 323 is in contact with the upper semiconductor layer 332 included in the photosensitive structural component 322, that is, the upper electrode layer 323 is conductive with the upper semiconductor layer 332, and then the upper electrode layer 323 is connected to the first source-drain electrode layer 423 through the conductive hole. Thus, the first source-drain electrode layer 423 is also electrically conductive with the photosensitive structural component 22, thereby enabling the first thin-film transistor 320 to control the photosensitive structural component 22.

[0079] In summary, the display panels 100 and 200 provided by the present invention integrate the photosensitive structural component 22 for sensing ambient light into the array substrate 1, thereby eliminating the need for an external ambient light sensor, thereby increasing the proportion of the display area 101 of the display panel 100. Since the thin-film transistor 12 for driving the photosensitive structural component 22 is made of an IGZO thin-film transistor 12 with low leakage current, the accuracy of ambient light detection can be improved. And since the photosensitive structural component 22 is a heterojunction composed of two active layers of polycrystalline silicon doped with boron particles and IGZO, that is, it is formed by the same mask as the active layer of the transistor device layer 10, without adding an additional film layer, the structure is simple, and the ambient light detection function of the LTPO backplane is realized.

[0080] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0081] The above is a detailed introduction to a display panel and a display device provided by the embodiments of the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present invention. Ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or replace some of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A display panel, characterized in that: include: An array substrate, comprising: a transistor device layer for forming a thin film transistor; and A photosensitive device layer, wherein the photosensitive device layer and the transistor device layer are distributed in different functional areas of the display panel, and the photosensitive device layer includes a photosensitive structural member for sensing ambient light; wherein the transistor device layer includes an active layer, the photosensitive structural member includes at least one semiconductor layer, and the at least one semiconductor layer of the photosensitive structural member and the active layer belong to the same structural layer; The photosensitive structural member includes a lower semiconductor layer and an upper semiconductor layer formed on the surface of the lower semiconductor layer; The transistor device layer includes a first thin film transistor and a second thin film transistor, the first thin film transistor includes a first active layer, and the upper semiconductor layer and the first active layer of the first thin film transistor belong to the same structural layer; the second thin film transistor includes a second active layer, and the lower semiconductor layer and the second active layer of the second thin film transistor belong to the same structural layer, and the upper semiconductor layer and the lower semiconductor layer form a PN junction.

2. The display panel according to claim 1, wherein: The functional area at least includes a sensing area for sensing ambient light, and the photosensitive structural component is a photodiode formed by stacking or arranging two semiconductor layers of different materials.

3. The display panel according to claim 1, wherein: The functional area further includes a display area, and the first thin film transistor is formed in the display area.

4. The display panel according to claim 3, wherein: The functional area further includes a frame area located outside the display area. The second thin film transistor is formed in the frame area. The second active layer of the second thin film transistor and the first active layer of the first thin film transistor are located in different layers.

5. The display panel according to claim 1, wherein: The array substrate includes an opening, wherein the opening exposes the lower semiconductor layer of the photosensitive device layer, and the upper semiconductor layer is formed on a surface of the lower semiconductor layer exposed by the opening.

6. The display panel according to claim 1, wherein: There are multiple first thin film transistors, and at least one of the multiple first thin film transistors is electrically connected to the photosensitive structural component.

7. The display panel according to claim 6, wherein: The first thin film transistor includes a first source and drain layer, and the photosensitive device layer includes a first electrode located on one side of the photosensitive structure. The first electrode is arranged in the same layer as the first source and drain layer, and the first electrode is connected to the lower semiconductor layer of the photosensitive structure through a via.

8. The display panel according to claim 7, wherein: The display panel further includes an electrode control layer located on one side of the array substrate, and the electrode control layer is directly connected to the photosensitive structural component or connected through a conductive hole.

9. The display panel according to claim 8, wherein: The photosensitive device layer includes a second electrode located on the other side of the photosensitive structure, and the electrode control layer includes a lower electrode layer and an upper electrode layer spaced apart from the lower electrode layer. The upper electrode layer also covers the surface of the upper semiconductor layer to serve as the second electrode.

10. A method for manufacturing a display panel, characterized in that: include: forming a transistor device layer, wherein the transistor device layer includes a thin film transistor, and the thin film transistor includes an active layer; as well as forming a photosensitive device layer, wherein the photosensitive device layer includes a photosensitive structure for sensing ambient light; the photosensitive structure includes at least one semiconductor layer, and the at least one semiconductor layer of the photosensitive structure and the active layer are formed using the same photomask; The photosensitive structural member includes a lower semiconductor layer and an upper semiconductor layer formed on the surface of the lower semiconductor layer; The transistor device layer includes a first thin film transistor and a second thin film transistor, the first thin film transistor includes a first active layer, and the upper semiconductor layer and the first active layer of the first thin film transistor belong to the same structural layer; The second thin film transistor includes a second active layer. The lower semiconductor layer and the second active layer of the second thin film transistor belong to the same structural layer. The upper semiconductor layer and the lower semiconductor layer form a PN junction.

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