An on-chip sine wave excitation generator and manufacturing method

Abstract

The present invention belongs to the technical field of integrated circuit design, and discloses an on-chip sine wave excitation generator, which includes a look-up table (LUT), a digital-to-analog converter (DAC) and a low-pass filter. The pre-stored data in the look-up table (LUT) is obtained by processing the required sine wave signal through a pre-distortion method and a Sigma Delta modulator successively. The order L of the Sigma Delta modulator and the oversampling ratio OSR are determined by the signal-to-noise ratio (SNR) of the required sine wave signal, and the level quantity of its quantizer is determined by the resolution of the digital-to-analog converter (DAC). According to the harmonic distortion condition of the output signal passing through the digital-to-analog converter (DAC) and the low-pass filter, a corresponding pre-distortion method is selected to eliminate the Nth harmonic in the required sine wave signal. Also disclosed is a manufacturing method of an on-chip sine wave excitation generator.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit design, and particularly to an on-chip sine wave excitation generator and a manufacturing method thereof. Background Art

[0002] The cost of post-silicon verification accounts for about 50% of the cost of developing a chip. Therefore, it is very necessary to invent a lower-cost on-chip test method to reduce the dependence on high-end automated test instruments for post-silicon verification and achieve parallel characterization at the lowest possible cost. In the design of a low-cost on-chip test solution, it is a design challenge to use a medium-precision digital-to-analog converter to implement a low-noise and high-linearity sine excitation generator.

[0003] An on-chip sine excitation generator generally consists of a look-up table, a digital-to-analog converter, and a low-pass filter. Among them, the excitation signal data for one period is stored in the look-up table, and then the clock controls the continuous cyclic output of the control signal. Then, the digital-to-analog converter converts the digital signal into an analog signal, and finally the low-pass filter filters out the out-of-band noise. The traditional on-chip sine excitation generation method is to directly quantize the sine signal into digital codes to obtain pseudo-sine wave data and store it in the look-up table, and then generate a sine wave through the digital-to-analog converter and the low-pass filter. In this process, the output accuracy is limited by the difference in output voltage corresponding to adjacent digital codes of the digital-to-analog converter (i.e., the accuracy of the digital-to-analog converter), and the output linearity is mainly affected by the nonlinear problems caused by the element mismatch of the digital-to-analog converter.

[0004] To ensure the low cost of the on-chip sine excitation generator, it is difficult to improve the accuracy and linearity indexes of the digital-to-analog converter. Therefore, it is necessary to optimize the data stored in the look-up table to improve the accuracy and linearity.

[0005] Some researchers have proposed using the Sigma Delta modulation method to improve the accuracy of the output signal. As Figure 1 shown, this method subtracts the output signal of each period from the input signal and accumulates it continuously, so as to shape the quantization noise caused by the accuracy limitation of the analog-to-digital converter while ensuring that the signal is accurately transmitted to the output, and move the energy of the quantization noise to higher frequencies in the spectrum, so that more quantization noise is filtered out by the low-pass filter, and a high-precision sine wave output can be achieved with a medium-precision digital-to-analog converter. However, this method requires the use of an oversampling method, that is, the bandwidth of the signal is less than half of the sampling frequency. Therefore, the clock frequency required to generate a sine signal of the same frequency is faster, and a low-jitter clock source is required, which increases the cost.

[0006] Researchers have also proposed many methods to improve the linearity of digital-to-analog converters. However, these methods often require a trade-off between hardware overhead and harmonic distortion cancellation effect. The dynamic element matching method disperses the harmonic distortion energy concentrated at integer multiples of the signal in the original spectrum to all frequencies by continuously switching the unit elements used in the digital-to-analog converter, thus converting the harmonic distortion into white noise to achieve the purpose of improving linearity. However, this method requires adding more unit elements and digital control logic in the circuit design, resulting in an increase in chip area and power consumption.

[0007] The square wave superposition method converts a sine signal into the superposition of multiple square waves with different amplitudes and phases, so as to achieve the purpose of reducing harmonic distortion. However, this method requires the use of more shift registers and a multi-weight superposition network to implement, greatly increasing the complexity of the design.

[0008] The predistortion method changes a sine wave into the alternating output of multiple sine waves with the same amplitude and different phases, so that the harmonics cancel each other out and the linearity is improved. The implementation of this method only requires modifying the data stored in the look-up table. Its side effect is that while eliminating a certain harmonic distortion, a new harmonic distortion will also be generated near the sampling frequency. Therefore, the sampling frequency must be fast enough.

[0009] Therefore, there is an urgent need to propose a new in-chip sine wave excitation generation method, which combines the advantages of the accuracy improvement method and the linearity improvement method, and minimizes the additional hardware overhead, so as to effectively reduce the post-silicon verification cost while ensuring the test effect. Summary of the Invention

[0010] To solve the above problems, the present invention proposes an in-chip sine wave excitation generator and a manufacturing method. By combining the Sigma Delta modulation method and the predistortion method to modify the data stored in the look-up table to optimize the output signal, it has the characteristics of high precision, high linearity, and small hardware overhead, and is more suitable for post-silicon verification.

[0011] The present invention can be realized by the following technical solutions:

[0012] An in-chip sine wave excitation generator includes a look-up table LUT, a digital-to-analog converter DAC, and a low-pass filter. The pre-stored data in the look-up table LUT is obtained by processing the sine wave signal to be generated through the predistortion method and the Sigma Delta modulator in sequence;

[0013] The order L of the Sigma Delta modulator and the oversampling ratio OSR are determined by the signal-to-noise ratio SNR of the sine wave signal to be generated. The level of its quantizer is determined by the resolution of the digital-to-analog converter DAC. According to the harmonic distortion of the output signal passing through the DAC and the low-pass filter, the corresponding pre-distortion method is selected to eliminate the Nth harmonic in the sine wave signal to be generated.

[0014] Further, the rules for selecting the corresponding pre-distortion method are set as follows: Pre-store the unprocessed sine signal in the lookup table in the produced chip and make the on-chip sine wave excitation generator start to work. Use an analog-to-digital converter with a precision higher than that of the digital-to-analog converter used by the on-chip sine wave excitation generator to sample the output analog signal and perform a fast Fourier analysis.

[0015] If it is found that the energy of the second harmonic distortion in the power spectrum is much stronger than that of the third harmonic distortion, the pre-distortion method for eliminating the second harmonic is used.

[0016] If it is found that the energy of the third harmonic distortion is much stronger than that of the second harmonic distortion, the pre-distortion method for eliminating the third harmonic distortion is used.

[0017] If the energies of the two distortions are similar, the pre-distortion method for eliminating both harmonic distortions simultaneously is used.

[0018] Further, the precision of the analog-to-digital converter is two or more levels higher than that of the digital-to-analog converter.

[0019] Further, the oversampling ratio OSR is set to 2, and the order L of the Sigma Delta modulator is iterated from the first order to the fifth order. Simulate and observe whether the signal-to-noise ratio SNR of the sine wave signal to be generated meets the standard.

[0020] If it meets the standard, the corresponding order L of the Sigma Delta modulator at this time is used as the final order, and the corresponding sampling rate OSR is 2.

[0021] If it does not meet the standard, the oversampling ratio OSR is increased by 1, and the process of iterating from the first order to the fifth order is continued until the signal-to-noise ratio SNR of the sine wave signal to be generated meets the standard.

[0022] Further, the Sigma Delta modulator is set to Nth order, including N feedforward loops a1 to a N 、N feedback loops b1 to b N 、N integrators and a quantizer Q, and equalization coefficients (c1 to c N ) are set between adjacent two-stage integrators. The transfer function of the integrator is set to or

[0023] A manufacturing method of the on-chip sine wave excitation generator described above includes the following steps:

[0024] 1) Select the quantizer level number of the Sigma Delta modulator according to the resolution N of the digital-to-analog converter DAC;

[0025] 2) Design the order L and oversampling rate OSR of the Sigma Delta modulator according to the signal-to-noise ratio SNR of the required sine wave signal;

[0026] 3) Determine the clock frequency F according to the bandwidth F of the sine wave signal to be generated b ; S

[0027] 4) Determine the usage mode of the predistortion method according to the linearity of the digital-to-analog converter DAC and the filter;

[0028] 5) Modify the sine signal to be generated in step 3) using the predistortion method determined in step 4), then use it as the input of the Sigma Delta modulator implemented in step 2), and store the digital code output by the Sigma Delta modulator in the look-up table;

[0029] 6) Test and verify whether the performance meets the standard. If not, return to step 1) or step 2) for redesign as appropriate.

[0030] The beneficial technical effects of the present invention are as follows:

[0031] 1) Medium-precision digital-to-analog converters can be used, eliminating the high hardware cost brought by high-precision digital-to-analog converters;

[0032] 2) The Sigma Delta modulator requires a clock source relatively fast compared to the output signal frequency to improve accuracy, and the additional hardware cost required by the predistortion method is also a clock source relatively fast compared to the output signal frequency. Therefore, the combination of the two methods does not significantly increase the additional hardware cost compared to using only one method;

[0033] 3) The accuracy and linearity of the output signal are improved simultaneously. Brief Description of the Drawings

[0034] Figure 1 It is a schematic diagram of the Sigma Delta modulator circuit;

[0035] Figure 2 It is a schematic diagram of the sine wave excitation generation method used in the present invention;

[0036] Figure 3 It is a schematic diagram of the Nth-order Sigma Delta modulator system implemented with the CIFB structure; ​

[0037] Figure 4 Schematic diagram of the digital input signal used when eliminating the Nth harmonic using the predistortion method. Detailed implementation manners

[0038] The following combines the accompanying drawings and preferred embodiments to detail the specific implementation manners of the present invention.

[0039] The on-chip sine wave excitation generator of the present invention is based on a Sigma Delta modulator and a predistortion method. The on-chip sine wave excitation generator is a circuit structure of a look-up table (LUT) + digital-to-analog converter (DAC) + filter (Filter), as Figure 2 shown. In this generator, the amplitude information of one or more cycles of the sine wave to be generated is first pre-stored in the LUT, and then the DAC sequentially converts the amplitude information in the look-up table into an analog level output in each clock cycle. Finally, the filter filters out the noise outside the required frequency band in the output signal. Among them, the data pre-stored in the look-up table is obtained by modifying the sine wave signal to be generated through the predistortion method and then inputting it into the Sigma Delta modulator. For example, the original sine signal is first modified into a signal with alternating outputs of several sine signals with different phases according to the predistortion method, and then this signal is passed through any Sigma Delta modulator. The output signal obtained is the pre-stored data stored in the look-up table.

[0040] The Sigma Delta modulator used in the present invention can be designed in any form, any order, and any quantizer bit number according to requirements. One implementation manner is as Figure 3 shown. Its input is u and its output is v. An Nth-order Sigma Delta modulator is implemented using N feedforward loops (a1 to a N ), N feedback loops (b1 to b N ), N integrators ( or ) and a quantizer (Q). Equalization coefficients (c1 to c N ) can also be designed between two-stage integrators to better handle the problem of integrator saturation. Preferably, using a higher order and more quantizer levels while ensuring the stability of the modulator can make the modulator obtain a higher signal-to-noise ratio, that is, a higher-precision output signal, at the same oversampling rate.

[0041] The basic principle of the predistortion method used in the present invention is as Figure 4 shown, that is, when generating a certain sine signal, instead of directly storing the quantized digital code in the look-up table, the sine signal is modified into an interleaving of two or more sine signals with the same amplitude, the same frequency, and different phases. For example, the phase difference between two The interleaved output of the sine signal can be used to eliminate the Nth harmonic in the output signal. Preferably, the usage mode of the pre-distortion method is reasonably selected according to the harmonic distortion conditions of the output signals of the DAC and the Filter: Since the second or third harmonic distortion is generally stronger in the harmonic distortion of the digital-to-analog converter, when the second harmonic distortion energy is much greater than the third harmonic distortion, the pre-distortion method for eliminating the second harmonic distortion is adopted, and vice versa; when the energies of the two are similar, both the second and third harmonic distortions are eliminated simultaneously.

[0042] The proof process of the feasibility of the pre-distortion method used in the present invention, taking the elimination of the second harmonic distortion as an example, is as follows:

[0043] The amplitude, frequency, sampling frequency, and sampling period of the sine signal are represented by A, f in , f s , T s respectively, then the input signal can be written as

[0044]

[0045] The transfer functions of the DAC and the Filter with second harmonic distortion can be described as:

[0046]

[0047] Substituting (1) into (2) gives:

[0048]

[0049] where At this time, sin(2π2f in nT s +2Φ0)+sin(2π2f in nT s +2Φ1) = 0, so the second harmonic is successfully eliminated. It should be noted that a new harmonic distortion is also generated at the frequency. It is necessary to ensure that the sampling frequency is large enough compared to the signal frequency so that this new harmonic distortion can be successfully eliminated. Therefore, the success of the pre-harmonic distortion method requires ensuring a certain oversampling rate. Similarly, the second and third harmonic distortions can also be eliminated simultaneously. The method is to modify the input to:

[0050]

[0051] where Similarly, eliminating the two harmonic distortions also generates new harmonic distortions, which are located at and Therefore, a higher sampling frequency is required for successful elimination. When the energies of the two harmonic distortions differ greatly, the pre-distortion method for eliminating a single harmonic distortion has a better effect.

[0052] Since the predistortion method used by the on-chip sine wave excitation generator of the present invention belongs to the foreground correction method, it can also be combined with the background correction method in application to further optimize the accuracy and linearity of the output signal.

[0053] The implementation method of the on-chip sine wave excitation generator of the present invention includes the following steps:

[0054] 1. First, determine the resolution N and bandwidth Fb of the DAC to be used according to the test requirements, and then use software such as Cadence Virtuoso to build the circuits of the LUT, DAC, and Filter, and draw the layout to produce the chip;

[0055] 2. Determine the number of quantizer levels NLevel of the Sigma Delta modulator according to the resolution N of the digital-to-analog converter, and an integer value can be selected from [2, 2^N] as the number of levels;

[0056] 3. Design the order L and oversampling ratio OSR of the Sigma Delta modulator according to the required signal-to-noise ratio SNR of the output signal. The method is as follows: First, set OSR to 2, iterate L from the first order to the fifth order, and simulate to observe whether the signal-to-noise ratio meets the standard; if not, increase OSR by 1, and continue to repeat the process of iterating from the first order to the fifth order until the signal-to-noise ratio meets the standard;

[0057] 4. Determine the clock frequency F b according to the input signal bandwidth F S and it can take any value in [F b *2*OSR, +∞);

[0058] 5. Determine how to use the predistortion algorithm according to the overall linearity of the digital-to-analog converter and filter circuits used by the on-chip sine wave excitation generator of the present invention. The method is as follows: Pre-store the sine signal in the look-up table in the produced chip and make it start to work, sample the output analog signal using an analog-to-digital converter with a precision exceeding that of the digital-to-analog converter used by the on-chip sine wave excitation generator of the present invention by at least 2 bits and perform fast Fourier analysis; if it is found that the energy of the second harmonic distortion in the power spectrum is much stronger than that of the third harmonic distortion, use the predistortion method to eliminate the second harmonic; if it is found that the energy of the third harmonic distortion is much stronger than that of the second harmonic distortion, use the predistortion method to eliminate the third harmonic distortion; if the energies of the two distortions are similar, use the predistortion method to eliminate both harmonic distortions simultaneously;

[0059] 6. Modify the sine signal to be generated using the predistortion method determined in step 4, and then use it as the input of the Sigma Delta modulator implemented in step 2, and store the digital code output by the Sigma Delta modulator in the look-up table.

[0060] 7. Test and verify whether the performance meets the standard. If it does not meet the standard, return to step 1) or step 2) for redesign as appropriate. The method is as follows: If the SNR does not meet the standard, return to step 2), try to increase NLevel, and then try methods such as increasing the clock frequency (i.e., increasing OSR) or increasing L, and test and verify the SNR until it meets the standard; if the linearity does not meet the standard, return to step 1) to re - design the circuit and draw the layout, and try to improve the linearity of the DAC and Filter to make the indicators meet the standard.

[0061] The design process of the on - chip sine - wave excitation generator in the present invention is as follows: First, determine the requirements for the signal - to - noise ratio (SNR) and linearity of the output signal. Secondly, design the look - up table, digital - to - analog converter, and filter. Then, select the order, quantization level number, and clock frequency of the Sigma Delta modulator. Next, decide on the usage mode of the pre - distortion method. Finally, generate data and store it in the look - up table.

[0062] The simulation and test results show that, compared with using the Sigma Delta modulator alone, the output signal accuracy of the present invention is similar while the linearity is greatly improved; compared with using the pre - distortion method alone, the output linearity of the present invention slightly decreases, but the accuracy is greatly improved.

[0063] Those skilled in the art should understand that these are only examples. Without departing from the principles and essence of the present invention, various changes or modifications can be made to these embodiments. Therefore, the protection scope of the present invention is defined by the appended claims.

Claims

1. An on-chip sine wave excitation generator, characterized in that: It includes a look-up table LUT, a digital-to-analog converter DAC, and a low-pass filter. The pre-stored data in the look-up table LUT is obtained by processing the sine wave signal to be generated successively through a pre-distortion method and a Sigma Delta modulator. The order L of the Sigma Delta modulator and the oversampling ratio OSR are determined by the signal-to-noise ratio SNR of the sine wave signal to be generated. The number of levels of its quantizer is determined by the resolution of the digital-to-analog converter DAC. According to the harmonic distortion situation of the output signal passing through the digital-to-analog converter DAC and the low-pass filter, a corresponding pre-distortion method is selected to eliminate the Nth harmonic in the sine wave signal to be generated. When generating a certain sine signal, the quantized digital code is not directly stored in the look-up table, but the sine signal is modified into an interleaving of two or more sine signals with the same amplitude, the same frequency, and different phases.

2. The on-chip sine wave excitation generator according to claim 1, characterized in that The rule for selecting the corresponding pre-distortion method is set as follows: Pre-store the unprocessed sine signal in the look-up table in the produced chip and make the on-chip sine wave excitation generator start to work. Use an analog-to-digital converter with a precision higher than that of the digital-to-analog converter used by the on-chip sine wave excitation generator to sample the output analog signal and perform a fast Fourier analysis. If it is found that the energy of the second harmonic distortion in the power spectrum is much stronger than that of the third harmonic distortion, then use the pre-distortion method to eliminate the second harmonic. If it is found that the energy of the third harmonic distortion is much stronger than that of the second harmonic distortion, then use the pre-distortion method to eliminate the third harmonic distortion. If the energies of the two distortions are similar, then use the pre-distortion method to eliminate both harmonic distortions simultaneously.

3. The on-chip sine wave excitation generator according to claim 2, characterized in that: The precision of the analog-to-digital converter is two or more levels higher than that of the digital-to-analog converter.

4. The on-chip sine wave excitation generator according to claim 1, characterized in that: Set the oversampling ratio OSR to 2, and iterate the order L of the Sigma Delta modulator from the first order to the fifth order, and simulate and observe whether the signal-to-noise ratio SNR of the sine wave signal to be generated meets the standard. If it meets the standard, then use the corresponding order L of the Sigma Delta modulator at this time as the final order, and the corresponding sampling rate OSR is 2. If it does not meet the standard, then increase the oversampling ratio OSR by 1, and continue to repeat the process of iterating from the first order to the fifth order until the signal-to-noise ratio SNR of the sine wave signal to be generated meets the standard.

5. The on-chip sine wave excitation generator according to claim 1, characterized in that: The Sigma Delta modulator is set to be of order N and includes N feedforward loops a1 to a N , N feedback loops b1 to b N , N integrators and a quantizer Q, and equalization coefficients c1 to c are provided between adjacent stages of integrators N , and the transfer function of the integrator is set to or 6. A manufacturing method of an on-chip sine wave excitation generator according to claim 1, characterized in that It includes the following steps: 1) Select the number of levels of the quantizer of the Sigma Delta modulator according to the resolution N of the digital-to-analog converter DAC. 2) Design the order L of the Sigma Delta modulator and the oversampling ratio OSR according to the signal-to-noise ratio SNR of the sine wave signal required. 3) Determine the clock frequency F according to the bandwidth F of the sine wave signal to be generated b S ;​ 4) Determine the usage mode of the pre-distortion method according to the linearity of the digital-to-analog converter DAC and the filter. 5) Use the pre-distortion method determined in step 4) to modify the sine wave signal required in step 3), then use it as the input of the Sigma Delta modulator implemented in step 2), and then store the digital code output by the Sigma Delta modulator in the look-up table. 6) Test and verify whether the performance meets the standard. If it does not meet the standard, then depending on the situation, return to step 1) or step 2) to redesign.

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