Semiconductor device, power conversion device, and method for manufacturing semiconductor device

Abstract

The semiconductor device (10) comprises a semiconductor module portion (1), an insulating resin layer (2), a frame material (3) and a heat sink (4). The insulating resin layer (2) is bonded to the semiconductor module portion (1) and contains a first resin. The frame material (3) is arranged so as to surround the insulating resin layer (2) and contains a porous body. The heat sink (4) and the semiconductor module portion (1) sandwich the insulating resin layer (2) and the frame material (3). The frame material (3) is compressed while being sandwiched between the semiconductor module portion (1) and the heat sink (4). The insulating resin layer (2) is filled in the area surrounded by the semiconductor module portion (1), the heat sink (4) and the frame material (3). The first resin enters the pores of the porous body.

Description

Technical Field

[0001] The present invention relates to a semiconductor device, a power conversion device, and a method for manufacturing a semiconductor device. Background Art

[0002] Conventional semiconductor devices include an insulating resin layer for bonding a power module to a heat sink. For example, in the semiconductor device described in Japanese Patent Application Publication No. 2012-84708 (Patent Document 1), a thermally conductive insulating resin sheet is placed between the power module and the heat sink. The thermally conductive insulating resin sheet is compressed by applying pressure between the power module and the heat sink. The thickness of the thermally conductive insulating resin sheet is regulated by a sheet thickness regulating member provided in the power module.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Laid-Open No. 2012-84708 Summary of the Invention

[0006] When the thermally conductive insulating resin sheet (insulating resin layer) is pressurized, the voids contained in the thermally conductive insulating resin sheet (insulating resin layer) are suppressed. However, in the semiconductor device described in the above-mentioned gazette, the pressure is reduced when the thermally conductive insulating resin sheet (insulating resin layer) flows around. Or, when the pressurized portion is supported by the convex material (sheet thickness regulating member), the thermally conductive insulating resin sheet (insulating resin layer) is no longer compressed. Therefore, the thermally conductive insulating resin sheet (insulating resin layer) cannot be fully pressurized between the power module (semiconductor module portion) and the radiator. Therefore, the voids contained in the thermally conductive insulating resin sheet (insulating resin layer) are not fully suppressed. When the voids contained in the thermally conductive insulating resin sheet (insulating resin layer) are suppressed, the voltage at which discharge occurs can be increased, but since the voids are not fully suppressed, sufficiently high insulation performance cannot be obtained.

[0007] The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a semiconductor device capable of improving insulation performance.

[0008] The semiconductor device of the present invention comprises a semiconductor module, an insulating resin layer, a frame material, and a heat sink. The insulating resin layer is bonded to the semiconductor module and contains a first resin. The frame material is arranged to surround the insulating resin layer and comprises a porous body. The heat sink and the semiconductor module sandwich the insulating resin layer and the frame material. The frame material is compressed while being sandwiched between the semiconductor module and the heat sink. The insulating resin layer fills the area surrounded by the semiconductor module, the heat sink, and the frame material. The first resin penetrates into the pores of the porous body.

[0009] According to the semiconductor device of the present invention, the frame material is compressed while being sandwiched between the semiconductor module and the heat sink. Furthermore, the insulating resin layer fills the area surrounded by the semiconductor module, the heat sink, and the frame material. Therefore, the insulating resin layer is fully pressurized, thereby suppressing voids within the insulating resin layer. Furthermore, the first resin penetrates the pores of the porous body. Therefore, voids within the first resin pass through the porous body, thereby suppressing voids within the insulating resin layer. Consequently, the insulation performance of the semiconductor device can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 This is a cross-sectional view schematically showing the structure of a semiconductor device according to the first embodiment of the present invention.

[0011] Figure 2 This is a plan view schematically showing the structure of a semiconductor device according to the first embodiment of the present invention.

[0012] Figure 3 This is a graph schematically showing the compression deformation characteristics of the frame material according to the first embodiment of the present invention.

[0013] Figure 4 This is a graph schematically showing the distribution of pores in the porous body and the thermally conductive filler according to the first embodiment of the present invention.

[0014] Figure 5 This is a flowchart showing a method for manufacturing a semiconductor device according to the first embodiment of the present invention.

[0015] Figure 6 This is a cross-sectional view of the semiconductor device schematically showing a state in which the insulating resin layer, the porous body, and the semiconductor module unit are arranged on a heat sink in the method for manufacturing the semiconductor device according to the first embodiment of the present invention.

[0016] Figure 7 This is a cross-sectional view of the semiconductor device schematically showing a state in which the insulating resin layer and the porous body are pressurized between the semiconductor module unit and the heat sink in the method for manufacturing the semiconductor device according to the first embodiment of the present invention.

[0017] Figure 8 This is a cross-sectional view of the semiconductor device schematically showing a state in which the insulating resin layer is cured in the method for manufacturing the semiconductor device according to the first embodiment of the present invention.

[0018] Figure 9 It is along Figure 6 End view of the IX-IX line.

[0019] Figure 10 It is along Figure 7 End view of line XX.

[0020] Figure 11 It is along Figure 8 End view of the XI-XI line.

[0021] Figure 12 This is a graph schematically showing the relationship between the internal pressure of the insulating resin layer and the void elimination pressure in a comparative example, with respect to the cases where the viscosity is high and low.

[0022] Figure 13 This is a graph schematically showing the relationship between the internal pressure of the insulating resin layer and the void elimination pressure for the semiconductor device according to the first embodiment of the present invention and a comparative example.

[0023] Figure 14 This is a flowchart showing a method for manufacturing a semiconductor device according to the third embodiment of the present invention.

[0024] Figure 15 In the method for manufacturing a semiconductor device according to the third embodiment of the present invention, Figure 6 Corresponding end view.

[0025] Figure 16 In the method for manufacturing a semiconductor device according to the third embodiment of the present invention, Figure 7 Corresponding end view.

[0026] Figure 17 In the method for manufacturing a semiconductor device according to the third embodiment of the present invention, Figure 8 Corresponding end view.

[0027] Figure 18 This is a block diagram showing the configuration of a power conversion system according to Embodiment 4 of the present invention.

[0028] (Explanation of Symbols)

[0029] 1: Semiconductor module; 2: Insulating resin layer; 3: Frame material; 4: Heat sink; 10: Semiconductor device; 21: First resin; 31: Second resin; 100: Power supply; 200: Power conversion device; 201: Main conversion circuit; 202: Semiconductor device; 203: Control circuit; 300: Load. DETAILED DESCRIPTION

[0030] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. Hereinafter, identical or corresponding parts will be denoted by identical reference numerals, and their description will not be repeated.

[0031] Implementation method 1.

[0032] Reference Figure 1 as well as Figure 2, the structure of the semiconductor device 10 according to the first embodiment will be described. Figure 1 This is a cross-sectional view schematically showing the structure of the semiconductor device 10 according to the first embodiment. Figure 1 It is along Figure 2 Cross-sectional view of line II. Figure 2 This is a plan view schematically showing the structure of the semiconductor device 10 according to the first embodiment.

[0033] The semiconductor device 10 includes a semiconductor module portion 1, an insulating resin layer 2, a frame member 3, and a heat sink 4. The semiconductor device 10 is a power semiconductor device for electric power.

[0034] In this application, terms indicating directions include a first direction and a second direction. The first direction is the direction from the semiconductor module 1 toward the heat sink 4. The second direction is a direction perpendicular to the first direction. The plane perpendicular to the first direction is the second plane. The first direction is the so-called thickness direction. The second direction is the so-called in-plane direction.

[0035] The semiconductor module unit 1 includes a semiconductor element 11, a heat sink 12, a sealing resin 13, a bonding material 14, main terminals 15, control terminals 16, and control wiring lines 17. The lower surface of the semiconductor module unit 1 is formed by the heat sink 12 and the sealing resin 13. The semiconductor module unit 1 is thermocompression-bonded to the heat sink 4 via the insulating resin layer 2. This integrates the semiconductor module unit 1, the insulating resin layer 2, and the heat sink 4. A single semiconductor module unit 1 may include either a single semiconductor element 11 or multiple semiconductor elements 11.

[0036] Semiconductor element 11 is a silicon-type power semiconductor element such as an insulated gate bipolar transistor (IGBT) or a diode. Semiconductor element 11 is bonded to heat sink 12 via bonding material 14. The top surface of semiconductor element 11 is bonded to main terminal 15 via bonding material 14. Bonding material 14 is, for example, solder or silver sintered material. The top surface of semiconductor element 11 is bonded to control terminal 16 via control wiring 17. Control wiring 17 is, for example, a thin wire made of aluminum (Al).

[0037] The heat sink 12 is electrically connected to the semiconductor element 11. The heat sink 12 has heat dissipation properties. The material of the heat sink 12 is, for example, copper (Cu). The heat sink 12 functions as a lead frame.

[0038] The sealing resin 13 seals the semiconductor element 11, the heat sink 12, the sealing resin 13, the bonding material 14, the main terminals 15, the control terminals 16, and the control wiring lines 17. To ensure the reliability of the semiconductor module 1, it is important to design the heat resistance, insulation properties, elastic modulus, linear expansion coefficient, and other factors. Specifically, the semiconductor element 11, the heat sink 12, and the sealing resin 13 must be appropriately designed.

[0039] The sealing resin 13 is, for example, an epoxy resin containing a filler. The filler is dispersed within the epoxy resin. The filler material is, for example, silicon dioxide. The semiconductor element 11, heat sink 12, and sealing resin 13 are placed in a mold and transfer molded to form an integrated module. The main terminals 15 and control terminals 16 may be partially exposed from the sealing resin 13.

[0040] The insulating resin layer 2 is bonded to the semiconductor module 1. The insulating resin layer 2 fills the area surrounded by the semiconductor module 1, the frame 3, and the heat sink 4. The insulating resin layer 2 contains a first resin 21. The first resin 21 enters the pores of the porous body of the frame 3.

[0041] The insulating resin layer 2 is in contact with the lower surface of the semiconductor module unit 1. The insulating resin layer 2 is in contact with the entire surface of the heat sink 12 disposed on the lower surface of the semiconductor module unit 1. The insulating resin layer 2 is thermally pressed against the semiconductor module unit 1 and the heat sink 4 by applying pressure and heating to the entire surface. The insulating resin layer 2 has both insulating and heat dissipating properties. The insulating resin layer 2 is in the form of a sheet. The insulating resin layer 2 is not formed from a ceramic plate or a heat-dissipating grease with high thermal resistance. The first resin 21 is the portion of the insulating resin layer 2 that penetrates into the pores of the porous body of the frame material 3.

[0042] The insulating resin layer 2 includes, for example, a thermally conductive filler and a thermosetting resin. The thermally conductive filler has thermal conductivity. Examples of the thermally conductive filler include a sintered body or an aggregate. Examples of materials for the thermally conductive filler include boron nitride (BN), silicon nitride (SiN), or aluminum oxide. Examples of the thermosetting resin include epoxy, polyimide, or polyamide. The insulating resin layer 2 is a composite material of the thermally conductive filler and the thermosetting resin.

[0043] As a means of compounding, a thermally conductive filler and a thermosetting resin, previously formed into particles, are kneaded. The kneaded thermally conductive filler and thermosetting resin are applied to a substrate. The thermally conductive filler and thermosetting resin applied to the substrate are flattened. Next, the flattened thermally conductive filler and thermosetting resin are peeled from the substrate. This forms a sheet-like insulating resin layer 2 in which the thermally conductive filler and thermosetting resin are compounded. The substrate is, for example, copper foil or polyethylene terephthalate (PET). Stamping is an example of a method for flattening the thermally conductive filler and thermosetting resin.

[0044] To achieve higher heat dissipation, materials that orient the thermally conductive filler and materials that reduce the contact thermal resistance between fillers can also be used. Thermally conductive fillers with high thermal conductivity, such as boron nitride (BN), silicon nitride (SiN), and aluminum oxide, can also be sintered together to increase the contact area between the fillers before filling the gaps between the fillers with resin. In this case, the contact state between the fillers can be improved, so the resin filling ratio can be arbitrarily varied by taking advantage of, for example, the high thermal conductivity of the filler itself.

[0045] In the insulating resin layer 2, ceramic powder, aggregate or sintered body is used as a thermally conductive filler, and epoxy resin is used as a thermosetting resin. The proportion of the thermosetting resin is generally 30% to 60% by volume.

[0046] The insulating resin layer 2 before stamping contains voids inside. By stamping the insulating resin layer 2, the size of the voids contained in the insulating resin layer 2 becomes smaller. When the insulating resin layer 2 contains voids, depending on the conditions, according to Paschen's law, the voids may become the starting point of partial discharge from the semiconductor module part 1 to the heat sink 4. In the event of partial discharge, the insulation performance of the semiconductor device 10 is reduced. Therefore, the reliability of the semiconductor device 10 is reduced. In addition, the voids in the present application mean spaces within the insulating resin layer 2, such as air bubbles and cracks. The crack refers to, for example, a gap between the thermosetting resin and the thermally conductive filler in the insulating resin layer 2.

[0047] The frame material 3 is arranged to surround the insulating resin layer 2. The frame material 3 is composed of a porous body. The frame material 3 is compressed while being sandwiched between the semiconductor module 1 and the heat sink 4. The frame material 3 may be entirely formed of a porous body.

[0048] The frame material 3 is deformable in the first direction. The frame material 3 is formed so as to surround the outer periphery of the insulating resin layer 2. The frame material 3 is in contact with the lower surface of the semiconductor module portion 1. The frame material 3 is frame-shaped. The frame material 3 overlaps with the heat sink 4 when viewed from the first direction. The frame material 3 is not completely crushed and therefore has thickness. The thickness of the frame material 3 is equal to the thickness of the insulating resin layer 2. The thickness of the insulating resin layer 2 is preferably equal to the thickness of the frame material 3 as a whole. In this case, the thickness of the insulating resin layer 2 is uniform as a whole.

[0049] The heat sink 4 and the semiconductor module 1 sandwich an insulating resin layer 2 and a frame material 3. The semiconductor module 1 and the heat sink 4 are stacked with the insulating resin layer 2 and the frame material 3 therebetween. The heat sink 4 is made of a metal with high thermal conductivity, such as aluminum (Al) or copper (Cu).

[0050] The radiator 4 may be configured so that a coolant (not shown) flows through the radiator 4. That is, the radiator 4 may be a so-called water-cooled radiator. The radiator 4 may be connected to peripheral components such as a radiator so that the coolant flows through the peripheral components.

[0051] Heat sink 4 is made of metal. Heat sink 4 is electrically conductive. Heat sink 12 is made of metal. Heat sink 12 is electrically conductive. Heat sink 12 is exposed from the bottom surface of semiconductor module 1. In other words, semiconductor module 1 is not electrically insulated. Therefore, electrical insulation is required between semiconductor module 1 and heat sink 4. If there is no electrical insulation between heat sink 12 and heat sink 4, a potential difference between them, causing current to flow, also creates electrical conduction with surrounding components. This could lead to a failure of semiconductor module 1 due to a short circuit to ground.

[0052] Next, refer to Figure 3 as well as Figure 4 , describe frame material 3 in detail. Figure 3 It is a graph schematically showing the relationship between the pressing pressure and the thickness change (compression rate) of the frame material 3 . Figure 4 This is a graph schematically showing the relationship between the pore diameter and pore volume of a porous body and a thermally conductive filler.

[0053] The mechanical strength of the frame material 3 is anisotropic. Mechanical strength in this application refers to the compressive strength of a material. Anisotropy of mechanical strength means that the magnitude of the compressive strength of a material varies depending on the direction. The frame material 3 has a first mechanical strength in the direction from the semiconductor module portion 1 toward the heat sink 4. The frame material 3 has a second mechanical strength in a plane perpendicular to the direction from the semiconductor module portion 1 toward the heat sink 4. The second mechanical strength is greater than the first mechanical strength. As a result, the frame material 3 is easily compressed in the thickness direction and is not easily deformed in the in-plane direction.

[0054] The frame material 3 is configured so that its compression rate decreases as it is compressed in the thickness direction. That is, the frame material 3 is configured so that its compression rate decreases as it is compressed in the first direction. The compression rate of the frame material 3 decreases as the punching pressure increases. That is, when the punching pressure is applied, the pores of the porous body are crushed and the porous body is compressed. As the pores of the porous body are crushed, the proportion of the parts outside the pores of the porous body increases, so the compression rate of the porous body decreases as the porous body is compressed. In addition, the porous body is not completely crushed. In addition, in the later-described bonding step S12 of the manufacturing method of the semiconductor device 10, the first resin 21 of the insulating resin layer 2 enters the porous body of the frame material 3. Therefore, the frame material 3 contains the first resin 21. As the frame material 3 is compressed, the first resin 21 further enters the porous body. Therefore, as the frame material 3 is compressed, its compression rate decreases due to the first resin 21.

[0055] The frame material 3 has a tensile strength in the in-plane direction. The tensile strength of the frame material 3 is 2 kg / mm 2 The above. The effect of this embodiment can be achieved by the frame material 3 surrounding the entire circumference of the insulating resin layer 2. Therefore, the frame material 3 preferably has a tensile strength that does not break even when the frame material 3 is pressurized and heated and compressed. The frame material 3 is pressurized and compressed in the thickness direction during the manufacturing process of the semiconductor device 10. The frame material 3 compressed in the thickness direction also deforms in the in-plane direction. If the tensile strength of the frame material 3 is 2kg / mm 2 As described above, even when the frame material 3 is deformed, breakage of the frame material 3 is suppressed. As long as the frame material 3 can be appropriately compressed, there is no upper limit to the tensile strength.

[0056] In this specification, tensile strength refers to the tensile strength (tensile strength) defined in JIS Standard 8113. In JIS Standard 8113, tensile strength is measured by stretching a test piece of specified dimensions at a constant speed until it breaks. The tensile strength is the ratio of the initial width of the test piece to the average value of the maximum tensile load.

[0057] The frame material 3 is an insulator. When the frame material 3 is an insulator, the frame material 3 may be in contact with the heat sink 12. Alternatively, when the frame material 3 is a conductor, the frame material 3 is in contact with the sealing resin 13 instead of the heat sink 12.

[0058] The porous body is provided with pores. The pores of the porous body have a volumetric ratio of the pores of the porous body and a pore diameter of the porous body. The volumetric ratio of the porous body is the ratio of the space formed by the pores of the porous body to the volume of the frame material 3. The pore diameter of the porous body is the average inner diameter of the pores of the porous body.

[0059] The insulating resin layer 2 further includes the thermally conductive filler described above. The thermally conductive filler is a porous body. The thermally conductive filler has filler pores. The thermally conductive filler has a filler particle size and a filler pore size. The filler particle size is the particle size of the thermally conductive filler. The filler pore size is the average inner diameter of the pores formed in the thermally conductive filler. Therefore, the filler pore size is smaller than the filler particle size. The thermally conductive filler has a filler pore volume ratio. The filler pore volume ratio is the ratio of the space formed by the filler pores to the volume of the filler.

[0060] The volume ratio of the porous body is smaller than that of the filler. The pore diameter of the porous body is smaller than the particle diameter of the filler. The pore diameter of the porous body is smaller than the pore diameter of the filler.

[0061] The material constituting the frame material 3 is at least one of natural fiber, glass fiber, polymer fiber, inorganic fiber, and non-woven fabric. These are materials for forming a porous body. The frame material 3 formed of these materials can meet the above-mentioned characteristics.

[0062] Next, refer to Figures 5 to 12 , a method for manufacturing the semiconductor device 10 according to this embodiment is described. Figure 5 1 is a flowchart showing a method for manufacturing the semiconductor device 10 according to Embodiment 1. The method for manufacturing the semiconductor device 10 according to Embodiment 1 includes a placement step S11 and a bonding step S12. Figure 6 This is a cross-sectional view of the semiconductor device 10 schematically showing a state in which the insulating resin layer 2 , the frame member 3 , and the semiconductor module unit 1 are arranged on the heat sink 4 in the method for manufacturing the semiconductor device 10 according to the first embodiment. Figure 7 This is a cross-sectional view schematically showing a state in which the insulating resin layer 2 and the frame member 3 are pressurized by the semiconductor module unit 1 in the method for manufacturing the semiconductor device 10 according to the first embodiment. Figure 8 This is a cross-sectional view of the semiconductor device 10 schematically showing a state in which the insulating resin layer 2 is cured in the method for manufacturing the semiconductor device 10 according to the first embodiment. Figure 9 It is along Figure 6 End view of the IX-IX line. Figure 10 It is along Figure 7 End view of line XX. Figure 11 It is along Figure 8 End view of the XI-XI line. Figure 12 This is a graph schematically showing the relationship between the internal pressure of the insulating resin layer 2 and the void elimination pressure in a comparative example, with respect to the cases where the viscosity is high and low.

[0063] In the arrangement step S11, the insulating resin layer 2 and the frame material 3 are sandwiched between the semiconductor module unit 1 and the heat sink 4. The frame material 3 surrounds the insulating resin layer 2 and includes a porous body.

[0064] like Figure 6 As shown, in the arrangement step S11, the thickness of the frame material 3 is thicker than the thickness of the insulating resin layer 2. The insulating resin layer 2 and the frame material 3 are arranged on the heat sink 4. An air layer may be provided between the lower surface of the semiconductor module 1 and the insulating resin layer 2. The insulating resin layer 2 may or may not be in contact with the inner wall of the frame material 3. Furthermore, in this embodiment, the frame material 3 is entirely formed of a porous body.

[0065] In the bonding step S12, the insulating resin layer 2 and the frame material 3 are compressed. The semiconductor module 1 and the heat sink 4 are bonded to the insulating resin layer 2. The insulating resin layer 2 fills the area surrounded by the semiconductor module 1, the heat sink 4, and the frame material 3. The first resin 21 penetrates the pores of the porous body.

[0066] The insulating resin layer 2 and the frame material 3 are compressed by applying pressure and heating. The method of applying pressure and heating the insulating resin layer 2 and the frame material 3 is, for example, hot stamping. The insulating resin layer 2 and the frame material 3 are sandwiched and compressed by the semiconductor module part 1 and the heat sink 4, so that the thickness of the frame material 3 can become equal to the thickness of the insulating resin layer 2. In the joining process S12, the frame material 3 is compressed. Therefore, the thickness of the frame material 3 in the joining process S12 is thinner than the thickness of the frame material 3 in the configuration process S11. When the insulating resin layer 2 and the frame material 3 are pressurized, the frame material 3 first contacts the semiconductor module part 1, and then the insulating resin layer 2 contacts the semiconductor module part 1.

[0067] The viscosity of the pressurized and heated insulating resin layer 2 decreases. The insulating resin layer 2 with a decreased viscosity contacts the frame material 3. A bonding interface is formed in the pressurized and heated insulating resin layer 2. The insulating resin layer 2 is bonded to the semiconductor module 1 and the heat sink 4 at the bonding interface. Figure 12 As shown, in the comparative example, when the viscosity of the insulating resin layer 2 is low, the insulating resin layer 2 flows and thus flows out into the surrounding space, so that the desired void elimination pressure cannot be obtained.

[0068] like Figure 7As shown, the insulating resin layer 2 with a lowered viscosity enters the pores of the porous body. The first resin 21 is the portion of the insulating resin layer 2 that enters the pores of the porous body. The insulating resin layer 2 is compressed and its volume decreases. Therefore, the thermosetting resin is pressed out from the insulating resin layer 2. The thermosetting resin pressed out from the insulating resin layer 2 invades the pores of the porous body. The porous body contains pores, so the flow resistance inside the porous body is large. Therefore, the pressure loss in the first resin 21 flowing inside the porous body becomes large. Due to the flow resistance, the flow of the first resin 21 is suppressed. Therefore, the first resin 21 is maintained inside the porous body.

[0069] like Figure 8 As shown, the insulating resin layer 2 and the first resin 21 are then cured. After the insulating resin layer 2 and the first resin 21 are cured, the compressed frame material 3 does not deform.

[0070] Next, the effects of this embodiment will be described.

[0071] According to the semiconductor device 10 of this embodiment, the frame material 3 is compressed while being sandwiched between the semiconductor module 1 and the heat sink 4. Furthermore, the insulating resin layer 2 fills the area surrounded by the semiconductor module 1, the heat sink 4, and the frame material 3. Therefore, the insulating resin layer 2 is sufficiently pressurized, thereby suppressing voids within the insulating resin layer 2. Furthermore, the first resin 21 penetrates the porous body. Therefore, voids within the first resin 21 pass through the porous body, thereby suppressing voids within the insulating resin layer 2. Consequently, the insulation performance of the semiconductor device 10 can be improved.

[0072] The insulating resin layer 2 is pressurized and filled into the area surrounded by the semiconductor module 1, the frame material 3, and the heat sink 4. Therefore, the pressure on the insulating resin layer 2 is maintained. Consequently, voids within the insulating resin layer 2 are suppressed. Specifically, the voids are suppressed by crushing them due to the pressure. Specifically, the void diameter is sufficiently reduced due to the pressure. Specifically, the voids are suppressed by the pressure moving from the insulating resin layer 2 to the pores of the porous body. Since the voids within the insulating resin layer 2 are suppressed, the insulation performance of the semiconductor device 10 is improved.

[0073] The frame material 3 is arranged so as to surround the insulating resin layer 2. Therefore, the insulating resin layer 2 is prevented from flowing outward from the frame material 3. The deformation of the insulating resin layer 2 in the second direction can be controlled by the frame material 3. Therefore, the insulating resin layer 2 can be pressurized at a higher pressure. Figure 13 , explaining the relationship between the internal pressure of the insulating resin layer 2 and the void elimination pressure. Figure 13This graph schematically illustrates the relationship between the internal pressure of the insulating resin layer 2 and the void elimination pressure for the semiconductor device 10 according to this embodiment and a comparative example. By providing the frame member 3, pressure can be applied to the ends of the insulating resin layer 2, thereby suppressing voids.

[0074] Frame material 3, along with insulating resin layer 2, is sandwiched between semiconductor module 1 and heat sink 4 and compressed. Consequently, the thickness of insulating resin layer 2 can be made equal to the thickness of frame material 3. Even when compressed, frame material 3 is not completely crushed. Therefore, the thickness of insulating resin layer 2 can be regulated by frame material 3. Thus, the thickness of insulating resin layer 2 can be controlled by frame material 3.

[0075] The insulating resin layer 2 is surrounded by a frame material 3 comprising a porous body. The pores of the porous body suppress the flow of the first resin 21 that has entered the porous body. Consequently, the insulating resin layer 2 is prevented from flowing out of the frame material 3. Consequently, the pressure on the insulating resin layer 2 is maintained. Furthermore, the insulating resin layer 2 is pressurized to the ends. Consequently, voids are suppressed, thereby improving the insulation performance of the semiconductor device 10.

[0076] The first resin 21 is retained by the porous body. The retained first resin 21 further increases the flow resistance generated by the porous body. This further suppresses the insulating resin layer 2 from flowing out of the frame material 3. The first resin 21 functions as a so-called liquid seal. Since the first resin 21 is insulating, the insulating performance of the frame material 3 is further enhanced.

[0077] The thickness of the insulating resin layer 2 is determined by the thickness of the frame material 3. The thickness of the insulating resin layer 2 is preferably uniform, so the lower surface of the semiconductor module unit 1 and the upper surface of the heat sink 4 are preferably parallel to each other. The frame material 3 is deformable. Therefore, even if at least one of the lower surface of the semiconductor module unit 1 and the upper surface of the heat sink 4 contains unevenness and the unevenness contacts the frame material 3, the frame material 3 can deform to follow the unevenness. Therefore, the contact surface between the frame material 3 and the semiconductor module unit 1 and the heat sink 4 can be parallel to the semiconductor module unit 1 and the heat sink 4 as a whole. Therefore, a frame material 3 with uniform thickness can be obtained. Therefore, an insulating resin layer 2 with uniform thickness can be obtained.

[0078] In the semiconductor device 10, the insulating resin layer 2 is used instead of an insulating ceramic plate or heat-dissipating grease with high thermal resistance. This facilitates manufacturing, improves mass productivity, and reduces manufacturing costs.

[0079] Because the second mechanical strength of the frame material 3 is greater than its first mechanical strength, the frame material 3 is easily compressed in the thickness direction and less likely to deform in the in-plane direction. This ease of compression in the thickness direction allows the insulating resin layer 2 to be thinner. Consequently, an insulating resin layer 2 with excellent heat dissipation properties can be obtained. The frame material 3 is less likely to deform in the in-plane direction, resulting in stable insulation performance.

[0080] The frame material 3 is configured so that the compression rate decreases as it is compressed in the thickness direction, thereby stably controlling the thickness of the frame material 3. Consequently, the thickness of the insulating resin layer 2 can also be stably controlled. Consequently, the insulation performance of the semiconductor device 10 is stably enhanced.

[0081] The tensile strength of the frame material 3 in the in-plane direction is 2 kg / mm 2 As described above, the frame material 3 will not break even if compressed. Therefore, the effects of this embodiment can be reliably exhibited.

[0082] Since the frame member 3 is an insulator, insulation is ensured even when the frame member 3 contacts the heat sink 12. Therefore, the insulation performance of the semiconductor device 10 is improved. Furthermore, the degree of freedom in the arrangement of the components of the semiconductor device 10 is increased.

[0083] Since the insulating resin layer 2 contains a thermally conductive filler, the heat dissipation of the insulating resin layer 2 is enhanced. Consequently, the heat dissipation from the semiconductor module 1 to the heat sink 4 is also enhanced. Consequently, the heat dissipation of the semiconductor device 10 is enhanced.

[0084] When the pore diameter of the porous body is small, the flow resistance of the first resin 21 in the porous body increases. In addition, even when the volume ratio of the pores of the porous body is small, the flow resistance of the first resin 21 in the porous body increases. In these cases, the pressure loss of the first resin 21 entering the porous body increases. In this embodiment, the pore diameter of the porous body is smaller than the particle diameter of the filler and smaller than the pore diameter of the filler, so the flow resistance is large. The volume ratio of the pores of the porous body is smaller than the volume ratio of the pores of the filler, so the flow resistance is large. Therefore, when the insulating resin layer 2 is pressurized, the outflow of the first resin 21 of the insulating resin layer 2 to the outside of the frame material 3 is further suppressed. Therefore, it is easy to maintain the insulating resin layer 2 in the frame material 3, so the insulating resin layer 2 is further pressurized to the end. In addition, the pressure on the insulating resin layer 2 is further maintained. Therefore, the gaps are suppressed, and the insulation performance of the semiconductor device 10 is further improved.

[0085] Since the material of the frame member 3 is at least one of natural fiber, glass fiber, polymer fiber, inorganic fiber, and nonwoven fabric, the effects of the present embodiment can be reliably obtained.

[0086] In the manufacturing method of semiconductor device 10 of this embodiment, insulating resin layer 2 is surrounded by frame material 3. Even if the viscosity of insulating resin layer 2 decreases during bonding step S12, since insulating resin layer 2 is held within frame material 3, outflow of insulating resin layer 2 into the surrounding space is suppressed. Consequently, insulating resin layer 2 is sufficiently pressurized. Consequently, the insulation performance of semiconductor device 10 is enhanced.

[0087] Implementation method 2.

[0088] Unless otherwise specified, the second embodiment has the same structure, manufacturing method, and effects as those of the first embodiment. Therefore, the same reference numerals are assigned to the same structures as those of the first embodiment, and the description thereof will not be repeated.

[0089] In the semiconductor device 10 according to the present embodiment, the frame member 3 has a higher dielectric constant than the insulating resin layer 2 .

[0090] The insulating resin layer 2 has a first dielectric constant. The frame material 3 has a second dielectric constant. In the second embodiment, the second dielectric constant is greater than the first dielectric constant. That is, the frame material 3 is an insulating material having a higher dielectric constant than the insulating resin layer 2. In the second embodiment, the material constituting the frame material 3 is at least one of alumina and mullite. Alumina and mullite are ceramic materials. Alumina and mullite are inorganic fibers. This embodiment has the same effects as the first embodiment. In addition to the materials mentioned above, the material of the frame material 3 can be any material having a high dielectric constant. The material of the frame material 3 can also be, for example, silicon nitride (SiN), aluminum nitride (AlN), zirconium oxide (Zr), etc.

[0091] Next, the effects of this embodiment will be described.

[0092] In this embodiment, a frame material 3 having a higher dielectric constant than the insulating resin layer 2 is disposed between the outside of the frame material 3 (the atmosphere) and the insulating resin layer 2. This prevents creeping discharge from occurring at the boundary between the outside of the frame material 3 and the frame material 3, and at the boundary between the frame material 3 and the insulating resin layer 2. This embodiment achieves a so-called electric field relaxation effect, thereby enhancing the insulation performance of the semiconductor device 10.

[0093] Implementation method 3.

[0094] Unless otherwise specified, the third embodiment has the same structure, manufacturing method, and operational effects as those of the first embodiment. Therefore, the same reference numerals are assigned to the same structures as those of the first embodiment, and the description thereof will not be repeated.

[0095] In this embodiment, the method for manufacturing the semiconductor device 10 further includes an impregnation step S13. In the impregnation step S13, the second resin 31 is impregnated into the pores of the porous body. In the bonding step S12, the first resin 21 and the second resin 31 are in contact with each other. The method for manufacturing the semiconductor device 10 according to this embodiment differs from the method for manufacturing the semiconductor device 10 according to the first embodiment in that it further includes the impregnation step S13.

[0096] Reference Figures 14 to 17 , a method for manufacturing the semiconductor device 10 according to the third embodiment is described. Figure 14 This is a flowchart showing a method for manufacturing the semiconductor device 10 according to the third embodiment. Figure 15 In the method for manufacturing the semiconductor device 10 according to the third embodiment, Figure 6 Corresponding end view. Figure 16 In the method for manufacturing the semiconductor device 10 according to the third embodiment, Figure 7 Corresponding end view. Figure 17 In the method for manufacturing the semiconductor device 10 according to the third embodiment, Figure 8 Corresponding end view.

[0097] In this embodiment, the impregnation step S13 is performed before the arrangement step S11. The second resin 31 is pre-impregnated into the pores of the porous body of the frame material 3. The second resin 31 has adhesive and thermosetting properties. In the joining step S12, the first resin 21 and the second resin 31 are pressurized and heated. The second resin 31 contacts the first resin 21 in the pores of the porous body. The material of the second resin 31 is different from that of the first resin 21. Alternatively, the material of the second resin 31 may be the same as that of the first resin 21.

[0098] In the bonding step S12, the second resin 31 has a higher melt viscosity than the first resin 21. The melt viscosity of the first resin 21 is the viscosity of the first resin 21 when pressurized and heated to become a liquid. The melt viscosity of the second resin 31 is the viscosity of the second resin 31 when pressurized and heated to become a liquid. When the viscosity is high, the flow of the resin is suppressed.

[0099] In the bonding step S12, the second resin 31 has a faster curing rate than the first resin 21. The curing rate of the first resin 21 is the speed at which the first resin 21 transforms from a liquid into a gel. The curing rate of the second resin 31 is the speed at which the second resin 31 transforms from a liquid into a gel. The curing rate can also be measured using a curelastometer. The temperature for measuring the curing rate is, for example, 180°C.

[0100] Next, the effects of this embodiment will be described.

[0101] In the impregnation step S13, the second resin 31 is pre-impregnated into the pores of the porous body. This further suppresses the first resin 21 that has entered the pores of the porous body of the frame material 3 from flowing outward from the frame material 3. This further maintains the pressure on the insulating resin layer 2. Consequently, voids are further suppressed. Consequently, the insulation performance of the semiconductor device 10 is further improved. In this embodiment, the first resin 21 and the second resin 31 function as a liquid seal. The liquid seal effect in this embodiment is greater than that in the first embodiment.

[0102] Because the second resin 31 has a higher melt viscosity than the first resin 21, the flow resistance experienced by the first resin 21 in the porous body is greater than that in Embodiment 1. Consequently, the first resin 21 is further prevented from flowing outside the frame material 3. Consequently, the insulation performance of the semiconductor device 10 is further enhanced.

[0103] The second resin 31 cures faster than the first resin 21, so within the porous body, the viscosity of the second resin 31 increases more rapidly than that of the first resin 21. Consequently, the flow resistance experienced by the first resin 21 within the porous body is greater than that in the first embodiment. Consequently, outflow of the first resin 21 outside the frame material 3 is further suppressed. Consequently, the insulation performance of the semiconductor device 10 is further enhanced.

[0104] Implementation method 4.

[0105] This embodiment is an example of applying the semiconductor devices according to Embodiments 1 to 3 to a power converter. The present invention is not limited to a specific power converter, but the following describes a case where the present invention is applied to a three-phase inverter as Embodiment 4.

[0106] Figure 18 This is a block diagram showing the configuration of a power conversion system to which the power conversion device according to this embodiment is applied.

[0107] Figure 18 The power conversion system shown includes a power supply 100, a power conversion device 200, and a load 300. Power supply 100 is a DC power supply that supplies DC power to power conversion device 200. Power supply 100 can be composed of various power sources, including a DC system, a solar cell, a battery, or a rectifier circuit or AC / DC converter connected to an AC system. Alternatively, power supply 100 can be composed of a DC / DC converter that converts DC power output from a DC system into a predetermined power level.

[0108] The power conversion device 200 is a three-phase inverter connected between the power source 100 and the load 300, which converts the DC power supplied from the power source 100 into AC power and supplies the AC power to the load 300. Figure 18 As shown, the main converter circuit 201 is provided with a main converter circuit 201 that converts DC power into AC power and outputs the converted power; and a control circuit 203 that outputs a control signal for controlling the main converter circuit 201 to the main converter circuit 201 .

[0109] Load 300 is a three-phase electric motor driven by the AC power supplied from power conversion device 200. Load 300 is not limited to a specific application and may be a motor mounted on various electrical devices, for example, a motor for hybrid vehicles, electric vehicles, railway vehicles, elevators, or air conditioners.

[0110] The power conversion device 200 is described in detail below. The main conversion circuit 201 includes switching elements and freewheeling diodes (not shown). The switching elements are switched to convert the DC power supplied from the power supply 100 into AC power, which is then supplied to the load 300. There are various examples of the specific circuit structure of the main conversion circuit 201, but the main conversion circuit 201 of this embodiment is a two-level three-phase full-bridge circuit, which can be composed of six switching elements and six freewheeling diodes connected in anti-parallel with each switching element. Each switching element and each freewheeling diode of the main conversion circuit 201 is composed of a semiconductor device 202 corresponding to any of the above-mentioned embodiments 1 to 3. The six switching elements are connected in series to form upper and lower branches for every two switching elements, and each upper and lower branch constitutes a phase (U phase, V phase, W phase) of the full-bridge circuit. Furthermore, the output terminals of each upper and lower branch, that is, the three output terminals of the main conversion circuit 201, are connected to the load 300.

[0111] In addition, the main conversion circuit 201 includes a drive circuit (not shown) for driving each switching element. The drive circuit may be built into the semiconductor device 202 or may be a structure that includes the drive circuit independently of the semiconductor device 202. The drive circuit generates a drive signal for driving the switching element of the main conversion circuit 201 and supplies it to the control electrode of the switching element of the main conversion circuit 201. Specifically, according to the control signal from the control circuit 203 described later, a drive signal for turning on the switching element and a drive signal for turning off the switching element are output to the control electrode of each switching element. When the switching element is maintained in the on state, the drive signal is a voltage signal (on signal) that is higher than the threshold voltage of the switching element. When the switching element is maintained in the off state, the drive signal is a voltage signal (off signal) that is lower than the threshold voltage of the switching element.

[0112] The control circuit 203 controls the switching elements of the main conversion circuit 201 so that the desired power is supplied to the load 300. Specifically, the control circuit 203 calculates the time (on-time) for each switching element of the main conversion circuit 201 to be in the on state based on the power to be supplied to the load 300. For example, the main conversion circuit 201 can be controlled using PWM control, which modulates the on-time of the switching elements according to the voltage to be output. Furthermore, a control instruction (control signal) is output to the drive circuit of the main conversion circuit 201 so that, at each point in time, an on signal is output to the switching element to be in the on state, and an off signal is output to the switching element to be in the off state. In accordance with this control signal, the drive circuit outputs an on signal or an off signal as a drive signal to the control electrode of each switching element.

[0113] In the power conversion device according to this embodiment, the semiconductor module units according to Embodiments 1 to 3 are applied as switching elements and freewheeling diodes of the main conversion circuit 201 , thereby improving the insulation performance of the power conversion device.

[0114] While this embodiment describes an example of applying the present invention to a two-level, three-phase inverter, the present invention is not limited thereto and can be applied to various power conversion devices. While this embodiment uses a two-level power conversion device, a three-level or multi-level power conversion device is also possible. The present invention can also be applied to a single-phase inverter when supplying power to a single-phase load. Furthermore, when supplying power to a DC load, the present invention can also be applied to a DC / DC converter or an AC / DC converter.

[0115] In addition, the application of the power conversion device of the present invention is not limited to the case where the above-mentioned load is an electric motor. For example, it can be used as a power supply device for an electric discharge machine, a laser processing machine, an induction heating cooker, or a contactless power supply system, and can also be used as a power conditioner for a solar power generation system, a power storage system, etc.

[0116] Example

[0117] Next, examples and comparative examples of the present invention are described. The semiconductor devices 10 according to Examples 1 and 2 are the semiconductor devices 10 according to Embodiment 1. The semiconductor device 10 according to Example 3 is the semiconductor device 10 according to Embodiment 2. The semiconductor devices 10 according to Comparative Examples 1 and 2 are semiconductor devices 10 according to comparative examples.

[0118] (Example 1)

[0119] Example 1 is a semiconductor device 10 involved in embodiment 1. The material of the semiconductor element 11 in Example 1 is silicon (Si). The material of the heat sink 12 in Example 1 is copper (Cu). The semiconductor element 11 and the main terminal 15 are chip-soldered onto the heat sink 12. The semiconductor element 11, the heat sink 12 and the main terminal 15 are transfer molded by the sealing resin 13. Thus, the semiconductor module part 1 is formed. The insulating resin layer 2 in Example 1 contains a thermally conductive filler and a thermosetting resin. The thermosetting resin in Example 1 is epoxy resin. The thermally conductive filler in Example 1 is boron nitride (BN). The thermal conductivity of the insulating resin layer 2 in Example 1 is 12 W / (m·K). The thickness of the insulating resin layer 2 in Example 1 is 200 μm. In addition, the frame material 3 in Example 1 does not contain the second resin 31.

[0120] The specification of the frame material 3 in Example 1 is set to specification A. The material of the frame material 3 of specification A is cellulose. The frame material 3 of specification A is formed entirely of cellulose. The pore diameter of the porous body of the frame material 3 of specification A is 1 μm. In addition, the pore diameter of the porous body is the diameter of the pores before the porous body is compressed. The thickness of the frame material 3 of specification A is 300 μm. The tensile strength of the frame material 3 of specification A in the in-plane direction is 2 kg / mm 2 The second mechanical strength of the frame material 3 of Specification A is greater than the first mechanical strength. The frame material 3 of Specification A is configured so that its compressibility decreases as it is compressed in the thickness direction. After the insulating resin layer 2 and the frame material 3 of Specification A are compressed in the joining step S12, the proportion of pores contained in the frame material 3 of Specification A relative to the volume of the deformed frame material 3 of Specification A is 60%.

[0121] (Example 2)

[0122] Example 2 is a semiconductor device 10 according to embodiment 1. Unless otherwise specified, Example 2 has the same structure and manufacturing method as Example 1. The specification of the frame material 3 in Example 2 is set to specification B. Only the difference between the frame material 3 of specification B and the frame material 3 of specification A is described. The pore diameter of the porous body of the frame material 3 of specification B is 7 μm. The pore diameter of the porous body of the frame material 3 of specification B is larger than the pore diameter of the porous body of the frame material 3 of specification A. After the insulating resin layer 2 and the frame material 3 of specification B are compressed in the bonding step S12, the proportion of the pores contained in the frame material 3 of specification B relative to the volume of the deformed frame material 3 of specification B is 55%.

[0123] (Example 3)

[0124] Example 3 is a semiconductor device 10 according to Embodiment 2. Unless otherwise specified, Example 3 has the same structure and manufacturing method as Example 1. The specification of the frame material 3 in Example 3 is set to specification C. Only the differences between the frame material 3 of specification C and the frame material 3 of specification A are described. The material of the frame material 3 of specification C is alumina. The frame material 3 of specification C is formed from alumina fibers. The dielectric constant of the frame material 3 of specification C is twice the dielectric constant of the insulating resin layer 2. The pore diameter of the porous body of the frame material 3 of specification C is 10 μm. The pore diameter of the porous body of the frame material 3 of specification C is larger than the pore diameter of the porous body of the frame material 3 of specification A.

[0125] (Example 4)

[0126] Example 4 is a semiconductor device 10 according to Embodiment 3. Unless otherwise specified, Example 4 has the same structure as Example 2. The frame material 3 in Example 4 is, like the frame material 3 in Example 2, a frame material 3 of Specification B. The method for manufacturing the semiconductor device 10 according to Example 4 further includes an impregnation step S13. In Example 4, the impregnation step S13 is performed before the placement step S11. In the impregnation step S13, the frame material 3 of Specification B further includes a second resin 31. The specification of the second resin 31 in Example 4 is set to Specification D. The second resin 31 of Specification D is a high-viscosity resin. The material of the second resin 31 of Specification D is epoxy resin. The epoxy resin used as the material for the second resin 31 of Specification D is different from the epoxy resin used as the material for the thermosetting resin of the insulating resin layer 2. Specifically, the melt viscosity of the epoxy resin used as the material for the second resin 31 of Specification D is higher than the melt viscosity of the epoxy resin used as the thermosetting resin of the insulating resin layer 2, which becomes the first resin 21. In the impregnation step S13 , the second resin 31 of specification D is impregnated to 50% of the volume of the pores of the porous body.

[0127] (Example 5)

[0128] Example 5 is a semiconductor device 10 according to Embodiment 3. Unless otherwise specified, Example 5 has the same structure as Example 4. Like Example 4, the frame material 3 in Example 5 is of Specification B. The second resin 31 in Example 5 is of Specification E. The second resin 31 of Specification E is a fast-curing resin. The curing speed of the second resin 31 of Specification E is faster than that of the first resin 21.

[0129] (Comparative Example 1)

[0130] Comparative Example 1 is a semiconductor device 10 in a comparative example. Unless otherwise specified, Comparative Example 1 has the same structure as that of the above-described Example 1. Comparative Example 1 differs from Example 1 in that it does not include a frame member 3 .

[0131] (Comparative Example 2)

[0132] Comparative Example 2 is a semiconductor device 10 in a comparative example. Unless otherwise specified, Comparative Example 2 has the same structure as Comparative Example 1 described above. Comparative Example 2 differs from Example 1 in that it includes a first resin 21, which is different from Comparative Example 1. The specification of the first resin 21 in Comparative Example 2 is set to Specification F. The first melt viscosity of the first resin 21 of Specification F is 10 times the first melt viscosity of the first resin 21 in Comparative Example 2.

[0133] Next, Table 1 shows the evaluation results of Examples 1 to 5, Comparative Example 1, and Comparative Example 2.

[0134] [Table 1]

[0135]

[0136] Evaluation criteria

[0137] a: Exceeds 100% of the target value.

[0138] b: 100% of the target value.

[0139] c: 70% or more and less than 100% of the target value.

[0140] d: Less than 70% of the target value.

[0141] Evaluations were conducted on the resin outflow suppression effect (resin outflow), insulation performance (voltage resistance), and adhesion. The resin outflow suppression effect was evaluated by visually observing the amount of first resin 21 and second resin 31 that had flowed out of the frame material 3. The insulation performance between the semiconductor module 1 and the heat sink 4 was evaluated. The adhesion between the semiconductor module 1 and the heat sink was evaluated. Adhesion was evaluated using an ultrasonic flaw detector (SAT).

[0142] The evaluation criteria have four levels: a to d. A means the result exceeds 100% of the target value. B means the result is 100% of the target value. C means the result is 70% or more of the target value but less than 100%. D means the result is less than 70% of the target value.

[0143] As shown in Table 1, the resin outflow suppression effect of Example 1 was evaluated as a. The insulation performance of Example 1 was evaluated as a. The adhesion of Example 1 was evaluated as a. The resin outflow suppression effect of Example 2 was evaluated as c. The insulation performance of Example 2 was evaluated as b. The adhesion of Example 2 was evaluated as a. The resin outflow suppression effect of Example 3 was evaluated as c. The insulation performance of Example 3 was evaluated as a. The adhesion of Example 3 was evaluated as a. The resin outflow suppression effect of Example 4 was evaluated as b. The insulation performance of Example 4 was evaluated as a. The adhesion of Example 4 was evaluated as a. The resin outflow suppression effect of Example 5 was evaluated as a. The insulation performance of Example 5 was evaluated as a. The adhesion of Example 5 was evaluated as a. The resin outflow suppression effect of Comparative Example 1 was evaluated as d. The insulation performance of Comparative Example 1 was evaluated as d. The adhesion of Comparative Example 6 was evaluated as a. The resin outflow suppression effect of Comparative Example 1 was evaluated as b. The insulation performance of Comparative Example 7 was evaluated as c. The adhesiveness of Comparative Example 7 was evaluated as c.

[0144] Insulation performance and adhesion are the most important necessary functions of the insulating resin layer 2. In each of Examples 1 to 5, good evaluations were obtained regarding insulation performance and adhesion. In Example 1, the resin outflow suppression effect was excellent. In Example 1, the insulation performance was excellent. In Example 1, the adhesion was good. In Example 2, the resin outflow was slight. The resin outflow in Example 2 was within the allowable range. In Example 2, the insulation performance was good. In Example 2, the adhesion was excellent. In Example 3, the resin outflow suppression effect was high. In Example 3, the insulation performance and adhesion were excellent. The results of Example 4 were similar to those of Example 3. In Example 4, the resin outflow suppression effect was high. In Example 4, the insulation performance and adhesion were excellent. In Example 5, the resin outflow suppression effect, insulation performance, and adhesion were good. The insulation performance of Example 5 was the highest among the examples. As shown in Embodiment 3, by impregnating the pores of the porous body of the frame material 3 with the second resin 31, the insulation performance of the semiconductor device 10 is further improved.

[0145] In Comparative Example 1, the insulating resin layer 2 significantly flows out from under the semiconductor module unit 1. The insulating performance of Comparative Example 1 is low.

[0146] In Comparative Example 2, the melt viscosity of the first resin 21 of Specification F is high, resulting in a high resin outflow suppression effect. However, due to the high melt viscosity of the first resin 21 of Specification F, high pressure must be applied to the insulating resin layer 2 to achieve strong adhesion. In Comparative Example 2, the absence of the frame material 3 prevents sufficient pressure. Consequently, insulation performance and adhesion are low.

[0147] In Comparative Examples 1 and 2, when the insulating resin layer 2 is pressurized and heated, the insulating resin layer 2 flows out, so the internal pressure does not increase at the end portion. Consequently, voids remain in the insulating resin layer 2, resulting in low insulation performance.

[0148] The embodiments and examples disclosed herein are to be considered in all respects as illustrative and non-restrictive. The scope of the present invention is indicated by the claims rather than the above description, and is intended to include all modifications within the meaning and scope equivalent to the claims.

Claims

1. A semiconductor device comprising: Semiconductor Module Division; an insulating resin layer bonded to the semiconductor module portion and containing a first resin; a frame material disposed so as to surround the insulating resin layer and including a porous body; and a heat sink sandwiching the insulating resin layer and the frame material with the semiconductor module; The frame member is compressed while being sandwiched between the semiconductor module unit and the heat sink. The insulating resin layer is filled in a region surrounded by the semiconductor module, the heat sink, and the frame member. The first resin enters the pores of the porous body.

2. The semiconductor device according to claim 1, wherein The frame member has a first mechanical strength in a direction from the semiconductor module portion toward the heat sink and a second mechanical strength in a plane perpendicular to the direction from the semiconductor module portion toward the heat sink. The second mechanical strength is greater than the first mechanical strength, The mechanical strength refers to the compressive strength of a material.

3. The semiconductor device according to claim 1, wherein The frame material is configured such that the compression rate decreases as the frame material is compressed in the thickness direction.

4. The semiconductor device according to any one of claims 1 to 3, wherein The insulating resin layer contains a thermally conductive filler having filler pores.

5. The semiconductor device according to claim 4, wherein The volume ratio of the pores of the porous body is smaller than the volume ratio of the pores of the filler. The semiconductor device according to claim 4 , wherein: The pore diameter of the porous body is smaller than the particle diameter of the filler.

7. The semiconductor device according to claim 4, wherein The pore diameter of the porous body is smaller than the pore diameter of the filler.

8. The semiconductor device according to any one of claims 1 to 3, wherein The frame material is made of at least one of natural fibers, polymer fibers, inorganic fibers, and nonwoven fabrics.

9. The semiconductor device according to claim 8, wherein The frame material has tensile strength in the in-plane direction, The tensile strength is 2kg / mm 2 above.

10. The semiconductor device according to claim 8, wherein The frame material is an insulator.

11. The semiconductor device according to claim 8, wherein The insulating resin layer has a first dielectric constant, The frame material has a second dielectric constant, The second dielectric constant is greater than the first dielectric constant.

12. The semiconductor device according to claim 11, wherein The frame material is made of at least one of alumina and mullite.

13. A power conversion device comprising: A main conversion circuit comprising the semiconductor device according to any one of claims 1 to 12, the main conversion circuit converting input power and outputting the converted power; and The control circuit outputs a control signal for controlling the main conversion circuit to the main conversion circuit.

14. A method for manufacturing a semiconductor device, comprising: an arranging step of arranging an insulating resin layer and a frame material including a porous body and surrounding the insulating resin layer so as to be sandwiched between the semiconductor module portion and the heat sink; and a bonding step of compressing the insulating resin layer and the frame material to bond the semiconductor module portion and the heat sink to the insulating resin layer; In the bonding step, the insulating resin layer is filled in a region surrounded by the semiconductor module portion, the heat sink, and the frame member, and contains a first resin, and the first resin enters into the pores of the porous body.

15. The method for manufacturing a semiconductor device according to claim 14, wherein: It also has an impregnation process. In the impregnation step, the second resin is impregnated into the pores of the porous body. In the bonding step, the first resin and the second resin are in contact with each other.

16. The method for manufacturing a semiconductor device according to claim 15, wherein: In the joining step, the second resin has a higher melt viscosity than the first resin.

17. The method for manufacturing a semiconductor device according to claim 15 or 16, wherein: In the bonding step, the second resin has a faster curing speed than the first resin.

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