A method for preparing a piezoresistive angle feedback sensor MOEMS micromirror

Abstract

The application provides a preparation method of a piezoresistive angle feedback sensor MOEMS micro-mirror, which comprises the following steps: (1) substrate layer manufacturing, (2) SOI layer manufacturing, and (3) bonded wafer manufacturing. The application can realize the integrated manufacturing of the electrostatic driving micro-mirror and the dielectric isolation piezoresistive feedback sensor, can reduce the leakage current of the piezoresistance to the order of magnitude of several nA, and greatly improves the stability of the angle detection sensor.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of micro-opto-electromechanical technology, in particular to a preparation method of an electrostatic driving MOEMS micro-mirror integrated with a piezoresistive angle feedback sensor. BACKGROUND

[0002] The MOEMS micro-mirror is manufactured by integrating a micro optical mirror and a MEMS actuator using micro-nano processing technology, forming a high dynamic optical element, which can realize rapid manipulation of light beams in space, thereby producing revolutionary dynamic optics and forming a series of innovative applications, such as tunable optical attenuators, optical switches, and tunable optical filters in the field of optical communication, and scanning micro-mirrors in the field of projection display.

[0003] The MOEMS micro-mirror can be divided into electrostatic driving, electromagnetic driving, electrothermal driving, and piezoelectric driving according to the driving mode, among which the electrostatic driving MOEMS micro-mirror has the advantages of small size, low power consumption, and relatively simple process, which promotes the rapid development of electrostatic driving MOEMS micro-mirror and realizes a large number of applications.

[0004] In order to better realize the precise control of the deflection angle of the electrostatic driving micro-mirror, it is usually necessary to integrate an angle feedback function to realize closed-loop control of the angle.

[0005] The angle feedback sensor is generally divided into capacitive detection and piezoresistive detection principles. The traditional electrostatic driving micro-mirror generally adopts a capacitive feedback sensor. For example, the invention patent CN109814251A applied by Xu Lixin et al. of Beijing University of Technology proposes a MEMS micro-mirror based on capacitive detection feedback control, and the invention patent CN111348618A applied by Li Huanhuan et al. of Xi'an Zhi Xiang Optoelectronic Technology Co., Ltd. proposes a method for reducing the coupling interference of an electrostatic micro-mirror angle detection sensor, which also adopts a capacitive detection principle. The capacitive detection sensor has good process compatibility with the electrostatic driving micro-mirror, but requires a high processing circuit and a complex control circuit, and has low detection precision. In the case of large deflection angle, the detection capacitive comb teeth are in a non-overlapping state, and the angle cannot be detected throughout the process. The piezoresistive detection scheme has high precision and simple processing circuit, but the traditional piezoresistive scheme is isolated by a PN junction and a substrate, which is widely used in electromagnetic driving scanning mirrors (for example, CN109160481A). However, the substrate of the electrostatic driving micro-mirror generally needs to be connected to a high potential, which can easily cause the PN junction isolation to fail, so the piezoresistive detection scheme cannot be used in the electrostatic driving micro-mirror. SUMMARY

[0006] The present application is to overcome the deficiencies in the prior art and provide a piezoresistive angle feedback sensor MOEMS micro-mirror preparation method.

[0007] The present application provides the following technical solutions:

[0008] A preparation method of a piezoresistive angle feedback sensor MOEMS micro mirror, characterized in that it comprises the following steps: (1) substrate layer manufacturing, which comprises setting a silicon dioxide layer on a silicon wafer and setting a groove on the silicon wafer;

[0009] (2) SOI layer manufacturing, a plurality of crystal silicon wafers are bonded together through an isolation layer, a substrate silicon layer is bonded to the lower side of one of the crystal silicon wafers through the isolation layer, and a group of blind hole structures are etched on another crystal silicon wafer, so that a group of first combs are obtained, and the etching stops at the next layer of crystal silicon;

[0010] (3) bonded wafer manufacturing, the another crystal silicon wafer is bonded to the silicon dioxide layer, so that the group of first combs are distributed in correspondence with the groove, and then the substrate silicon layer is removed, a group of piezoresistors are arranged on the isolation layer, a passivation layer is arranged on the piezoresistor and the isolation layer, a lead hole corresponding to the piezoresistor is arranged on the passivation layer, a metal lead is arranged on the lead hole and the passivation layer, and a group of through hole structures are etched downward on the passivation layer, so that a group of second combs are obtained.

[0011] On the basis of the above technical solution, the following further technical solutions can also be provided:

[0012] The crystal silicon is a single crystal silicon wafer, and the isolation layer is silicon dioxide.

[0013] In the step of (2) SOI layer manufacturing, three crystal silicon wafers are bonded together from top to bottom through the isolation layer to form upper, middle and lower layers of crystal silicon, and the thickness of the lower layer of crystal silicon is less than that of the other two layers of crystal silicon.

[0014] In the step of (2) SOI layer manufacturing, two crystal silicon wafers are bonded together from top to bottom through the isolation layer to form upper and lower layers of crystal silicon.

[0015] In the step of (3) bonded wafer manufacturing, the group of piezoresistors are obtained by sequentially performing photolithography and etching on the lower layer of crystal silicon.

[0016] In the step of (3) bonded wafer manufacturing, a polysilicon layer is formed on the isolation layer of the lower crystal silicon, and then a group of piezoresistors are prepared by sequentially performing photolithography and etching on the polysilicon layer.

[0017] The number of piezoresistors is less than the number of second combs, and the piezoresistors are all located on the second combs (9).

[0018] In the step of (3) bonded wafer manufacturing, the group of second combs and the group of first combs are distributed in a staggered manner.

[0019] Advantages of the invention:

[0020] The present invention has simple steps and is easy to operate, and can realize the integrated manufacturing of an electrostatically driven micromirror and a dielectric-isolated piezoresistive feedback sensor, thereby reducing the leakage current of the piezoresistor to below the order of several nanoamperes, thereby greatly improving the stability of the angle detection sensor. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 This is a schematic diagram of the structure of the present invention after completing step (1) of manufacturing the substrate layer;

[0022] Figure 2 This is a schematic diagram of the structure after completing step (ii) of fabricating the SOI layer in Example 1;

[0023] Figure 3 1 is a schematic diagram of the structure after the SOI layer and the substrate layer are bonded in the bonding wafer manufacturing step of Example 1 (III);

[0024] Figure 4 This is a schematic diagram of the structure after the lower layer of crystalline silicon is exposed in the bonding wafer manufacturing step of Example 1 (III);

[0025] Figure 5 This is a schematic diagram of the structure after the varistor is prepared in the bonding wafer manufacturing step of Example 1 (III);

[0026] Figure 6 This is a schematic diagram of the structure after the lead holes are prepared in the bonding wafer manufacturing step of Example 1 (III);

[0027] Figure 7 This is a schematic diagram of the structure after the metal leads are prepared in the bonding wafer manufacturing step of Example 1 (III);

[0028] Figure 8 This is a schematic diagram of the structure of Example 1 (III) after it is manufactured;

[0029] Figure 9 This is a schematic diagram of the structure after completing step (ii) of fabricating the SOI layer in Example 2;

[0030] Figure 10 2 is a schematic diagram of the structure after the SOI layer and the substrate layer are bonded in the bonding wafer manufacturing step of Example 2 (III);

[0031] Figure 11 This is a schematic diagram of the structure after the polysilicon layer is prepared in the bonding wafer manufacturing step of Example 2 (III);

[0032] Figure 12 This is a schematic diagram of the structure after the varistor is prepared in the bonding wafer manufacturing step of Example 2 (III); Figure 13 This is a schematic diagram of the structure after the lead holes are prepared in the bonding wafer manufacturing step of Example 2 (III);

[0033] Figure 14This is a schematic diagram of the structure after the metal leads are prepared in the bonding wafer manufacturing step of Example 2 (III);

[0034] Figure 15 This is a schematic diagram of the structure of Example 2 (III) after it is manufactured. DETAILED DESCRIPTION Example

[0035] like Figure 1-8 As shown, a method for preparing a micromirror of a piezoresistive angle feedback sensor (MOEMS) is characterized in that it includes the following steps: (1) preparing a substrate layer, which includes a silicon wafer 1, thermally growing a 0.5μm to 2μm silicon dioxide layer 2 on the upper and lower surfaces of the silicon wafer 1, and then using a deep silicon etching process to produce a groove 3 with a depth of generally several hundred microns on the silicon wafer 1.

[0036] (2) SOI layer fabrication: Three crystalline silicon wafers are bonded together from top to bottom via an isolation layer 5, forming upper, middle, and lower layers of crystalline silicon 4a, 4b, and 4c. The thickness of the lower crystalline silicon layer 4b is smaller than that of the other two layers, while the thickness of the upper and middle crystalline silicon layers 4a and 4b is between 10 and 100 microns. A substrate silicon layer 6 is placed on the bottom surface of the lower crystalline silicon layer 4b, separated by an isolation layer 5. The isolation layer 5 is made of silicon dioxide with a thickness between 0.5 μm and 2 μm. The crystalline silicon wafer is a single crystal.

[0037] A pattern mask is formed on the upper crystalline silicon 4a by photolithography, and then a group of blind hole structures 10 are formed by deep silicon etching, thereby obtaining a group of first comb teeth 7 on the upper crystalline silicon 4a. The etching stops at the lower middle crystalline silicon 4b.

[0038] (3) Bonding wafer production: the upper crystalline silicon layer 4a is placed upside down on the silicon dioxide layer 2 and the position is adjusted so that the first comb teeth 7 are distributed correspondingly to the grooves 3, and then the upper crystalline silicon layer 4a and the silicon dioxide layer 2 are bonded together.

[0039] The substrate silicon layer 6 and the isolation layer 5 between the substrate silicon layer 6 and the underlying crystalline silicon 4b are then removed. A set of varistors 8 are then formed on the upper surface of the underlying crystalline silicon 4b using photolithography and silicon etching processes. These varistors 8 are spaced apart and located in stress concentration areas of the mid-crystalline silicon 4b, corresponding to the blind via structures 10. A passivation layer 14 is provided on the isolation layer 5 on the upper surface of the mid-crystalline silicon 4b, covering the varistors 8. Lead holes 15 corresponding to the varistors 8 are provided in the passivation layer 14, and metal leads 16 are provided on the lead holes 15. Metal leads 16 are also provided at both ends of the isolation layer 5 on the upper surface of the mid-crystalline silicon 4b.

[0040] A set of through-hole structures 11 are further etched downwardly through the passivation layer 14, thereby forming a set of second comb teeth 9 on the medium-crystalline silicon 4b. The set of second comb teeth 9 is staggered with the set of first comb teeth 7, and the varistor 8 is located on the corresponding second comb teeth 9. The through-hole structures 11 are connected to the blind hole structures 10, so that the through-hole structures 11, the blind hole structures 10, and the groove 3 are interconnected. Example

[0041] like Figure 9-15 and Figure 1 As shown, a method for preparing a micromirror of a piezoresistive angle feedback sensor (MOEMS) is characterized in that it includes the following steps: (1) preparing a substrate layer, which includes a silicon wafer 1, thermally growing a 0.5μm to 2μm silicon dioxide layer 2 on the upper and lower surfaces of the silicon wafer 1, and then using a deep silicon etching process to produce a groove 3 with a depth of generally several hundred microns on the silicon wafer 1.

[0042] (2) SOI layer fabrication: Two crystalline silicon wafers are bonded together from top to bottom via an isolation layer 5 to form upper and lower layers of crystalline silicon 14a and 14b. The thickness of the upper and lower layers of crystalline silicon 14a and 14b is between 10 and 100 microns. A substrate silicon layer 6 is placed on the bottom surface of the lower crystalline silicon 14b via an isolation layer 5. The isolation layer 5 is made of silicon dioxide with a thickness between 10 and 100 microns. The crystalline silicon wafer is a single crystal.

[0043] A pattern mask is formed on the upper crystalline silicon 14a by photolithography, and then a group of blind hole structures 10 are formed by deep silicon etching, thereby obtaining a group of first comb teeth 7 on the upper crystalline silicon 4a. The etching stops at the lower middle crystalline silicon 4b.

[0044] (3) Bonding wafer production: the upper crystalline silicon layer 14a is placed upside down on the silicon dioxide layer 2 and the position is adjusted so that the first comb teeth 7 are distributed correspondingly to the grooves 3, and then the upper crystalline silicon layer 14a and the silicon dioxide layer 2 are bonded together.

[0045] The substrate silicon layer 6 is then removed, leaving the isolation layer 5 between the substrate silicon layer 6 and the underlying crystalline silicon 4b. A polysilicon layer 12 is then deposited on this isolation layer 5 using an LPCVD process. A group of varistors 8 are then formed on the upper surface of the polysilicon layer 12 through sequential photolithography and silicon etching processes. These varistors 8 are spaced apart and located in the stress concentration areas of the mid-crystalline silicon 4b, corresponding to the blind via structures 10. A passivation layer 14 is then applied to the isolation layer 5 on the upper surface of the mid-crystalline silicon 4b, covering the varistors 8. Lead holes 15 corresponding to the varistors 8 are provided in the passivation layer 14, and metal leads 16 are provided on the lead holes 15. Metal leads 16 are also provided at both ends of the isolation layer 5 on the upper surface of the mid-crystalline silicon 4b.

[0046] A set of through-hole structures 11 are etched downwardly through the passivation layer 14, thereby forming a set of second comb teeth 9 on the medium-crystalline silicon 4b. The set of second comb teeth 9 is staggered with the set of first comb teeth 7, and the varistor 8 is located on the corresponding second comb teeth 9. The through-hole structures 11 are connected to the blind hole structures 10, so that the through-hole structures 11, the blind hole structures 10, and the groove 3 are interconnected.

[0047] In Examples 1 and 2, because the second comb teeth 9 and first comb teeth 7 are staggered and relatively thin, they can vibrate up and down. This allows the mirror to rotate and change the direction of the light beam. The isolation layer of silicon dioxide (isolation layer 5) between the piezoresistor 8 and the second comb teeth 9 effectively avoids the problem of isolation failure between the piezoresistor and the substrate PN junction in the electrostatic drive structure and eliminates coupling interference with the substrate potential. This overall solution enables the manufacture of dielectric isolation devices.

Claims

1. A method for preparing a piezoresistive angle feedback sensor (MOEMS) micromirror, characterized by: The method comprises the following steps: (1) preparing a substrate layer, which comprises providing a silicon dioxide layer (2) on a silicon wafer (1), and providing a groove (3) on the silicon wafer (1); (2) SOI layer production: three or two layers of crystalline silicon wafers are stacked and bonded together through an isolation layer (5); a substrate silicon layer (6) is bonded below the lower crystalline silicon layer through the isolation layer (5); a group of blind hole structures are etched on the upper crystalline silicon layer to obtain a group of first comb teeth (7); the etching stops when the next layer of crystalline silicon is reached; (3) Bonding wafer production, bonding the silicon wafer (1) in the production of the substrate layer (1) to the upper crystalline silicon in the production of the SOI layer (2) through the silicon dioxide layer (2), so that the group of first comb teeth (7) are distributed correspondingly to the grooves (3), and then removing the substrate silicon layer (6), providing a group of varistors (8) on the isolation layer (5), providing a passivation layer (14) on the varistors (8) and the isolation layer (5), providing lead holes (15) corresponding to the varistors (8) on the passivation layer (14), providing metal leads (16) on the lead holes (15) and the passivation layer (14), and etching a group of through-hole structures downward on the passivation layer (14), thereby obtaining a group of second comb teeth (9).

2. The method for preparing a piezoresistive angle feedback sensor (MOEMS) micromirror according to claim 1, characterized in that: The isolation layer (5) is silicon dioxide.

3. The method for preparing a piezoresistive angle feedback sensor (MOEMS) micromirror according to claim 1, characterized in that: In the step of making the (second) SOI layer, three layers of crystalline silicon are bonded sequentially from top to bottom through an isolation layer (5), with upper, middle and lower layers of crystalline silicon (4a, 4b, 4c), and the thickness of the lower layer of crystalline silicon (4c) is smaller than that of the other two layers of crystalline silicon.

4. The method for preparing a piezoresistive angle feedback sensor (MOEMS) micromirror according to claim 1, characterized in that: In the step of manufacturing the (second) SOI layer, two pieces of crystalline silicon are bonded sequentially from top to bottom via an isolation layer (5) to form upper and lower layers of crystalline silicon (14a, 14b).

5. The method for preparing a piezoresistive angle feedback sensor (MOEMS) micromirror according to claim 3, characterized in that: The group of varistors (8) in the (iii) wafer bonding step is obtained by sequentially performing photolithography and etching on the lower layer of crystalline silicon (4c).

6. The method for preparing a piezoresistive angle feedback sensor (MOEMS) micromirror according to claim 4, characterized in that: In the (three) bonding wafer fabrication step, a polysilicon layer (12) is generated on the isolation layer (5) on the lower crystalline silicon (14b), and then a group of varistors (8) are prepared by photolithography and etching the polysilicon layer (12).

7. A method for preparing a micromirror of a piezoresistive angle feedback sensor (MOEMS) according to claim 3 or 4, characterized in that: The number of the varistors (8) is less than the number of the second comb teeth (9), and the varistors (8) are all located on the second comb teeth (9).

8. A method for preparing a piezoresistive angle feedback sensor (MOEMS) micromirror according to claim 3 or 4, characterized in that: In the (three) bonding wafer production, the group of second comb teeth (9) and the group of first comb teeth (7) are staggered.

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