Display panel and manufacturing method therefor, display device, mask strip and mask plate
By introducing an isolation structure and a conductor layer into the OLED display panel, the problem of poor electrical connection performance between electrodes of adjacent light-emitting devices is solved, thus improving the display effect.
Patent Information
- Application Number
- CN202111444057.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-11-30
- Publication Date
- 2026-01-23
- Estimated Expiration
- 2042-01-23
AI Technical Summary
In OLED display panels, the poor electrical connection between the electrodes of adjacent light-emitting devices affects the display effect.
By introducing an isolation structure and a conductor layer into the display panel, the isolation structure is set between two adjacent first openings, and the connection pattern of the conductor layer contacts the second electrode layer on both sides of the isolation structure to form a good electrical connection and improve the conductivity between the electrodes.
The electrical connection performance between the electrodes of the light-emitting devices in adjacent sub-pixels is improved, thereby improving the display effect of the display panel.
Smart Images

Figure CN114156326B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of display technology, and more particularly to a display panel and its manufacturing method, a display device, a mask strip, and a mask plate. Background Technology
[0002] In an Organic Light Emitting Diode (OLED) display panel, the electrodes (e.g., cathodes) of each light-emitting device (OLED) can be interconnected. In other words, the electrodes of each light-emitting device can be a continuous film layer, and an electrical signal can be written into this continuous film layer to control the light emission of each device. Therefore, the conductivity of this film layer has a significant impact on the display effect of the panel. For example, poor electrical connection between the electrodes of adjacent light-emitting devices may affect the display effect. Summary of the Invention
[0003] Embodiments of the present invention provide a display panel and a method for manufacturing it, a display device, a mask strip, and a mask plate to improve the problem of poor electrical connection performance between electrodes of adjacent light-emitting devices in a display panel.
[0004] To achieve the above objectives, the embodiments of the present invention adopt the following technical solutions:
[0005] In a first aspect, a display panel is provided, comprising a substrate, a first electrode layer, a pixel defining layer, an isolation structure, a plurality of light-emitting functional layers, a second electrode layer, and a conductor layer. The first electrode layer is disposed on the substrate and includes a plurality of first electrodes. The pixel defining layer is disposed on the side of the first electrode layer away from the substrate, and has a plurality of first openings, one of which exposes at least a portion of a first electrode. The isolation structure is disposed on the substrate and between two adjacent first openings. The plurality of light-emitting functional layers are disposed on the side of the first electrode layer away from the substrate, and at least one light-emitting functional layer is disconnected at the isolation structure. The second electrode layer is disposed on the side of the plurality of light-emitting functional layers away from the substrate. The conductor layer is disposed on the side of the second electrode layer away from the substrate, and includes a plurality of connection patterns, one of which contacts portions of the second electrode layer located on both sides of the isolation structure along a first direction, the first direction being the arrangement direction of two adjacent first openings.
[0006] In some embodiments, the connection pattern includes a first extended portion and a second extended portion, which are located on opposite sides of the upper surface of the isolation structure in a first direction and are both in contact with the second electrode layer; the upper surface of the isolation structure is the surface of the isolation structure furthest from the substrate. The sum of the dimensions of the first extended portion and the second extended portion in the first direction is greater than or equal to 1 μm.
[0007] In some embodiments, the multiple connection patterns are arranged in an alternating array.
[0008] In some embodiments, the orthographic projection of the connection pattern on the substrate is a rectangle; or, the connection pattern includes a central portion and N protruding portions protruding from the central portion, the N protruding portions being evenly distributed along the circumference of the central portion, where N is an even number and greater than or equal to 4.
[0009] In some embodiments, the minimum distance between two adjacent connection patterns is greater than or equal to 10 μm.
[0010] In some embodiments, the isolation structure includes a first pattern, a second pattern, and a third pattern sequentially stacked along a direction away from the substrate, wherein the orthographic projection of the second pattern on the substrate is located inside the orthographic projection of the first pattern on the substrate, and the orthographic projection of the second pattern on the substrate is located inside the orthographic projection of the third pattern on the substrate.
[0011] In some embodiments, the isolation structure includes a lower surface and an upper surface that are sequentially distributed along a direction away from the substrate, wherein the orthographic projection of the lower surface on the substrate is located inside the orthographic projection of the upper surface on the substrate.
[0012] In some embodiments, the plurality of light-emitting functional layers include a first light-emitting layer, a second light-emitting layer, and a charge-generating layer, wherein the charge-generating layer is disposed between the first light-emitting layer and the second light-emitting layer, and the charge-generating layer is disconnected at the isolation structure.
[0013] In some embodiments, the second electrode layer is disconnected at the isolation structure.
[0014] In a second aspect, a display device is provided, comprising the display panel provided in any of the above embodiments.
[0015] Thirdly, a mask strip is provided. This mask strip is configured to fabricate a conductor layer in a display panel provided in any of the above embodiments. The mask strip has a patterned area and a plurality of second openings disposed in the patterned area, one of which is configured to fabricate a connecting pattern in the conductor layer.
[0016] In some embodiments, the shape enclosed by the edges of the second opening is a rectangle; or, the second opening includes a central sub-opening and N protruding sub-openings protruding from the central sub-opening, the N protruding sub-openings being evenly distributed along the circumference of the central sub-opening, where N is an even number and greater than or equal to 4.
[0017] In some embodiments, the second opening has a first sub-opening and a second sub-opening distributed along a second direction and interconnected, the depth of the first sub-opening is greater than or equal to the depth of the second sub-opening, the second direction is the thickness direction of the mask strip, and the profile angle of the first sub-opening is 30° to 70°.
[0018] Fourthly, a mask plate is provided, including a frame and a mask strip fixedly mounted on the frame, wherein the mask strip is the mask strip provided in any of the above embodiments.
[0019] Fifthly, a method for manufacturing a display panel is provided, comprising forming a first electrode layer on a substrate, the first electrode layer including a plurality of first electrodes; forming a pixel defining layer on a side of the first electrode layer away from the substrate, the pixel defining layer having a plurality of first openings, one first opening exposing at least a portion of a first electrode; forming an isolation structure on the substrate, the isolation structure being disposed between two adjacent first openings; forming a plurality of light-emitting functional layers on the substrate with the isolation structure, the plurality of light-emitting functional layers being disposed on the side of the first electrode layer away from the substrate, at least one light-emitting functional layer being disconnected at the isolation structure; forming a second electrode layer on the side of the plurality of light-emitting functional layers away from the substrate; and using a mask provided in any of the above embodiments, forming a conductor layer on the side of the second electrode layer away from the substrate, the conductor layer including a plurality of connection patterns, one connection pattern contacting a portion of the second electrode layer located on both sides of the isolation structure along a first direction, the first direction being the arrangement direction of two adjacent first openings.
[0020] In some embodiments of the display panel provided in this disclosure, a connection pattern in the conductor layer contacts portions of the second electrode layer located on both sides of the isolation structure along the first direction. Therefore, through this connection pattern, the portions of the second electrode layer located on both sides of the isolation structure along the first direction can be coupled to each other. Consequently, the overall conductivity of the second electrode layer and the conductor layer is better, which can improve the electrical connection performance between the second electrodes of the light-emitting devices in adjacent sub-pixels, thereby improving the display effect of the display panel.
[0021] Understandably, the display device described in the second aspect includes the aforementioned display panel, the mask strip described in the third aspect and the mask plate described in the fourth aspect are used to fabricate the conductor layer in the aforementioned display panel, and the method for fabricating the display panel described in the fifth aspect is used to fabricate the aforementioned display panel. Therefore, the beneficial effects that can be achieved can be referred to the beneficial effects of the display panel described above, and will not be repeated here. Attached Figure Description
[0022] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0023] Figure 1 This is a structural diagram of a display device according to some embodiments;
[0024] Figure 2This is a structural diagram of a display panel according to some embodiments;
[0025] Figure 3 This is a structural diagram of a light-emitting device in a display panel according to some embodiments;
[0026] Figure 4 This is a structural diagram of the light-emitting unit of a light-emitting device in a display panel according to some embodiments;
[0027] Figure 5 This is a structural diagram of a display panel according to some embodiments;
[0028] Figure 6 for Figure 5 Top view of the central display panel;
[0029] Figure 7 This is a structural diagram of a display panel according to some embodiments;
[0030] Figure 8 for Figure 5 Top view of the central display panel;
[0031] Figure 9 for Figure 8 A magnified view of a portion of the display panel;
[0032] Figure 10 This is a top view of a connecting pattern in a display panel according to some embodiments;
[0033] Figure 11 This is a top view of a connecting pattern in a display panel according to some embodiments;
[0034] Figure 12 This is a partial enlarged view of a mask strip according to some embodiments;
[0035] Figure 13 This is a partial enlarged view of a display panel according to some embodiments;
[0036] Figure 14 for Figure 5 A structural diagram of the isolation structure in the display panel;
[0037] Figure 15 This is a process flow diagram of a method for manufacturing a display panel according to some embodiments;
[0038] Figure 16 This is a structural diagram of a display panel according to some embodiments;
[0039] Figure 17 for Figure 16 A structural diagram of the isolation structure in the display panel;
[0040] Figure 18 for Figure 16 A top view of the display panel;
[0041] Figure 19 This is a structural diagram of a mask strip according to some embodiments;
[0042] Figure 20 This is a partial enlarged view of a mask strip according to some embodiments;
[0043] Figure 21 This is a partial enlarged view of a mask strip according to some embodiments;
[0044] Figure 22 This is a partial enlarged view of a mask strip according to some embodiments;
[0045] Figure 23 for Figure 21 A top view of the second opening of the mask strip;
[0046] Figure 24 for Figure 22 A top view of the second opening of the mask strip;
[0047] Figure 25 A cross-sectional view of the second opening of the mask strip according to some embodiments;
[0048] Figure 26 A cross-sectional view of the second opening of the mask strip according to some embodiments;
[0049] Figure 27 A cross-sectional view of two adjacent openings;
[0050] Figure 28 This is a structural diagram of a mask according to some embodiments;
[0051] Figure 29 This is a flowchart of a method for manufacturing a display panel according to some embodiments. Detailed Implementation
[0052] The technical solutions in some embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments provided in this disclosure are within the scope of protection of this disclosure.
[0053] Unless the context otherwise requires, throughout the specification and claims, the term "comprise" and its other forms, such as the third-person singular "comprises" and the present participle "comprising," are interpreted as open-ended and encompassing, meaning "including, but not limited to." In the description of the specification, terms such as "one embodiment," "some embodiments," "exemplary embodiments," "example," "specific example," or "some examples," etc., are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this disclosure. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics mentioned may be included in any suitable manner in any one or more embodiments or examples.
[0054] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more.
[0055] In describing some embodiments, the terms "coupled" and "connected," and their derivative expressions, may be used. For example, the term "connected" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact with each other. Similarly, the term "coupled" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact. However, the terms "coupled" or "communicatively coupled" may also refer to two or more components that do not have direct contact with each other but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the content of this document.
[0056] "At least one of A, B and C" has the same meaning as "at least one of A, B or C", both including the following combinations of A, B and C: only A, only B, only C, combinations of A and B, combinations of A and C, combinations of B and C, and combinations of A, B and C.
[0057] "A and / or B" includes the following three combinations: A only, B only, and a combination of A and B.
[0058] The use of “configured as” in this article implies an open and inclusive language that does not exclude the applicability to or configuration of devices to perform additional tasks or steps.
[0059] In addition, the use of “based on” implies openness and inclusivity, because processes, steps, calculations or other actions “based on” one or more of the stated conditions or values may in practice be based on additional conditions or values beyond those stated.
[0060] As used herein, “approximately” or “about” includes the stated value and the average value within an acceptable range of deviation from the given value, wherein the acceptable range of deviation is determined by a person skilled in the art taking into account the measurement under discussion and the error associated with the measurement of the given quantity (i.e., the limitations of the measurement system).
[0061] As used herein, “parallel,” “perpendicular,” and “equal” include the described situation and situations that are similar to the described situation, within an acceptable range of deviation, which is determined by those skilled in the art taking into account the measurement under discussion and the error associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, “parallel” includes absolute parallelism and approximate parallelism, where an acceptable range of deviation for approximate parallelism may be, for example, within 5°; “perpendicular” includes absolute perpendicularity and approximate perpendicularity, where an acceptable range of deviation for approximate perpendicularity may also be, for example, within 5°; “equal” includes absolute equality and approximate equality, where an acceptable range of deviation for approximate equality may be, for example, a difference between the two equals being less than or equal to 5% of either one.
[0062] It should be understood that when a layer or element is referred to as being on another layer or substrate, it can mean that the layer or element is directly on the other layer or substrate, or that there is an intermediate layer between the layer or element and the other layer or substrate.
[0063] This document describes exemplary embodiments with reference to cross-sectional views and / or plan views, which are idealized exemplary drawings. In the drawings, the thickness of layers and regions is enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing processes. For example, etched regions shown as rectangular would typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of the regions of the device, nor are they intended to limit the scope of the exemplary embodiments.
[0064] Some embodiments of this disclosure provide a display device. Figure 1This is a structural diagram of a display device according to some embodiments. See also... Figure 1 Display device 1 is a product with image display function (including still images or moving images, where moving images can be video). For example, display device 1 can be any of the following: monitor, television set, billboard, digital photo frame, laser printer with display function, telephone, mobile phone, personal digital assistant (PDA), digital camera, portable camcorder, viewfinder, navigator, vehicle, large-area wall, home appliance, information query equipment (such as business query equipment for e-government, banks, hospitals, power companies, etc.), monitor, etc.
[0065] The display device 1 may include a display panel 10, and may also include a drive control circuit 20 coupled to the display panel 10. The drive control circuit 20 is configured to provide electrical signals to the display panel 10. Exemplarily, the drive control circuit 20 may include a data drive circuit 210 (also referred to as a source driver IC), which is configured to provide data drive signals (also referred to as data signals) to the display panel 10. The drive control circuit 20 may also include a timing control circuit 220 (also referred to as a timing controller, timer control register, or TCON) coupled to the data drive circuit 210.
[0066] In some embodiments, the drive control circuit 20 may further include a scan drive circuit 110. In other embodiments, the scan drive circuit 110 may be integrated into the display panel 10; that is, the display panel 10 may include the scan drive circuit 110. Since the scan drive circuit 110 is disposed on the display panel 10, the scan drive circuit 110 may also be referred to as GOA (Gate Driver on Array, a scan drive circuit disposed on an array substrate).
[0067] Specifically, the timing control circuit 220 can be coupled to the scan driving circuit 110 and also to the data driving circuit 210. The timing control circuit 220 can be configured to receive display signals, which may include, for example, power signals, video image signals, communication signals (e.g., signals corresponding to the IIC communication protocol), and mode control signals (e.g., mode control signals corresponding to test mode or normal display mode). The video image signals may be, for example, MIPI (Mobile Industry Processor Interface) signals or LVDS (Low-Voltage Differential Signaling) signals. The video image signals may include image data and timing control signals. The image data may include, for example, pixel data of multiple sub-pixels, and the pixel data may be RGB data, etc. The timing control signals may include, for example, a data enable signal (DE), a horizontal synchronization signal (Hsync, HS), and a vertical synchronization signal (Vsync, VS).
[0068] The timing control circuit 220 can also be configured to output a first control signal and image data to the data driving circuit 210 and a second control signal to the scan driving circuit 110 in response to the display signal. The first control signal is configured to control the operating timing of the data driving circuit 210, and the second control signal is configured to control the operating timing of the scan driving circuit 110.
[0069] The data driving circuit 210 can be configured to convert received image data into data signals for a plurality of sub-pixels P (described below) in the display panel 10, and output the data signals to the pixel driving circuit M (described below) in the corresponding sub-pixel P according to the operating timing determined by the first control signal. The scan driving circuit 110 is configured to output scan signals to the pixel driving circuit M in the plurality of sub-pixels P according to the operating timing determined by the second control signal.
[0070] Some embodiments of this disclosure also provide a display panel. This display panel can be used as the display panel in any of the display devices provided in the above embodiments. Of course, this display panel can also be applied to other display devices, and this disclosure does not limit its application.
[0071] Figure 2 This is a structural diagram of a display panel according to some embodiments, illustrating the structure of the display area in the display panel. It should be noted that... Figure 2 Only the structure of the display area of the display panel is shown, while the structure of the surrounding area is omitted; for example, the scan drive circuitry is omitted. Furthermore, Figure 2The arrangement of subpixels in the display panel shown is merely exemplary. In the display panel provided in the embodiments of this disclosure, the subpixels may also have other arrangements.
[0072] See Figure 2 The display panel 10 can be one of OLED (Organic Light Emitting Diode) display panel, QLED (Quantum Dot Light Emitting Diodes) display panel, or microLED (including MiniLED or MicroLED, where LED is a light-emitting diode) display panel.
[0073] The display panel 10 has a display area AA and a peripheral area SA. The peripheral area SA may be located on at least one side of the display area AA (e.g., one side; or, all around, including the top and bottom sides and the left and right sides).
[0074] The display panel 10 includes a plurality of sub-pixels P disposed in a display area AA. The display panel 10 can display a predetermined image in the display area AA by means of light emitted from the plurality of sub-pixels P. Specifically, the plurality of sub-pixels P may include multiple sub-pixels emitting different colors. For example, the plurality of sub-pixels P includes a first sub-pixel P1, a second sub-pixel P2, and a third sub-pixel P3. The first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 each emit three primary colors of light; for example, the first sub-pixel P1 may emit red light, the second sub-pixel P2 may emit green light, and the third sub-pixel P3 may emit blue light.
[0075] A sub-pixel P may include a light-emitting device E and a pixel driving circuit M coupled to the light-emitting device E.
[0076] The pixel driving circuit M can be configured to provide an electrical signal (e.g., driving voltage or driving current) to the light-emitting device E coupled to the pixel driving circuit M in response to the received scanning signal and data signal, so as to drive the light-emitting device E to emit light, thereby enabling the display panel 10 to display an image.
[0077] The pixel driving circuit M may include multiple transistors and at least one (e.g., one; or multiple) capacitor. For example, the pixel driving circuit M may be a structure such as "2T1C", "6T1C", "7T1C", "6T2C", or "7T2C". Here, "T" represents a transistor, such as a thin-film transistor. The number preceding "T" indicates the number of transistors. "C" represents a capacitor, and the number preceding "C" indicates the number of capacitors.
[0078] The light-emitting device E can be one of the following: organic light-emitting diode (OLED), quantum dot light-emitting diode (QLED), and light-emitting diode (LED). The following explanation will use an organic light-emitting diode (OLED) as an example to illustrate the structure of the light-emitting device E. Understandably, the structures of other types of light-emitting devices E can be similar to those of organic light-emitting diodes; please refer to the relevant explanations below, which will not be repeated here.
[0079] Figure 3 This is a structural diagram of a light-emitting device in a display panel. The light-emitting device E may include a first electrode ED1, a second electrode ED2, and multiple light-emitting functional patterns FP stacked together, with these light-emitting functional patterns FP located between the first electrode ED1 and the second electrode ED2.
[0080] The first electrode ED1 and the second electrode ED2 can be configured to write electrical signals, thereby generating a driving current in the light-emitting device E. In some embodiments, the first electrode ED1 can be an anode, and correspondingly, the second electrode ED2 can be a cathode.
[0081] The material of the first electrode ED1 may include a metal compound, such as indium tin oxide (ITO) or indium zinc oxide (IZO). The material of the first electrode ED1 may also include a metal or alloy, such as magnesium (Mg), titanium (Ti), silver (Ag), or an alloy of multiple metals. In some embodiments, the first electrode ED1 may be a reflective electrode, which can reflect light so that a portion of the light emitted by the light-emitting functional pattern FP that is directed towards the first electrode ED1 can be reflected and then emitted towards the second electrode ED2.
[0082] The material of the second electrode ED2 may include metals or alloys, such as magnesium (Mg), titanium (Ti), silver (Ag), or alloys of multiple metals. The material of the second electrode ED2 may also include metal compounds, such as indium tin oxide (ITO) or indium zinc oxide (IZO). In some embodiments, the second electrode ED2 may be transparent, allowing light to pass through and exit.
[0083] Multiple light-emitting functional patterns FP can form at least one (e.g., one; or multiple) light-emitting unit U. The light-emitting unit U can emit light. In some embodiments, a light-emitting unit U can support hole injection, hole transport, electron injection, electron transport, and electron-hole recombination to generate light.
[0084] Specifically, see Figure 4 , Figure 4This is a structural diagram of a light-emitting unit. A light-emitting unit U may include a light-emitting pattern L; or, more specifically, a plurality of light-emitting functional patterns FP forming a light-emitting unit U may include the light-emitting pattern L. The light-emitting pattern L may emit light, enabling the light-emitting unit U including the light-emitting pattern L to emit light. Exemplarily, the light-emitting pattern L may emit light of three primary colors, such as red, green, and blue light. The light-emitting pattern L may also emit white light. In some embodiments, the light-emitting pattern L is an organic light-emitting pattern, where electrons and holes may recombine, enabling the light-emitting pattern L to emit light.
[0085] The light-emitting unit U may also include one or more of the following: hole injection pattern, hole transport pattern, electron transport pattern, electron injection pattern, hole blocking pattern, and electron blocking pattern. In other words, the multiple light-emitting functional patterns FP forming a light-emitting unit U may include the above-mentioned patterns. Specifically, the hole injection pattern can be configured to inject holes, the hole transport pattern can be configured to transport holes, the electron transport pattern can be configured to transport electrons, the electron injection pattern can be configured to inject electrons, the hole blocking pattern can be configured to reduce hole transport, and the electron blocking pattern can be configured to reduce electron transport.
[0086] In some embodiments, in a light-emitting unit U, the side of the light-emitting pattern L near the cathode may be provided with one or more of an electron injection pattern, an electron transport pattern, and a hole blocking pattern, and the side of the light-emitting pattern L near the anode may be provided with one or more of a hole injection pattern, a hole transport pattern, and an electron blocking pattern.
[0087] See also Figure 3 In some embodiments, the multiple light-emitting functional patterns FP of the light-emitting device E can form a light-emitting unit U. In other embodiments, the multiple light-emitting functional patterns FP of the light-emitting device E can form multiple light-emitting units U, such as a first light-emitting unit U1 and a second light-emitting unit U2. In this case, the light-emitting device E can be referred to as a series-connected light-emitting device, for example, a series-connected organic light-emitting diode (which can be simply referred to as a series-connected OLED).
[0088] Furthermore, in a series-connected light-emitting device, the multiple light-emitting functional patterns FP can also include a charge-generating pattern CL. The charge-generating pattern CL is disposed between two adjacent light-emitting units U. See also Figure 3 and Figure 4Alternatively, in the light-emitting device E, multiple light-emitting functional patterns FP include multiple light-emitting patterns L and at least one charge-generating pattern CL, with a charge-generating pattern CL (e.g., each charge-generating pattern CL) positioned between two adjacent light-emitting patterns L. The charge-generating pattern CL can be configured to inject charge carriers (e.g., including holes and electrons) into adjacent light-emitting units U. Thus, in the light-emitting device E, for a light-emitting unit U, a portion of its charge carriers are provided by the anode or cathode, while the other portion is generated in the charge-generating layer CL, enabling each light-emitting unit in the series-connected light-emitting device to emit light under a single power supply (i.e., when only electrical signals are written to the first and second electrodes). Compared to a light-emitting device with only one light-emitting unit, the power consumption of the series-connected light-emitting device can theoretically be reduced by half while maintaining the same luminous intensity.
[0089] See also Figure 3 and Figure 4 In some embodiments, in the light-emitting device E, the plurality of light-emitting functional patterns FP include a first light-emitting pattern (disposed in the first light-emitting unit U1), a second light-emitting pattern (disposed in the second light-emitting unit U2), and a charge-generating pattern CL, wherein the charge-generating pattern CL is disposed between the first light-emitting pattern and the second light-emitting pattern. Of course, the light-emitting device E may also include more than two light-emitting units, or more than two light-emitting patterns, and this disclosure does not limit this.
[0090] Furthermore, in a series-connected light-emitting device, each light-emitting unit U can have the same or different structure as the other light-emitting units U. For example, the type and number of light-emitting functional patterns in the first light-emitting unit U1 can be the same as or different from the type and number of light-emitting functional patterns in the second light-emitting unit U2. Additionally, the color of the light emitted by each light-emitting unit U can be the same as or different from the color of the light emitted by the other light-emitting units U.
[0091] Figure 5 This is a structural diagram of a display panel according to some embodiments. It should be noted that... Figure 5 The image only shows some of the film layers in the display panel, such as the substrate, the first electrode layer, one of the light-emitting functional layers, and the second electrode layer, while other film layers are omitted, such as some light-emitting functional layers and the pixel driving circuit disposed on the substrate.
[0092] See Figure 5The display panel 10 includes a substrate SUB, and a first electrode layer 120, a pixel defining layer 170, a plurality of light-emitting functional layers 130, and a second electrode layer 140 disposed on the substrate SUB. The first electrode layer 120, the plurality of light-emitting functional layers 130, and the second electrode layer 140 may form at least one (e.g., one; or, for example, a plurality) light-emitting device.
[0093] Specifically, the substrate SUB can support other structures in the display panel 10. The material of the substrate SUB can include glass, PI (Polyimide), PET (Polyethylene glycol terephthalate), etc.
[0094] The first electrode layer 120 includes a plurality of first electrodes ED1. Referring to the description above, a first electrode ED1 (e.g., each first electrode ED1) can be an electrode of a light-emitting device; exemplarily, a first electrode ED1 can be the anode of a light-emitting device. The first electrodes ED1 of the plurality of light-emitting devices can be spaced apart from each other, so that in the plurality of light-emitting devices, an electrical signal can be written to the first electrode ED1 of one light-emitting device individually, and different electrical signals can be written to the plurality of first electrodes ED1 of the plurality of light-emitting devices, so that the luminous brightness of the plurality of light-emitting devices can be different.
[0095] A pixel defining layer 170 is disposed on the side of the first electrode layer 120 away from the substrate SUB. The pixel defining layer 170 has a plurality of first openings H1, each first opening H1 (e.g., each first opening H1) exposing at least a portion (e.g., part; or, for example, all) of a first electrode ED1.
[0096] The second electrode layer 140 includes a plurality of second electrodes. Referring to the description above, a second electrode can serve as an electrode of a light-emitting device; exemplarily, a second electrode can serve as the cathode of a light-emitting device. In some embodiments, the second electrodes of the plurality of light-emitting devices can be interconnected. In this case, the second electrode layer 140 can be a continuous film layer extending along a direction perpendicular to the thickness direction of the display panel 10, and a second electrode is the portion of the second electrode layer 140 whose orthographic projection (e.g., orthographic projection on the substrate) overlaps with a first electrode ED1. It should be noted that the thickness direction of the display panel 10 is, for example, parallel to the Z-axis direction, and the direction perpendicular to the thickness direction of the display panel 10 is, for example, parallel to the XY plane (the XY plane is a plane defined by the X-axis direction and the Y-axis direction, the X-axis direction and the Y-axis direction are perpendicular to the Z-axis direction, and the X-axis direction and the Y-axis direction intersect).
[0097] In some possible implementations, an open mask can be used to fabricate the second electrode layer 140, in which case the second electrode layer 140 can be a continuous film layer extending in a direction perpendicular to the thickness direction of the display panel 10.
[0098] Since the second electrode layer 140 can be a continuous film layer extending in a direction perpendicular to the thickness direction of the display panel 10, the second electrode layer 140 can be configured to write electrical signals, so that multiple second electrodes of multiple light-emitting devices can write the same electrical signal.
[0099] Multiple light-emitting functional layers 130 are disposed on the side of the first electrode layer 120 away from the substrate SUB. Specifically, the multiple light-emitting functional layers 130 can be stacked between the first electrode layer 120 and the second electrode layer 140. For example, along the thickness direction of the display panel 10, the first electrode layer 120, the multiple light-emitting functional layers 130, and the second electrode layer 140 can be disposed sequentially.
[0100] It should be noted that, in this document, a light-emitting functional layer 130 may include multiple patterns spaced apart from each other. A light-emitting functional layer 130 may also be a continuous film layer, in which case the portion of the continuous film layer whose orthographic projection on the first electrode layer 120 overlaps with a first electrode constitutes a pattern.
[0101] Specifically, the multiple light-emitting functional layers 130 may include light-emitting layers. Referring to the description above, the light-emitting layers may include multiple light-emitting patterns of multiple light-emitting devices.
[0102] In some embodiments, a light-emitting device (e.g., each light-emitting device) in the display panel 10 is a series-connected light-emitting device. In this case, the plurality of light-emitting functional layers 130 may include a plurality of light-emitting layers. Exemplarily, the plurality of light-emitting functional layers 130 include a first light-emitting layer and a second light-emitting layer, wherein, referring to the description above, the first light-emitting layer includes a plurality of first light-emitting patterns, and the second light-emitting layer includes a plurality of second light-emitting patterns.
[0103] Furthermore, the plurality of light-emitting functional layers 130 may also include at least one (e.g., one; or, for example, multiple) charge-generating layers. Referring to the description above, a charge-generating layer may include multiple charge-generating patterns. In some possible implementations, the multiple charge-generating patterns in the charge-generating layer are interconnected, in which case the charge-generating layer may be a continuous film layer extending in a direction perpendicular to the thickness direction of the display panel 10. Exemplarily, an open mask can be used to fabricate the charge-generating layer.
[0104] A charge generation layer (e.g., each charge generation layer) is located between two adjacent light-emitting layers. For example, a charge generation layer is located between a first light-emitting layer and a second light-emitting layer.
[0105] In some embodiments, the plurality of light-emitting functional layers 130 further include one or more of an electron injection layer (EIL), an electron transport layer (ETL), and a hole blocking layer (HBL) located on the cathode side of the light-emitting layer. The plurality of light-emitting functional layers 130 may also include one or more of a hole injection layer (HIL), a hole transport layer (HTL), and an electron blocking layer (EBL) located on the anode side of the light-emitting layer.
[0106] For any one of the aforementioned electron injection layer, electron transport layer, hole blocking layer, hole injection layer, hole transport layer, and electron blocking layer, it may include multiple corresponding patterns of multiple light-emitting devices. For example, the electron injection layer may include multiple electron injection patterns of multiple light-emitting devices. In some possible implementations, for any one of the aforementioned electron injection layer, electron transport layer, hole blocking layer, hole injection layer, hole transport layer, and electron blocking layer, the multiple patterns may be interconnected. In this case, the layer may be a continuous film layer extending in a direction perpendicular to the thickness direction of the display panel 10.
[0107] Figure 6 for Figure 5 This is a top view of the display panel. It should be noted that... Figure 6 Only some of the film layers of the display panel are shown, for example, the first electrode layer, the isolation structure and the second electrode layer are shown, while other structures of the display panel are omitted, such as the light-emitting functional layer and the conductor layer (which will be described below).
[0108] See Figure 5 and Figure 6 The display panel 10 also includes an isolation structure 150. The isolation structure 150 is disposed between two adjacent first openings H1. The isolation structure 150 disposed between two adjacent first openings H1 will be described in detail below.
[0109] In this paper, the adjacency of two first openings H1 can mean that there are no other first openings between these two first openings H1.
[0110] In this text, A being positioned between B and C means that B, A, and C are sequentially distributed along the arrangement direction of B and C. Furthermore, A is directly opposite B and A is directly opposite C. Based on this, the isolation structure 150 being positioned between two adjacent first openings H1 means that along the arrangement direction of these two adjacent first openings H1, one first opening H1, the isolation structure 150, and another first opening H1 are sequentially distributed, and the isolation structure 150 is directly opposite both first openings H1.
[0111] Specifically, in this paper, the arrangement direction of B and C can be determined by the line connecting the center of the orthographic projection of B onto the substrate and the center of the orthographic projection of C onto the substrate. The arrangement direction of any other two structures can also refer to the above description. A and B being opposite each other can mean that, in a direction perpendicular to the arrangement direction of A and B, the edge of A is flush with or recessed compared to the edge of B.
[0112] Based on the above, see Figure 6 Taking the isolation structure 150 disposed between the first opening H1-a and the first opening H1-b as an example, the first opening H1-a, the isolation structure 150, and the first opening H1-b are sequentially disposed in the arrangement direction of the first opening H1-a and the first opening H1-b (for example, the direction of the line connecting the center of the orthographic projection of the first opening H1-a on the substrate and the center of the orthographic projection of the first opening H1-b on the substrate, which is parallel to the X-axis direction). The isolation structure 150 is directly opposite the first opening H1-a, that is, along the Y-axis direction, the edge of the isolation structure 150 is flush with or recessed from the edge of the first opening H1-a. For example, position lines L1 and L2 show the extension lines of the edge of the first opening H1-a along the Y-axis direction, and the edge of the isolation structure 150 along the Y-axis direction is flush with or recessed from the position lines L1 and L2. Furthermore, the isolation structure 150 is directly opposite the first opening H1-b. Similarly, along the Y-axis, the edge of the isolation structure 150 is flush with or recessed from the edge of the first opening H1-b.
[0113] See also Figure 6 The above description uses the example of the isolation structure 150 located between the first opening H1-a and the first opening H1-b. In this case, the arrangement direction of the adjacent first openings H1-a and H1-b can be parallel to the X-axis direction. Understandably, in the display panel 10, the arrangement direction of the two adjacent first openings H1 can also be other directions. For example, the arrangement direction of the first openings H1-c and H1-a can be parallel to the Y-axis direction.
[0114] See also Figure 6 The isolation structure 150 can be configured to either disconnect or increase the resistance of one or more film layers disposed thereon (i.e., on the side of the isolation structure 150 away from the substrate SUB). For example, one or more of the plurality of light-emitting functional layers may have high conductivity, potentially causing crosstalk between adjacent sub-pixels. This one or more light-emitting functional layers can be isolated by the isolation structure 150, or the resistance of the one or more light-emitting functional layers at the isolation structure can be increased by providing the isolation structure. This reduces the conductivity of the light-emitting functional layer and improves the problem of crosstalk between adjacent sub-pixels.
[0115] For a first opening H1, at least one side of the first opening H1 may be provided with one or more isolation structures 150 in a direction perpendicular to the thickness direction of the display panel. In some embodiments, one or more isolation structures 150 are provided around a first opening H1 (e.g., first opening H1-a). In this way, isolation structures can be provided between the first opening and the four first openings located around it, which can further improve the problem of crosstalk between adjacent sub-pixels.
[0116] Further, see also Figure 6 In some possible implementations, the display panel 10 also includes a connection structure LS, which can be configured to connect a plurality of isolation structures 150 together, such that the plurality of isolation structures 150 and the connection structure LS form a continuous pattern. For example, one or more isolation structures 150 around a first electrode ED1 can be connected together via the connection structure LS.
[0117] The material and structure of the connection structure LS can be the same as those of the isolation structure 150. For example, the connection structure LS and the isolation structure 150 can be fabricated in the same process. Since the material and structure of the connection structure LS are the same as those of the isolation structure 150, the connection structure LS can also be configured to disconnect one or more film layers disposed thereon or to increase the resistance of the one or more film layers at the connection structure LS. Based on the above, since the display panel 10 also includes the connection structure LS, the crosstalk problem between adjacent sub-pixels in the display panel 10 can be further improved.
[0118] See Figure 5 and Figure 6 In some embodiments, the pixel defining layer 170 also has a third opening H3. One or more isolation structures 150 may be disposed in a third opening H3 (e.g., each third opening H3), or in other words, the isolation structures 150 may be disposed in the third opening H3 of the pixel defining layer 170. In this way, the thickness of the display panel can be smaller.
[0119] See also Figure 5 Based on the above, since the isolation structure 150 can be configured to disconnect one or more film layers disposed thereon or to increase the resistance of the one or more film layers at the isolation structure 150, at least one (e.g., one; or multiple) of the plurality of light-emitting functional layers 130 can be disconnected at the isolation structure 150. This can improve the problem of crosstalk between adjacent sub-pixels, thereby improving the display effect of the display panel.
[0120] In some embodiments, as described above, the plurality of light-emitting functional layers 130 include a first light-emitting layer, a second light-emitting layer, and a charge-generating layer, with the charge-generating layer disposed between the first and second light-emitting layers. The charge-generating layer has good conductivity, which can easily lead to crosstalk between adjacent sub-pixels. Therefore, in a display panel, the charge-generating layer can be disconnected at an isolation structure, thereby improving the crosstalk problem between adjacent sub-pixels and thus improving the display effect of the display panel. In some possible implementations, the plurality of light-emitting functional layers 130 include a plurality of charge-generating layers, all of which can be disconnected at an isolation structure, further improving the aforementioned problem.
[0121] Furthermore, Figure 7 This is a structural diagram of a display panel according to some embodiments. See also... Figure 5 and Figure 7 Since the display panel 10 also includes a second electrode layer 140 disposed on the side of the plurality of light-emitting functional layers 130 away from the substrate SUB, the second electrode layer 140 can also be disconnected at the isolation structure 150 (e.g., Figure 7 (As shown), or, the portion of the second electrode layer 140 located at the isolation structure 150 has poor conductivity and high resistance (as shown). Figure 5 (As shown). As described above, the second electrode layer 140 can be a continuous film layer, that is, the second electrodes of the light-emitting devices in each sub-pixel are connected to each other. During the display process of the display panel 10, an electrical signal can be written to the entire second electrode layer 140 to control the light emission of each light-emitting device in the display panel 10. Based on the above, since the second electrode layer 140 can be disconnected at the isolation structure 150, or the resistance of the portion of the second electrode layer 140 located at the isolation structure 150 can be relatively large, the electrical connection performance between the second electrodes of the light-emitting devices in each sub-pixel is poor, affecting the display effect of the display panel.
[0122] See also Figure 5 and Figure 7 To address the aforementioned issues, the display panel 10 provided in the embodiments of this disclosure further includes a conductor layer 160. The conductor layer 160 is disposed on the side of the second electrode layer 140 away from the substrate SUB. Exemplarily, the substrate SUB, the second electrode layer 140, and the conductor layer 160 are sequentially disposed along the Z-axis direction.
[0123] Figure 8 for Figure 5 The top view of the display panel shows the conductor layer. Figure 9 for Figure 8 A magnified view of area W1 in the display panel.
[0124] See Figure 8The conductor layer 160 includes a plurality of connection patterns 161. A connection pattern 161 (e.g., each connection pattern 161) contacts the portion of the second electrode layer 140 located on both sides of the isolation structure 150 along a first direction, the first direction being the arrangement direction of two adjacent first openings, that is, the arrangement direction of two adjacent first openings corresponding to the isolation structure 150 (the isolation structure 150 is located between these two adjacent first openings, as detailed in the description above).
[0125] See Figure 8 and Figure 9 Taking the first opening H1-a and the first opening H1-b as examples, the connecting pattern 161 is in contact with the portions of the second electrode layer 140 located on both sides of the isolation structure 150 along the first direction (e.g., parallel to the X-axis direction), namely the first portion 141 and the second portion 142.
[0126] The material of the conductor layer 160 may be the same as or different from the material of the second electrode layer 140. The embodiments of this disclosure do not limit this, as long as the material of the conductor layer 160 is a conductor and can conduct electricity. Exemplarily, the material of the conductor layer 160 includes metals or alloys, such as magnesium (Mg), titanium (Ti), silver (Ag), or alloys formed of multiple metals.
[0127] Based on the above, since a connection pattern 161 in the conductor layer 160 contacts the portions of the second electrode layer 140 located on both sides of the isolation structure 150 along the first direction (e.g., parallel to the X-axis direction), the portions of the second electrode layer 140 located on both sides of the isolation structure 150 along the first direction can be coupled to each other through the connection pattern 161. Because the conductor layer 160 is provided with multiple connection patterns 161, the electrical connection performance between the second electrodes of the light-emitting devices in adjacent sub-pixels can be improved, thereby improving the display effect of the display panel.
[0128] See Figure 8 An isolation structure 150 may correspond to one or more connection patterns 161. In some embodiments, an isolation structure 150 corresponds to one connection pattern 161, or in other words, a connection pattern 161 is provided between adjacent first openings H1. In the manufacturing process of the display panel 10, a mask strip with openings (for distinction, the opening of the mask strip is referred to as the second opening below) can be used to fabricate the conductor layer 160, and one second opening corresponds to one connection pattern 161. Since a connection pattern 161 is provided between adjacent first openings H1, the number of second openings of the mask strip used to fabricate multiple connection patterns 161 in the display panel 10 is small, the structure of the mask strip is relatively simple, and correspondingly, the manufacturing process of the display panel 10 can also be relatively simple, which can improve the yield of the display panel.
[0129] See Figure 9 In some embodiments, a connection pattern 161 (e.g., each connection pattern 161) includes a first overhang 161a and a second overhang 161b. The first overhang 161a and the second overhang 161b are located on opposite sides of the upper surface 150' of the isolation structure 150 in a first direction. See also... Figure 5 and Figure 8 The upper surface 150' of the isolation structure 150 is the surface of the isolation structure 150 that is away from the substrate SUB. Based on the above, it can also be said that the first protruding portion 161a and the second protruding portion 161b protrude from the upper surface 150' of the isolation structure 150 in a first direction.
[0130] Furthermore, both the first protruding portion 161a and the second protruding portion 161b are in contact with the second electrode layer 140. Specifically, the first protruding portion 161a and the second protruding portion 161b can respectively contact the portions of the second electrode layer 140 located on both sides of the isolation structure 150 along the first direction, thereby enabling the connection pattern 161 to contact the portions of the second electrode layer 140 located on both sides of the isolation structure 150 along the first direction. For example, the first protruding portion 161a can contact the first portion 141 in the second electrode layer 140, and the second protruding portion 161b can contact the second portion 142 in the second electrode layer 140.
[0131] Furthermore, the sum of the dimensions of the first protruding portion 161a and the second protruding portion 161b in the first direction is greater than or equal to 1 μm. For example, the sum of the dimensions of the first protruding portion 161a and the second protruding portion 161b in the first direction is 1 μm, 1.1 μm, 1.2 μm, 1.3 μm, 1.4 μm, 1.5 μm, 1.6 μm, 1.7 μm, 1.8 μm, 1.9 μm, or 2 μm. This increases the contact area between the connecting pattern 161 and the portions of the second electrode layer 140 located on both sides of the isolation structure 150 along the first direction, further improving the electrical connection performance between the second electrodes of the light-emitting devices in adjacent sub-pixels, thereby improving the display effect of the display panel.
[0132] See Figure 8In some embodiments, multiple connection patterns 161 are arranged in an alternating array. As described above, a conductor layer 160 can be fabricated using a mask strip with a second opening, where each second opening corresponds to a connection pattern 161. Since the multiple connection patterns 161 are arranged in an alternating array, the multiple second openings of the mask strip can also be arranged in an alternating array accordingly. Thus, provided that a connection pattern 161 is provided between adjacent first openings H1, the multiple second openings in the mask strip can be arranged in a regular pattern, which is beneficial to improving the structural stability of the mask strip, thereby improving the structural stability of the display panel and increasing the yield of the display panel.
[0133] See also Figure 8 and Figure 9 In some embodiments, the orthographic projection of a connection pattern 161 (e.g., each connection pattern 161) onto the substrate is rectangular. This allows for a larger area of the connection pattern 161, further improving the electrical connection performance between the second electrodes of the light-emitting devices in adjacent sub-pixels. For example, see... Figure 9 When the connection pattern 161 is rectangular, the areas of the first extended portion 161a and the second extended portion 161b can be larger. In this way, the contact area between the first extended portion 161a and the second extended portion 161b and the second electrode layer 140 can be larger, which can improve the electrical connection performance between the second electrodes of the light-emitting devices in adjacent sub-pixels.
[0134] The connecting pattern 161 can also have other shapes. Figure 10 This is a top view of a connecting pattern in a display panel according to some embodiments. Figure 11 This is a top view of a connecting pattern in a display panel according to some other embodiments.
[0135] See Figure 10 and Figure 11 In some embodiments, a connection pattern 161 (e.g., each connection pattern 161) includes a central portion 161c and N protruding portions 161d protruding from the central portion 161c, the N protruding portions 161d being evenly distributed circumferentially along the central portion 161c, wherein N is an even number and greater than or equal to 4, for example, N equals 4, 6 or 8.
[0136] The orthographic projection of the central portion 161c onto the substrate can be rectangular. In some possible implementations, the N protrusions 161d have the same shape and are centrally symmetrically distributed around the central portion 161c. For example, the connecting pattern 161 can be cross-shaped. It should be noted that... Figure 10 and Figure 11The shape of the connecting pattern shown is merely illustrative; the connecting pattern may have other shapes, and the embodiments disclosed herein are not limited thereto, as long as they include the central portion and protruding portion described above.
[0137] Since a connecting pattern 161 includes a central portion 161c and N protruding portions 161d extending from the central portion 161c, and the N protruding portions 161d are evenly distributed circumferentially along the central portion 161c, the maximum distance between two adjacent connecting patterns can be relatively large, provided that the dimensions of the connecting patterns 161 in the first direction (e.g., parallel to the X-axis direction) are the same. As mentioned above, multiple connecting patterns can be fabricated using a mask strip with a second opening, where each second opening corresponds to one connecting pattern. Based on this, see [link to relevant documentation]. Figure 12 , Figure 12 This is a magnified view of a mask strip used to fabricate a conductor layer, where (a) corresponds to the formation of... Figure 10 The mask strips of the connecting pattern shown in (b) correspond to the formation Figure 11 The mask strip shows the connection pattern. When the maximum distance between two adjacent connection patterns is large, the maximum distance DMX between two adjacent second openings H2 in the mask strip MS can also be large, allowing for a larger dimension of the connecting material LO used to connect the two adjacent second openings H2. This improves the structural stability of the mask strip MS, making it less prone to deformation during the fabrication of the conductor layer, thus improving the yield of the display panel.
[0138] In addition, see also Figure 10 , Figure 11 and Figure 12 Since the N protrusions 161d are evenly distributed along the circumference of the central portion 161c, the shape of the second opening H2 of the mask strip MS forming the connection pattern of this shape is relatively regular. This makes the mask strip MS more uniformly stressed in the process of making the conductor layer (such as vapor deposition or sputtering), which is beneficial to improving the structural stability of the mask strip MS and thus improving the yield of the display panel.
[0139] It should be noted that, compared to Figure 8 and Figure 9 The connecting pattern in the middle, Figure 10 and Figure 11 The shapes of the connecting patterns are different, but other features can be compared with... Figure 8 and Figure 9 The connection patterns are the same. For example, Figure 10 and Figure 11 The distribution of the connection patterns shown in the diagram on the display panel can be compared with... Figure 8 The same applies as shown; that is, it can also be arranged in an alternating array. For example, see [link to example]. Figure 13 , Figure 13 This is a partial enlarged view of a display panel according to some embodiments, wherein (a) corresponds to Figure 10 The connection pattern shown in (b) corresponds to Figure 11 The connection pattern shown is described above. The connection pattern 161 with the above shape may also include a first extended portion 161a and a second extended portion 161b. For details, please refer to the relevant description above, which will not be repeated here.
[0140] See also Figure 8 In some embodiments, the minimum distance DMI between two adjacent connecting patterns 161 is greater than or equal to 10 μm, for example, 10 μm, 11 μm, 12 μm, 13 μm, 14 μm, or 15 μm. Thus, in the mask strip used to fabricate the conductor layer, the minimum distance between two adjacent second openings can be greater than or equal to 10 μm. This allows for a larger size of the connecting material used to connect the two adjacent second openings, for example, greater than or equal to 10 μm, which improves the structural stability of the mask strip, making it less prone to deformation during the fabrication of the conductor layer and thus improving the yield of the display panel.
[0141] Figure 14 for Figure 5 A structural diagram of the isolation structure in the display panel. See also... Figure 5 and Figure 14 In some embodiments, the isolation structure 150 includes a first pattern 151, a second pattern 152 and a third pattern 153 stacked sequentially along a direction away from the substrate SUB.
[0142] In this configuration, the orthographic projection of the second pattern 152 onto the substrate SUB lies inside the orthographic projection of the third pattern 153 onto the substrate SUB. In other words, the third pattern 153 protrudes from the second pattern 152 in a direction perpendicular to the thickness direction of the display panel 10 (e.g., parallel to the XY plane). This makes it easier to disconnect the light-emitting functional layer at the isolation structure 150 when fabricating the light-emitting functional layer on the isolation structure 150 (e.g., when fabricating the light-emitting functional layer using a vapor deposition process).
[0143] Furthermore, the orthographic projection of the second pattern 152 onto the substrate SUB lies inside the orthographic projection of the first pattern 151 onto the substrate SUB. In other words, in the direction perpendicular to the thickness direction of the display panel 10, the first pattern 151 protrudes beyond the second pattern 152. Alternatively, in the direction perpendicular to the thickness direction of the display panel 10, the size of the first pattern 151 is larger than the size of the second pattern 152. Because the first pattern 151 is larger, its adhesion to the underlying film layer is better than that of the second pattern 152, which improves the structural stability of the isolation structure 150 and thus enhances the structural stability of the display panel 10.
[0144] In some possible implementations, the first pattern 151 is made of an oxide, such as silicon oxide. The second pattern 152 is made of a nitride, such as silicon nitride. The film layer located on the side of the first pattern 151 closest to the substrate SUB and in contact with the first pattern 151 is a planarization layer PN. The planarization layer PN can be configured to form a relatively flat surface, making the film layer disposed on the planarization layer PN relatively flat. Compared to silicon nitride, silicon oxide has better adhesion to the planarization layer PN. Therefore, when the isolation structure 150 includes a first pattern 151 made of silicon oxide, the isolation structure 150 can have better structural stability, thereby improving the structural stability of the display panel.
[0145] Figure 15 To make Figure 5 The process flow diagram for the display panel is shown below. (See also...) Figure 14 and Figure 15 In some embodiments, an isolation structure 150, including a first pattern 151, a second pattern 152, and a third pattern 153, can be formed on the side of the planarization layer PN away from the substrate SUB. Exemplarily, three stacked pattern layers can be formed, with these three pattern layers having approximately the same dimensions in a first direction (e.g., parallel to the X-axis). These three pattern layers can be etched using an etching process (e.g., dry etching) to form the isolation structure 150. Specifically, suitable materials and etchants can be selected such that the etching rate of the second pattern 152 is greater than that of the first pattern 151 and the third pattern 153. For example, the materials of the first pattern 151 and the third pattern 153 are silicon oxide, and the material of the second pattern 152 is silicon nitride. A suitable etchant can be selected such that the etching rate of silicon nitride is greater than that of silicon oxide during the etching process. Thus, the isolation structure 150 can be formed in a single etching process, simplifying the display panel manufacturing process and improving the yield of the display panel. In some embodiments, a first electrode layer 120, a pixel defining layer 170, a plurality of light-emitting functional layers 130 and a second electrode layer 140 may be formed on the side of the planarization layer PN away from the substrate SUB to form a display panel 10.
[0146] Figure 16 The diagram illustrates another isolation structure for a display panel according to some embodiments. Figure 17 for Figure 16 The diagram shows the structure of the isolation structure in the display panel. It should be noted that... Figure 16 The image only shows some of the film layers in the display panel, such as the substrate, the first electrode layer, one of the light-emitting functional layers, and the second electrode layer, while other film layers are omitted, such as some light-emitting functional layers and the pixel driving circuit disposed on the substrate.
[0147] See Figure 16 and Figure 17 In some embodiments, the isolation structure 150 includes a lower surface 150” and an upper surface 150’ sequentially distributed along a direction away from the substrate SUB. Furthermore, the orthographic projection of the lower surface 150” onto the substrate SUB lies inside the orthographic projection of the upper surface 150’ onto the substrate SUB. In other words, in a first direction (e.g., parallel to the X-axis), the upper surface 150’ protrudes beyond the lower surface 150”. Thus, when the light-emitting functional layer 130 is fabricated on the isolation structure 150 (e.g., by a vapor deposition process), the light-emitting functional layer 130 is more easily disconnected at the isolation structure 150.
[0148] Figure 18 for Figure 16 The top view of the display panel shows the relative position of the isolation structure within the display panel. See also Figure 18 The connection structure LS can also connect two isolation structures 150 located on the same side of the two first openings H1. Taking the first openings H1-a and H1-d as examples, the connection structure LS can connect the isolation structure 150 located on the side of the first opening H1-a along the negative X-axis and the isolation structure 150 located on the side of the first opening H1-d along the negative X-axis. As mentioned above, the material and structure of the connection structure LS can be the same as the isolation structure 150. Therefore, the connection structure LS can also be configured to disconnect one or more film layers disposed thereon or increase the resistance of the one or more film layers at the connection structure LS. Based on the above, since the display panel 10 also includes the connection structure LS, the crosstalk problem of adjacent sub-pixels in the display panel 10 can be further improved.
[0149] Some embodiments of this disclosure also provide a mask strip. This mask strip is configured to fabricate a conductor layer in the display panel provided in any of the above embodiments.
[0150] Figure 19 This is a structural diagram of a mask strip according to some embodiments. See also... Figure 19 The mask strip MS has at least one (e.g., one; or more) patterned areas PA. One patterned area PA (e.g., each patterned area PA) can correspond to one display panel. The mask strip MS may also have a blocking area BA located between adjacent patterned areas PA. Furthermore, the mask strip MS also has a soldering area WA and a clamping area HA. The portion of the mask strip MS located in the clamping area HA can be clamped by a fixture (e.g., a mechanical gripper) to align the soldering area WA of the mask strip MS with the soldering area on the frame of the mask plate, thereby enabling the mask strip to be soldered onto the frame of the mask plate (the mask plate and frame will be described below).
[0151] See also Figure 19 The mask strip MS can be strip-shaped. In some embodiments, the width k1 of the mask strip MS is 35nm to 400nm, for example, 35nm, 40nm, 45nm, 50nm, 100nm, 150nm, 200nm, 250nm, 300nm, 350nm, or 400nm. The length k2 of the mask strip MS is 800nm to 1200nm, for example, 800nm, 850nm, 900nm, 950nm, 1000nm, 1100nm, or 1200nm.
[0152] Figure 20 , Figure 21 as well as Figure 22 The image shows a magnified view of a portion of the mask strip, illustrating the structure of a patterned area. Figure 23 for Figure 21 A top view of the second opening of the mask strip shown. Figure 24 for Figure 22 The top view shows the second opening of the mask strip. It should be noted that... Figure 20 , Figure 21 as well as Figure 22 The number and arrangement of the second openings in the pattern area shown are merely illustrative. The number and arrangement of the second openings in the pattern area can be set according to actual needs, and the embodiments disclosed herein do not limit this.
[0153] See Figure 19 , Figure 20 , Figure 21 and Figure 22 The mask strip MS also has a plurality of second openings H2 disposed in a patterned area PA, and each second opening H2 (e.g., each second opening H2) is configured to form a connection pattern in the conductor layer. Exemplarily, in a process of fabricating a conductor layer using a mask strip, the material of the conductor layer can be deposited on a corresponding location on the substrate through a second opening, thereby forming a connection pattern.
[0154] Based on this, it is understandable that the shape and arrangement of the multiple second openings H2 in a pattern area PA of the mask strip MS can be found in the description of the shape and arrangement of multiple connecting patterns in the display panel above.
[0155] Specifically, see Figure 20 In some embodiments, the shape enclosed by the edges of a second opening H2 (e.g., each second opening H2) is a rectangle, so that the rectangular connection pattern described above can be formed through the second opening H2.
[0156] In other embodiments, see Figure 23 and Figure 24A second opening H2 (e.g., each second opening H2) includes a central sub-opening Hc and N protruding sub-openings Hd protruding from the central sub-opening. The N protruding sub-openings Hd are uniformly distributed circumferentially along the central sub-opening Hc, and N is an even number and N is greater than or equal to 4, for example, N is equal to 4, 6 or 8.
[0157] The orthographic projection of the central sub-opening Hc can be a rectangle. In some possible implementations, the N protruding sub-openings Hd have the same shape and are centrally symmetrically distributed around the central sub-opening Hc. For example, the shape enclosed by the edges of the second opening H2 can be a cross shape. It should be noted that... Figure 23 and Figure 24 The shape of the second opening shown is merely schematic, and the second opening may have other shapes. The embodiments of this disclosure are not limited in this regard, as long as they include the central portion and the protruding portion described above.
[0158] Based on the above, since a second opening H2 includes a central sub-opening Hc and N protruding sub-openings Hd extending from the central sub-opening, and the N protruding sub-openings Hd are uniformly distributed circumferentially along the central sub-opening Hc, therefore, see... Figure 21 and Figure 22 In a mask strip, the maximum distance DMX between two adjacent second openings H2 can be relatively large, allowing for a larger dimension of the connecting material LO used to connect the two second openings. This improves the structural stability of the mask strip, making it less prone to deformation during the fabrication of the conductor layer.
[0159] Figure 25 and Figure 26 This is a cross-sectional view of the second opening. See also... Figure 25 and Figure 26 In some embodiments, a second opening H2 (e.g., each second opening H2) has a first sub-opening Ha and a second sub-opening Hb distributed and interconnected along a second direction, wherein the second direction is the thickness direction of the mask strip, for example, parallel to the Z-axis direction. The depth i1 of the first sub-opening Ha is greater than or equal to the depth i2 of the second sub-opening Hb.
[0160] Specifically, an etching process can be used to fabricate the first sub-aperture Ha and the second sub-aperture Hb. Due to limitations in the etching process, the greater the depth of the first sub-aperture Ha or the second sub-aperture Hb, the larger the profile angle of that sub-aperture. See also... Figure 26Taking the first sub-opening Ha as an example, the profile angle α of the first sub-opening Ha can be the angle between the line connecting the endpoints A and B of the sidewall Ha' of the first sub-opening Ha and the plane containing the edge e1 of the first sub-opening Ha away from the second sub-opening Hb, on a plane parallel to the thickness direction of the mask strip (e.g., parallel to the XZ plane, where the XZ plane is the plane defined by the X-axis and Z-axis directions, and the X-axis direction is perpendicular to the Z-axis direction). In some embodiments, the profile angle α of the first sub-opening Ha is 30° to 70°. This simplifies the manufacturing process of the first sub-opening Ha.
[0161] See also Figure 25 In the process of fabricating a conductor layer using a mask strip, the substrate SUB can be located on the side of the second sub-aperture Hb away from the first sub-aperture Ha. That is, material can be deposited on the substrate sequentially through the first sub-aperture Ha and the second sub-aperture Hb (e.g., along the positive Z-axis) to form a connection pattern. Based on this, the second sub-aperture Hb is closer to the substrate SUB, and its depth can be smaller; correspondingly, its profile angle can be smaller. Compared to the first sub-aperture Ha, which has a larger profile angle, being closer to the substrate SUB, the smaller profile angle of the second sub-aperture Hb improves process precision and the accuracy of the fabricated pattern.
[0162] See Figure 20 , Figure 21 and Figure 22 In some embodiments, the minimum size d1 of the orthographic projection of the connecting material LO between two adjacent second openings H2 is greater than or equal to 10 μm. This allows for a larger size of the connecting material LO, which improves the structural stability of the mask strip and reduces the likelihood of deformation during conductor layer fabrication. The orthographic projection of the connecting material LO between two adjacent second openings H2 can be the orthographic projection of the connecting material LO onto a surface of the mask strip distributed along its thickness direction. This surface is, for example, parallel to the XY plane, which is a plane defined by the X and Y axes, perpendicular to the Z axis, and intersecting the Z axis. Furthermore, it should be noted that... Figure 20 , Figure 21 and Figure 22 The minimum dimension d1 of the connecting material LO between two adjacent second openings H2 shown is only illustrative. It can be understood that the minimum dimension of the connecting material LO between two adjacent second openings H2 can also be the dimension at other locations of the connecting material between two adjacent second openings.
[0163] Specifically, Figure 27 This is a cross-sectional view of two adjacent openings. See also... Figure 27 Considering the shape of the sidewall of the opening, the minimum dimension d1 of the orthographic projection of the solid material LO connecting two adjacent second openings can be the minimum dimension between the edges e2 of the first sub-opening Ha and the second sub-opening Hb of these two second openings.
[0164] Some embodiments of this disclosure also provide a mask. Figure 28 This is a structural diagram of the photomask. See also... Figure 28 The mask plate 30 includes a frame 310 and one or more mask strips MS fixedly mounted on the frame 310. The mask strip MS can be any of the mask strips provided in the above embodiments. Exemplarily, the welding area WA of the mask strip MS can be aligned with the welding area 311 on the frame 310, and then the mask strip MS can be welded to the frame 310 to achieve fixed mounting of the mask strip MS on the frame 310.
[0165] Some embodiments of this disclosure also provide a method for manufacturing a display panel. This method can be used to manufacture the display panel provided in any of the above embodiments. Figure 29 A flowchart illustrating the manufacturing process of the display panel. See also... Figure 29 The manufacturing method of the display panel includes the following steps:
[0166] S1. A first electrode layer is formed on the substrate.
[0167] The first electrode layer comprises multiple first electrodes. The materials and structures of the first electrodes can be found above and will not be repeated here.
[0168] S2. A pixel defining layer is formed on the side of the first electrode layer away from the substrate.
[0169] The pixel defining layer has multiple first openings, each first opening exposing at least a portion (e.g., part; or, for example, all) of a first electrode. The specific structure of the pixel defining layer can be found in the relevant description above and will not be repeated here.
[0170] S3. Form an isolation structure on the substrate.
[0171] The isolation structure is positioned between two adjacent first openings. The materials and structure of the isolation structure can be found above and will not be repeated here. Furthermore, the fabrication method of the isolation structure can also be found in the relevant descriptions above and will not be repeated here.
[0172] In some embodiments, step S1 can be performed first, followed by step S3; that is, an isolation structure can be fabricated on a substrate with a first electrode layer. In other embodiments, step S3 can be performed first, followed by step S1; that is, a first electrode layer can be fabricated on a substrate with an isolation structure.
[0173] S4. Multiple light-emitting functional layers are formed on a substrate with an isolation structure.
[0174] In this configuration, multiple light-emitting functional layers are disposed on the side of the first electrode layer away from the substrate. At least one light-emitting functional layer is disconnected at the isolation structure.
[0175] The specific materials and structures of the multiple light-emitting functional layers can be found in the description above, and will not be repeated here.
[0176] Furthermore, as explained above, since at least one light-emitting functional layer is disconnected at the isolation structure, the problem of crosstalk between subpixels in the display panel can be improved.
[0177] S5. A second electrode layer is formed on the side of the multiple light-emitting functional layers away from the substrate.
[0178] The material and structure of the second electrode layer can be found in the description above and will not be repeated here. Specifically, the second electrode layer can be a continuous film layer. In some embodiments, the second electrode layer can be broken at the isolation structure. In other embodiments, the resistance of the portion of the second electrode layer located at the isolation structure can be relatively large.
[0179] S6. Using the mask provided in any of the above embodiments, a conductor layer is formed on the side of the second electrode layer away from the substrate.
[0180] The material and structure of the conductor layer can be referred to above and will not be repeated here. Specifically, the conductor layer includes multiple connection patterns. One connection pattern contacts the portion of the second electrode layer located on both sides of the isolation structure along a first direction, where the first direction is the arrangement direction of two adjacent first openings. Thus, as described above, the connection pattern can connect the two portions of the second electrode layer located on both sides of the isolation structure, which can improve the electrical connection performance between the second electrodes in the light-emitting devices of adjacent sub-pixels, thereby improving the display effect of the display panel.
[0181] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A display panel, characterized in that, include: substrate; A first electrode layer is disposed on the substrate, and the first electrode layer includes a plurality of first electrodes; A pixel defining layer is disposed on the side of the first electrode layer away from the substrate, the pixel defining layer having a plurality of first openings, one of the first openings exposing at least a portion of a first electrode; An isolation structure is disposed on the substrate and between two adjacent first openings; Multiple light-emitting functional layers are disposed on the side of the first electrode layer away from the substrate, and at least one light-emitting functional layer is disconnected at the isolation structure; The second electrode layer is disposed on the side of the plurality of light-emitting functional layers away from the substrate; A conductor layer is disposed on the side of the second electrode layer away from the substrate, and the conductor layer includes a plurality of connection patterns; In this configuration, a connecting pattern contacts the portions of the second electrode layer located on both sides of the isolation structure along a first direction, where the first direction is the arrangement direction of the two adjacent first openings. The connection pattern includes a first extended portion and a second extended portion, the first extended portion and the second extended portion being located on both sides of the upper surface of the isolation structure in the first direction, and both being in contact with the second electrode layer; the upper surface of the isolation structure is the surface of the isolation structure that is away from the substrate.
2. The display panel according to claim 1, characterized in that, The sum of the dimensions of the first and second overhanging portions in the first direction is greater than or equal to 1 μm.
3. The display panel according to claim 1, characterized in that, The multiple connection patterns are arranged in an alternating array.
4. The display panel according to claim 1, characterized in that, The orthographic projection of the connection pattern onto the substrate is a rectangle; or... The connecting pattern includes a central portion and N protruding portions protruding from the central portion, the N protruding portions being evenly distributed along the circumference of the central portion, where N is an even number and greater than or equal to 4.
5. The display panel according to claim 1, characterized in that, The minimum distance between two adjacent connected patterns is greater than or equal to 10 μm.
6. The display panel according to claim 1, characterized in that, The isolation structure includes a first pattern, a second pattern, and a third pattern stacked sequentially along a direction away from the substrate. The orthographic projection of the second pattern on the substrate is located inside the orthographic projection of the first pattern on the substrate, and the orthographic projection of the second pattern on the substrate is located inside the orthographic projection of the third pattern on the substrate.
7. The display panel according to claim 1, characterized in that, The isolation structure includes a lower surface and an upper surface that are sequentially distributed along a direction away from the substrate, wherein the orthographic projection of the lower surface on the substrate is located inside the orthographic projection of the upper surface on the substrate.
8. The display panel according to claim 1, characterized in that, The plurality of light-emitting functional layers include a first light-emitting layer, a second light-emitting layer, and a charge-generating layer, wherein the charge-generating layer is disposed between the first light-emitting layer and the second light-emitting layer, and the charge-generating layer is disconnected at the isolation structure.
9. The display panel according to claim 1, characterized in that, The second electrode layer is disconnected at the isolation structure.
10. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 9.
11. A mask strip, characterized in that, Configured to form a conductor layer in the display panel according to any one of claims 1 to 9; The mask strip has: Pattern area; Multiple second openings are provided in the pattern area, and one second opening is configured to create a connection pattern in the conductor layer.
12. The mask strip according to claim 11, characterized in that, The shape enclosed by the edges of the second opening is a rectangle; or, The second opening includes a central sub-opening and N protruding sub-openings protruding from the central sub-opening. The N protruding sub-openings are evenly distributed along the circumference of the central sub-opening, and N is an even number and greater than or equal to 4.
13. The mask strip according to claim 11, characterized in that, The second opening has a first sub-opening and a second sub-opening distributed along a second direction and interconnected with each other, the depth of the first sub-opening is greater than or equal to the depth of the second sub-opening, and the second direction is the thickness direction of the mask strip; The profile angle of the first sub-opening is 30° to 70°.
14. A photomask, characterized in that, include: A frame, and a mask strip fixedly mounted on the frame, wherein the mask strip is the mask strip as described in any one of claims 11 to 13.
15. A method for manufacturing a display panel, characterized in that, include: A first electrode layer is formed on a substrate, the first electrode layer including a plurality of first electrodes; A pixel defining layer is formed on the side of the first electrode layer away from the substrate, the pixel defining layer having a plurality of first openings, one of the first openings exposing at least a portion of a first electrode; An isolation structure is formed on the substrate, the isolation structure being disposed between two adjacent first openings; Multiple light-emitting functional layers are formed on a substrate with the isolation structure, the multiple light-emitting functional layers are disposed on the side of the first electrode layer away from the substrate, and at least one light-emitting functional layer is disconnected at the isolation structure; A second electrode layer is formed on the side of the plurality of light-emitting functional layers away from the substrate; Using the mask of claim 14, a conductor layer is formed on the side of the second electrode layer away from the substrate. The conductor layer includes a plurality of connection patterns, and one connection pattern contacts a portion of the second electrode layer located on both sides of the isolation structure along a first direction, the first direction being the arrangement direction of the two adjacent first openings. The connection pattern includes a first extended portion and a second extended portion, the first extended portion and the second extended portion being located on both sides of the upper surface of the isolation structure in the first direction, and both being in contact with the second electrode layer; the upper surface of the isolation structure is the surface of the isolation structure that is away from the substrate.
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