Method for forming semiconductor structure

Abstract

A method for forming a semiconductor structure includes: providing a layer to be etched; forming a first core layer on the surface of the layer to be etched; forming a first sidewall on the sidewall of the first core layer; after forming the first sidewall, forming a second core layer on the surface of the layer to be etched, the first sidewall separating the first core layer and the second core layer; forming at least one of a first partition structure and a second partition structure, the first partition structure being located in the first core layer, and the second partition structure being located in the second core layer. Thus, a smaller end-to-end spacing of an interconnection structure can be formed, and the end-to-end spacing of the interconnection structure is consistent with the expected target.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to a method for forming a semiconductor structure. Background Art

[0002] With the improvement of circuit integration and the increase of scale, the size of unit devices in the circuit continues to shrink, and the requirements for integrated circuit manufacturing processes continue to increase. For example, the key size continues to decrease, and the chip manufacturing has higher and higher requirements for lithography resolution. As the design size continues to shrink, the minimum resolution of the design graphics has exceeded the limit of the existing optical lithography platform. The industry has adopted a variety of technical solutions to solve this technical problem. According to the international semiconductor technology blueprint, the industry has placed high hopes on technical solutions such as double patterning technology (DPT), extreme ultraviolet technology (EUV), and electron beam direct writing (EBL).

[0003] There are many existing double patterning processes, among which the double patterning process method using the LELE (Litho-Etch-Litho-Etch, lithography-etching-lithography-etching) process is a more common one among the existing multiple double patterning process methods. The LELE process method requires splitting the layout into two parts, and then producing a part of the pattern through two separate lithography and etching steps. However, the lithography, etching and deposition processes will produce EPE (Edge Placement Error), which will lead to vertical alignment deviation between layers. The appearance of EPE will eventually affect the performance of the formed semiconductor device. In order to reduce EPE, a patterning technology based on a sidewall process is proposed, such as a self-aligned LELE technology based on a sidewall process.

[0004] At present, when a metal line is formed by a sidewall-based self-aligned LELE process, a first groove is usually formed first, and then a sidewall is formed on the inner wall of the first groove. The sidewall is used as an alignment reference during the second photolithography, thereby achieving self-alignment of the second groove formed by the second photolithography and reducing EPE. The substrate is then patterned by relying on the sidewalls of the first groove and the inner wall of the first groove, as well as the second groove.

[0005] However, there are still problems with the metal lines formed in the prior art. Summary of the invention

[0006] The technical problem solved by the present invention is to provide a method for forming a semiconductor structure, which can form a smaller end spacing of a conductive structure and make the end spacing of the conductive structure consistent with an expected target.

[0007] To solve the above technical problems, the technical solution of the present invention provides a method for forming a semiconductor structure, including: providing a layer to be etched; forming a first core layer on the surface of the layer to be etched; forming a first side wall on the side wall surface of the first core layer; after forming the first side wall, forming a second core layer on the surface of the layer to be etched, the first side wall separating the first core layer and the second core layer; forming at least one of a first partition structure and a second partition structure, the first partition structure being located in the first core layer, and the second partition structure being located in the second core layer.

[0008] Optionally, the method for forming the first partition structure includes: before forming the first side wall, etching the first core layer, forming a first isolation opening in the first core layer, the bottom of the first isolation opening exposes the surface of the layer to be etched, and in the direction perpendicular to the extension direction of the first core layer, the first isolation opening penetrates the first core layer.

[0009] Optionally, the method for forming the first side wall and the first partition structure includes: forming a first material layer on the surface of the layer to be etched, the surface of the first core layer, and in the first partition opening, the first material layer filling the first partition opening; etching the first material layer until the surface of the layer to be etched and the top surface of the first core layer are exposed.

[0010] Optionally, the method for forming the first isolation opening includes: forming a first sacrificial layer on the side wall surface and the top surface of the first core layer, and the surface of the layer to be etched; forming a first isolation opening patterned layer on the surface of the first sacrificial layer, the first isolation opening patterned layer having a first opening, the first opening spanning the first core layer, and the first opening exposing a portion of the surface of the first sacrificial layer; using the first isolation opening patterned layer as a mask, etching the first sacrificial layer and the first core layer until the surface of the layer to be etched is exposed.

[0011] Optionally, the method for forming the first partition structure further includes: forming a first partition material layer on the surface of the first sacrificial layer and in the first partition opening; and planarizing the first partition material layer and the first sacrificial layer until the top surface of the first core layer is exposed.

[0012] Optionally, the method for forming the second partition structure includes: forming a second partition opening in the second core layer, the bottom of the second partition opening exposing the surface of the layer to be etched, the second partition opening penetrating the second core layer in a direction perpendicular to the extension direction of the second core layer, and the side wall surface of the second partition opening also exposing the surface of the first side wall; forming the second partition structure in the second partition opening.

[0013] Optionally, the method for forming the second isolation opening includes: forming a second sacrificial layer on the top surface of the first core layer, the surface of the first side wall, the top surface and side wall surface of the second core layer, and the surface of the layer to be etched; forming a second isolation opening patterned layer on the surface of the second sacrificial layer, the second isolation opening patterned layer having a second opening, the second opening spanning the second core layer, and the second opening exposing a portion of the surface of the second sacrificial layer; using the second isolation opening patterned layer as a mask, etching the second sacrificial layer and the second core layer until the surface of the layer to be etched is exposed.

[0014] Optionally, the method for forming a second partition structure in the second partition opening includes: forming a second partition material layer on the surface of the second sacrificial layer and in the second partition opening, the surface of the second partition material layer being higher than the surface of the second sacrificial layer; flattening the second partition material layer until the surface of the second sacrificial layer is exposed to form an initial second partition structure.

[0015] Optionally, the method for forming a second partition structure in the second partition opening also includes: forming an initial protective layer on the surface of the initial second partition structure, the top surface and side wall surface of the second core layer, the surface of the first side wall, and the top surface of the first core layer, wherein the surface of the initial protective layer is higher than or flush with the top surface of the initial second partition structure; etching the initial protective layer and the initial second partition structure until the top surface of the first core layer is exposed.

[0016] Optionally, the method further includes: forming a second side wall on the side wall surface of the first side wall, the side wall surface of the second partition structure, and the side wall surface of part of the second core layer.

[0017] Optionally, the method for forming the second side wall includes: before forming the second isolation opening, forming a second side wall material layer on the top surface and side wall surfaces of the first core layer, the first side wall surface, the top surface and side wall surfaces of the second core layer, and the surface of the layer to be etched; before etching the second core layer using the second isolation opening patterning layer as a mask, removing the second side wall material layer between the bottom of the second opening and the top surface of the second core layer; while etching the initial protective layer and the initial second isolation structure, removing the second side wall material layer above the top surface of the first core layer.

[0018] Optionally, it also includes: forming a protective layer on the surface of the layer to be etched, the protective layer is also located on the side wall surface of the first side wall and at least a portion of the side wall surface of the second core layer; after forming the protective layer and after forming the first partition structure and the second partition structure, removing the first core layer and the second core layer; after removing the first core layer and the second core layer, etching the layer to be etched using the protective layer, the first side wall, the first partition structure and the second partition structure as masks to form a plurality of conductive openings in the layer to be etched; and forming a conductive structure in each of the conductive openings.

[0019] Optionally, the material of the first core layer includes: a combination of one or more of amorphous silicon, polycrystalline silicon, single crystal silicon, silicon oxide, silicon nitride, amorphous carbon, silicon carbide and silicon oxycarbide.

[0020] Optionally, the material of the second core layer includes one or more combinations of spin-coated carbon, spin-coated glass, spin-coated organic matter, spin-coated metal oxide, and amorphous carbon.

[0021] Optionally, the material of the first partition structure includes: a combination of one or more of low-temperature oxide, titanium oxide, silicon oxide, silicon nitride, silicon carbide and aluminum oxide.

[0022] Optionally, the material of the second partition structure includes: a combination of one or more of low-temperature oxide, titanium oxide, silicon oxide, silicon nitride, silicon carbide and aluminum oxide.

[0023] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0024] In the method for forming a semiconductor structure provided by the technical solution of the present invention, the first core layer and the second core layer are used to transfer the pattern of the conductive opening to the layer to be etched, and the conductive opening provides space for forming a conductive structure. Since at least one of the first partition structure and the second partition structure is formed, the first partition structure is located in the first core layer, and the second partition structure is located in the second core layer, therefore, the first core layer is isolated by the first partition structure, and the second core layer is isolated by the second partition structure. When the layer to be etched is subsequently etched to form a conductive opening, the end spacing of adjacent conductive openings in the conductive opening pattern transferred by the first core layer can be consistent with the width of the first partition structure through the shielding of the first partition structure. Similarly, the end spacing of adjacent conductive openings in the conductive opening pattern transferred by the second core layer can be consistent with the width of the second partition structure through the shielding of the second partition structure. Therefore, by defining the shape of the first partition structure or the second partition structure, the end spacing of adjacent conductive structures is not limited by the first sidewall, and can be smaller and consistent with the expected target. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figures 1 to 5 It is a structural schematic diagram of each step of a method for forming a semiconductor structure;

[0026] Figures 6 to 37 It is a structural schematic diagram of each step of a formation process of a semiconductor structure according to an embodiment of the present invention. DETAILED DESCRIPTION

[0027] As described in the background art, there are still problems with the metal lines formed in the prior art, which will be described in detail below with reference to the accompanying drawings.

[0028] It should be noted that the “surface” in this specification is used to describe the relative position relationship in space and is not limited to direct contact.

[0029] Figures 1 to 5 The present invention is a structural schematic diagram of each step of a method for forming a semiconductor structure.

[0030] Please refer to Figure 1 , providing a layer to be etched 100, wherein the layer to be etched 100 includes a plurality of first regions I and a plurality of second regions II, wherein the first regions I and the second regions II are alternately arranged along a first direction X, and adjacent first regions I and second regions II are adjacent to each other.

[0031] Please refer to Figure 2 , a first mask layer 101 is formed on the first region I and the second region II; a plurality of mutually discrete first grooves 102 are formed in the first mask layer 101 of the first region I, and the end distance between adjacent first grooves 102 in a second direction Y is d1, and the second direction Y is perpendicular to the first direction X; and sidewalls 103 are formed on the sidewalls of the first grooves 102.

[0032] Please refer to Figure 3 A first graphic layer 104 is formed on the first mask layer 101, and the first graphic layer 104 has a plurality of openings 105, and the openings 105 expose a portion of the top surface of the first mask layer 101 on the second region II and a portion of the top surface of the sidewall 103 of the first groove 102.

[0033] Please refer to Figure 4 , using the first graphic layer 104 as a mask, etching the first mask layer 101 exposed by the opening 105, forming a plurality of mutually discrete second grooves 106 in the first mask layer 101 on the second region II, and the sidewalls of the second grooves 106 expose the sidewalls 103; after forming the second grooves 106, removing the first graphic layer 104.

[0034] Please refer to Figure 5, etching the layer to be etched 100 at the bottom of the first groove 102, forming a first target groove (not shown) in the layer to be etched 100; etching the layer to be etched 100 at the bottom of the second groove 106, forming a second target groove (not shown) in the layer to be etched 100; forming a first conductive layer 107 in the first target groove, and the end distance between adjacent first conductive layers 107 in the second direction Y is d2; forming a second conductive layer 108 in the second target groove.

[0035] In this embodiment, the sidewall 103 is formed on the sidewall of the first groove 102 , and the sidewall 103 is used as an alignment reference when the second groove 106 is formed by the subsequent second photolithography-etching, thereby reducing the edge placement error of the second groove 106 .

[0036] In this embodiment, the end distance d1 (Head to Head, HTH) between adjacent first grooves 102 is the expected target end distance between adjacent first conductive layers 107 to be formed subsequently. However, since the formed sidewall 103 is located inside the first groove 102, when metal is subsequently filled in the first groove 102 to form the first conductive layer 107, the end distance d2 between adjacent first conductive layers 107 is the sum of the end distance d1 of adjacent first grooves 102 and the thickness of the two sidewalls 103, resulting in the HTH size d2 of the formed first conductive layer 107 failing to meet the minimum size requirement and not meeting the expected target.

[0037] On this basis, the present invention provides a method for forming a semiconductor structure, by forming at least one of a first partition structure and a second partition structure, wherein the first partition structure is located in the first core layer and the second partition structure is located in the second core layer. Thus, a smaller end-to-end spacing of an interconnection structure can be formed, and the end-to-end spacing of the interconnection structure is made consistent with the expected target.

[0038] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0039] Figures 6 to 37 It is a structural schematic diagram of each step of a formation process of a semiconductor structure according to an embodiment of the present invention.

[0040] Please refer to Figure 6 and Figure 7 , Figure 7 yes Figure 6 A schematic diagram of the cross-sectional structure along the A1-A2 direction in FIG. 1 , providing a layer to be etched.

[0041] In this embodiment, the layer to be etched includes: a substrate 200 and a first mask layer 202 located on the substrate 200 .

[0042] In this embodiment, the material of the substrate 200 is a low-K dielectric layer (K ​​is less than or equal to 3.9); in other embodiments, the material of the substrate includes silicon oxide.

[0043] The material of the first mask layer 202 includes one or more combinations of silicon oxide, silicon nitride, titanium nitride, titanium oxide, tungsten carbide, silicon carbide, silicon carbide nitride, silicon oxycarbide, aluminum oxide and aluminum nitride. In this embodiment, the material of the first mask layer 202 is silicon oxide.

[0044] In this embodiment, the layer to be etched further includes an underlying hard mask layer 201 . The underlying hard mask layer 201 is located on the substrate 200 , and the first mask layer 202 is located on the underlying hard mask layer 201 .

[0045] The function of the bottom hard mask layer 201 is that the bottom hard mask layer 201 can be used as a stop layer for the subsequent planarization of the conductive film; the material of the bottom hard mask layer 201 is a hard mask material, so when the conductive opening is subsequently etched, the etching loss of the bottom hard mask layer 201 is small, so in the process of transferring the pattern in the bottom hard mask layer 201 to the substrate 200, the stability of the pattern transfer is higher.

[0046] The bottom hard mask layer 201 may be a single-layer structure or a multi-layer structure, and the material of the bottom hard mask layer 201 includes one or more combinations of silicon oxide, titanium nitride, tungsten carbide, silicon carbide, silicon carbide nitride, silicon oxycarbide, aluminum oxide or aluminum nitride. In this embodiment, the material of the bottom hard mask layer 201 is titanium nitride.

[0047] Please continue to refer to Figure 6 and Figure 7 , forming a first core layer 210 on the surface of the layer to be etched.

[0048] The first core layer 210 and the subsequently formed second core layer are used to transfer the pattern of the conductive opening to the layer to be etched, and the conductive opening provides space for forming a conductive structure.

[0049] Specifically, in this embodiment, the first core layer 210 is formed on the surface of the first mask layer 202 .

[0050] In this embodiment, the first core layer 210 extends in a first direction X.

[0051] In this embodiment, the method for forming the first core layer 210 includes: forming a first core material layer (not shown) on the layer to be etched; forming an initial first core patterned layer (not shown) on the first core material layer; forming a photoresist layer (not shown) on the initial first core patterned layer; exposing the photoresist layer using an extreme ultraviolet light source to form a first core photolithography opening (not shown) in the photoresist layer that exposes a portion of the initial first core patterned layer; after forming the first core photolithography opening, etching the initial first core patterned layer using the photoresist layer as a mask until the top surface of the first core material layer is exposed to form a first core patterned layer; etching the first core material layer using the first core patterned layer as a mask to form the first core layer 210.

[0052] The material of the first core layer 210 includes one or more combinations of amorphous silicon, polycrystalline silicon, single crystal silicon, silicon oxide, silicon nitride, amorphous carbon, silicon carbide and silicon oxycarbide.

[0053] Next, a first sidewall is formed on the sidewall surface of the first core layer 210, and a first partition structure is formed in the first core layer 210. For details on the process of forming the first sidewall and the first partition structure, please refer to Figures 8 to 12 .

[0054] Please refer to Figure 8 , Figure 8 and Figure 7 In the same viewing direction, a first sacrificial layer 221 is formed on the side wall and top surface of the first core layer 210, and the surface of the layer to be etched; a first isolated opening patterned layer 222 is formed on the surface of the first sacrificial layer 221, and the first isolated opening patterned layer 222 has a first opening 223, the first opening 223 spans the first core layer 210, and the first opening 223 exposes a portion of the surface of the first sacrificial layer 221.

[0055] The material of the first sacrificial layer 221 includes: a combination of one or more of spin-on carbon, spin-on glass, spin-on organic matter, spin-on metal oxide, silicon oxide, silicon oxynitride and amorphous carbon.

[0056] In this embodiment, the material of the first sacrificial layer 221 is spin-on organic matter.

[0057] The material of the first isolation opening patterning layer 222 includes photoresist.

[0058] In this embodiment, an anti-reflection layer (not shown) is further provided between the first sacrificial layer 221 and the first isolation opening patterned layer 222 .

[0059] The material of the anti-reflection layer includes one or more combinations of a silicon-containing organic anti-reflection layer (Si-ARC) and a bottom anti-radiation layer (BARC).

[0060] In the present embodiment, the process of forming the first sacrificial layer 221 includes a spin coating process.

[0061] In other embodiments, the process of forming the first sacrificial layer includes a deposition process, such as a chemical vapor deposition process, a physical vapor deposition process, or an atomic layer deposition process.

[0062] Please refer to Fig. 9 and Fig.10 , Fig.10 yes Fig. 9 The schematic diagram of the cross-sectional structure along the A1-A2 direction shows that the first isolation opening patterned layer 222 is used as a mask to etch the first sacrificial layer 221 and the first core layer 210 until the surface of the layer to be etched is exposed, and a first isolation opening 211 is formed in the first core layer 210, and the bottom of the first isolation opening 211 exposes the surface of the layer to be etched, and in the second direction Y, the first isolation opening 211 penetrates the first core layer 210.

[0063] The second direction Y and the first direction X are perpendicular to each other.

[0064] The first partition opening 211 provides space for subsequently forming a first partition structure.

[0065] In this embodiment, the process of etching the first sacrificial layer 221 and the first core layer 210 includes at least one of a dry etching process and a wet etching process.

[0066] In this embodiment, after the first isolation opening 211 is formed, the first sacrificial layer 221 and the first isolation opening patterning layer 222 are removed.

[0067] Please refer to Fig.11 and Fig.12 , Fig.12 yes Fig.11 In the cross-sectional structural diagram along the A1 - A2 direction, a first partition structure 231 is formed in the first core layer 210 ; and a first side wall 232 is formed on the side wall surface of the first core layer 210 .

[0068] Specifically, in this embodiment, the method for forming the first side wall 232 and the first partition structure 231 includes: forming a first material layer (not shown) on the surface of the layer to be etched, the surface of the first core layer 210, and in the first partition opening 211, the first material layer filling the first partition opening; etching the first material layer until the surface of the layer to be etched and the top surface of the first core layer 210 are exposed.

[0069] The process of forming the first material layer includes a deposition process, such as a chemical vapor deposition process, a physical vapor deposition process, or an atomic layer deposition process.

[0070] The process of etching the first material layer includes an etch-back process.

[0071] In this embodiment, the etch-back process includes an anisotropic dry etching process.

[0072] In other embodiments, the first side wall and the first partition structure are formed separately. Specifically, the method for forming the first partition structure also includes: after forming the first partition opening, forming a first partition material layer on the surface of the first sacrificial layer and in the first partition opening; flattening the first partition material layer and the first sacrificial layer until the top surface of the first core layer is exposed. The method for forming the first side wall includes: after forming the first partition structure, removing the first sacrificial layer; after removing the first sacrificial layer, forming a first side wall material layer on the surface of the layer to be etched, the surface of the first core layer, and the surface of the first partition structure; etching back the first side wall material layer until the surface of the layer to be etched, the top surface of the first core layer, and the top surface of the first partition structure are exposed to form the first side wall. Thus, the material selection of the first partition structure and the first side wall is freer, that is, the first partition structure and the first side wall can select different materials.

[0073] In this embodiment, the first side wall 232 and the first partition structure 231 are made of the same material.

[0074] The material of the first partition structure 231 includes: a combination of one or more of low temperature oxide, titanium oxide, silicon oxide, silicon nitride, silicon carbide and aluminum oxide.

[0075] The material of the first partition structure 231 is different from the material of the second partition structure formed subsequently.

[0076] In this embodiment, the material of the first partition structure 231 is titanium oxide.

[0077] Next, after forming the first sidewall 232, a second core layer is formed on the surface of the to-be-etched layer, wherein the first sidewall 232 separates the first core layer 210 and the second core layer. Figures 13 to 15 .

[0078] Please refer to Fig.13 and Fig.14 , Fig.14 yes Fig.13In the schematic diagram of the cross-sectional structure along the B1-B2 direction, a second core material layer 240 is formed on the surface of the layer to be etched, the surface of the first core structure 210, the surface of the first side wall 232, and the surface of the first partition structure 231; a second core graphic layer 241 is formed on the surface of the second core material layer 240, and the second core graphic layer extends along the first direction X 241 and covers a portion of the surface of the second core material layer 240 adjacent to the first side wall 232.

[0079] The material of the second core material layer 240 includes: a combination of one or more of spin-on carbon, spin-on glass, spin-on organic matter, spin-on metal oxide, and amorphous carbon.

[0080] The second core material layer 240 provides material for the subsequent formation of the second core layer. Accordingly, the material of the second core layer includes: a combination of one or more of spin-coated carbon, spin-coated glass, spin-coated organic matter, spin-coated metal oxide, and amorphous carbon.

[0081] In this embodiment, the material of the second core material layer 240 is spin-coated carbon. Accordingly, the material of the second core layer is spin-coated carbon.

[0082] The material of the second core patterning layer 241 includes photoresist.

[0083] In this embodiment, the surface of the second core material layer 240 further has an anti-reflection layer (not shown).

[0084] The material of the anti-reflection layer includes one or more combinations of a silicon-containing organic anti-reflection layer and a bottom anti-radiation layer.

[0085] In the present embodiment, the process of forming the second core material layer 240 includes a spin coating process.

[0086] In other embodiments, the process of forming the second core material layer includes a deposition process, such as a chemical vapor deposition process, a physical vapor deposition process, or an atomic layer deposition process.

[0087] Please refer to Fig.15 and Fig.16 , Fig.16 yes Fig.15 The schematic diagram of the cross-sectional structure along the B1-B2 direction shows that the second core material layer 240 is etched using the second core patterned layer 241 as a mask until the surface of the layer to be etched is exposed, and a second core layer 242 is formed on the surface of the layer to be etched, and the first side wall 232 separates the first core layer 210 and the second core layer 242.

[0088] In this embodiment, the process of etching the second core material layer 240 includes at least one of a dry etching process and a wet etching process.

[0089] In this embodiment, after the second core layer 242 is formed, the second core patterned layer 241 is removed.

[0090] Next, a second partition structure is formed in the second core layer 242. For details on the process of forming the second partition structure, please refer to Figures 17 to 31 .

[0091] Please refer to Fig.17 , Fig.17 and Fig.16 In the same viewing direction, a second spacer material layer 250 is formed on the top surface and side wall surfaces of the first core layer 210 , the surface of the first spacer 232 , the top surface and side wall surfaces of the second core layer 242 , and the surface of the layer to be etched.

[0092] The second spacer material layer 250 provides material for subsequently forming a second spacer.

[0093] By forming the second side wall material layer 250, the first core layer 210, the second core layer 242, the first side wall 232, and the first partition structure 231 can be better protected from damage during subsequent deposition, etching and other processes, and the second core layer 242 and the second sacrificial layer can be isolated from each other, thereby reducing the impact of the subsequent process of forming the second sacrificial layer on the second core layer 242.

[0094] In this embodiment, the material of the second side wall material layer 250 is different from the material of the second core layer 242, and the material of the second side wall material layer 250 is also different from the material of the second sacrificial layer formed subsequently. Therefore, the second side wall material layer 250 can better isolate the second core layer 242 from the second sacrificial layer.

[0095] The material of the second spacer material layer 250 includes: a combination of one or more of low temperature oxide, titanium oxide, silicon oxide, silicon nitride, silicon carbide and aluminum oxide.

[0096] In this embodiment, the material of the second spacer material layer 250 is silicon oxide.

[0097] In other embodiments, the second spacer material layer is not formed.

[0098] Please refer to Fig.18 and Fig.19 , Fig.19 yes Fig.18In the schematic diagram of the cross-sectional structure along the C1-C2 direction, a second sacrificial layer 260 is formed on the top surface of the first core layer 210, the surface of the first side wall 232, the top surface and side wall surface of the second core layer 242, and the surface of the layer to be etched; a second isolation opening patterned layer 261 is formed on the surface of the second sacrificial layer 260, and the second isolation opening patterned layer 261 has a second opening 262, the second opening 262 spans the second core layer 242, and the second opening 262 exposes a portion of the surface of the second sacrificial layer 260.

[0099] The second sacrificial layer 260, on the one hand, provides a flatter surface for forming the second isolation opening patterned layer 261, so as to improve the graphic accuracy of the formed second isolation opening patterned layer 261 and increase the stability of graphic transfer; on the other hand, it can protect the first side wall 232, the first partition structure 231, the first core layer 210, and the second core layer 242 in the subsequent process of forming the initial partition structure, thereby reducing the damage to the first side wall 232, the first partition structure 231, the first core layer 210, and the second core layer 242 caused by processes such as etching.

[0100] The material of the second sacrificial layer 260 includes: one or more of spin-on carbon, spin-on glass, spin-on organic matter, spin-on metal oxide, silicon oxide, silicon oxynitride and amorphous carbon.

[0101] In this embodiment, the material of the second sacrificial layer 260 is spin-on carbon.

[0102] The material of the second isolation opening patterning layer 261 includes photoresist.

[0103] In this embodiment, an anti-reflection layer (not shown) is further provided between the second sacrificial layer 260 and the second isolation opening patterned layer 261 .

[0104] The material of the anti-reflection layer includes one or more combinations of a silicon-containing organic anti-reflection layer and a bottom anti-radiation layer.

[0105] In the present embodiment, the process of forming the second sacrificial layer 260 includes a spin coating process.

[0106] In other embodiments, the process of forming the second sacrificial layer includes a deposition process, such as a chemical vapor deposition process, a physical vapor deposition process, or an atomic layer deposition process.

[0107] Please refer to Fig. 20 and Fig. 22 , Fig.21 yes Fig. 20 Schematic diagram of the cross-sectional structure along the C1-C2 direction, Fig. 22 yes Fig. 20The cross-sectional structural schematic diagram along the D1-D2 direction shows that the second isolation opening patterned layer 261 is used as a mask to etch the second sacrificial layer 260 and the second core layer 242 until the surface of the layer to be etched is exposed, and a second isolation opening 263 is formed in the second core layer 242.

[0108] Specifically, the bottom of the second isolating opening 263 exposes the surface of the layer to be etched, and in the vertical direction (in the second direction Y) of the extension direction of the second core layer 242, the second isolating opening 263 penetrates the second core layer 242, and the side wall surface of the second isolating opening 263 also exposes the surface of the first side wall 232.

[0109] The second partition opening 263 provides space for subsequently forming a second partition structure.

[0110] In this embodiment, the process of etching the second sacrificial layer 260 and the second core layer 242 includes at least one of a dry etching process and a wet etching process.

[0111] In this embodiment, after the second isolation opening 263 is formed, the second isolation opening patterning layer 261 is removed.

[0112] In this embodiment, since the second spacer material layer 250 is formed, before etching the second core layer 242 using the second isolation opening patterning layer 261 as a mask, the second spacer material layer 250 between the bottom of the second opening 262 and the top surface of the second core layer 242 is removed.

[0113] The process of removing the second spacer material layer 250 between the bottom of the second opening 262 and the top surface of the second core layer 242 includes an anisotropic dry etching process.

[0114] Please refer to Figure 23 to Figure 26 , Fig.24 yes Fig.23 Schematic diagram of the cross-sectional structure along the B1-B2 direction, Fig.25 yes Fig.23 Schematic diagram of the cross-sectional structure along the D1-D2 direction; Fig.26 yes Fig.23 The schematic diagram of the cross-sectional structure along the C1-C2 direction shows that a second partition material layer (not shown) is formed on the surface of the second sacrificial layer 260 and in the second partition opening 263, and the surface of the second partition material layer is higher than the surface of the second sacrificial layer 260; the second partition material layer is flattened until the surface of the second sacrificial layer 260 is exposed to form an initial second partition structure 270.

[0115] The process of forming the second partition material layer includes a spin coating process or a deposition process. The deposition process is, for example, a chemical vapor deposition process, a physical vapor deposition process, or an atomic layer deposition process.

[0116] The process of planarizing the second partition material layer includes an etch-back process or a chemical mechanical polishing process, etc. The etch-back process is implemented by, for example, at least one of a dry etching process and a wet etching process.

[0117] The initial second partition structure 270 provides material for subsequently forming a second partition structure.

[0118] The material of the initial second partition structure 270 includes: a combination of one or more of low temperature oxide, titanium oxide, silicon oxide, silicon nitride, silicon carbide and aluminum oxide. Correspondingly, the material of the second partition structure includes: a combination of one or more of low temperature oxide, titanium oxide, silicon oxide, silicon nitride, silicon carbide and aluminum oxide.

[0119] In this embodiment, the material of the initial second partition structure 270 is silicon oxide. Accordingly, the material of the second partition structure is silicon oxide.

[0120] In this embodiment, after the initial second partition structure 270 is formed, the second sacrificial layer 260 is removed.

[0121] In this embodiment, the process of removing the second sacrificial layer 260 includes at least one of a dry etching process and a wet etching process.

[0122] Please refer to Fig. 27 , Fig. 27 and Fig.25 In the same viewing direction, an initial protective layer 280 is formed on the surface of the initial second partition structure 270, the top surface and side wall surface of the second core layer 242, the surface of the first side wall 232, and the top surface of the first core layer 210, and the surface of the initial protective layer 280 is higher than or flush with the top surface of the initial second partition structure 270.

[0123] On the one hand, the initial protection layer 280 can protect the first core layer 210, the first partition structure 231, and the first sidewall 232 during the subsequent etching process of forming the second partition structure 271, thereby reducing the damage caused by the etching process to the first core layer 210, the first partition structure 231, and the first sidewall 232. On the other hand, since the surface of the initial protection layer 280 is higher than or flush with the top surface of the initial second partition structure 270, it can provide an etching margin for the etching process when the initial second partition structure 270 is subsequently etched to form the second partition structure.

[0124] In this embodiment, the process of forming the initial protection layer 280 includes a spin coating process.

[0125] In other embodiments, the process of forming the initial protection layer 280 includes a deposition process, such as a chemical vapor deposition process, a physical vapor deposition process, or an atomic layer deposition process.

[0126] In this embodiment, the material of the initial protection layer 280 includes spin-on silicon oxide.

[0127] Please refer to Figure 28 to Figure 31 , Fig.29 yes Fig.28 Schematic diagram of the cross-sectional structure along the B1-B2 direction, Fig.30 yes Fig.28 Schematic diagram of the cross-sectional structure along the D1-D2 direction, Fig.31 yes Fig.28 The schematic diagram of the cross-sectional structure along the C1-C2 direction shows that the initial protective layer 280 and the initial second partition structure 270 are etched until the top surface of the first core layer 210 is exposed, a protective layer 281 is formed on the surface of the layer to be etched, and a second partition structure 271 is formed in the second partition opening 263.

[0128] The second partition structure 271 is located in the second core layer 242 , and the second partition structure 271 passes through the second core layer 242 along the second direction Y.

[0129] The protection layer 281 is also located on the sidewall surface of the first sidewall 232 and at least a portion of the sidewall surface of the second core layer 242 .

[0130] In this embodiment, the initial protection layer 280 and the initial second partition structure 270 are etched in a back-etching process, and the back-etching process includes at least one of a dry etching process and a wet etching process.

[0131] In summary, in this embodiment, a first partition structure 231 and a second partition structure 271 are formed. The first partition structure 231 is located in the first core layer 210 , and the second partition structure 271 is located in the second core layer 242 .

[0132] Since the first partition structure 231 and the second partition structure 271 are formed, the first partition structure 231 is located in the first core layer 210, and the second partition structure 271 is located in the second core layer 242. Therefore, the first core layer 210 is isolated by the first partition structure 231, and the second core layer 242 is isolated by the second partition structure 271. When the layer to be etched is subsequently etched to form a conductive opening, the first partition structure 231 shields the conductive openings transmitted by the first core layer 210, so that the end spacing M1 (such as Fig.32 The width of the conductive openings 271 is consistent with the width of the first partition structure 231. Similarly, the end spacing M2 (as shown in FIG. 24 ) between adjacent conductive openings in the conductive opening pattern transmitted by the second core layer 242 can be made to be equal to the width of the first partition structure 231. Fig.32 As shown in FIG. 2 , the width of the first partition structure 231 and the second partition structure 271 is consistent. Therefore, by defining the shapes of the first partition structure 231 and the second partition structure 271, the end spacing of adjacent conductive structures is not limited by the first sidewall 232 and can be smaller and in line with the expected goal.

[0133] At the same time, the end spacing (spacing M1, spacing M2) of adjacent conductive structures is consistent with the expected target, so the length of the corresponding conductive structure can be increased, thereby increasing the surface area of ​​the conductive structure. Therefore, when a conductive plug connected to the conductive structure is subsequently formed, the conductive plug can contact the conductive structure at a larger range of positions, that is, the conductive plug has a larger range of landing points, thereby increasing the process window for forming the conductive plug and reducing the process difficulty of forming the conductive plug.

[0134] Moreover, in the photolithography process, in order to avoid the defects of the end connection of the pattern, the limit size of the end spacing of adjacent patterns is usually limited, resulting in more restrictions when designing the end spacing of adjacent patterns, and the end spacing of adjacent patterns is formed to be larger. In this embodiment, since the end spacing of adjacent conductive structures is defined by the first partition structure 231, the end spacing of the conductive structure is not limited by the end connection defects in the photolithography process, which is conducive to forming a conductive structure with a smaller end spacing to meet the expected goal.

[0135] In another embodiment, the second partition structure is formed, and the first partition structure is not formed. Similarly, by defining the shape of the second partition structure, the end spacing of adjacent conductive structures defined by the second core layer and the second partition structure is not limited by the first sidewall, and can be smaller and consistent with the expected goal.

[0136] In another embodiment, the first partition structure is formed, and the second partition structure is not formed. Similarly, by defining the shape of the first partition structure, the end spacing of adjacent conductive structures defined by the first core layer and the pattern of the first partition structure is not limited by the first sidewall, and can be smaller and consistent with the expected goal.

[0137] In this embodiment, while etching the initial protective layer 280 and the initial second partition structure 270, the second side wall material layer 250 higher than the top surface of the first core layer 210 is removed, and a second side wall 251 is formed on the side wall surface of the first side wall 232, the side wall surface of the second partition structure 271, and part of the side wall surface of the second core layer 242.

[0138] Please refer to Fig.32 After forming the protection layer 281 and after forming the first partition structure 231 and the second partition structure 271 , the first core layer 210 and the second core layer 242 are removed.

[0139] It should be noted that, in another embodiment, since the first partition structure is not formed, the removal of the first core layer and the second core layer after the first partition structure and the second partition structure are formed means: after the second partition structure is formed, the first core layer and the second core layer are removed. Similarly, in another embodiment, since the second partition structure is not formed, the removal of the first core layer and the second core layer after the first partition structure and the second partition structure are formed means: after the first partition structure is formed, the first core layer and the second core layer are removed.

[0140] In this embodiment, the process of removing the first core layer 210 and the second core layer 242 includes at least one of a dry etching process and a wet etching process.

[0141] Next, the protective layer 281, the first sidewall 232, the first partition structure 231 and the second partition structure 271 are used as masks to etch the layer to be etched, and a plurality of conductive openings are formed in the layer to be etched. For the specific process of forming the plurality of conductive openings, please refer to Figure 33 to Figure 35 .

[0142] Please refer to Fig.33 and Fig.34 , Fig.34 yes Fig.33The schematic diagram of the cross-sectional structure along the B1-B2 direction shows that after removing the first core layer 210 and the second core layer 242, the first mask layer 202 is etched using the protective layer 281, the first side wall 232, the first partition structure 231 and the second partition structure 271 as masks until the surface of the underlying hard mask layer 201 is exposed, and a plurality of first conductive mask openings 301 are formed in the first mask layer 202.

[0143] In this embodiment, after forming a plurality of first conductive mask openings 301, the protective layer 281, the first sidewall 232, the first partition structure 231, and the second partition structure 271 are removed. In other embodiments, after forming a plurality of first conductive mask openings, the protective layer, the first sidewall, the first partition structure, and the second partition structure may not be removed, and in subsequent processes, the substrate is continuously etched using the protective layer, the first sidewall, the first partition structure, and the second partition structure as masks.

[0144] In this embodiment, the first mask layer 202 is etched by a dry etching process; in other embodiments, the first mask layer may be etched by a wet etching process, or a combination of a dry etching process and a wet etching process.

[0145] Please refer to Fig.35 , Fig.35 and Fig.34 The viewing direction is the same, and the first mask layer 202 is used as a mask to etch the bottom hard mask layer 201 and the substrate 200 to form a plurality of conductive openings 302 in the substrate 200.

[0146] The process of etching the bottom hard mask layer 201 and the substrate 200 using the first mask layer 202 as a mask includes one of a dry etching process and a wet etching process or a combination of the two.

[0147] In this embodiment, after forming multiple conductive openings 302, the first mask layer 202 and the underlying hard mask layer 201 are not removed first; in other embodiments, after forming multiple conductive openings, part of the mask layer can be removed first, for example, the first mask layer can be removed first.

[0148] Please refer to Fig.36 and Fig.37 , Fig.37 yes Fig.36 In the cross-sectional structural diagram along the B1 - B2 direction, a conductive structure 310 is formed in each conductive opening 302 .

[0149] In this embodiment, the method for forming the conductive structure 310 includes: forming a conductive film (not shown) in the plurality of conductive openings 302, wherein the surface of the conductive film is higher than the first mask layer 202; planarizing the conductive film, the first mask layer 202 and the underlying hard mask layer 201 until the substrate 200 is exposed, thereby forming a conductive structure 310 in each conductive opening 302.

[0150] The material of the conductive structure 310 includes one or more combinations of copper, aluminum, tungsten, cobalt, tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, ruthenium nitride and graphene. In this embodiment, the conductive structure 310 is made of copper and tantalum nitride, and tantalum nitride serves as a barrier layer for copper diffusion.

[0151] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that: include: Providing a layer to be etched; Forming a first core layer on the surface of the layer to be etched; forming a first side wall on the side wall surface of the first core layer; After forming the first sidewall spacer, forming a second core layer on the surface of the layer to be etched, wherein the first sidewall spacer separates the first core layer and the second core layer; At least one of a first partition structure and a second partition structure is formed, wherein the first partition structure is located in the first core layer and the second partition structure is located in the second core layer.

2. The method for forming a semiconductor structure according to claim 1, wherein: The method for forming the first partition structure includes: before forming the first side wall, etching the first core layer, forming a first partition opening in the first core layer, the bottom of the first partition opening exposes the surface of the layer to be etched, and in the direction perpendicular to the extension direction of the first core layer, the first partition opening penetrates the first core layer.

3. The method for forming a semiconductor structure according to claim 2, wherein: The method for forming the first side wall and the first partition structure includes: forming a first material layer on the surface of the layer to be etched, the surface of the first core layer, and in the first partition opening, the first material layer filling the first partition opening; etching the first material layer until the surface of the layer to be etched and the top surface of the first core layer are exposed.

4. The method for forming a semiconductor structure according to claim 2, wherein: The method for forming the first isolation opening includes: forming a first sacrificial layer on the side wall surface and the top surface of the first core layer, and the surface of the layer to be etched; forming a first isolation opening patterned layer on the surface of the first sacrificial layer, the first isolation opening patterned layer having a first opening, the first opening spanning the first core layer, and the first opening exposing a portion of the surface of the first sacrificial layer; using the first isolation opening patterned layer as a mask, etching the first sacrificial layer and the first core layer until the surface of the layer to be etched is exposed.

5. The method for forming a semiconductor structure according to claim 4, wherein: The method for forming the first partition structure also includes: forming a first partition material layer on the surface of the first sacrificial layer and in the first partition opening; and planarizing the first partition material layer and the first sacrificial layer until the top surface of the first core layer is exposed.

6. The method for forming a semiconductor structure according to claim 1, wherein: The method for forming the second partition structure includes: forming a second partition opening in the second core layer, the bottom of the second partition opening exposes the surface of the layer to be etched, the second partition opening penetrates the second core layer in a direction perpendicular to the extension direction of the second core layer, and the side wall surface of the second partition opening also exposes the surface of the first side wall; forming the second partition structure in the second partition opening.

7. The method for forming a semiconductor structure according to claim 6, wherein: The method for forming the second isolation opening includes: forming a second sacrificial layer on the top surface of the first core layer, the surface of the first side wall, the top surface and side wall surface of the second core layer, and the surface of the layer to be etched; forming a second isolation opening patterned layer on the surface of the second sacrificial layer, the second isolation opening patterned layer having a second opening, the second opening spanning the second core layer, and the second opening exposing a portion of the surface of the second sacrificial layer; using the second isolation opening patterned layer as a mask, etching the second sacrificial layer and the second core layer until the surface of the layer to be etched is exposed.

8. The method for forming a semiconductor structure according to claim 7, wherein: The method for forming a second partition structure in the second partition opening includes: forming a second partition material layer on the surface of the second sacrificial layer and in the second partition opening, the surface of the second partition material layer being higher than the surface of the second sacrificial layer; flattening the second partition material layer until the surface of the second sacrificial layer is exposed to form an initial second partition structure.

9. The method for forming a semiconductor structure according to claim 8, wherein: The method for forming a second partition structure in the second partition opening also includes: forming an initial protective layer on the surface of the initial second partition structure, the top surface and side wall surface of the second core layer, the surface of the first side wall, and the top surface of the first core layer, wherein the surface of the initial protective layer is higher than or flush with the top surface of the initial second partition structure; etching the initial protective layer and the initial second partition structure until the top surface of the first core layer is exposed.

10. The method for forming a semiconductor structure according to claim 9, wherein: Also includes: A second side wall is formed on the side wall surface of the first side wall, the side wall surface of the second partition structure, and the side wall surface of part of the second core layer.

11. The method for forming a semiconductor structure according to claim 10, wherein: The method for forming the second side wall includes: before forming the second isolation opening, forming a second side wall material layer on the top surface and side wall surface of the first core layer, the first side wall surface, the top surface and side wall surface of the second core layer, and the surface of the layer to be etched; before etching the second core layer using the second isolation opening patterning layer as a mask, removing the second side wall material layer between the bottom of the second opening and the top surface of the second core layer; while etching the initial protective layer and the initial second isolation structure, removing the second side wall material layer above the top surface of the first core layer.

12. The method for forming a semiconductor structure according to claim 1, wherein: Also includes: Forming a protective layer on the surface of the layer to be etched, wherein the protective layer is also located on the sidewall surface of the first sidewall and at least a part of the sidewall surface of the second core layer; After forming the protective layer and after forming the first partition structure and the second partition structure, the first core layer and the second core layer are removed; after removing the first core layer and the second core layer, the layer to be etched is etched using the protective layer, the first side wall, the first partition structure and the second partition structure as masks to form a plurality of conductive openings in the layer to be etched; and a conductive structure is formed in each of the conductive openings.

13. The method for forming a semiconductor structure according to claim 1, wherein: The material of the first core layer includes: amorphous silicon, polycrystalline silicon, single crystal silicon, silicon oxide, silicon nitride, amorphous carbon, silicon carbide and silicon oxycarbide or a combination thereof.

14. The method for forming a semiconductor structure according to claim 1, wherein: The material of the second core layer includes one or more of spin-coated carbon, spin-coated glass, spin-coated organic matter, spin-coated metal oxide, and amorphous carbon.

15. The method for forming a semiconductor structure according to claim 1, wherein: The material of the first partition structure includes: a combination of one or more of low temperature oxide, titanium oxide, silicon oxide, silicon nitride, silicon carbide and aluminum oxide.

16. The method for forming a semiconductor structure according to claim 1, wherein: The material of the second partition structure includes: a combination of one or more of low temperature oxide, titanium oxide, silicon oxide, silicon nitride, silicon carbide and aluminum oxide.

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