Diode and its semiconductor structure

Abstract

The present disclosure relates to a diode and a semiconductor structure thereof. The diode is implemented in a semiconductor structure and includes a substrate, a first conductor, a second conductor, a third conductor and a fourth conductor. The substrate includes a first doped region and a second doped region, wherein the first doped region is used as a first electrode of the diode, and the second doped region is used as a second electrode of the diode. The first conductor is located in a first conductor layer of the semiconductor structure and connected to the first doped region. The second conductor is located in a second conductor layer of the semiconductor structure and connected to the first conductor. The third conductor is located in the first conductor layer of the semiconductor structure and connected to the second doped region. The fourth conductor is located in the second conductor layer of the semiconductor structure and connected to the third conductor. In a side view of the semiconductor structure, the overlapping area of ​​the first conductor and the third conductor is greater than the overlapping area of ​​the second conductor and the fourth conductor.

Description

Technical Field

[0001] The present invention relates to a diode, and in particular to a diode with low electromagnetic interference (EMI) and a semiconductor structure thereof. Background Art

[0002] Figure 1 is a functional block diagram of an existing chip. The chip 100 includes an internal circuit 110, an internal circuit 120, a diode 130, a diode 140, and an output / input pad 150. The internal circuit 110 and the internal circuit 120 are responsible for the functions of the chip 100, and the internal circuit 120 receives a signal or outputs a signal through the output / input pad 150. The diode 130 is connected in series between the voltage source VDD and the output / input pad 150, and the diode 140 is connected in series between the output / input pad 150 and the ground level. The diode 130 and the diode 140 can prevent electrostatic discharge (ESD) from damaging the internal circuit 120.

[0003] As integrated circuits become more powerful and operate faster, the electromagnetic interference problem on the chip 100 becomes more and more serious. Generally speaking, in solving the electromagnetic interference problem, the closer to the source of the signal, the better the effect and the lower the cost. Therefore, designing low electromagnetic interference diodes has become an important issue in the field of technology. Summary of the invention

[0004] In view of the shortcomings of the prior art, an object of the present invention is to provide a diode and a semiconductor structure thereof.

[0005] The present invention discloses a diode, which is applied to a semiconductor structure, and includes a substrate, a first conductor structure, and a second conductor structure. The substrate includes a first doped region and a second doped region, wherein the first doped region is used as a first electrode of the diode, the second doped region is used as a second electrode of the diode, and the dopant of the first doped region is different from the dopant of the second doped region. The first conductor structure is located above the first doped region and connected to the first doped region, and has a plurality of first conductors, wherein the first conductors are distributed in a plurality of conductor layers of the semiconductor structure, and the first conductors are interconnected by a plurality of guide holes. The second conductor structure is located above the second doped region and connected to the second doped region, and has a plurality of second conductors, wherein the second conductors are distributed in the conductor layers of the semiconductor structure, and the second conductors are interconnected by a plurality of guide holes. A side view of the first conductor structure presents a step shape.

[0006] The present invention further discloses a diode, which is applied to a semiconductor structure, and includes a substrate, a first conductor, a second conductor, a third conductor, and a fourth conductor. The substrate includes a first doped region and a second doped region, wherein the first doped region is used as a first electrode of the diode, the second doped region is used as a second electrode of the diode, and the dopant of the first doped region is different from the dopant of the second doped region. The first conductor is located in a first conductor layer of the semiconductor structure and connected to the first doped region. The second conductor is located in a second conductor layer of the semiconductor structure and connected to the first conductor. The third conductor is located in the first conductor layer of the semiconductor structure and connected to the second doped region. The fourth conductor is located in the second conductor layer of the semiconductor structure and connected to the third conductor. In a side view of the semiconductor structure, the overlapping area of ​​the first conductor and the third conductor is greater than the overlapping area of ​​the second conductor and the fourth conductor.

[0007] The diode and the semiconductor structure thereof of the present invention have a smaller current loop area, and therefore, compared with the conventional technology, the diode and the semiconductor structure thereof of the present invention generate less electromagnetic interference.

[0008] The features, practical operation and effects of the present invention are described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 It is a functional block diagram of an existing chip;

[0010] Figure 2 The layout of the diode on the substrate according to one embodiment of the present invention;

[0011] Figure 3 A semiconductor structure according to an embodiment of the present invention is shown;

[0012] Figure 4A is a first cross-sectional view of a diode according to an embodiment of the present invention;

[0013] Figure 4B is a second cross-sectional view of a diode according to an embodiment of the present invention;

[0014] Figure 5A , Figure 5B , Figure 5C , Figure 5D , Figure 5E are multiple top views of a diode according to an embodiment of the present invention;

[0015] Figure 6 is a first cross-sectional view of a diode according to another embodiment of the present invention;

[0016] Fig. 7A , Figure 7B , Figure 7C , Fig.7D , Fig. 7E are multiple top views of a diode according to another embodiment of the present invention;

[0017] Figure 8 The layout of the diodes on the substrate according to another embodiment of the present invention;

[0018] Fig. 9A , Fig. 9B , Fig. 9C , Fig.9D , Fig.9E are multiple top views of a diode according to another embodiment of the present invention; and

[0019] Fig.10 The shape of the conductor according to another embodiment of the present invention is shown. DETAILED DESCRIPTION

[0020] The technical terms used in the following descriptions refer to the customary terms in the technical field. If some terms are explained or defined in this specification, the interpretation of these terms shall be based on the explanation or definition in this specification.

[0021] Figure 2 FIG. 2 is a layout of a diode on a substrate according to an embodiment of the present invention. A doping region 210 and a doping region 220 are provided on a substrate 200. The doping region 210 is an N-type doping region (i.e., the cathode of the diode), and the doping region 220 is a P-type doping region (i.e., the anode of the diode). In other words, the dopant in the doping region 210 is different from the dopant in the doping region 220. In some embodiments, the doping region 210 and the doping region 220 are substantially parallel to each other.

[0022] Figure 3 The semiconductor structure of one embodiment of the present invention is shown. The semiconductor structure 300 includes a substrate 200 and an oxide layer 310 stacked on the substrate 200 (in the z direction). There are multiple conductor layers 320 (including at least conductor layer 320-1, conductor layer 320-2 and conductor layer 320-3) inside the oxide layer 310. Adjacent conductor layers are connected through multiple vias 330, and the conductor layer 320-3 is connected to the substrate 200 through multiple contacts 340. In some embodiments, these conductor layers 320 are metal layer 1 (M1), metal layer 2 (M2), metal layer 3 (M3), ..., ultra-thick metal (UTM) layer and redistribution layer (RDL) from bottom to top (i.e., from close to the substrate 200 to far away from the substrate 200). Figure 2 It is a top view (xy plane) of the substrate 200 of the semiconductor structure 300 .

[0023] Figure 4Ais a first cross-sectional view (ie, side view, yz plane) of a diode according to an embodiment of the present invention (corresponding to Figure 2 Cross section A-A'), Figure 4B A second cross-sectional view of a diode according to an embodiment of the present invention (corresponding to Figure 2 Cross section B-B').

[0024] like Figure 4A As shown, there is a conductor structure 410 above the doped region 210, and the doped region 210 and the conductor structure 410 are connected through a plurality of contacts. In other words, the conductor structure 410 is the cathode of the diode. The conductor structure 410 includes a plurality of conductors 415 (i.e., conductor 415-1, conductor 415-2, conductor 415-3, conductor 415-4, ..., conductor 415-n, where n is an integer greater than 1). Adjacent conductors 415 are connected through a plurality of vias, so that the plurality of conductors 415 of the conductor structure 410 are substantially at the same potential. From bottom to top, the conductor 415-1 is located in the metal layer M1 (having a thickness of h1), the conductor 415-2 is located in the metal layer M2 (having a thickness of h2), the conductor 415-3 is located in the metal layer M3 (having a thickness of h3), the conductor 415-4 is located in the metal layer M4 (having a thickness of h4), ..., and the conductor 415-n is located in the metal layer Mn (having a thickness of hn). In some embodiments, conductors 415 - 1 to 415 - n are substantially equal in length (L).

[0025] like Figure 4B As shown, there is a conductor structure 420 above the doped region 220, and the doped region 220 and the conductor structure 420 are connected through multiple contacts. In other words, the conductor structure 420 is the anode of the diode. The conductor structure 420 includes multiple conductors 425 (i.e., conductor 425-1, conductor 425-2, conductor 425-3, conductor 425-4, ..., conductor 425-n). Adjacent conductors 425 are connected through multiple vias, so the multiple conductors 425 of the conductor structure 420 are substantially at the same potential. From bottom to top, conductor 425-1 is located in metal layer M1, conductor 425-2 is located in metal layer M2, conductor 425-3 is located in metal layer M3, conductor 425-4 is located in metal layer M4, ..., conductor 425-n is located in metal layer Mn. The conductor structure 420 is in a step-like shape: the conductor 425-1 is longer than the conductor 425-2 by a length d1, the conductor 425-2 is longer than the conductor 425-3 by a length d2, the conductor 425-3 is longer than the conductor 425-4 by a length d3, ..., and the conductor 425-n is the shortest conductor in the conductor structure 420. In other words, the conductors in the conductor structure 420 are not of equal length. Figure 4BAs shown, the ends of the conductors 425 in the conductor structure 420 located on the left side of the side view are substantially aligned, but the present invention is not limited to whether the same ends of the conductors are substantially aligned. In some embodiments, the lengths of the conductors 425-1, 425-2, 425-3, 425-4, ..., 425-n are in an arithmetic progression (i.e., d1 = d2 = d3).

[0026] like Figure 2 , Figure 3 and Figure 4A and Figure 4B As shown, the diode of the present invention is a three-dimensional structure, which is applied in a semiconductor structure 300 and includes doped regions 210 and 220 on a substrate 200 , and conductor structures 410 and 420 .

[0027] FIG. 5A to FIG. 5E The diagrams are multiple top views of a diode according to an embodiment of the present invention, respectively showing the relationship between each conductive layer and the doped region on the substrate. FIG. 5A to FIG. 5E Corresponds to Figure 4A and Figure 4B Cross-sectional view of .

[0028] Figure 5A The corresponding relationship between the conductor 415-1 and the conductor 425-1 on the metal layer M1 and the doped region 210 and the doped region 220 is shown. The conductor 415-1 completely covers the doped region 210 and is substantially parallel to the doped region 210. The conductor 425-1 completely covers the doped region 220 and is substantially parallel to the doped region 220. The conductor 415-1 and the conductor 425-1 are substantially parallel. The lengths of the conductors 415-1 and 425-1 are both L.

[0029] Figure 5B The corresponding relationship between the conductor 415-2 and the conductor 425-2 on the metal layer M2 and the doped region 210 and the doped region 220 is shown. The conductor 415-2 completely covers the doped region 210 and is substantially parallel to the doped region 210. The conductor 425-2 partially covers the doped region 220 and is substantially parallel to the doped region 220. The conductor 415-2 is substantially parallel to the conductor 425-2. The length of the conductor 415-2 is L, and the length difference between the conductor 415-2 and the conductor 425-2 is d1.

[0030] Figure 5CThe corresponding relationship between the conductor 415-3 and the conductor 425-3 on the metal layer M3 and the doped region 210 and the doped region 220 is shown. The conductor 415-3 completely covers the doped region 210 and is substantially parallel to the doped region 210. The conductor 425-3 partially covers the doped region 220 and is substantially parallel to the doped region 220. The conductor 415-3 is substantially parallel to the conductor 425-3. The length of the conductor 415-3 is L, and the length difference between the conductor 415-3 and the conductor 425-3 is d1+d2.

[0031] Figure 5D The corresponding relationship between the conductor 415-4 and the conductor 425-4 on the metal layer M4 and the doped region 210 and the doped region 220 is shown. The conductor 415-4 completely covers the doped region 210 and is substantially parallel to the doped region 210. The conductor 425-4 partially covers the doped region 220 and is substantially parallel to the doped region 220. The conductor 415-4 is substantially parallel to the conductor 425-4. The length of the conductor 415-4 is L, and the length difference between the conductor 415-4 and the conductor 425-4 is d1+d2+d3.

[0032] Figure 5E The corresponding relationship between the conductor 415-n and the conductor 425-n on the metal layer Mn and the doped region 210 and the doped region 220 is shown. The conductor 415-n completely covers the doped region 210 and is substantially parallel to the doped region 210. The conductor 425-n partially covers the doped region 220 and is substantially parallel to the doped region 220. The conductor 415-n is substantially parallel to the conductor 425-n. The length of the conductor 415-n is L.

[0033] Please also refer to Figure 4A and Figure 4B and FIG. 5A to FIG. 5E . Conductor 415-1 and conductor 425-1 substantially overlap each other in the yz plane (overlap area A1≈L*h1); conductor 415-2 and conductor 425-2 partially overlap in the yz plane (overlap area A2≈(L-d1)*h2); conductor 415-3 and conductor 425-3 partially overlap in the yz plane (overlap area A3≈(L-d1-d2)*h3); conductor 415-4 and conductor 425-4 partially overlap in the yz plane (overlap area A4≈(L-d1-d2-d3)*h4); and conductor 415-n and conductor 425-n partially overlap in the yz plane (the overlapping area is the smallest among all conductor layers). If the thickness of all conductor layers is substantially the same (i.e., h1, h2, h3, h4, hn are substantially equal), then A1>A2>A3>A4.

[0034] Because the conductor structure 420 is in a step-like shape (or called a retrograde-type), the overlapping area of ​​the conductor structure 410 and the conductor structure 420 on each conductor layer (on the yz plane) is different. More specifically, the overlapping area of ​​the conductor structure 410 and the conductor structure 420 on the metal layer M1 is the largest, the second largest on the metal layer M2, ..., and the smallest on the metal layer Mn. Such a design can reduce the current loop area between the anode and cathode of the diode, thereby reducing electromagnetic interference.

[0035] Figure 6 A first cross-sectional view of a diode according to another embodiment of the present invention (corresponding to Figure 2 Cross section A-A'). Figure 6 and Figure 4A The difference is that in Figure 6 In the embodiment of the present invention, the conductor structure 410 is in a step-like shape: the conductor 415-1 is longer than the conductor 415-2 by a length d4, the conductor 415-2 is longer than the conductor 415-3 by a length d5, the conductor 415-3 is longer than the conductor 415-4 by a length d6, ..., and the conductor 415-n is the shortest conductor in the conductor structure 410. In other words, the conductors in the conductor structure 410 are not of equal length. Figure 6 As shown, the ends of the conductors 415 in the conductor structure 410 located on the right side of the side view are substantially aligned, but the present invention is not limited to whether the same ends of the conductors are substantially aligned. In some embodiments, the lengths of the conductors 415-1, 415-2, 415-3, 415-4, ..., 415-n are in an arithmetic progression (i.e., d4=d5=d6).

[0036] 7A to 7E The diagrams are multiple top views of a diode according to another embodiment of the present invention, respectively showing the relationship between each conductive layer and the doped region on the substrate. 7A to 7E Corresponds to Figure 4B and Figure 6 Cross-sectional view of .

[0037] Fig. 7A The corresponding relationship between the conductor 415-1 and the conductor 425-1 on the metal layer M1 and the doped region 210 and the doped region 220 is shown. The conductor 415-1 completely covers the doped region 210 and is substantially parallel to the doped region 210. The conductor 425-1 completely covers the doped region 220 and is substantially parallel to the doped region 220. The conductor 415-1 and the conductor 425-1 are substantially parallel. The lengths of the conductors 415-1 and 425-1 are both L.

[0038] Figure 7BThe corresponding relationship between the conductor 415-2 and the conductor 425-2 on the metal layer M2 and the doped region 210 and the doped region 220 is shown. The conductor 415-2 partially covers the doped region 210 and is substantially parallel to the doped region 210. The conductor 425-2 partially covers the doped region 220 and is substantially parallel to the doped region 220. The conductor 415-2 is substantially parallel to the conductor 425-2. The length of the conductor 415-2 is (L-d4), and the length of the conductor 425-2 is (L-d1).

[0039] Figure 7C The corresponding relationship between the conductor 415-3 and the conductor 425-3 on the metal layer M3 and the doped region 210 and the doped region 220 is shown. The conductor 415-3 partially covers the doped region 210 and is substantially parallel to the doped region 210. The conductor 425-3 partially covers the doped region 220 and is substantially parallel to the doped region 220. The conductor 415-3 is substantially parallel to the conductor 425-3. The length of the conductor 415-3 is (L-d4-d5), and the length of the conductor 425-3 is (L-d1-d2).

[0040] Fig.7D The corresponding relationship between the conductor 415-4 and the conductor 425-4 on the metal layer M4 and the doped region 210 and the doped region 220 is shown. The conductor 415-4 partially covers the doped region 210 and is substantially parallel to the doped region 210. The conductor 425-4 partially covers the doped region 220 and is substantially parallel to the doped region 220. The conductor 415-4 is substantially parallel to the conductor 425-4. The length of the conductor 415-4 is (L-d4-d5-d6), and the length of the conductor 425-4 is (L-d1-d2-d3).

[0041] Fig. 7E The conductor 415-n and the conductor 425-n on the metal layer Mn are shown to correspond to the doped region 210 and the doped region 220. The conductor 415-n partially covers the doped region 210 and is substantially parallel to the doped region 210. The conductor 425-n partially covers the doped region 220 and is substantially parallel to the doped region 220. The conductor 415-n and the conductor 425-n are substantially parallel.

[0042] Please also refer to Figure 4B , Figure 6 and 7A to 7E Because the conductor structure 410 and the conductor structure 420 are both in a step shape, the overlapping area of ​​the conductor structure 410 and the conductor structure 420 on each conductor layer (on the yz plane) is different. More specifically, the overlapping area of ​​the conductor structure 410 and the conductor structure 420 on the metal layer M1 is the largest, the overlapping area on the metal layer M2 is the second largest, and the overlapping area on the metal layer Mn is the smallest (or there is no overlap). Compared with the previous embodiment (i.e. corresponding to Figure 4A and Figure 4B and FIG. 5A to FIG. 5E In the embodiment of the present invention, the overall overlapping area between the conductor structure 410 and the conductor structure 420 is smaller, so the electromagnetic interference can be further reduced.

[0043] It should be noted that whether the doped region 210 and the doped region 220 are parallel or not, and whether the two conductors of each conductor layer are parallel or not, are not critical to the implementation of the present invention. The two substantially parallel components mentioned above may also be designed to be non-parallel.

[0044] The diode of the present invention is not limited to Figure 2 The layout, Figure 8 FIG. 2 is a layout of a diode on a substrate according to another embodiment of the present invention. The doped region 210 surrounds the doped region 220 . 9A to 9E The diagrams are multiple top views of a diode according to another embodiment of the present invention, respectively showing the relationship between each conductive layer and the doped region on the substrate. 9A to 9E Corresponds to Figure 4B and Figure 6 A person skilled in the art can understand from the above embodiments that Figure 8 and 9A to 9E The implementation details and changes of 9A to 9E In the embodiment, the conductor 415 is E-shaped and the conductor 425 is U-shaped (eg Fig.10 As shown, taking conductor 415-1 and conductor 425-1 as an example, the length of the finger structure (the portion located within the range R) of the E-shaped conductor 415 is 9A to 9E The length of the finger structure (the part located in the range R) of the U-shaped conductor 425 is gradually reduced. 9A to 9E Gradually decreasing.

[0045] Please note that the shapes, sizes and proportions of the components in the above-mentioned figures are only for illustration purposes and are provided for those having ordinary knowledge in the technical field to understand the present invention, and are not intended to limit the present invention.

[0046] Although the embodiments of the present invention are described above, these embodiments are not intended to limit the present invention. A person having ordinary knowledge in the technical field may make changes to the technical features of the present invention according to the explicit or implicit contents of the present invention. All these changes may fall within the scope of patent protection sought by the present invention. In other words, the scope of patent protection of the present invention shall be subject to the scope defined by the claims of this specification.

[0047]

Explanation of symbols

[0048] 100: Chip

[0049] 110, 120: Internal circuit

[0050] 130, 140: diode

[0051] 150: Output / Input Pad

[0052] VDD: voltage source

[0053] 200: Substrate

[0054] 210, 220: Doping area

[0055] 300: Semiconductor structure

[0056] 310: Oxide layer

[0057] 320, 320-1, 320-2, 320-3: Conductor layer

[0058] 330: Guide hole

[0059] 340: Contact

[0060] 410, 420: Conductor structure

[0061] 415-1, 415-2, 415-3, 415-4, 415-n, 425-1, 425-2, 425-3, 425-4, 425-n: Conductor

[0062] M1, M2, M3, M4, Mn: metal layer

[0063] R: Range.

Claims

1. A diode implemented in a semiconductor structure, comprising: A substrate comprising a first doped region and a second doped region, wherein the first doped region is used as a first electrode of the diode, the second doped region is used as a second electrode of the diode, and a dopant in the first doped region is different from a dopant in the second doped region; a first conductor structure, located above and connected to the first doped region, and comprising a plurality of first conductors, wherein the plurality of first conductors are distributed in a plurality of conductor layers of the semiconductor structure, and the plurality of first conductors are interconnected by a plurality of guide holes; as well as a second conductor structure, located above the second doped region and connected to the second doped region, and comprising a plurality of second conductors, wherein the plurality of second conductors are distributed in the plurality of conductor layers of the semiconductor structure, and the plurality of second conductors are interconnected by a plurality of guide holes; wherein a side view of the first conductor structure presents a step shape; Wherein, a side view of the second conductor structure presents a step shape; The second conductor closest to the substrate is the longest of the plurality of second conductors, and the lengths of the other second conductors gradually decrease; Wherein, the ends of the plurality of first conductors located on the left side of the side view are aligned, and the ends of the plurality of second conductors located on the right side of the side view are aligned; The first conductor closest to the substrate is the longest of the plurality of first conductors, and the lengths of the other first conductors gradually decrease.

2. A diode implemented in a semiconductor structure, comprising: A substrate comprising a first doped region and a second doped region, wherein the first doped region is used as a first electrode of the diode, the second doped region is used as a second electrode of the diode, and a dopant in the first doped region is different from a dopant in the second doped region; a first conductor, located in a first conductor layer of the semiconductor structure and connected to the first doped region; a second conductor, located in a second conductor layer of the semiconductor structure and connected to the first conductor; a third conductor, located in the first conductor layer of the semiconductor structure and connected to the second doped region; as well as a fourth conductor, located in the second conductor layer of the semiconductor structure and connected to the third conductor; In a side view of the semiconductor structure, an overlapping area between the first conductor and the third conductor is greater than an overlapping area between the second conductor and the fourth conductor.

3. The diode according to claim 2, wherein: The first conductor is located between the substrate and the second conductor, and the third conductor is located between the substrate and the fourth conductor.

4. The diode according to claim 3, wherein: In a top view or the side view of the semiconductor structure, a length of the second conductor is smaller than a length of the first conductor.

5. The diode according to claim 4, wherein In the top view or the side view of the semiconductor structure, a length of the fourth conductor is shorter than a length of the third conductor.

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