Plasma processing apparatus and plasma processing method

Abstract

The present application provides a kind of plasma processing device capable of using multiple high-frequency electric power pulse signals to improve the performance of process processing, comprising: first, second matching circuit;First RF generation part, coupled with the first matching circuit, generates the first RF pulse signal including multiple first pulse periods, which has first-third power levels in the first-third period of the first pulse period respectively;Second RF generation part, coupled with the second matching circuit, generates the second RF pulse signal including multiple second pulse periods, which has fourth-fifth power levels in the fourth-fifth period of the second pulse period and lower frequency than the first RF pulse signal;Third RF generation part, coupled with the second matching circuit, generates the third RF pulse signal including multiple third pulse periods, which has sixth-seventh power levels in the sixth-seventh period of the third pulse period and lower frequency than the second RF pulse signal.

Description

Technical Field

[0001] This invention relates to plasma processing apparatus and plasma processing method. Background Technology

[0002] For example, Patent Document 1 discloses an ICP (Inductively Coupled Plasma) device with two high-frequency power supplies capable of supplying high-frequency electrical power at two frequencies to an antenna at the top of the chamber and a lower electrode (base). One of the high-frequency power supplies provides bias power at, for example, 13 MHz to the lower electrode. An antenna is positioned above the chamber, and the other high-frequency power supply provides plasma excitation power at, for example, 27 MHz to the midpoint or vicinity of the line forming the outer coil of the antenna.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2019-67503 Summary of the Invention

[0006] The technical problem that the invention aims to solve

[0007] This invention provides a technique for improving processing performance by using multiple high-frequency (RF) electrical power pulse signals.

[0008] Technical solutions for solving technical problems

[0009] According to one aspect of the present invention, a plasma processing apparatus is provided, comprising: a chamber; a first matching circuit coupled to the chamber; a second matching circuit coupled to the chamber; a first RF generation unit configured to be coupled to the first matching circuit and capable of generating a first RF pulse signal including a plurality of first pulse cycles, each of the plurality of first pulse cycles including a first period, a second period, and a third period, the first RF pulse signal having a first power level in the first period, a second power level in the second period, and a third power level in the third period; and a second RF generation unit configured to be coupled to the second matching circuit and capable of generating a second RF pulse signal including the plurality of second pulse cycles, each of the plurality of second pulse cycles including a fourth period and a fifth period. The frequency of the second RF pulse signal is lower than that of the first RF pulse signal. The second RF pulse signal has a fourth power level during the fourth period and a fifth power level during the fifth period. The fourth period is less than 30 μs and does not overlap with the first period. A third RF generation unit is configured to be coupled to the second matching circuit and capable of generating a third RF pulse signal comprising multiple third pulse cycles. Each of the multiple third pulse cycles includes a sixth period and a seventh period. The frequency of the third RF pulse signal is lower than that of the second RF pulse signal. The third RF pulse signal has a sixth power level during the sixth period and a seventh power level during the seventh period. The sixth period does not overlap with the first and fourth periods.

[0010] Invention Effects

[0011] In one respect, multiple high-frequency electrical power pulse signals can be used to improve processing performance. Attached Figure Description

[0012] Figure 1 This is a cross-sectional schematic diagram illustrating an example of a plasma processing system according to an embodiment.

[0013] Figure 2 This is a diagram illustrating an example of a plasma processing apparatus according to an embodiment.

[0014] Figure 3 This is a diagram illustrating an example of a matching circuit for two biased RF pulse signals in an embodiment.

[0015] Figure 4 This is a diagram illustrating an example of free radicals, ions, electron temperature, ion energy, and byproducts.

[0016] Figure 5 This is a diagram showing the pulse pattern of two high-frequency electrical power pulses of the implementation method.

[0017] Figure 6 This is a diagram showing the pulse patterns of the three frequencies of high-frequency electrical power pulses in the implementation method.

[0018] Figure 7 This is a diagram showing the pulse patterns of the three frequencies of high-frequency electrical power pulses in the implementation method.

[0019] Figure 8 This is a diagram showing the pulse patterns of the three frequencies of high-frequency electrical power pulses in the implementation method.

[0020] Figure 9 This is a diagram showing the pulse patterns of the three frequencies of high-frequency electrical power pulses in the implementation method.

[0021] Explanation of reference numerals in the attached figures

[0022] 1. Plasma processing device

[0023] 2. Control Department

[0024] 10 chambers

[0025] 10s plasma processing space

[0026] 11. Substrate support

[0027] 12 Ring-shaped components

[0028] 13 Gas Inlet Section

[0029] 14 antennas

[0030] 20 Gas Supply Department

[0031] 21 Computer

[0032] 21a Processing Department

[0033] 21b Storage Section

[0034] 21c communication interface

[0035] 31 RF Power Supply Department

[0036] 31a Source RF Generation Unit

[0037] 31b First bias RF generation unit

[0038] 34b1 First Adjustment Circuit

[0039] 34b2 First Separation Circuit

[0040] 34c1 Second Adjustment Circuit

[0041] 34c2 Second Separator Circuit

[0042] 31c Second Bias RF Generation Unit

[0043] 33 First Matching Circuit

[0044] 34 Second Matching Circuit

[0045] 37. Power supply line. Detailed Implementation

[0046] Hereinafter, embodiments for carrying out the present invention will be described with reference to the accompanying drawings. In the drawings, the same reference numerals are used to label the same components, and repeated descriptions are omitted.

[0047] [Plasma Processing System]

[0048] First, refer to Figure 1 and Figure 2 The plasma processing system of the embodiment will be described. Figure 1 This is a cross-sectional schematic diagram illustrating an example of a plasma processing system according to an embodiment. Figure 2 This is a diagram illustrating an example of the plasma processing apparatus 1 according to an embodiment.

[0049] In this embodiment, the plasma processing system includes a plasma processing apparatus 1 and a control unit 2. The plasma processing apparatus 1 is configured to generate plasma from the processing gas within the chamber 10 by supplying three high-frequency electrical power pulses (three RF pulse signals) into the chamber 10. Alternatively, the plasma processing apparatus 1 can be configured to generate plasma from the processing gas within the chamber 10 by supplying two high-frequency electrical power pulses (two RF pulse signals) into the chamber 10. Furthermore, the plasma processing apparatus 1 processes the substrate by exposing the generated plasma to the substrate.

[0050] The plasma processing apparatus 1 includes a chamber 10, a substrate support 11, and a plasma generation unit. The chamber 10 defines a plasma processing space 10s. Furthermore, the chamber 10 has a gas inlet 10a for supplying at least one processing gas to the plasma processing space 10s, and a gas outlet 10b for discharging gas from the plasma processing space. The gas inlet 10a is connected to at least one gas supply unit 20.

[0051] Gas outlet 10b, such as 8, is an exhaust port located at the bottom of chamber 10 and connected to exhaust system 40. Exhaust system 40 may also include pressure valves and vacuum pumps. Vacuum pumps may include turbomolecular pumps, roughing pumps, or combinations thereof.

[0052] The substrate support 11 is disposed within the plasma processing space 10s, supporting the substrate W. The plasma generation unit is configured to generate plasma from at least one processing gas supplied to the plasma processing space 10s. The plasma generated in the plasma processing space 10s can be capacitively coupled plasma (CCP) or inductively coupled plasma (ICP).

[0053] The control unit 2 processes computer-executable commands that cause the plasma processing apparatus 1 to perform the various steps described above in this invention. The control unit 2 is capable of controlling various elements of the plasma processing apparatus 1 to enable the execution of the various steps described herein. In embodiments, such as... Figure 1 As shown, the control unit 2 may contain part or all of the plasma processing device 1. The control unit 2 may, for example, include a computer 21. The computer 21 may include, for example, a processing unit (CPU: Central Processing Unit) 21a, a storage unit 21b, and a communication interface 21c. The processing unit 21a is capable of performing various control operations based on programs stored in the storage unit 21b. The storage unit 21b may include RAM (Random Access Memory), ROM (Read Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive), or combinations thereof. The communication interface 21c can communicate with the plasma processing device 1 via a communication line such as a LAN (Local Area Network).

[0054] The following will Figure 2 Taking an inductively coupled plasma processing apparatus as an example, the structure of plasma processing apparatus 1 will be further described. Plasma processing apparatus 1 includes a chamber 10. Chamber 10 includes a dielectric window 10c and a sidewall 10d. The dielectric window 10c and sidewall 10d define a plasma processing space 10s within chamber 10. Furthermore, plasma processing apparatus 1 includes a substrate support 11, a gas inlet 13, a gas supply 20, an electrical power supply, and an antenna 14.

[0055] The substrate support 11 is disposed in the plasma processing space 10s within the chamber 10. The antenna 14 is disposed on the upper part of the chamber 10 (dielectric window 10c).

[0056] The substrate support portion 11 includes a main body and an annular member (edge ​​ring) 12. The main body has a central region (substrate support surface) 11a for supporting a substrate (wafer) W, and an annular region (edge ​​ring support surface) 11b for supporting the annular member 12. The annular region 11b of the main body surrounds the central region 11a of the main body. The substrate W is disposed on the central region 11a of the main body, and the annular member 12 is disposed on the annular region 11b of the main body in such a way that it surrounds the substrate W on the central region 11a of the main body. In an embodiment, the main body includes an electrostatic chuck 111 and a conductive member 112. The electrostatic chuck 111 is disposed on the conductive member 112. The conductive member 112 functions as an RF electrode, and the upper surface of the electrostatic chuck 111 functions as the substrate support surface 11a. Furthermore, although not illustrated, in this embodiment, the substrate support 11 may include a temperature regulating mechanism configured to adjust at least one of the electrostatic chuck 111 and the substrate W to a target temperature. The temperature regulating mechanism may include a heater, a flow path, or a combination thereof. A temperature-regulating fluid, such as a refrigerant or a heat-conducting gas, can flow through the flow path. Additionally, the chamber 10, the substrate support 11, and the annular member 12 are arranged aligned with axis Z, with axis Z as the central axis.

[0057] The gas inlet 13 is configured to supply at least one processing gas from the gas supply unit 20 to the plasma processing space 10s. In this embodiment, the gas inlet 13 is disposed above the substrate support 11 and installed in the central opening formed in the dielectric window 10c.

[0058] The gas supply unit 20 may include at least one gas source 23 and at least one flow controller 22. In an embodiment, the gas supply unit 20 is configured to supply one or more processing gases from their respective gas sources 23 to the gas inlet unit 13 via their respective flow controllers 22. Each flow controller 22 may also include, for example, a mass flow controller or a pressure-controlled flow controller. Furthermore, the gas supply unit 20 may also include one or more flow modulation devices for modulating or pulsedizing the flow rate of one or more processing gases.

[0059] The power supply unit includes an RF power supply unit 31 coupled to the chamber 10. The RF power supply unit 31 is configured to supply three RF signals (RF power) to the conductive member 112 or the antenna 14 of the substrate support 11. Thus, plasma is formed from at least one processing gas supplied to the plasma processing space 10s. Alternatively, the plasma generation unit may be configured to include a gas supply unit 20 supplying at least one processing gas to the plasma processing space 10s and an RF power supply unit 31, capable of generating plasma from the processing gas.

[0060] Antenna 14 includes one or more coils. In one embodiment, antenna 14 may include an outer coil and an inner coil arranged coaxially. In this case, the RF power supply unit 31 may be connected to both the outer coil and the inner coil, or to either the outer coil or the inner coil. In the former case, the same RF generating unit may be connected to both the outer coil and the inner coil, or different RF generating units may be connected to the outer coil and the inner coil respectively.

[0061] In this embodiment, the RF power supply unit 31 includes a generation source RF generation unit 31a, a first bias RF generation unit 31b, and a second bias RF generation unit 31c. The generation source RF generation unit 31a is coupled to the antenna 14, and the first bias RF generation unit 31b and the second bias RF generation unit 31c are coupled to the conductive component 112. The generation source RF generation unit 31a is configured to be connected to the antenna 14 via a first matching circuit 33 and is capable of generating a first RF pulse signal (hereinafter referred to as HF power) for plasma generation. In this embodiment, the first RF pulse signal has a frequency in the range of 20MHz to 60MHz. The generated first RF pulse signal is supplied to the antenna 14. The first RF pulse signal includes a plurality of first pulse cycles, each of which includes a first period, a second period, and a third period. The first RF pulse signal has a first power level in the first period, a second power level in the second period, and a third power level in the third period. The first RF pulse signal has at least three power levels, each of which is 0 or higher. Therefore, the first RF pulse signal can have high / medium / low power levels, all of which are greater than 0. Furthermore, the first RF pulse signal can also have high / low power levels and a zero power level (Off). The RF generation unit 31a is an example of the first RF generation unit, configured to be coupled to the first matching circuit 33, and capable of generating a first RF pulse signal comprising multiple first pulse cycles.

[0062] Furthermore, the first bias RF generation unit is configured to be connected to the conductive member 112 of the substrate support portion 11 via the second matching circuit 34 and the power supply line 37, and is capable of generating a second RF pulse signal (hereinafter also referred to as LF1 power). The generated second RF pulse signal is supplied to the conductive member 112 of the substrate support portion 11. In an embodiment, the second RF pulse signal has a lower frequency than the first RF pulse signal. In an embodiment, the second RF pulse signal has a frequency in the range of 1MHz to 15MHz. The second RF pulse signal has a fourth power level during the fourth period and a fifth power level during the fifth period. The fourth period is 30μs or less. Therefore, the second RF pulse signal can have high / low power levels, which are greater than 0. In addition, the second RF pulse signal can also have a power level greater than 0 and a zero power level, i.e., an on / off signal. The first bias RF generation unit is an example of the second RF generation unit, and is configured to be coupled to the second matching circuit 34, and is capable of generating a second RF pulse signal containing multiple second pulse cycles.

[0063] Furthermore, the second bias RF generation unit is configured to be connected to the conductive member 112 of the substrate support portion 11 via the second matching circuit 34 and the power supply line 37, and is capable of generating a third RF pulse signal (hereinafter also referred to as LF2 power). The generated third RF pulse signal is supplied to the conductive member 112 of the substrate support portion 11. In this embodiment, the third RF pulse signal has a lower frequency than the second RF pulse signal. In this embodiment, the third RF pulse signal has a frequency in the range of 100kHz to 4MHz. The third RF pulse signal has a sixth power level during the sixth period and a seventh power level during the seventh period. The third RF pulse signal has at least two power levels, each of which is 0 or higher. Therefore, the third RF pulse signal can have high / low power levels, both of which are greater than 0. In addition, the third RF pulse signal can have a power level greater than 0 and a zero power level, i.e., an on / off signal. The second bias RF generation unit is an example of the third RF generation unit, which is configured to be coupled to the second matching circuit 34 and capable of generating a third RF pulse signal including multiple third pulse cycles.

[0064] In this way, the first RF pulse signal, the second RF pulse signal, and the third RF pulse signal are pulsed. The second RF pulse signal and the third RF pulse signal are pulsed between an on state and an off state, or between two or more different on states (high / low). The first RF pulse signal is pulsed between two or more different on states (high / low) and an off state, or between three or more different on states (high / medium / low). The first RF pulse signal can be pulsed between an on state and an off state, or between two different on states (high / low).

[0065] The first matching circuit 33 is connected to the RF generation source 31a and the antenna 14, and is connected to the chamber 10 via the antenna 14. The first matching circuit 33 can supply a first RF pulse signal from the RF generation source 31a to the antenna 14 via the first matching circuit 33. Furthermore, in other plasma processing apparatuses, the first matching circuit 33 can also be connected to a structure other than the antenna 14. For example, in a capacitively coupled plasma processing apparatus including two opposing electrodes, the first matching circuit 33 can be connected to one of the two electrodes.

[0066] The second matching circuit 34 is connected to the first bias RF generation unit 31b, the second bias RF generation unit 31c, and the substrate support unit 11 (conductive component 112). The second matching circuit 34 can supply a second RF pulse signal from the first bias RF generation unit 31b to the substrate support unit 11 via the second matching circuit 34. In addition, the second matching circuit 34 can supply a third RF pulse signal from the second bias RF generation unit 31c to the substrate support unit 11 via the second matching circuit 34.

[0067] Control unit 2 outputs control signals instructing the supply of each pulse signal to the RF generation source 31a, the first bias RF generation unit 31b, and the second bias RF generation unit 31c. Thus, at predetermined times, a first RF pulse signal, a second RF pulse signal, and a third RF pulse signal comprising multiple pulse cycles are supplied to generate plasma from the processing gas within chamber 10. Furthermore, substrate processing is performed by exposing the generated plasma to the substrate. This improves the efficiency of the process and enables high-precision substrate processing. The on / off states (on and off) of the first RF pulse signal, the second RF pulse signal, and the third RF pulse signal controlled by control unit 2, or the control timing of power levels above 0, will be explained later.

[0068] [An example of the internal structure of the second matching circuit]

[0069] Below, refer to Figure 3 An example of the structure of the second matching circuit 34 will be described. Figure 3 This is a diagram illustrating an example of the internal structure of the second matching circuit 34 in the implementation method.

[0070] The first bias RF generator 31b and the second bias RF generator 31c are connected to the substrate support 11 (conductive member 112) via the second matching circuit 34 and the power supply line 37. In the following description, the second RF pulse signal supplied from the first bias RF generator 31b is also referred to as LF1 power. Furthermore, in the following description, the third RF pulse signal supplied from the second bias RF generator 31c is also referred to as LF2 power.

[0071] When the second RF pulse signal (LF1 power) supplied from the first bias RF generation unit 31b is coupled to the opposite side (the second bias RF generation unit 31c side) via the power supply line 36 in the second matching circuit 34, the supply efficiency of the LF1 power supplied to the chamber 10 decreases. Similarly, when the third RF pulse signal (LF2 power) supplied from the second bias RF generation unit 31c is coupled to the opposite side (the first bias RF generation unit 31b side) via the power supply line 36, the supply efficiency of the LF2 power supplied to the chamber 10 decreases. As a result, due to the reduced supply of bias power to the chamber 10, ion energy control becomes difficult, and the performance of the process deteriorates.

[0072] Therefore, the second matching circuit 34 of this embodiment includes a first adjustment circuit 34b1, a first separation circuit 34b2, a second adjustment circuit 34c1, and a second separation circuit 34c2. The first adjustment circuit 34b1 and the first separation circuit 34b2 are connected between the first bias RF generation unit 31b and the power supply line 37. The second adjustment circuit 34c1 and the second separation circuit 34c2 are connected between the second bias RF generation unit 31c and the power supply line 37. With this structure, the coupling of the second RF pulse signal (LF1 power) generated in the first bias RF generation unit 31b to the second bias RF generation unit 31c is suppressed, and it is supplied to the substrate support unit 11 (conductive member 112). Furthermore, the coupling of the third RF pulse signal (LF2 power) generated in the second bias RF generation unit 31c to the first bias RF generation unit 31b is suppressed, and it is supplied to the substrate support unit 11 (conductive member 112).

[0073] The first adjustment circuit 34b1 is configured to have a variable element that enables the impedance of the load side (substrate support 11 side) of the first bias RF generation unit 31b to match the output impedance of the first bias RF generation unit 31b. In one embodiment, the variable element of the first adjustment circuit 34b1 is a variable capacitor.

[0074] The second separation circuit 34c2 is connected between the second bias RF generation unit 31c and the substrate support unit 11 to prevent the coupling of the LF1 power, i.e. the second RF pulse signal, from the first bias RF generation unit 31b.

[0075] The second adjustment circuit 34c1 is configured to have a variable element, which enables the impedance of the load side (substrate support 11 side) of the second bias RF generation unit 31c to match the output impedance of the second bias RF generation unit 31c. In one embodiment, the variable element of the second adjustment circuit 34c1 is a variable inductor.

[0076] The first separation circuit 34b2 is connected between the first bias RF generation unit 31b and the substrate support unit 11 to prevent the coupling of the LF2 electrical power, i.e. the third RF pulse signal, from the second bias RF generation unit 31c.

[0077] The second separation circuit 34c2 is an RF choke circuit containing inductor L2. The first separation circuit 34b2 is a resonant circuit including capacitor C1 and inductor L1. The first separation circuit 34b2 is composed of capacitor C1 and inductor L1. The second separation circuit 34c2 is composed of inductor L2.

[0078] Regarding the first separation circuit 34b2, the circuit constants of C1 and L1 are set such that the impedance observed from the second RF pulse signal is 0 or close to 0, the impedance observed from the third RF pulse signal is high, and the side of the first bias RF generation unit 31b is considered as a wall. Therefore, the impedance observed from the third RF pulse signal in the first separation circuit 34b2 is denoted as Z. LF2 The load impedance of the plasma is denoted as Z. chamber At that time, Z LF2 >>Z chamber Established.

[0079] Furthermore, regarding the second separation circuit 34c2, the circuit constant of L2 is set such that the impedance observed from the third RF pulse signal is 0 or close to 0, the impedance observed from the second RF pulse signal is high, and the side of the second bias RF generation unit 31c is considered as a wall. Therefore, in the second separation circuit 34c2, the impedance observed from the second RF pulse signal is denoted as Z. LF1 At that time, Z LF1 >>Z chamber Established.

[0080] In this way, by setting the circuit constant of the first separation circuit 34b2 as described above, the impedance Z in the first separation circuit 34b2 is... LF2 Much greater than the load impedance Z of the plasma chamber Therefore, the first separation circuit 34b2 prevents the coupling of the third RF pulse signal from the second bias RF generation unit 31c. Figure 3 (LF2 Power→×). As a result, LF2 power is supplied to chamber 10 via power supply line 37, thereby suppressing the reduction in the supply efficiency of LF2 power.

[0081] Similarly, by setting the circuit constant of the second separation circuit 34c2 in the manner described above, the impedance Z in the second separation circuit 34c2 is... LF1 Much greater than the load impedance Z of the plasma chamber Therefore, the second separation circuit 34c2 prevents the coupling of the second RF pulse signal from the first bias RF generation unit 31b. Figure 3 (LF1 Power→×). As a result, LF1 power is supplied to chamber 10 via power supply line 37, thereby suppressing the reduction in the supply efficiency of LF1 power.

[0082] According to this configuration, pulse signals with two bias electrical powers (LF1 power and LF2 power) with different frequencies can be efficiently supplied to the substrate support portion 11.

[0083] [Pulse signal]

[0084] For example, in the process of etching deep holes with a large aspect ratio, using pulse signals of HF, LF1, and LF2 power can make the incident angle of ions perpendicular and improve the mask selectivity.

[0085] Figure 4 This is a diagram illustrating an example of free radicals, ions, electron temperature, ion energy, and byproducts. Figure 4 The horizontal axis represents the elapsed time (one cycle) after the RF power supply is stopped (turned off). Figure 4 The vertical axis represents the radical (Radical), ion (Ions), electron temperature (Te), and ion energy (ε) during the turn-off time. l The state of by-products at various times.

[0086] Accordingly, the change in radicals (radicals) from the point where the RF power is turned off is slow, while the changes in ions (ion) and plasma temperature (Te) from the point where the RF power is turned off are faster than those of radicals. The pulse signals for controlling the HF power and LF power (e.g., LF1 power and LF2 power) are considered in relation to the decay of radicals and ions, energy changes, etc., in such a plasma. As an example of a pulse signal for supplying LF power after turning off the HF power, it is considered to turn off the LF power in the initial period when the plasma temperature (Te) is high, and turn the LF power on after the plasma temperature (Te) decreases. Therefore, although ions remain, using the LF power during the period when the plasma temperature (Te) is low allows for efficient attraction of ions to the substrate.

[0087] As another example of the pulse signal for the LF power supplied after the HF power is turned off, ε, representing ion energy, is used as a plasma parameter. l The LF2 electrical power can be controlled while the plasma electron temperature Te remains almost constant. This allows for control of the ion energy ε. l This allows for more precise control of the ion incident angle.

[0088] In this way, by precisely controlling the timing of switching HF and LF power on and off (on / off states) based on variations in plasma parameters such as free radicals, ions, plasma electron temperature, ion energy, and byproducts, the performance of the process can be improved. (See below for reference.) Figures 5-8 The timing of supplying the high-frequency power pulse signal is explained. Furthermore, the timing of supplying the high-frequency power pulse signal can also be determined by the control unit 2.

[0089] (Pulse signals at two frequencies)

[0090] Figure 5 This is a diagram showing the pulse pattern of two high-frequency electrical power pulses of the implementation method. Figure 5 The HF power (Source Power) of the two high-frequency power pulses shown comprises multiple first pulse cycles. The LF1 power (Bias Power) pulse signal comprises multiple second pulse cycles. The timing of each pulse signal supply is explained below. Figure 5 The horizontal axis represents the time of one cycle, and the vertical axis represents the on / off state of the HF power and LF1 power. The multiple first pulse cycles of the HF power each include period (1) and period (2), and the multiple second pulse cycles of the LF1 power each include period (3) and period (4). Figure 5 In the example, multiple first pulse cycles each take period (1), period (2) and exhaust period as a cycle, repeating the first RF pulse signal of HF electrical power. Multiple second pulse cycles each take period (4), period (3) and exhaust period as a cycle, repeating the second RF pulse signal of LF1 electrical power.

[0091] The RF generation unit 31a is configured to generate a first RF pulse signal (HF power). In this embodiment, the first RF pulse signal has two power levels (on / off). The first bias RF generation unit 31b is configured to generate a second RF pulse signal (LF1 power). In this embodiment, the second RF pulse signal has two power levels (on / off).

[0092] The on / off states of the HF power and the LF1 power do not overlap in time. For example, the first RF pulse signal has a first power level during period (1) and a second power level during period (2), where the first power level is on and the second power level is off. That is, the second power level is zero power. The second RF pulse signal has a third power level during period (3) and a fourth power level during period (4), where the third power level is on and the fourth power level is off. That is, the fourth power level is zero power.

[0093] The first RF pulse signal can have a frequency of 27 MHz. The second RF pulse signal has a lower frequency than the first RF pulse signal. For example, the second RF pulse signal has a frequency of 13 MHz. The first power level can be high, and the second power level can be low. Furthermore, the third power level can be high, and the fourth power level can be low.

[0094] exist Figure 5 During period (1), the HF power is kept on, and during period (4), which is time-consistent with period (1), the LF1 power is kept off. Thus, from time t0 to time t1, a plasma including free radicals and ions is generated by supplying HF power.

[0095] At time t1, the HF power is switched off and the LF1 power is switched on. During period (2), the HF power remains switched off, and during period (3), which is time-consistent with period (2), the LF1 power remains switched on. During period (2), since the HF power is switched off, therefore... Figure 4 In one example shown, the free radicals, ions, and plasma temperature decay according to their respective time constants. Etching is promoted by controlling the ion flux (ion quantity) reaching the bottom of the etched recess by supplying LF1 power during period (3). At time t2, the HF power remains off, while the LF1 power is switched off. During the venting period following periods (2) and (3), byproducts are vented because both the HF and LF1 power are off. The venting period is preset to the time during which byproducts do not adhere to the substrate W.

[0096] At time t3 after the exhaust period, one cycle ends and moves to the next cycle (1). Then, at time t0 of the next cycle, the HF power is switched on again, and the LF1 power remains off during period (4). That is, the first pulse cycle of the HF power is repeated, taking period (1), period (2), and the exhaust period as one cycle. Moreover, the second pulse cycle of the LF1 power is repeated, taking period (4), period (3), and the exhaust period as one cycle. One cycle is 1 kHz to 20 kHz. Multiple pulse cycles have the same time period, and each pulse cycle has a time period of 50 μs to 1000 μs. That is, one cycle of the pulse cycle is 50 μs to 1000 μs.

[0097] Period (3) and period (1) do not overlap in time. That is, the first bias RF generation unit 31b shifts the timing of the change in the power level of the second RF pulse signal relative to the timing of the change in the power level of the first RF pulse signal, so that the on-state of HF power and the on-state of LF1 power do not overlap in time.

[0098] Furthermore, period (3) is set to 30 μs or less. Periods (1), (2), and (4) are set to any time, which can be longer than 30 μs. That is, in this example, the LF1 power is kept on for less than 30 μs during period (3), and kept off for any time during period (4) and during the exhaust period, and the on and off cycles are repeated. In this way, by making the supply time of the LF1 power in one cycle less than 30 μs, the ions can be vertically controlled, and highly anisotropic etching can be achieved.

[0099] In addition, during period (1), the power level of HF electrical power is an example of the first power level, and during period (2), the power level of HF electrical power is an example of the second power level. During period (3), the power level of LF1 electrical power is an example of the third power level, and during period (4), the power level of LF1 electrical power is an example of the fourth power level.

[0100] (Pulse signals at 3 frequencies)

[0101] Figures 6-8 This is a diagram showing the pulse patterns of the three frequencies of high-frequency electrical power pulses in the implementation method. Figures 6-8 The pulse signals of the three high-frequency electrical powers shown, namely HF power (Source Power), LF1 power (Bias1 Power), and LF2 power (Bias2 Power), each include multiple pulse cycles. The timing of supplying each pulse signal is explained below. Figures 6-8The horizontal axis represents the time of one cycle, and the vertical axis represents the on / off state of HF power, LF1 power, and LF2 power. The first pulse cycle of HF power, the second pulse cycle of LF1 power, and the third pulse cycle of LF2 power (any pulse cycle includes the exhaust period) are taken as a cycle, and the control of each pulse signal of HF power, LF1 power, and LF2 power is repeated.

[0102] In the control of high-frequency electrical power pulses at three frequencies, the on-state of LF1 and LF2 does not overlap in time. When LF1 is on, LF2 is off, and vice versa. Similarly, the high-power level of HF does not overlap with the on-state of LF1. When HF is at a high power level, LF1 is off, and vice versa.

[0103] The RF generation unit 31a is configured to generate a first RF pulse signal (HF electrical power). In this embodiment, the first RF pulse signal has three power levels (high / low / off). These power levels can be arbitrarily set and changed according to the target process. For example, the first RF pulse signal has a frequency of 27MHz.

[0104] The first bias RF generation unit 31b is capable of generating a second RF pulse signal (LF1 power). In this embodiment, the second RF pulse signal has two power levels (on / off). That is, the second RF pulse signal has two or more power levels, including a zero power level. The frequency of the second RF pulse signal is lower than the frequency of the first RF pulse signal. For example, the second RF pulse signal has a frequency of 13MHz.

[0105] The second bias RF generation unit 31c is capable of generating a third RF pulse signal (LF2 electrical power). In this embodiment, the third RF pulse signal has two power levels (on / off). That is, the third RF pulse signal has two or more power levels, including a zero power level. The frequency of the third RF pulse signal is lower than the frequency of the second RF pulse signal. For example, the third RF pulse signal has a frequency of 1.2 MHz.

[0106] exist Figures 6-8In the diagram, HF power represents the state of the first RF pulse signal, LF1 power represents the state of the second RF pulse signal, and LF2 power represents the state of the third RF pulse signal.

[0107] exist Figure 6 During period (1), the HF power has a high power level, while the LF1 and LF2 power are off. That is, from time t0 to time t... 11 During this time, plasma containing free radicals and ions is generated by supplying HF electrical power. Thus, as... Figure 6 As shown in (a), the etch target film 100 is etched via mask 101, and free radicals R mainly adhere to the inner wall of the holes HL formed in the etch target film 100.

[0108] At time t after (1) has elapsed. 11 After the HF power switches to the off state, such as Figure 4 In one example shown, the free radicals, ions, and plasma temperature decay according to their respective time constants. Based on the decay state of these plasma parameters, the timing for turning on the LF1 and LF2 electric powers is controlled during the period when the HF electric power is off (3), the period when the power level decreases (2), and the period when by-products are vented. At this time, the period when the LF1 electric power is on (4) does not overlap with the period when the HF electric power is at a high power level (1). Furthermore, the period when the LF2 electric power is on (6) does not overlap with periods (1) and (4) in time.

[0109] In this embodiment, at time t 11 The HF power level transitions from a high power level to the off state, while the LF1 power level transitions to the on state. Therefore, during the period (4) which coincides with period (3) in time, the LF1 power level is maintained in the on state, as... Figure 6 As shown in (b), the ion flux reaching the bottom of the etched recess can be controlled. Furthermore, the amount of byproducts during etching can be suppressed. The LF2 electrical power at time t... 11 The LF2 power is kept off during the period (7) which is time-consistent with period (3).

[0110] Furthermore, period (4) is set to a time of less than 30 μs. In addition, period (4) does not overlap with period (1) in time. By supplying the LF1 electrical power for a short time of less than 30 μs during period (4), the ions can be controlled more vertically, achieving highly anisotropic etching.

[0111] At time t after periods (3) and (4) have elapsed. 12At time t, the HF power level changes to a low power level, the LF1 power level changes to the off state, and the LF2 power level changes to the on state. 13 During period (2), the HF power is maintained at a low power level. During periods (3) and (2), the HF power can be at a low power level or be off. During period (5), which is time-consistent with period (2), the LF1 power is maintained off, and during period (6), which is time-consistent with period (2), the LF2 power is maintained on. As mentioned above, period (6) does not overlap with periods (1) and (4) in time.

[0112] In this embodiment, LF2 power is supplied during period (6), and the frequency of the LF2 power supplied during period (6) is lower than the frequency of the LF1 power supplied during period (4). The Vpp of the LF2 power is larger than the Vpp of the LF1 power. Therefore, during period (6), the bias voltage Vpp can be larger than that during period (4), and the ion energy ε can be increased. l Larger, allowing for more vertical control of the ion incident angle. Therefore, during the period of supplying LF2 electrical power (6), the ion flux reaching the bottom of the etched recess can be controlled. Thus, as... Figure 6 As shown in (c), byproducts such as B remaining at the bottom corner of hole HL are etched, which can promote etching.

[0113] In processes like this, where deep cavities with high aspect ratios are etched, pulsed signals of HF, LF1, and LF2 power can improve mask selectivity and ensure perpendicular ion incident angles. This allows for a more perpendicular etched shape, promoting etching. However, this process of etching deep cavities with high aspect ratios is just one example of substrate processing; the types of processes are not limited to this.

[0114] During the exhaust phase, the exhaust of byproducts is controlled. Specifically, the HF, LF1, and LF2 electrical powers are controlled to be off during the exhaust phase. Thus, as... Figure 6 As shown in (d), byproduct B within the aperture HL is vented. This facilitates etching in the next cycle. The venting period is preset to the time during which byproduct B does not re-adhere to the substrate W.

[0115] exist Figure 6 In this example, the power level of HF is controlled at three levels, and the power levels of LF1 and LF2 are controlled at two levels: on and off. However, this is not a limitation. For example, the power level of HF can also be controlled at four or more levels.

[0116] At time t 14One cycle ends, and the next cycle begins (1). Then, at time t0 of the next cycle, the HF power level changes to a high power level, while the LF1 and LF2 power levels remain off. The first RF pulse signal sets the HF power to a preset state in the order of period (1) → period (3) → period (2) → exhaust period. The second RF pulse signal sets the LF1 power to a preset state in the order of period (4) → period (5) → exhaust period. The third RF pulse signal sets the LF2 power to a preset state in the order of period (7) → period (6) → exhaust period. Each pulse cycle is repeated, with one cycle ranging from 1 kHz to 20 kHz and period (4) less than 30 μs. Multiple first to third pulse cycles have the same time period, with each pulse cycle ranging from 50 μs to 1000 μs. That is, one cycle of the pulse cycle is 50 μs to 1000 μs.

[0117] In addition, during period (1), the HF power level is an example of the first power level; during period (2), the HF power level is an example of the second power level; during period (3), the HF power level is an example of the third power level; during period (4), the LF1 power level is an example of the fourth power level; during period (5), the LF1 power level is an example of the fifth power level; during period (6), the LF2 power level is an example of the sixth power level; and during period (7), the LF2 power level is an example of the seventh power level.

[0118] Figure 7 Another example of controlling high-frequency electrical power pulses at three frequencies. In this example, the first pulse period of HF electrical power, the second pulse period of LF1 electrical power, and the third pulse period of LF2 electrical power are used as a single period, and the control of each pulse signal of HF electrical power, LF1 electrical power, and LF2 electrical power is repeated. Any pulse period can include the exhaust period.

[0119] Figure 6 Pulse periodicity pattern and Figure 7 The difference in pulse period patterns is that, Figure 7 In the middle, at the end time t of period (1) 11 There is a delay time Tdelay afterward. Figure 6 In the middle, at time t 11 There is no subsequent delay time Tdelay. The following explains this difference. Figure 8 Other pulse cycle modes and Figure 6 Since they are the same, the explanation is omitted.

[0120] For example, such as Figure 4As shown, when the plasma temperature (Te) is high, and either LF1 or LF2 is switched on, more byproducts are generated, which can hinder etching. Therefore, it is advisable to avoid switching on either LF1 or LF2 when the plasma temperature is high. That is, from time t... 11 The time t after the preset delay time Tdelay has elapsed 21 The plasma temperature decreases. At this point, the LF1 power switch switches to the on state. That is, the time t when the HF power switch switches to the off state. 11 After offset (delay) by the delay time Tdelay, the LF1 electrical power switches to the on state. This suppresses the amount of byproducts during etching and promotes etching.

[0121] In this embodiment, the HF power is off during the delay time Tdelay. However, the power level of the HF power during the delay time Tdelay can also be a lower level than the power level of the HF power during period (1). By reducing the power level of the HF power, it is possible to reduce the power level at time t when the LF1 power is supplied. 21 The earlier the delay time Tdelay, the less free radical and ion generation occurs. As a result, at time t after the delay time Tdelay... 21 up to time t 12 During period (4), the ion flux reaching the bottom of the recess formed on the etched film can be controlled. Period (4) is set to a time of 30 μs or less. Furthermore, period (4) does not overlap with period (1) in time. In addition, the next period (5) and the exhaust period can be set to any time, which can be longer than 30 μs. In this way, by supplying LF1 electrical power for a short time of 30 μs or less during period (4), ions can be controlled more vertically, and highly anisotropic etching can be achieved.

[0122] Additionally, at time t 12 During period (5), the LF1 power is switched off, and the LF2 power is switched on. During period (6), which overlaps with period (5) in time, the LF2 power is switched on. Thus, during period (6), the ion incident angle can be controlled to be more perpendicular compared to period (4). However, if the delay time Tdelay is made too long, the ions will disappear, so the delay time Tdelay is preset to an appropriate value.

[0123] This control primarily regulates ion behavior by switching the on / off states of LF1 and LF2 power at different time intervals. During period (3), the HF power has a zero power level; during period (4), the LF1 power has a power level greater than zero; and during period (7), which overlaps with period (4), the LF2 power has a zero power level. During period (6), the LF2 power has a power level greater than zero; during period (5), which overlaps with period (6), the LF1 power has a zero power level; and during period (2), the HF power has a power level greater than zero. In other words, the times when the LF1 and LF2 power have power levels greater than zero do not overlap.

[0124] The LF2 power has a higher mask selectivity compared to the LF1 power, enabling vertical etching. During period (1), when the HF power level is higher than during period (2), a large number of free radicals and ions are generated, making it difficult to achieve the aforementioned effect even when LF2 power is supplied during this period (1). On the other hand, during periods (2) and (3), when the HF power level is lower than during period (1) and when the power level is zero, the generation of free radicals and ions decreases. Therefore, by supplying LF1 power during period (4), which overlaps with period (3), and LF2 power during period (6), which overlaps with period (2), the aforementioned effect is easily achieved. Therefore, by supplying either LF1 or LF2 power during these periods, the ion energy can be increased, resulting in a vertical ion incident angle. Thus, compared to period (1), the mask selectivity is higher during periods (2) and (3), enabling vertical etching.

[0125] Furthermore, regarding the LF1 and LF2 power supplies, pulse signals with two power levels—on and off—can be generated. However, pulse signals with more than two power levels—on, off, and intermediate power levels—can also be generated. The LF1 and LF2 power supplies can have two different on states.

[0126] Figure 8 Another example of a pulse pattern representing high-frequency electrical power pulses at three frequencies. The first pulse period of the HF electrical power, the second pulse period of the LF1 electrical power, and the third pulse period of the LF2 electrical power are used as a single period, and the control of each pulse signal of the HF electrical power, LF1 electrical power, and LF2 electrical power is repeated. Any pulse period can encompass the exhaust period.

[0127] Figure 8 Pulse periodicity pattern and Figure 7The difference in the pulse cycle mode is that the order of the on-state of LF1 power and the on-state of LF2 power is reversed, and the timing of the delay time Tdelay is also offset accordingly. The delay time Tdelay is set just before the LF1 power is about to transition to the on-state.

[0128] In this example, the LF1 or LF2 power supply is switched on to avoid high plasma temperatures. In this example, the LF2 and LF1 power supplies are switched on sequentially. At time t after period (1). 11 The plasma temperature decreases. At this point, specifically at the moment t, the HF electric power transitions to a low power level lower than the high power level. 11 The LF2 power is switched to the on state, and during the period (6) which is time-consistent with period (2), the LF2 power is kept on. As a result, the amount of by-products during etching can be suppressed, and etching can be promoted.

[0129] At time t 11 up to time t 12 During the period (2) and the time-consistent period (5), the LF1 power remains off. In this embodiment, at time t 12 The HF power is switched off, the LF1 power remains switched off, and the LF2 power is switched off. During the delay time Tdelay, the HF power is maintained in the off state; however, the power level of the HF power during the delay time Tdelay can also be a lower level than the power level of the HF power during period (1). By further reducing the power level of the HF power, it is possible to achieve a lower power level than the time t when the LF1 power is supplied. 22 The earlier the timing of the delay, the less free radical and ion generation occurs during the Tdelay period. From time t... 12 The time t after the delay Tdelay 22 At time t, the LF1 power supply switches to the ON state. 22 The HF and LF2 electrical powers remain off. As a result, at time t after a delay of Tdelay... 22 up to time t 13During period (4), the ion flux reaching the bottom of the recess formed on the etched film can be controlled. At this time, period (4) is set to a time of 30 μs or less. In addition, period (4) does not overlap with period (1) in time. Furthermore, period (5) which is consistent with period (2) in time and the exhaust period are set to arbitrary times, which can be longer than 30 μs. That is, in this example, the LF1 power is kept on for a time of 30 μs or less during period (4). In this way, by supplying the LF1 power for a short time of 30 μs or less during period (4), the ions can be controlled more vertically, and high anisotropy etching can be achieved. However, the ions will disappear when the delay time Tdelay is too long, so the delay time Tdelay is preset to an appropriate value.

[0130] Figure 9 Another example of controlling high-frequency electrical power pulses at three frequencies. In this example, the first pulse period of HF electrical power, the second pulse period of LF1 electrical power, and the third pulse period of LF2 electrical power are also considered as a single period, and the control of each pulse signal of HF electrical power, LF1 electrical power, and LF2 electrical power is repeated. Any pulse period can also include the exhaust period.

[0131] Figure 9 Pulse periodicity pattern and Figure 7 and Figure 8 The difference between the pulse period patterns is that the delay time Tdelay is... Figure 7 and Figure 8 The setting is made just before the LF1 power is about to switch to the on state, while... Figure 9 The setting is made just before the LF2 power is about to switch to the on state.

[0132] In this example, during period (1), the HF power is maintained at a high power level, while the LF1 and LF2 power are maintained at the off state. During period (3) and periods (5) and (7) that coincide with period (3) in time, the HF power, LF1 power, and LF2 power are all maintained at the off state (exhaust period).

[0133] After that, at time t 21 In the middle, the HF power level transitions to a low power level, which is lower than the high power level, and the LF1 power level transitions to the on state. At time t 21 LF2 power remains off. Furthermore, during period (2), HF power is maintained at a low power level. During period (4), which overlaps with period (2) in time (i.e., coincides with the first part of period (2) in time), LF1 power remains on for a duration of less than 30 μs. At time t in period (2) 22The LF1 power switch transitions to the off state at time t. 22 Time t after the delay Tdelay 23 At time t, the LF2 power supply switches to the ON state. 22 and time t 23 The HF power is maintained at a low power level. Furthermore, from time t... 23 During the period (6) that overlaps with period (2) in time (i.e., coincides with the second part of period (2) in time), the LF2 power is kept on.

[0134] In this example, during the period (2) when the HF power is maintained at a low power level, the LF1 and LF2 power are alternately switched on. Furthermore, during period (4), the LF1 power supply is applied for a short time of less than 30 μs. This allows for more vertical control of the ions, achieving highly anisotropic etching. Furthermore, regarding the time t after time (6)... 24 up to time t 25 The control during the exhaust period is the same as other pulse cycles, so the explanation is omitted.

[0135] As explained above, the plasma processing apparatus and plasma processing method according to this embodiment can improve the performance of the process by using multiple high-frequency electrical power pulse signals.

[0136] The plasma processing apparatus and plasma processing method disclosed in this invention are illustrative in all respects and should not be considered limiting. The embodiments can be modified and improved in various forms without departing from the scope and spirit of the appended claims. The contents described in the above embodiments can also be used in other structures and combined with each other without contradiction.

Claims

1. A plasma processing device, characterized in that, include: chamber; A first matching circuit coupled to the chamber; A second matching circuit coupled to the chamber; The first RF generation unit is configured to be coupled to the first matching circuit and is capable of generating a first RF pulse signal. The first RF pulse signal has a first power level greater than zero in a first period within each cycle, a zero power level in a second period after the first period within each cycle, a second power level smaller than the first power level and greater than zero in a third period after the second period within each cycle, and a zero power level in a fourth period after the third period within each cycle. The second RF generation unit is configured to be coupled to the second matching circuit and is capable of generating a second RF pulse signal. The frequency of the second RF pulse signal is lower than that of the first RF pulse signal. The second RF pulse signal has a zero power level during the first period, the third period, and the fourth period, and has a third power level greater than zero during the second period. The second period is less than 30 μs. as well as The third RF generation unit is configured to be coupled to the second matching circuit and is capable of generating a third RF pulse signal. The frequency of the third RF pulse signal is lower than that of the second RF pulse signal. The third RF pulse signal has a zero power level during the first period, the second period and the fourth period, and has a fourth power level greater than zero during the third period.

2. A plasma processing device, characterized in that, include: chamber; A first matching circuit coupled to the chamber; A second matching circuit coupled to the chamber; The first RF generation unit is configured to be coupled to the first matching circuit and is capable of generating a first RF pulse signal. The first RF pulse signal has a first power level greater than zero in a first period within each cycle, a zero power level in a second period after the first period within each cycle, a zero power level in a third period after the second period within each cycle, a second power level smaller than the first power level and greater than zero in a fourth period after the third period within each cycle, and a zero power level in a fifth period after the fourth period within each cycle. The second RF generation unit is configured to be coupled to the second matching circuit and is capable of generating a second RF pulse signal. The frequency of the second RF pulse signal is lower than that of the first RF pulse signal. The second RF pulse signal has a zero power level during the first period, the second period, the fourth period, and the fifth period, and has a third power level greater than zero during the third period, which is less than 30 μs. as well as The third RF generation unit is configured to be coupled to the second matching circuit and is capable of generating a third RF pulse signal. The frequency of the third RF pulse signal is lower than that of the second RF pulse signal. The third RF pulse signal has a zero power level in the first period, the second period, the third period and the fifth period, and has a fourth power level greater than zero in the fourth period.

3. A plasma processing device, characterized in that, include: chamber; A first matching circuit coupled to the chamber; A second matching circuit coupled to the chamber; The first RF generation unit is configured to be coupled to the first matching circuit and is capable of generating a first RF pulse signal. The first RF pulse signal has a first power level greater than zero in a first period within each cycle, a second power level smaller than the first power level and greater than zero in a second period after the first period within each cycle, a zero power level in a third period after the second period within each cycle, a zero power level in a fourth period after the third period within each cycle, and a zero power level in a fifth period after the fourth period within each cycle. The second RF generation unit is configured to be coupled to the second matching circuit and is capable of generating a second RF pulse signal. The frequency of the second RF pulse signal is lower than that of the first RF pulse signal. The second RF pulse signal has a zero power level during the first period, the second period, the third period, and the fifth period, and has a third power level greater than zero during the fourth period, which is less than 30 μs. as well as The third RF generation unit is configured to be coupled to the second matching circuit and is capable of generating a third RF pulse signal. The frequency of the third RF pulse signal is lower than that of the second RF pulse signal. The third RF pulse signal has a zero power level during the first period, the third period, the fourth period, and the fifth period, and has a fourth power level greater than zero during the second period.

4. A plasma processing apparatus, characterized in that, include: chamber; A first matching circuit coupled to the chamber; A second matching circuit coupled to the chamber; The first RF generation unit is configured to be coupled to the first matching circuit and is capable of generating a first RF pulse signal. The first RF pulse signal has a first power level greater than zero in a first period within each cycle, a zero power level in a second period after the first period within each cycle, a second power level smaller than the first power level and greater than zero in a third period after the second period within each cycle, a second power level in a fourth period after the third period within each cycle, a second power level in a fifth period after the fourth period within each cycle, and a zero power level in a sixth period after the fifth period within each cycle. The second RF generation unit is configured to be coupled to the second matching circuit and is capable of generating a second RF pulse signal. The frequency of the second RF pulse signal is lower than that of the first RF pulse signal. The second RF pulse signal has a zero power level during the first period, the second period, the fourth period, the fifth period, and the sixth period, and has a third power level greater than zero during the third period, which is less than 30 μs. as well as The third RF generation unit is configured to be coupled to the second matching circuit and is capable of generating a third RF pulse signal. The frequency of the third RF pulse signal is lower than that of the second RF pulse signal. The third RF pulse signal has a zero power level in the first period, the second period, the third period, the fourth period and the sixth period, and has a fourth power level greater than zero in the fifth period.

5. The plasma processing apparatus according to any one of claims 1 to 4, characterized in that: Each period has a duration of 50μs to 1000μs.

6. The plasma processing apparatus according to any one of claims 1 to 4, characterized in that: The first RF pulse signal has a frequency of 20MHz to 60MHz. The second RF pulse signal has a frequency of 1MHz to 15MHz. The third RF pulse signal has a frequency of 100kHz to 4MHz.

7. A plasma processing apparatus, characterized in that, include: chamber; At least one first matching circuit coupled to the chamber; At least one second matching circuit coupled to the chamber; The first RF generation unit is configured to be coupled to the at least one first matching circuit and is capable of generating a first RF pulse signal. The first RF pulse signal has a first power level greater than zero in a first period within each cycle, a zero power level in a second period after the first period within each cycle, and a zero power level in a third period after the second period within each cycle. as well as The second RF generation unit is configured to be coupled to at least one second matching circuit and is capable of generating a second RF pulse signal. The frequency of the second RF pulse signal is lower than that of the first RF pulse signal. The second RF pulse signal has a zero power level during the first period and the third period, and has a second power level greater than zero during the second period, which is less than 30 μs.

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