A method and apparatus for determining the switching frequency of an LCC resonant converter

Abstract

The application provides a switch frequency determination method and device for an LCC resonant converter, the method comprising: obtaining an input voltage and an output voltage of the LCC resonant converter; determining a starting mode in which the LCC resonant converter is currently located by using the output voltage; determining a calculation program corresponding to the starting mode by using the starting mode in which the LCC resonant converter is currently located, wherein the calculation program is an operation logic program designed for the starting mode by using a field programmable logic gate array; inputting the input voltage and the output voltage into the field programmable logic gate array, and calculating the switch frequency of the LCC resonant converter by using the calculation program, so that the switch frequency determination method improves the adjustment rate of the switch frequency of the LCC resonant converter, the rising speed of the output voltage, and further improves the dynamic response speed of an existing power supply.

Description

Technical Field

[0001] This invention relates to the field of resonant converter technology, and specifically to a method and apparatus for determining the switching frequency of an LCC resonant converter. Background Technology

[0002] In recent years, X-ray generators have been widely used in medical products such as digital direct imaging systems (DR), computed tomography (CT), and digital subtraction angiography (DSA). However, lower output ripple and faster dynamic response speed remain research hotspots and development trends for X-ray generators. Currently, LCC resonant converters, as an important component of X-ray generators, have been widely used in the field of high-voltage DC power supplies.

[0003] Traditional frequency conversion control of LCC resonant converters is simple to implement, but it struggles to balance startup speed with resonant current and voltage overshoot. Under traditional frequency conversion control, output ripple and dynamic response speed cannot meet the rapidly evolving technical specifications of X-ray generators, necessitating the development of new control strategies to improve the dynamic response speed of existing power supplies. The proposed state trajectory algorithm maximizes the output voltage rise rate of the LCC converter while ensuring no resonant current overshoot.

[0004] However, the existing technical solutions are implemented through digital signal processing (DSP). Since the DSP clock frequency is fixed and cannot be adjusted and has an upper limit, the time required to complete the state trajectory algorithm is basically fixed, which makes it difficult to further reduce its calculation cycle and cannot be applied to higher frequency LCC converters, thus limiting the development of the state trajectory algorithm. Summary of the Invention

[0005] Therefore, the present invention aims to solve the technical problem that the DSP clock frequency in the prior art is fixed and cannot be adjusted and has an upper limit, which prevents it from being applied to LCC resonant converters with higher frequencies, and thus provides a method and apparatus for determining the switching frequency of an LCC resonant converter.

[0006] According to a first aspect, embodiments of the present invention provide a method for determining the switching frequency of an LCC resonant converter, comprising the following steps:

[0007] Obtain the input voltage and output voltage of the LCC resonant converter;

[0008] The current startup mode of the LCC resonant converter is determined using the output voltage.

[0009] The calculation program corresponding to the current startup mode is determined by using the current startup mode, wherein the calculation program is an operation logic program designed for the startup mode using a field-programmable gate array;

[0010] The input voltage and the output voltage are input into the field-programmable gate array, and the switching frequency of the LCC resonant converter is calculated using the calculation program.

[0011] Optionally, the calculation program consists of multiple arithmetic operation tasks, wherein the calculation program is determined through the following steps:

[0012] Determine the operational logic corresponding to each startup mode, wherein the operational logic refers to the logic for calculating the switching frequency from the input voltage and the output voltage;

[0013] The computational logic is decomposed to obtain a computational program formed by sequentially connecting multiple arithmetic operation tasks, wherein each arithmetic operation task corresponds to an arithmetic computation module in the field-programmable gate array.

[0014] Optionally, the step of inputting the input voltage and the output voltage into the field-programmable gate array and calculating the switching frequency of the LCC resonant converter using the calculation program includes:

[0015] According to the multiple arithmetic operation tasks corresponding to the calculation program, the corresponding arithmetic calculation modules in the field-programmable gate array are called sequentially to perform calculations and obtain the switching frequency.

[0016] Optionally, the arithmetic calculation module includes: a multiplication module, a division module, a square root module, and an inverse trigonometric function calculation module, wherein arithmetic operation tasks with the same arithmetic operations in the calculation programs corresponding to different startup modes share the corresponding arithmetic calculation module.

[0017] Optionally, the clock used by the arithmetic calculation module is obtained by a phase-locked loop frequency multiplication configuration.

[0018] Optionally, the startup mode includes a low-energy startup phase mode and a high-energy startup phase mode, and determining the current startup mode of the LCC resonant converter using the output voltage includes:

[0019] Determine whether the output voltage is greater than a preset voltage value;

[0020] When the output voltage is greater than the preset voltage value, the high-energy startup phase mode of the LCC resonant converter is determined.

[0021] When the output voltage is less than or equal to the preset voltage value, the low-energy startup phase mode of the LCC resonant converter is determined.

[0022] According to a second aspect, embodiments of the present invention provide a switching frequency determination device for an LCC resonant converter, comprising:

[0023] The acquisition module is used to acquire the input voltage and output voltage of the LCC resonant converter;

[0024] The determination module is used to determine the current startup mode of the LCC resonant converter using the output voltage;

[0025] The program module is used to determine the calculation program corresponding to the current startup mode based on the current startup mode, wherein the calculation program is an operation logic program designed for the startup mode using a field-programmable gate array;

[0026] The arithmetic module is used to input the input voltage and the output voltage into the field-programmable gate array and use the calculation program to calculate the switching frequency of the LCC resonant converter.

[0027] Optionally, the program module further includes:

[0028] A determination module is used to determine the operational logic corresponding to each startup mode, wherein the operational logic refers to the logic for calculating the switching frequency from the input voltage and the output voltage;

[0029] The decomposition module is used to decompose the arithmetic logic to obtain a calculation program formed by sequentially connecting multiple arithmetic operation tasks, wherein each arithmetic operation task corresponds to an arithmetic calculation module in the field-programmable gate array.

[0030] According to a third aspect, embodiments of the present invention provide a computer device, including: a memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the computer instructions to perform the above-described method for determining the switching frequency of an LCC resonant converter.

[0031] According to a fourth aspect, embodiments of the present invention provide a computer-readable storage medium storing computer instructions for causing the computer to execute the above-described method for determining the switching frequency of an LCC resonant converter.

[0032] The technical solution of this invention has the following advantages:

[0033] 1. In this embodiment, the operational logic program designed using a field-programmable gate array (FPGA) employs an algorithm module whose clock is configured based on a fundamental crystal oscillator clock combined with phase-locked loop (PLL) frequency multiplication. This configuration offers strong processing performance and abundant logic operation resources. A higher clock speed than that of a DSP can be obtained through PLL frequency multiplication, reducing the calculation cycle of each operational module to below 1 microsecond. Therefore, the FPGA can rapidly calculate the switching frequency and switching cycle of the LCC resonant converter, resulting in fast calculation and processing speed, improved calculation and adjustment rate of the switching frequency, and enhanced adjustment efficiency of the LCC resonant converter's output voltage. Furthermore, this embodiment of the invention improves the overall startup rate and output voltage rise speed of the LCC resonant converter, and further enhances the dynamic response speed of existing power supplies.

[0034] 2. The arithmetic operation logic involved in the calculation process during low-energy or high-energy startup modes is decomposed, and the decomposed arithmetic operation tasks are implemented using the computing modules in the Field-Programmable Gate Array (FPGA). During the calculation process, when a corresponding module is involved, it is activated, and values ​​are assigned to its input registers. After the calculation is completed, the output value of the computing module is stored in a register. After the current calculation task is completed, the corresponding computing module is shut down, and when the next corresponding calculation task arrives, the current computing module is restarted. This achieves repeated use of individual computing modules, greatly saving the internal resources of the FPGA, improving the calculation speed, and thus further increasing the calculation cycle of each computing module. Attached Figure Description

[0035] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0036] Figure 1 This is a flowchart illustrating a specific example of a method for determining the switching frequency of an LCC resonant converter according to Embodiment 1 of the present invention;

[0037] Figure 2 This is a structural diagram of a specific example of the LCC resonant converter topology in Embodiment 1 of the present invention;

[0038] Figure 3 This is a graph illustrating a specific example of the theoretical state trajectory of the low-energy startup mode in Embodiment 1 of the present invention.

[0039] Figure 4This is a graph illustrating a specific example of the theoretical state trajectory of the high-energy startup mode in Embodiment 1 of the present invention.

[0040] Figure 5 The flowchart is a specific example of the operational logic corresponding to the low-energy startup mode in Embodiment 1 of the present invention.

[0041] Figure 6 This is a flowchart illustrating a specific example of the operational logic corresponding to the high-energy startup mode in Embodiment 1 of the present invention.

[0042] Figure 7 This is a flowchart illustrating a specific example of calculating the switching frequency in Embodiment 1 of the present invention;

[0043] Figure 8 This is a schematic block diagram of a specific example of a switching frequency determination device for an LCC resonant converter in Embodiment 2 of the present invention;

[0044] Figure 9 This is a schematic diagram of a specific example of a computer device in Embodiment 3 of the present invention. Detailed Implementation

[0045] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0046] In the description of this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0047] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can also refer to the internal connection of two components; and they can refer to a wireless connection or a wired connection. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0048] Furthermore, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0049] Example 1

[0050] This embodiment provides a method for determining the switching frequency of an LCC resonant converter. This method can be executed by devices such as servers. The servers perform calculations, logical operations, and outputs on the data required by the LCC resonant converter, thereby determining the switching frequency of the LCC resonant converter. Figure 1 As shown.

[0051] like Figure 2 As shown, the LCC resonant converter topology consists of four switching transistors S1, S2, S3, and S4. The resonant cavity is composed of a resonant inductor Lr, a series resonant capacitor Cr, and a parallel resonant capacitor Cp. The primary-to-secondary turns ratio of the transformer in the resonant converter is 1:n. The secondary rectifier bridge contains four diodes, D5, D6, D7, and D8. The input voltage of the LCC resonant converter is V. in The output voltage of the LCC resonant converter is V. O The output uses capacitor C O Filtering is performed using capacitor C. O Also with the output equivalent load R L in parallel.

[0052] Furthermore, based on the output waveform and corresponding resonant state of the LCC resonant converter, it can be known that the LCC resonant converter has 6 operating modes. Based on the equivalent circuits under the 6 operating modes and according to Kirchhoff's laws, the following 6 state trajectory curve equations are solved:

[0053] Mode 1: [i LrN (t)] 2 +[V CprN (t)-1] 2 =[i LrN (t0)] 2 +[V CprN (t0)-1] 2

[0054] Mode 2:

[0055] Modality 3: [i LrN (t)] 2 +[V CprN (t)-1] 2 =[i LrN (t5)] 2 +[V CprN(t5)+1] 2

[0056] Mode 4: [i LrN (t)] 2 +[V CprN (t)+1] 2 =[i LrN (t0)] 2 +[V CprN (t0)-1] 2

[0057] Mode 5:

[0058] Modality 6: [i LrN (t)] 2 +[V CprN (t)+1] 2 =[i LrN (t5)] 2 +[V CprN (t5)+1] 2

[0059] Among them, i LrN The vertical axis coordinate of the state trajectory, V CprN The horizontal axis coordinate of the state trajectory, t0-t5 represent the working hours for each time period.

[0060] The startup process includes a low-energy startup mode in the initial stage and a high-energy startup mode in the final stage. The theoretical state trajectory of the low-energy startup mode is as follows: Figure 3 As shown. Let the coordinates at time t1 be (V A ,I A The coordinates at time t2 are (V B ,I B ), the coordinates of t3 are (V C ,I C ), the coordinates of t4 are (V D ,I D ).according to Figure 3 From the coordinate system, we know that point A is the intersection of the ellipse of mode 2 trajectory and the circle of mode 1 trajectory; point B is the intersection of the ellipse of mode 2 trajectory and the circle of mode 3 trajectory; point C is the intersection of the circle of mode 3 trajectory and the circle of mode 4 trajectory; and point D is the intersection of the circle of mode 5 trajectory and the circle of mode 4 trajectory. Combining this with the equations of the state trajectory curves, we can derive the following system of equations:

[0061]

[0062]

[0063] Among them, i maxN R is the maximum output current of the LCC resonant converter, R is the radius of the circle trajectory, and r is the radius of the ellipse trajectory.

[0064] During mode 2, the LCC resonant converter is in a three-element resonant state (Cr, Cp, Lr). The resonant cavity does not supply energy to the load side, and the resonant current is used entirely to charge the series resonant capacitor Cr and the parallel resonant capacitor Cp. Based on the equivalent LCC resonant converter topology in mode 2, the equations are written as follows:

[0065]

[0066] Among them, i Lr For the current flowing through the resonant inductor Lr, V Cp The voltage and voltage applied across the parallel resonant capacitor Cp are V. Cr Let n be the voltage applied across the series resonant capacitor Cr, and n be the number of turns on the primary and secondary sides.

[0067] Integrating both sides simultaneously, we get:

[0068]

[0069] At time t1, the voltage across the parallel resonant capacitor Cp is -Vo, and at time t2, the voltage across the parallel resonant capacitor Cp is Vo. Solving the integral based on the given conditions yields:

[0070]

[0071] Therefore, V CprN (t2) and V CprN The relationship of (t1) is:

[0072] V CprN (t2)-V CprN (t1)=[V Cp (t2)-V Cp (t1)] / (V in / n)+[V Cr (t2)-V Cr (t1)] / V in

[0073] The parameters that do not include resonant cavity voltage and current are integrated as follows:

[0074]

[0075] Where A1, B1, and C1 represent their corresponding equations.

[0076] Solving the above equation, we obtain information about V. A The equation is as follows:

[0077]

[0078] Solving the equation yields:

[0079]

[0080] Based on the V obtained from the solution A The value, further simplified, yields:

[0081]

[0082] After solving for the coordinates of the intersection points of the state trajectory modes in the early stage of the second phase and the radii of each trajectory circle, the central angle ∠θ0, the elliptical eccentric angle ∠θ1, and the central angle ∠θ2 can be further obtained.

[0083] The central angle corresponding to arc CD is ∠θ0. Solving for the sine of this angle and simplifying, we obtain the following formula:

[0084]

[0085] The eccentric angle of the ellipse corresponding to arc AB is ∠θ1. Solving for the cosine of this angle and simplifying, we obtain the following formula:

[0086]

[0087] The central angle corresponding to arc BC is ∠θ2. Directly calculating this angle involves a large amount of computation. It can be converted into the difference between ∠CO1A and ∠BO1A. By subtracting the values ​​of the two angles and simplifying, we obtain the following formula:

[0088]

[0089] After solving for the central angles of the two circular arcs and the eccentric angle of one elliptical arc, and combining this with the resonant frequencies corresponding to the three trajectories, the conduction period and frequency of the switching transistor corresponding to the three trajectories are determined. The circular arc trajectory corresponds to the resonant mode of the dual-element Cr and Lr circuits, with a resonant frequency of ω0. The elliptical arc corresponds to the resonant mode of the three elements Cr, Cp, and Lr, with a resonant frequency of ω1, where, After integration, the following formula is obtained:

[0090]

[0091]

[0092] Among them, T sw For the conduction period of the switching transistor, f sw θ0 is the conduction frequency of the switching transistor, θ1 is the central angle corresponding to the arc CD, θ2 is the eccentric angle of the ellipse corresponding to the arc AB, and θ2 is the central angle corresponding to the arc BC.

[0093] Furthermore, the theoretical state trajectory of the high-energy start-up mode is as follows: Figure 4 As shown. Let the coordinates at time t1 be (V E ,I E The coordinates at time t2 are (V F ,I F ), the coordinates of t3 are (V G ,I G ), the coordinates of t4 are (V H ,I H Point E is the intersection of the ellipse of the mode 2 trajectory and the circle of the mode 1 trajectory; point F is the intersection of the ellipse of the mode 2 trajectory and the circle of the mode 3 trajectory; point G is the intersection of the circle of the mode 3 trajectory and the circle of the mode 4 trajectory; and point H is the intersection of the circle of the mode 3 trajectory and the ellipse of the mode 4 trajectory.

[0094] Similar to the initial stage of the second phase, the following relationship is obtained by solving the equations based on the simplified equivalent circuit of the three-element resonance:

[0095]

[0096] Combining the state trajectory curve equations given above, the following system of equations can be derived:

[0097]

[0098]

[0099] The parameters that do not include resonant cavity voltage and current are integrated as follows:

[0100]

[0101] Where a1, b1, and c1 represent their corresponding equations.

[0102] Solving the above equation, we obtain information about V. E The equation is as follows:

[0103]

[0104] Solving the equation yields:

[0105]

[0106] Based on the V obtained from the solution E The value can be further simplified to obtain:

[0107]

[0108] Based on the position of point G in the state trajectory diagram, the equation it satisfies is as follows:

[0109]

[0110] Solving for V yields G The value is:

[0111]

[0112] After solving for the coordinates of the intersection points of the state trajectory modes in the early stage of the second phase and the radii of each trajectory circle, the central angle ∠θ3, the elliptical eccentric angle ∠θ4, and the central angle ∠θ5 can be further obtained.

[0113] The central angle corresponding to the arc GH is ∠θ3. Solving for the sine of this angle and simplifying, we obtain the following formula:

[0114]

[0115] The eccentric angle of the ellipse corresponding to arc EF is ∠θ4. Solving for the cosine of this angle and simplifying, we obtain the following formula:

[0116]

[0117] The central angle corresponding to arc FG is ∠θ5. Directly calculating this angle involves a large amount of computation. It can be converted into the difference between ∠EO1G and ∠EO1F. By subtracting the values ​​of the two angles and simplifying, the following formula is obtained:

[0118]

[0119] After solving for the central angles of the two circular arcs and the eccentric angle of one elliptical arc, and combining this with the resonant frequencies corresponding to the three trajectories, the conduction period and frequency of the switching transistor corresponding to the three trajectories are determined. The circular arc trajectory corresponds to the resonant mode of the dual-element Cr and Lr circuits, with a resonant frequency of ω0. The elliptical arc corresponds to the resonant mode of the three elements Cr, Cp, and Lr, with a resonant frequency of ω1, where, After integration, the following formula is obtained:

[0120]

[0121]

[0122] Where θ3 is the eccentric angle of the ellipse corresponding to the elliptical arc EF, θ4 is the eccentric angle of the ellipse corresponding to the elliptical arc EF, and θ5 is the central angle corresponding to the circular arc FG.

[0123] The above describes the calculation process for the switching period and frequency of the switching transistor in high-energy startup mode and low-energy startup mode. The method for determining the switching frequency of the LCC resonant converter described in this embodiment is not limited to the above calculation process and can also be applied to other calculation processes.

[0124] In this embodiment, the method for determining the switching frequency of the LCC resonant converter includes the following steps:

[0125] Step S101: Obtain the input voltage and output voltage of the LCC resonant converter.

[0126] Based on the LCC resonant converter topology, the input voltage V of the LCC resonant converter... in and output voltage V O Continuous sampling is performed to continuously acquire the input and output voltages of the LCC resonant converter.

[0127] Step S102: Determine the current startup mode of the LCC resonant converter using the output voltage.

[0128] Determine the output voltage V of the currently sampled LCC resonant converter. O If the voltage is less than or equal to the preset voltage value, the LCC resonant converter is determined to execute the low-energy startup mode. If the voltage is greater than the preset voltage value, the LCC resonant converter is determined to execute the high-energy startup mode.

[0129] Step S103: Determine the calculation program corresponding to the current startup mode using the current startup mode, wherein the calculation program is an operation logic program designed for the startup mode using a field-programmable gate array.

[0130] As described above, the on-time T of the switching transistor in both low-energy and high-energy startup modes was explained. sw and the switching frequency f sw The calculation process is as follows. Taking the low-energy startup mode as an example, in calculating the switching period and switching frequency of the switching transistor, it is first necessary to calculate the state trajectory curve equations corresponding to the six operating modes of the LCC resonant converter. Secondly, using the intersection points of the state trajectories under the six operating modes, the coordinate values ​​of the intersection points of the state trajectory modes and the radius of each trajectory circle are calculated. Furthermore, the central angle ∠θ0 corresponding to the arc CD, the eccentric angle ∠θ1 corresponding to the elliptical arc AB, and the central angle ∠θ2 corresponding to the arc BC are calculated. Finally, the switching period T of the switching transistor is obtained. sw and the switching frequency f sw .

[0131] In existing technologies, digital signal processing (DSP) is used to calculate the operating modes, state trajectory intersections, and switching cycle and frequency of the LCC resonant converter. However, since DSPs utilize digital signal processing, the time required for their internal CPU clock to complete the algorithm is essentially fixed, making it difficult to further reduce the calculation cycle. In this embodiment, a field-programmable gate array (FPGA) is used. The FPGA is used to design corresponding operational logic programs for high-energy or low-energy startup modes. The clocks used by the calculation modules in its operational logic program are configured based on the fundamental crystal oscillator clock and combined with phase-locked loop (PLL) frequency multiplication. This results in stronger processing performance and more logic operation resources. By using PLL frequency multiplication to obtain a higher clock speed than the DSP, the calculation cycle of each module is reduced to below 1 microsecond, thereby improving the calculation and adjustment rate of the switching frequency.

[0132] Step S104: Input the input voltage and the output voltage into the field programmable gate array, and use the calculation program to calculate the switching frequency of the LCC resonant converter.

[0133] like Figure 5 As shown, this is the corresponding operational logic program designed according to the low-energy startup mode in this embodiment; as Figure 6 As shown, this is the corresponding operational logic program designed according to the high-energy startup mode in this embodiment; as Figure 7 As shown, the first cycle pulse is initiated to adjust the resonant current of the LCC resonant converter to the set maximum value, and the input voltage V of the LCC resonant converter is adjusted accordingly. in and output voltage V O Perform continuous sampling. Determine the output voltage V of the currently sampled LCC resonant converter. O Is it greater than the preset voltage value V? O _set*k1, if greater than the preset voltage value V O If `_set*k1` is executed, the LCC resonant converter is now in high-energy startup mode, and the corresponding operational logic program designed for high-energy startup mode is started, i.e., the high-energy startup mode program; if the voltage is less than or equal to the preset voltage value V... O `_set*k1` determines that the LCC resonant converter is currently in low-energy startup mode, and begins executing the corresponding operational logic program designed for low-energy startup mode, i.e., the low-energy startup mode program. The switching frequency under the current input and output voltages is obtained based on the calculation results of the calculation program, which is the switching frequency of the LCC resonant converter. If the output voltage V... O Rise to a value greater than the preset voltage V O_set*k2, then during the current startup mode calculation process, i.e., at the end of the state trajectory algorithm, the traditional PI control algorithm is superimposed to achieve hybrid control, and the final output is superimposed with the switching frequency f+Δf. If the output voltage V O Less than or equal to the preset voltage value V O If `_set*k2` is used, the switching frequency `f` will be directly output, where the switching frequency `f` is related to the conduction frequency of the switching transistor `f`. sw For the same parameter, the preset voltage value V O _set*k2 is greater than the preset voltage value V O _set*k1. After outputting the switching frequency at the current output voltage, it continues to judge the output voltage sampled at the next moment.

[0134] In this embodiment, the current startup mode of the LCC resonant converter is determined based on the continuously sampled input and output voltages. The corresponding operational logic program designed using a field-programmable gate array (FPGA) is then determined based on this startup mode. The input and output voltages are input into the FPGA, and the switching frequency of the LCC resonant converter is calculated using the computational program. In this embodiment, the operational logic program designed using the FPGA employs an algorithm module whose clock is configured based on a fundamental crystal oscillator clock combined with phase-locked loop (PLL) frequency multiplication. This configuration offers strong processing performance and abundant logic operation resources. A higher clock frequency than that of a DSP can be obtained through PLL frequency multiplication, reducing the computation cycle of each operational module to below 1 microsecond.

[0135] Therefore, the switching frequency and switching period of the LCC resonant converter can be quickly calculated using a field-programmable gate array (FPGA). This fast calculation speed improves the calculation and adjustment rate of the switching frequency, as well as the adjustment efficiency of the LCC resonant converter's output voltage. Furthermore, this embodiment of the invention improves the overall startup rate and output voltage rise speed of the LCC resonant converter, and further enhances the dynamic response speed of existing power supplies.

[0136] As an optional implementation, in this embodiment of the invention, the calculation program consists of multiple arithmetic operation tasks, wherein the calculation program is determined through the following steps:

[0137] Step 1031: Determine the operational logic corresponding to each startup mode, wherein the operational logic refers to the logic for calculating the switching frequency from the input voltage and the output voltage.

[0138] Step 1032: Decompose the arithmetic logic to obtain a calculation program formed by sequentially connecting multiple arithmetic operation tasks, wherein each arithmetic operation task corresponds to an arithmetic calculation module in the field programmable gate array.

[0139] The calculation processes for the switching transistor's on-time and frequency in high-energy startup mode and low-energy startup mode are as described above. Taking low-energy startup mode as an example, the process of calculating the switching transistor's on-time and frequency in this mode can be referred to as the operational logic in this embodiment. The operational logic calculation formulas involve basic arithmetic operations such as multiplication and division. All formulas involved in the calculation process are broken down into basic multiplication, division, square root, and inverse trigonometric functions. Each arithmetic operation task is implemented using a calculation module in a Field-Programmable Gate Array (FPGA) to realize its operational logic calculation function. The calculation module includes: a multiplication module, a division module, a square root module, and an inverse trigonometric function calculation module. The multiplication module, division module, and square root module can be implemented by writing corresponding CORDIC algorithms within the FPGA, while the inverse trigonometric function calculation module can be implemented using a lookup table in the FPGA.

[0140] Furthermore, the calculation formulas involved in the low-energy or high-energy startup mode operation logic are decomposed, and the resulting multiple arithmetic operation tasks are connected according to the calculation modules contained in each arithmetic operation task. The connection method is to connect them in series according to the arithmetic operation nodes involved in each step of the calculation process. The result of the previous calculation can be stored in a register for easy retrieval in subsequent calculations. The calculation module is a sub-module contained within the calculation module, such as a multiplication module, a division module, a square root module, and an inverse trigonometric function calculation module, etc.

[0141] In this embodiment, the computational logic involved in the calculation process of low-energy or high-energy startup modes is decomposed, and the decomposed arithmetic operation tasks are implemented using the computing modules in the Field-Programmable Gate Array (FPGA). During the calculation process, when a corresponding module is encountered, the corresponding computing module is opened, and values ​​are assigned to the input registers of the computing module. After the calculation is completed, the output value of the computing module is stored in the register. After the current computation task is completed, the corresponding computing module is closed, and when the next corresponding computation task arrives, the current computing module is restarted. This achieves repeated use of individual computing modules, greatly saving the internal resources of the FPGA, improving the computation speed, and further increasing the computation cycle of each computing module, thereby maximizing the overall startup speed and output voltage rise rate of the LCC resonant converter.

[0142] As an optional implementation, in this embodiment of the invention, the step of inputting the input voltage and the output voltage into the field-programmable gate array and calculating the switching frequency of the LCC resonant converter using the calculation program includes:

[0143] According to the multiple arithmetic operation tasks corresponding to the calculation program, the corresponding arithmetic calculation modules in the field-programmable gate array are called sequentially to perform calculations and obtain the switching frequency.

[0144] As described above, during the calculation process, when a corresponding module is encountered, that module is activated, its input register is assigned a value, and after the calculation is complete, the output value is stored in a register. Once the current task is finished, the corresponding module is closed. The process then continues with the next arithmetic operation, sequentially calling the corresponding arithmetic modules within the field-programmable gate array (FPGA) according to the calculation process. When the same arithmetic operation task is encountered, the corresponding module is activated again when the next task arrives. This allows for the repeated use of individual calculation modules, significantly conserving FPGA internal resources and increasing the computational speed. This further extends the computation cycle of each module, maximizing the overall startup speed and output voltage rise rate of the LCC resonant converter.

[0145] As an optional implementation, in this embodiment of the invention, the arithmetic calculation module includes: a multiplication module, a division module, a square root module, and an inverse trigonometric function calculation module, wherein arithmetic operation tasks with the same arithmetic operation in the calculation program corresponding to different startup modes share the corresponding arithmetic calculation module.

[0146] All formulas involved in the calculation process are broken down into basic multiplication, division, square root, and inverse trigonometric functions. Each arithmetic operation logic is implemented using a computation module within a Field-Programmable Gate Array (FPGA). The computation modules include: a multiplication module, a division module, a square root module, and an inverse trigonometric function computation module. The multiplication, division, and square root modules can be implemented using corresponding CORDIC algorithms programmed within the FPGA, while the inverse trigonometric function computation module can be implemented using a lookup table within the FPGA. When the same arithmetic operation task is involved, the corresponding computation module is activated again when the next corresponding operation task arrives. This achieves repeated use of individual computation modules, greatly conserving the internal resources of the FPGA and improving the computation speed.

[0147] As an optional implementation, in this embodiment of the invention, the clock used by the arithmetic calculation module is obtained by phase-locked loop frequency multiplication.

[0148] The operational logic program designed using field-programmable gate arrays (FPGAs) uses clocks configured based on the fundamental crystal oscillator clock and combined with phase-locked loop (PLL) frequency multiplication. It has strong processing performance and abundant logic operation resources. By multiplying the PLL frequency, it can obtain a higher clock than DSPs, reducing the calculation cycle of each algorithm module to less than 1 microsecond, thereby improving the calculation and adjustment rate of switching frequency.

[0149] As an optional implementation, in this embodiment of the invention, the startup mode includes a low-energy startup phase mode and a high-energy startup phase mode. Determining the current startup mode of the LCC resonant converter using the output voltage includes:

[0150] Determine whether the output voltage is greater than a preset voltage value;

[0151] When the output voltage is greater than the preset voltage value, the high-energy startup phase mode of the LCC resonant converter is determined.

[0152] When the output voltage is less than or equal to the preset voltage value, the low-energy startup phase mode of the LCC resonant converter is determined.

[0153] The input voltage V of the LCC resonant converter in and output voltage V O Perform continuous sampling. Determine the output voltage V of the currently sampled LCC resonant converter. O Is it greater than the preset voltage value V? O _set*k1, if greater than the preset voltage value V O If `_set*k1` is executed, the LCC resonant converter is now in high-energy startup mode, and the corresponding operational logic program designed for high-energy startup mode is started, i.e., the high-energy startup mode program; if the voltage is less than or equal to the preset voltage value V... O If _set*k1 is used, it is determined that the current LCC resonant converter is executing the low-energy startup mode and begins to execute the corresponding operation logic program designed according to the low-energy startup mode, that is, the low-energy startup mode program.

[0154] In this embodiment, based on the collected output voltage, a low-energy start-up mode or a high-energy start-up mode is determined, and the corresponding operation logic program designed for the high-energy start-up mode or the low-energy start-up mode is executed. The operation logic program is processed respectively, which improves the calculation speed and thus improves the adjustment rate of the switching frequency.

[0155] Example 2

[0156] This embodiment provides a device for determining the switching frequency of an LCC resonant converter. This device can be used to execute the method for determining the switching frequency of the LCC resonant converter in Embodiment 1 above. This device can be installed inside a server or other equipment, with modules cooperating with each other to determine the switching frequency of the LCC resonant converter. Figure 8 As shown, the device includes:

[0157] The acquisition module 201 is used to acquire the input voltage and output voltage of the LCC resonant converter;

[0158] Determining module 202 is used to determine the current startup mode of the LCC resonant converter using the output voltage;

[0159] Program module 203 is used to determine the calculation program corresponding to the current startup mode using the current startup mode, wherein the calculation program is an operation logic program designed for the startup mode using a field-programmable gate array;

[0160] The arithmetic module 204 is used to input the input voltage and the output voltage into the field programmable gate array and use the calculation program to calculate the switching frequency of the LCC resonant converter.

[0161] In this embodiment, based on the continuously sampled input and output voltages of the LCC resonant converter, the current startup mode of the LCC resonant converter is determined. The corresponding operational logic program designed using a field-programmable gate array (FPGA) is then determined based on this startup mode. The input and output voltages are input into the FPGA, and the switching frequency of the LCC resonant converter is calculated using the computational program. In this embodiment, the computational logic program designed using the FPGA employs an algorithm module whose clock is configured based on a fundamental crystal oscillator clock combined with phase-locked loop (PLL) frequency multiplication. This results in strong processing performance and abundant logic operation resources. A higher clock frequency than that of a DSP can be obtained through PLL frequency multiplication, reducing the computation cycle of each operational module to below 1 microsecond. Therefore, the FPGA can quickly calculate the switching frequency and switching cycle of the LCC resonant converter, resulting in fast calculation speed, improved switching frequency adjustment rate, and enhanced output voltage regulation efficiency. Furthermore, this improves the overall startup rate and output voltage rise speed of the LCC resonant converter, and further enhances the dynamic response speed of existing power supplies.

[0162] As an optional implementation, in this embodiment of the invention, the program module further includes:

[0163] A determination module is used to determine the operational logic corresponding to each startup mode, wherein the operational logic refers to the logic for calculating the switching frequency from the input voltage and the output voltage;

[0164] The decomposition module is used to decompose the arithmetic logic to obtain a calculation program formed by sequentially connecting multiple arithmetic operation tasks, wherein each arithmetic operation task corresponds to an arithmetic calculation module in the field-programmable gate array.

[0165] For a detailed description of the aforementioned device, please refer to the above method embodiments, which will not be repeated here.

[0166] Example 3

[0167] This embodiment provides a computer device, such as... Figure 9 As shown, the computer device includes a processor 301 and a memory 302, wherein the processor 301 and the memory 302 can be connected via a bus or other means. Figure 9 Taking the example of a connection between China and Israel via a bus.

[0168] Processor 301 can be a Central Processing Unit (CPU). Processor 301 can also be other general-purpose processors, digital signal processors (DSPs), graphics processing units (GPUs), embedded neural network processing units (NPUs), or other dedicated deep learning coprocessors, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or combinations of the above types of chips.

[0169] Memory 302, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs, non-transitory computer-executable programs, and modules, such as the method for determining the switching frequency of the LCC resonant converter in this embodiment of the invention. Corresponding program instructions / modules are also stored. Processor 301 executes various processor functions and data processing by running the non-transitory software programs, instructions, and modules stored in memory 302, thereby implementing the method for determining the switching frequency of the LCC resonant converter in the above embodiment.

[0170] The memory 302 may further include a program storage area and a data storage area, wherein the program storage area may store the operating system and applications required for at least one function; the data storage area may store data created by the processor 301, etc. Furthermore, the memory 302 may include high-speed random access memory and non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, the memory 302 may optionally include memory remotely located relative to the processor 301, and these remote memories may be connected to the processor 301 via a network. Embodiments of the aforementioned network include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0171] The memory 302 stores one or more modules, which, when executed by the processor 301, perform actions such as... Figure 1 The method for determining the switching frequency of the LCC resonant converter in the illustrated embodiment.

[0172] For specific details regarding the aforementioned computer equipment, please refer to the relevant documentation. Figure 1 The relevant descriptions and effects in the illustrated embodiments are for understanding purposes only and will not be repeated here.

[0173] This invention also provides a computer-readable storage medium storing computer-executable instructions that can execute the switching frequency determination method for the LCC resonant converter in any of the above embodiments. The storage medium may be a magnetic disk, optical disk, read-only memory (ROM), random access memory (RAM), flash memory, hard disk drive (HDD), or solid-state drive (SSD), etc.; the storage medium may also include combinations of the above types of memory.

[0174] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this invention.

Claims

1. A method for determining the switching frequency of an LCC resonant converter, characterized in that, Includes the following steps: Obtain the input voltage and output voltage of the LCC resonant converter; The current startup mode of the LCC resonant converter is determined using the output voltage. The calculation program corresponding to the current startup mode is determined by utilizing the current startup mode. The calculation program is an arithmetic logic program designed for the startup mode using a field-programmable gate array (FPGA). The calculation program consists of multiple arithmetic operation tasks, and is determined through the following steps: determining the arithmetic logic corresponding to each startup mode, wherein the arithmetic logic refers to the logic that calculates the switching frequency from the input voltage and the output voltage; decomposing the arithmetic logic to obtain a calculation program formed by sequentially connecting multiple arithmetic operation tasks, wherein each arithmetic operation task corresponds to an arithmetic calculation module in the FPGA; during the calculation process, when the corresponding module is calculated, the corresponding calculation module is opened, and the input register of the calculation module is assigned a value; after the calculation is completed, the output value of the calculation module is placed in the register for storage; after the current operation task is completed, the corresponding calculation module is closed, and when the next corresponding operation task arrives, the current calculation module is restarted. The input voltage and the output voltage are input into the field-programmable gate array, and the switching frequency of the LCC resonant converter is calculated using the calculation program.

2. The switching frequency determination method according to claim 1, characterized in that, The step of inputting the input voltage and the output voltage into the field-programmable gate array and calculating the switching frequency of the LCC resonant converter using the calculation program includes: According to the multiple arithmetic operation tasks corresponding to the calculation program, the corresponding arithmetic calculation modules in the field-programmable gate array are called sequentially to perform calculations and obtain the switching frequency.

3. The switching frequency determination method according to claim 2, characterized in that, The arithmetic calculation module includes: a multiplication module, a division module, a square root module, and an inverse trigonometric function calculation module. Among them, arithmetic operation tasks with the same arithmetic operation in the calculation program corresponding to different startup modes share the corresponding arithmetic calculation module.

4. The method for determining the switching frequency according to claim 2 or 3, characterized in that, The clock used by the arithmetic calculation module is obtained by frequency multiplication using a phase-locked loop.

5. The method for determining the switching frequency according to claim 1, characterized in that, The startup modes include a low-energy startup phase mode and a high-energy startup phase mode. Determining the current startup mode of the LCC resonant converter using the output voltage includes: Determine whether the output voltage is greater than a preset voltage value; When the output voltage is greater than the preset voltage value, the high-energy startup phase mode of the LCC resonant converter is determined. When the output voltage is less than or equal to the preset voltage value, the low-energy startup phase mode of the LCC resonant converter is determined.

6. A device for determining the switching frequency of an LCC resonant converter, characterized in that, include: The acquisition module is used to acquire the input voltage and output voltage of the LCC resonant converter; The determination module is used to determine the current startup mode of the LCC resonant converter using the output voltage; The program module is used to determine the calculation program corresponding to the current startup mode. The calculation program is an arithmetic logic program designed for the startup mode using a field-programmable gate array (FPGA). The calculation program consists of multiple arithmetic operation tasks. During the calculation process, when a corresponding module is encountered, the corresponding calculation module is opened, and values ​​are assigned to its input registers. After the calculation is completed, the output value of the calculation module is stored in a register. After the current operation task is completed, the corresponding calculation module is closed. When the next corresponding operation task arrives, the current calculation module is restarted. The arithmetic module is used to input the input voltage and the output voltage into the field-programmable gate array (FPGA) and calculate the switching frequency of the LCC resonant converter using the calculation program; the program module further includes: A determination module is used to determine the operational logic corresponding to each startup mode, wherein the operational logic refers to the logic for calculating the switching frequency from the input voltage and the output voltage; The decomposition module is used to decompose the arithmetic logic to obtain a calculation program formed by sequentially connecting multiple arithmetic operation tasks, wherein each arithmetic operation task corresponds to an arithmetic calculation module in the field-programmable gate array.

7. A computer device, characterized in that, include: The system includes a memory and a processor, which are interconnected. The memory stores computer instructions, and the processor executes the computer instructions to perform the switching frequency determination method for the LCC resonant converter according to any one of claims 1-5.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions for causing the computer to execute the switching frequency determination method for the LCC resonant converter according to any one of claims 1-5.

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