A test circuit and method for flash read protection change
By burning the test program in SRAM and starting it from SRAM, and combining writing the mark bits to record the restart situation in the flash register, the problem of program erasing caused by changing the flash read protection level is solved, and the effective change of flash read protection status is achieved test.
Patent Information
- Application Number
- CN202111586275.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-12-23
- Publication Date
- 2025-02-18
- Estimated Expiration
- 2041-12-23
AI Technical Summary
Changes in flash read protection level cause program erasing, resulting in the inability to test flash's read protection status change.
Avoid erasing the test program by burning the test program into the SRAM and starting it from the SRAM. In addition, write the flag bit in the flash register FLASH_OBR to record the program restart situation and skip the restart loop.
It effectively avoids the test program being erased when the flash read protection level changes, solves the problem of infinite restart of the program, and realizes effective testing of the flash read protection status changes.
Smart Images

Figure CN114220473B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to a test circuit and method for changing flash read protection, belonging to the technical field of chip testing. Background Art
[0002] Flash is a type of storage chip that can modify the data in it through a specific program. Flash often means Flash Memory in the field of electronics and semiconductors, which is what we usually call "flash memory". Flash memory, also known as flash memory, combines the advantages of ROM and RAM. It not only has the performance of electronic erasable programmable memory (EEPROM), but also can read data quickly (the advantage of NVRAM), so that data will not be lost due to power failure.
[0003] In the actual released products, for example, the control program is stored in the internal flash of the STM32 chip. If no protection measures are taken, the contents of the internal flash can be directly read back using a downloader to obtain a code copy in bin or hex file format. Manufacturers with ulterior motives can use this code file to copy products. For this reason, the STM32 chip provides a variety of ways to protect the program in the internal flash from being illegally read, but this protection function is not enabled by default. To enable this function, you need to rewrite the configuration in the internal flash option bytes.
[0004] The read protection level of the chip's flash is divided into no protection, read-only protection and debug disabled. When the read protection level of the chip's flash changes, it will cause mass erase, that is, the program content written to the main part of the flash will be completely erased to achieve the purpose of protecting the user code security. After the read protection level changes, since the test program is completely erased, the subsequent program used to verify the flash mass erase cannot continue to execute. In addition, the way to change the read protection level is to modify the read protection option byte of the register FLASH_OBR, and the system function system reset needs to be called so that it will take effect after the program is restarted. The problem here is that after the program is restarted, the program will start executing from the first line again. If it is not processed, the program will enter an endless loop of continuous restarts. Summary of the invention
[0005] The object of the present invention is to provide a test circuit and method for flash read protection change, aiming to solve the problem that the program is erased and cannot be tested due to the change of the flash read protection level.
[0006] To achieve the above-mentioned purpose, the present invention provides the following technical solutions: a test circuit for changing flash read protection, comprising a chip, a host computer and a program downloader, the chip comprising a flash module and an SRAM module, the chip power pin is connected to a corresponding voltage power supply, the chip GND pin is grounded, the chip BOOT0 and BOOT1 are connected to a pull-up resistor and connected to a power supply, one end of the program downloader is connected to a chip JTAG serial port, and the other end of the program downloader is connected to the host computer.
[0007] The present invention also discloses a test method for changing the flash read protection, which adopts the above-mentioned test circuit for changing the flash read protection and specifically comprises the following steps:
[0008] (1) Complete the hardware connection of the above test circuit;
[0009] (2) Burn the test flash program into the chip's SRAM through the downloader and start from SRAM;
[0010] (3) Determine whether the flash register FLASH_OBR is the initial value. If so, write the content to the flash and write the mark value to the flash register FLASH_OBR, restart the program to make the mark value take effect. If not, execute the next step;
[0011] (4) Determine whether the flash register FLASH_OBR is the written mark value. If so, modify the value of the read protection bit in the flash and restart the program to make the read protection status change take effect. If not, execute the next step;
[0012] (5) Determine whether the value of the flash read protection bit is the value modified in step (4). If so, use the test program to detect the content written to the flash in step (3). If not, it means that the flash read protection cannot be enabled, and the flash read protection status change cannot be tested.
[0013] (6) The test program is used to determine whether the content written to the flash in step (3) is erased. If so, it is verified that the change in the chip flash read protection level will cause the program to be erased. If not, it means that the change in the chip flash read protection level will not cause the program to be erased.
[0014] Furthermore, in the above-mentioned test method for changing the flash read protection, the restart program is executed by calling a chip program function system reset.
[0015] Furthermore, in the above-mentioned test method for changing the flash read protection, the step (3) of writing content into the flash specifically refers to writing content into the main part of the flash.
[0016] Furthermore, in the above-mentioned test method for changing the flash read protection, the tag value is written to the flash register FLASH_OBR in step (3), and the specific step is to write data to the data part of the flash register FLASH_OBR, thereby modifying the value of the register FLASH_OBR.
[0017] The beneficial effects of the present invention are as follows: the present invention does not burn the test program into the flash body but burns the program into the SRAM of the chip, and starts from the SRAM, thereby avoiding erasing the test program in the flash; in addition, the present invention writes a mark bit into the flash register FLASH_OBR to record the occurrence of program restart, and when the program is restarted next time, this part is skipped, thereby avoiding entering an endless loop of continuous restarts. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 is a schematic diagram of a test circuit of the present invention;
[0019] Figure 2 This is the testing method flow chart of the present invention. DETAILED DESCRIPTION
[0020] In order to further understand the content, features and effects of the present invention, the following detailed description is given with reference to the accompanying drawings.
[0021] Please also refer to Figure 1 and Figure 2 The following will describe in detail the test circuit and method for changing the flash read protection according to the embodiment of the present invention in conjunction with the accompanying drawings.
[0022] like Figure 1 As shown, the connection circuit of the chip is that the chip power pin is connected to the power supply of the corresponding voltage, the chip GND pin is grounded, the chip BOOT0 and BOOT1 are connected to the power supply with pull-up resistors, one end of the program downloader is connected to the chip JTAG serial port, and the other end of the program downloader is connected to the host computer.
[0023] After the hardware connection is completed, the subsequent corresponding software operations can be performed. The solutions to the problems in the prior art are as follows: for the problem of flash program being erased, the test program can be burned into the flash body without burning it, and BOOT0 and BOOT1 can be set to high level through circuit settings, and the program can be burned into the SRAM of the chip, and started from SRAM, so that when mass erase (program erase) occurs, the test program will not be erased; for the problem of infinite program restart, since mass erase only erases the contents of the flash body and does not erase the contents of the flash register option byte, some bits in the option byte are written as flags to record the occurrence of system reset (restart program). When the program restarts next time, this part will be skipped, thereby avoiding entering an endless restart cycle.
[0024] like Figure 2 As shown, the specific steps are as follows: (1) Complete the hardware connection of the above test circuit;
[0025] (2) Burn the test flash program into the chip's SRAM through the downloader and start from SRAM;
[0026] (3) Determine whether the flash register FLASH_OBR is the initial value. If so, write the content to the flash and write the mark value to the flash register FLASH_OBR. Restart the program to make the mark value take effect. If not, execute the next step.
[0027] (4) Determine whether the flash register FLASH_OBR is the written tag value. If so, modify the value of the read protection bit in the flash, enable the flash read protection, restart the program, and let the read protection status change take effect. Since the value of the read protection bit in the flash is changed, the value of the register FLASH_OBR is also changed accordingly. When the program is restarted and runs to step (4) again, the register FLASH_OBR is changed and is different from the written tag value. In this way, when it is determined that the value of the flash register FLASH_OBR is not the written tag value, the next step is executed to jump out of the restart program loop;
[0028] (5) Determine whether the value of the flash read protection bit is the value modified in step (4). If so, use the test program to detect the content written to the flash in step (3). If not, it means that the flash read protection cannot be enabled, and it is impossible to verify whether the flash read protection status change will cause mass erase;
[0029] (6) Use the test program to determine whether the content written to the flash in step (3) is erased. If so, it verifies that the change in the chip flash read protection level will cause mass erase. If not, it means that the change in the chip flash read protection level will not cause mass erase.
[0030] Specifically, in the above steps, the restart program can be executed by calling the chip program function system reset. Writing content to the flash in step (3) is writing content to the flash main body; writing a mark value to the flash register FLASH_OBR in step (3) is specifically writing data to the data part of the flash register FLASH_OBR, thereby modifying the value of the register FLASH_OBR.
[0031] It can be seen from the above description that the present invention does not burn the test program into the FLASH body but burns the program into the SRAM of the chip, and starts from the SRAM to avoid erasing the test program in the flash; in addition, the present invention writes a mark bit in the flash register FLASH_OBR to record the occurrence of program restart. When the program starts to run again next time, this part is skipped to avoid entering an endless loop of continuous restarts.
[0032] Of course, the above are only typical examples of the present invention. In addition, the present invention may also have many other specific implementations. All technical solutions formed by equivalent replacement or equivalent transformation fall within the scope of protection required by the present invention.
Claims
1. A test circuit for flash read protection change, characterized in that: The invention comprises a chip, a host computer and a program downloader, wherein the chip comprises a flash module and an SRAM module, the power pin of the chip is connected to a corresponding voltage power supply, the GND pin of the chip is grounded, the BOOT0 and BOOT1 of the chip are connected to a pull-up resistor and connected to a power supply, one end of the program downloader is connected to a chip JTAG serial port, and the other end of the program downloader is connected to a host computer, and specifically comprises the following steps: (1) Complete the hardware connection of the above test circuit; (2) Burn the test flash program into the chip's SRAM through the downloader and start from SRAM; (3) Determine whether the flash register FLASH_OBR is the initial value. If so, write the content to the flash and write the mark value to the flash register FLASH_OBR, restart the program to make the mark value take effect. If not, execute the next step; (4) Determine whether the flash register FLASH_OBR is the written mark value. If so, modify the value of the read protection bit in the flash and restart the program to make the read protection status change take effect. If not, execute the next step; (5) Determine whether the value of the flash read protection bit is the value modified in step (4). If so, use the test program to detect the content written to the flash in step (3). If not, it means that the flash read protection cannot be enabled, and the flash read protection status change cannot be tested. (6) The test program is used to determine whether the content written to the flash in step (3) is erased. If so, it is verified that the change in the chip flash read protection level will cause the program to be erased. If not, it means that the change in the chip flash read protection level will not cause the program to be erased.
2. A test method for flash read protection change according to claim 1, characterized in that: The restart program is executed by calling the chip program function system reset.
3. A test method for flash read protection change according to claim 1, characterized in that: Writing content into the flash in the step (3) specifically refers to writing content into the main part of the flash.
4. A test method for flash read protection change according to claim 1, characterized in that: In the step (3), the mark value is written into the flash register FLASH_OBR. Specifically, the data is written into the data part of the flash register FLASH_OBR, thereby modifying the value of the register FLASH_OBR.
Citation Information
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