Command packet generation method and apparatus, electronic device, and storage medium

Abstract

This invention provides a command packet generation method, apparatus, electronic device, and storage medium. The method includes: determining, based on the hardware specifications of the chip under test, the input information required for the chip under test to execute a target task and the storage format of the input information in memory; generating a command packet corresponding to the target task based on the input information, the storage format of the input information in memory, and the command packet format protocol supported by the parsing software of the chip under test; wherein the parsing software parses the command packet to generate a hardware command packet and loads the data in the hardware command packet into the memory for the chip under test to read. The method and apparatus provided by this invention can directly generate the command packet required to execute the target task based on the input information without relying on the software stack of the chip under test, and are not constrained by the development status of the software stack, simplifying the chip testing process and improving the chip development efficiency.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a command packet generation method, apparatus, electronic device, and storage medium. Background Technology

[0002] During the testing of chips such as GPUs (Graphics Processing Units), it is usually necessary to generate command packets based on instructions and data to execute specific tasks on the device.

[0003] In existing technologies, command packets are generated through the chip's software stack. The software stack provides computing resources, a performance tuning framework, and a variety of supporting software modules. These modules are interdependent, forming a complete solution. However, the software stack contains numerous modules and has a long development cycle, especially in the early stages of chip development when a corresponding software stack is not yet available. This makes chip testing complex and reduces development efficiency. Summary of the Invention

[0004] This invention provides a command package generation method, apparatus, electronic device, and storage medium to solve the technical problems of complex chip testing processes and low development efficiency in the prior art.

[0005] This invention provides a method for generating command packages, comprising:

[0006] Based on the hardware specifications of the chip under test, determine the input information required for the chip under test to perform the target task and the storage format of the input information in memory;

[0007] Based on the input information, the storage format of the input information in memory, and the command packet format protocol supported by the parsing software of the chip under test, a command packet corresponding to the target task is generated.

[0008] The parsing software parses the command package to generate a hardware command package, and loads the data in the hardware command package into the memory for the chip under test to read.

[0009] According to the command package generation method provided by the present invention, the input information includes at least one of the hardware command package type, hardware command package descriptor and register configuration parameters corresponding to the target task.

[0010] According to the command packet generation method provided by the present invention, the command packet format protocol includes at least one of the following: command packet storage format, hardware command packet storage location, hardware command packet type acquisition method, data and data storage address association method, data storage address type, and register configuration storage method.

[0011] According to the command packet generation method provided by the present invention, the hardware command packet descriptor includes multiple fields, the multiple fields including at least an address field, and the generation of the command packet corresponding to the target task includes:

[0012] Based on the hardware command packet type in the input information, determine the address field in the hardware command packet;

[0013] Generate the data storage address corresponding to the address field, and store the data corresponding to the address field and the data storage address into the command packet according to the command packet format protocol.

[0014] According to the command packet generation method provided by the present invention, when the parsing software parses the command packet, if the data storage address is a hardware physical address, the data storage address is used directly; if the data storage address is not a hardware physical address, a dynamically allocated physical address is used to replace the data storage address.

[0015] According to the command packet generation method provided by the present invention, determining the input information required for the chip under test to perform the target task and the storage format of the input information in memory based on the hardware specifications of the chip under test includes:

[0016] Based on the hardware specifications of the chip under test and the target network model running on the chip under test, the input information required for the chip under test to perform the target task and the storage format of the input information in memory are determined.

[0017] This invention provides a command packet generation apparatus, comprising:

[0018] The determining unit is used to determine, based on the hardware specifications of the chip under test, the input information required for the chip under test to perform the target task and the storage format of the input information in memory;

[0019] The generation unit is used to generate a command package corresponding to the target task based on the input information, the storage format of the input information in memory, and the command package format protocol supported by the parsing software of the chip under test.

[0020] The parsing software parses the command package to generate a hardware command package, and loads the data in the hardware command package into the memory for the chip under test to read.

[0021] The present invention provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the steps of the command package generation method.

[0022] The present invention provides a non-transitory computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the command package generation method.

[0023] The present invention provides a computer program product, including a computer program, wherein when the computer program is executed by a processor, it implements the steps of the command package generation method.

[0024] The command packet generation method, apparatus, electronic device, and storage medium provided in this invention determine the input information required for the chip under test to execute a target task and the storage format of the input information in memory based on the hardware specifications of the chip under test. The input information is converted according to the command packet format protocol supported by the parsing software of the chip under test to generate a command packet corresponding to the target task. The command packet is then sent to the parsing software, which parses the command packet to generate a hardware command packet and loads the data from the hardware command packet into memory for the chip under test to read. This allows the generation of the command packet required to execute the target task directly from the input information without relying on the software stack of the chip under test, and is not constrained by the software stack development status. Furthermore, the generation of the command packet does not consume the chip's hardware resources, and the command packet format protocol can be customized or modified according to different target tasks, simplifying the chip testing process and improving chip development efficiency. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0026] Figure 1 A flowchart illustrating the command package generation method provided by this invention;

[0027] Figure 2 A schematic diagram showing the automatic generation of the command package provided by this invention;

[0028] Figure 3 This is a schematic diagram of the command packet generation device provided by the present invention;

[0029] Figure 4 This is a schematic diagram of the structure of the electronic device provided by the present invention. Detailed Implementation

[0030] To make the objectives, technical solutions, and advantages of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the embodiments described are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0031] In existing technologies, chip testing typically involves using a software stack to generate command packages, enabling the chip to run these packages and perform test tasks. The software stack usually contains various software modules required for chip testing. Taking a certain AI (Artificial Intelligence) chip as an example, its software stack includes four layers and one auxiliary toolchain. The four layers are the application enablement layer, execution framework layer, chip enablement layer, and computing resource layer, each containing multiple software modules. The auxiliary toolchain provides software for program development, compilation testing, and log management. During application execution or testing on this chip, command packages are generated at appropriate locations in its software stack, read and parsed by parsing software, and submitted to the chip to enable it to perform specific tasks.

[0032] However, in the early stages of chip development, the software stack was either underdeveloped or incomplete, making it impossible to generate command packages and thus impossible to test the chip. This resulted in a complex chip testing process and low development efficiency.

[0033] Figure 1 This is a flowchart illustrating the command package generation method provided by the present invention, as shown below. Figure 1 As shown, the method includes:

[0034] Step 110: Based on the hardware specifications of the chip under test, determine the input information required for the chip under test to perform the target task and the storage format of the input information in memory.

[0035] Specifically, the command package generation method provided in this embodiment of the invention is applicable to the entire chip development process, especially in the early stages of chip development. The chip to be tested can be various AI chips, such as graphics processors, neural network accelerators, etc.

[0036] The hardware specification is the hardware specification document of the chip under test, which records the usage instructions for each electronic component or functional module in the chip, such as the types of operations supported by the chip, interface descriptions, pin descriptions, and package descriptions. It also records the input information required by the chip to perform specific computational tasks.

[0037] The target task is the computational task that needs to be performed on the chip during testing. For example, the target task could be an addition operation, a multiplication operation, or a graphics rendering task that can be performed on the chip.

[0038] The input information is the raw information required by the chip to execute the target task. For example, it may include the instructions required to execute the target task, the data operated by the instructions, and the setting parameters of the registers in the chip.

[0039] For example, hardware specifications define the types of hardware command packets that can be directly read by the hardware and the descriptor storage format for each type. The descriptor storage format includes how many bytes a descriptor occupies, what fields it contains, the meaning of each field, which bits each field occupies, and the value range and meaning of each field. Some fields represent addresses, meaning the value of a field is a specific address; these types of fields can be called address fields, and the hardware specifications also specify the descriptor storage format for the data pointed to by those addresses.

[0040] In the embodiments of this invention, memory refers to the storage space visible to the chip, which can be system main memory (a chip that supports access to system main memory) or internal chip storage.

[0041] Step 120: Based on the input information, the storage format of the input information in memory, and the command packet format protocol supported by the parsing software of the chip under test, generate the command packet corresponding to the target task.

[0042] The parsing software parses the command package and loads the data in the command package into memory for the chip under test to read.

[0043] Specifically, a command packet format protocol supported by the parsing software (replayer) of the chip under test can be defined, and then the input information can be directly converted into the command packet corresponding to the target task according to the command packet format protocol.

[0044] The parsing software parses the command package to generate a hardware command package, and loads the data in the hardware command package into memory for the chip under test to read and execute.

[0045] It should be noted that hardware command packets can be directly read by the chip under test and can only be stored in memory during runtime. In contrast, the command packets provided in this embodiment of the invention can be persistently stored and can be parsed by parsing software at any time to generate hardware command packets. Since the command packets in this embodiment of the invention can be parsed by parsing software, they can also be referred to as replayer command packets.

[0046] In related technologies, the chip under test writes the task directly to memory according to the specified format through the software stack and submits it to the chip for execution. However, in this embodiment of the invention, the command package can be persistently stored. Using command packages for testing means that for the same task, the command package only needs to be generated once and can be executed repeatedly. Furthermore, the command package only contains content related to the task of the chip under test, eliminating interference from other factors.

[0047] The command packet generation method provided in this invention determines the input information required for the chip under test to execute the target task and the storage format of the input information in memory based on the hardware specifications of the chip under test. The input information is then converted according to the command packet format protocol supported by the parsing software of the chip under test to generate a command packet corresponding to the target task. The command packet is then sent to the parsing software, which parses the command packet to generate a hardware command packet and loads the data from the hardware command packet into memory for the chip under test to read. This method allows the generation of the command packet required to execute the target task directly from the input information without relying on the software stack of the chip under test, and is not constrained by the software stack development status. Furthermore, the generation of the command packet does not consume the chip's hardware resources, and the command packet format protocol can be customized or modified according to different target tasks, simplifying the chip testing process and improving chip development efficiency.

[0048] Based on the above embodiments, the input information includes at least one of the following: the hardware command package type corresponding to the target task, the hardware command package descriptor, and the register configuration parameters.

[0049] Specifically, the hardware command package type can be determined based on the hardware specifications of the chip under test, such as a computational task or a graphics task. Each hardware command package type corresponds to a different hardware command package descriptor. The hardware command package descriptor includes multiple fields. For example, the fields may include instructions and data, and the data storage field stores the addresses of the instructions and data.

[0050] In addition, the hardware command packet descriptor may contain other fields, such as fields describing the memory format of the target image data (length * width, image encoding format).

[0051] An instruction is a command that controls the chip under test to perform a certain operation or processing function. The role of the hardware circuitry in the chip is to implement the function specified by each instruction. The chip under test is designed with a series of instruction sets that work in conjunction with its hardware circuitry.

[0052] The data is the data manipulated by the instruction. For example, to instruct the chip under test to perform the operation of adding 5 and 6, the instruction could be "ADD", and the corresponding data would be 5 and 6.

[0053] Registers are small storage areas within the chip under test (DUT) used to store data. They are high-speed storage components with limited storage capacity and can be used to temporarily store instructions, data, and addresses. As internal components of the DUT, registers can include general-purpose registers, special-purpose registers, and control registers. To enable the DUT to read instructions or data from registers, register configuration parameters can be preset to configure the registers.

[0054] For example, for a certain GPU, the hardware specification defines the types of hardware command packets that the hardware can directly read and the descriptor storage format for each type. The descriptor storage format includes how many bytes a descriptor occupies, what fields it contains, the meaning of each field, which bits each field occupies, and the value range and meaning of each field. Some fields represent addresses, meaning the value of a field is a specific address; these fields are called address fields, and the hardware specification also specifies the descriptor storage format for the data pointed to by that address.

[0055] In addition to the contents of the hardware command package itself, hardware execution of a hardware command package may also require setting its associated registers. The hardware specification also specifies the registers associated with each field of the hardware command package, as well as the meaning of each register.

[0056] Based on any of the above embodiments, the command packet format protocol includes at least one of the following: command packet storage format, hardware command packet storage location, hardware command packet type acquisition method, data and data storage address association method, data storage address type, and register configuration storage method.

[0057] Specifically, the command package storage format refers to whether the command package is stored as a folder or a single file, whether compression is required, and the file format used. For example, a command package may be stored as a folder, containing multiple files, including binary files and text files.

[0058] The storage location of a hardware command packet refers to the location where the contents (instructions and data, etc.) of the hardware command packet are stored within the command packet. For example, a folder might contain a text file called the "replayer command packet configuration file." This configuration file has a "packet data" field, which directly records the contents of the hardware command packet (including instructions and data, etc.).

[0059] The method for obtaining hardware command package types refers to the way the hardware command package types are obtained. For example, the hardware command package types are recorded in a designated location in the configuration file.

[0060] The association between data and its storage address refers to the way an address is associated with the data it points to. For example, the data pointed to by an address can be stored in a separate file, with the filename containing that address, and the configuration file mentioned above records that filename.

[0061] The data storage address type refers to whether the address in the replayer command packet is a virtual address (an address that cannot be directly accessed by the hardware) or a hardware physical address (an address that can be directly accessed by the hardware). If it is a hardware address, the entire address range occupied by the command packet (replay address range) must be recorded.

[0062] Register configuration storage method refers to how register configuration parameters are stored. For example, the configuration file mentioned above has a register list field, which records the registers that need to be set to execute the replayer command packet.

[0063] Based on any of the above embodiments, step 120 includes:

[0064] Based on the type of hardware command packet in the input information, determine the address field in the hardware command packet;

[0065] Generate the data storage address corresponding to the address field, and store the data corresponding to the address field and the data storage address into the command packet according to the command packet format protocol.

[0066] Specifically, the hardware command packet descriptor includes multiple fields, including at least an address field.

[0067] When generating a command packet, the data and its data storage address need to be associated before storage. This can be done by first determining the address field in the hardware command packet based on its type, then generating the corresponding data storage address, associating the data and data storage address according to the requirements of the command packet format protocol, and finally storing the data in the command packet.

[0068] For example, based on the type of the input hardware command packet, we can determine what fields the hardware command packet contains, and set the corresponding fields according to the key-value pair list of the input hardware command packet fields. For the address field, an address is generated, the address is filled into the field, and the data corresponding to the address field is stored in the command packet (replayer command packet) according to the protocol.

[0069] Address generation methods include generating a virtual address or a device address.

[0070] The method for generating a virtual address is as follows: The generator stores a global offset for the virtual address. When generating a virtual address for a field, the global offset is used directly as the virtual address, and the global offset is updated to the global offset plus the size of the data pointed to by the field address.

[0071] The method for generating a device address is as follows: first generate a virtual address, then convert the virtual address to a device address. The conversion rules are documented in the hardware specification.

[0072] Based on any of the above embodiments, when parsing command packets, if the data storage address is a hardware physical address, then the data storage address is used directly; if the data storage address is not a hardware physical address, then a dynamically allocated physical address is used to replace the data storage address.

[0073] Specifically, the parsing software (replayer) parses the command packet according to the command packet format protocol, and can obtain the register configuration, hardware command packet content, and the data pointed to by the address.

[0074] The parsing software handles addresses in command packets in two ways:

[0075] The first method directly uses the hardware physical address (which must be a device address) from the replayer command packet. Specifically, during replayer initialization, the entire address range is pre-allocated, and the memory space corresponding to these addresses is used solely to store the data from the replayer command packet.

[0076] The second method involves modifying the addresses in the replayer command packet. The replayer software replaces the addresses in the replayer command packet with dynamically allocated hardware physical addresses at runtime.

[0077] Based on any of the above embodiments, step 110 includes:

[0078] Based on the hardware specifications of the chip under test and the target network model running on the chip under test, the input information required for the chip under test to perform the target task and the storage format of the input information in memory are determined.

[0079] Specifically, when the target network model is running in the chip under test, the input information obtained directly from the hardware specifications of the chip under test can be adjusted according to the type of the target network model to determine the input information required for the chip under test to perform the target task and the storage format of the input information in memory.

[0080] For example, with GPUs, we can determine what task the GPU is performing, either manually or automatically. Simple tasks can be handled by manually entering input information. Complex tasks can be handled by specialized programs that generate input information based on the target network model.

[0081] Based on any of the above embodiments Figure 2 This is a schematic diagram of the command package automatically generated by the present invention, such as... Figure 2 As shown, the method includes:

[0082] Step 1: Prepare all the raw information required for the command packet beforehand. The raw information includes the instruction, the data to be operated on by the instruction, and the parameters. Parameters refer to other information besides the instruction and the data to be operated on (such as register settings and other fields in the hardware command packet).

[0083] Step 2: Define a Command packet format protocol so that the parsing software (replayer) can convert the Command packet into a driver layer data structure and submit it to the GPU according to this protocol.

[0084] Step 3: Based on the protocol, write a Command packet generator. The Command packet generator will perform the conversion from raw information to Command packets.

[0085] Step 4: Execute the Command packet generator to generate a Command packet.

[0086] For example: You want the GPU to perform a computational task to calculate the result of 5+6.

[0087] The input to the generator is:

[0088] Hardware command package type = computing task;

[0089] The instruction = the file kernel.bin that saves the instructions (instructions needed to perform the addition operation);

[0090] Operand 1 = the file opt1.dat containing the data "5";

[0091] Operand 2 = file opt2.dat containing data "6", uva register = 1.

[0092] The hardware specifications define the format of the descriptor for the compute command package:

[0093] Total size = 256 bits;

[0094] The "Task Type" field occupies 0 to 63 bits, with a value of 0 = calculation and 1 = drawing;

[0095] The "Instruction" field occupies 64-127 bits, and its value is the address where the instruction data is stored.

[0096] The "operand" field occupies 128 to 191 bits, and its value is the address where the operand descriptor data is stored.

[0097] The "Reserved Fields" field occupies 192-255 bits and has a default value of 0.

[0098] Operand descriptor format:

[0099] Total size = 128 bits (16 bytes);

[0100] The field "Operand 1" occupies 0-63 bits, and its value is the address where the data of operand 1 is stored.

[0101] The field "Operand 2" occupies 64 to 127 bits, and its value is the address where the data of operand 2 is stored.

[0102] The generator generates the contents of the hardware command package and writes it to the configuration file "config.json".

[0103] The contents of the Virtual Address version are as follows:

[0104] “packet_data”:“0x000000000000000000 (0 = computation task);

[0105] 0x0100000000000000 (Address for storing instruction data = 0x0100000000000000, globaloffset initialized to 0x01000000 00000000, generator generates address for instruction data = global offset. If instruction data occupies 0x200 bytes, then global offset becomes 0x0100000000000200).

[0106] 0x0100000000000200 (The address where the operand descriptor data is stored = 0x0100000000000200, and then the global offset becomes 0x01000000000000210, because the operand descriptor occupies 0x10 bytes);

[0107] 0x0000000000000000 (Value of reserved field, not specified in the input, so the default value 0 is used)".

[0108] The generator generates operand descriptor contents and writes them to the configuration file "config.json";

[0109] “address_0x0100000000000200”:{0x01000000000000210(address where operand one data is stored, operand one data opt1.dat occupies 0x10 bytes, global offset updated to 0x0100000000000220)0x01000000000000220(address where operand two data is stored)};

[0110] “register”:{uva:1}

[0111] "Files": {0x0100000000000210.dat (operand 1 data file, content is the same as opt1.dat)}

[0112] 0x0100000000000220.dat (operand 2 data file, content is the same as opt2.dat)

[0113] 0x0100000000000000.dat (Instruction data file, content is identical to kernel.bin)

[0114] The generated replayer command packet result is as follows:

[0115] Virtual address version:

[0116] There is a folder named packet containing the following files: "config.json", "0x0100000000000210.dat", "0x0100000000000220.dat", and "0x0100000000000000.dat".

[0117] The only difference between the device address version and the virtual address version is the address: simply convert the virtual address to the device address format required by the hardware specification. For example, if the hardware specification requires the 63rd bit of the device address to be 1, then convert the virtual address 0x01000000000000210 to the device address 0x11000000000000210.

[0118] Based on any of the above embodiments Figure 3 This is a schematic diagram of the command packet generation device provided by the present invention, as shown below. Figure 3 As shown, the device includes:

[0119] The determining unit 310 is used to determine, based on the hardware specifications of the chip under test, the input information required for the chip under test to perform the target task and the storage format of the input information in memory;

[0120] The generation unit 320 is used to generate a command packet corresponding to the target task based on the input information, the storage format of the input information in memory, and the command packet format protocol supported by the parsing software of the chip under test.

[0121] The parsing software parses the command package to generate a hardware command package and loads the data in the hardware command package into memory for the chip under test to read.

[0122] Specifically, the command packet generation device can be implemented in software. For example, it can be written in Python to create a command packet generator. All that's needed is a Python runtime environment to run the command packet generator.

[0123] The command packet generation device provided in this embodiment of the invention determines the input information required for the chip under test to execute the target task and the storage format of the input information in memory according to the hardware specifications of the chip under test. It then converts the input information according to the command packet format protocol supported by the parsing software of the chip under test, generates a command packet corresponding to the target task, and sends the command packet to the parsing software. The parsing software parses the command packet to generate a hardware command packet and loads the data in the hardware command packet into memory for the chip under test to read. This allows the generation of the command packet required to execute the target task directly from the input information without relying on the software stack of the chip under test, and is not constrained by the software stack development status. Furthermore, the generation of the command packet does not consume the chip's hardware resources, and the command packet format protocol can be customized or modified according to different target tasks, simplifying the chip testing process and improving chip development efficiency.

[0124] Based on any of the above embodiments, the input information includes at least one of the following: the hardware command package type corresponding to the target task, the hardware command package descriptor, and the register configuration parameters.

[0125] Based on any of the above embodiments, the command packet format protocol includes at least one of the following: command packet storage format, hardware command packet storage location, hardware command packet type acquisition method, data and data storage address association method, data storage address type, and register configuration storage method.

[0126] Based on any of the above embodiments, the hardware command packet descriptor includes multiple fields, and the multiple fields include at least an address field; the generation unit is used for:

[0127] Based on the hardware command packet type in the input information, determine the address field in the hardware command packet;

[0128] Generate the data storage address corresponding to the address field, and store the data corresponding to the address field and the data storage address into the command packet according to the command packet format protocol.

[0129] Based on any of the above embodiments, when parsing command packets, if the data storage address is a hardware physical address, then the data storage address is used directly; if the data storage address is not a hardware physical address, then a dynamically allocated physical address is used to replace the data storage address.

[0130] Based on any of the above embodiments, the determining unit is used for:

[0131] Based on the hardware specifications of the chip under test and the target network model running on the chip under test, the input information required for the chip under test to perform the target task and the storage format of the input information in memory are determined.

[0132] Based on any of the above embodiments Figure 4 This is a schematic diagram of the structure of the electronic device provided by the present invention, such as... Figure 4 As shown, the electronic device may include: a processor 410, a communications interface 420, a memory 430, and a communications bus 440, wherein the processor 410, the communications interface 420, and the memory 430 communicate with each other via the communications bus 440. The processor 410 can call logical commands stored in the memory 430 to execute the following methods:

[0133] Based on the hardware specifications of the chip under test, the input information required for the chip under test to perform the target task and the storage format of the input information in memory are determined. Based on the input information, the storage format of the input information in memory, and the command packet format protocol supported by the parsing software of the chip under test, the command packet corresponding to the target task is generated. The parsing software parses the command packet to generate a hardware command packet and loads the data in the hardware command packet into memory for the chip under test to read.

[0134] Furthermore, the logical commands in the aforementioned memory 430 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, essentially, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several commands to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0135] The processor in the electronic device provided in this embodiment of the invention can call logical instructions in the memory to implement the above method. Its specific implementation method is the same as the aforementioned method implementation method and can achieve the same beneficial effects, which will not be repeated here.

[0136] This invention also provides a non-transitory computer-readable storage medium storing a computer program thereon, which, when executed by a processor, is implemented to perform the methods provided in the above embodiments, including, for example:

[0137] Based on the hardware specifications of the chip under test, the input information required for the chip under test to perform the target task and the storage format of the input information in memory are determined. Based on the input information, the storage format of the input information in memory, and the command packet format protocol supported by the parsing software of the chip under test, the command packet corresponding to the target task is generated. The parsing software parses the command packet to generate a hardware command packet and loads the data in the hardware command packet into memory for the chip under test to read.

[0138] When the computer program stored on the non-transitory computer-readable storage medium provided in this embodiment of the invention is executed, it implements the above method. Its specific implementation method is consistent with the aforementioned method implementation method and can achieve the same beneficial effects, which will not be repeated here.

[0139] This invention provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the command package generation method described above.

[0140] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, i.e., they may be located in one location or distributed across multiple network units. Some or all of the modules may be selected based on actual needs to achieve the objectives of the present embodiment. Persons of ordinary skill in the art will be able to understand and implement the present invention without inventive effort.

[0141] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several commands to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0142] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A method for generating command packages, characterized in that, include: Based on the hardware specifications of the chip under test, determine the input information required for the chip under test to perform the target task and the storage format of the input information in memory; Based on the input information, the storage format of the input information in memory, and the command packet format protocol supported by the parsing software of the chip under test, a command packet corresponding to the target task is generated. The parsing software parses the command package to generate a hardware command package, and loads the data in the hardware command package into the memory for the chip under test to read; the chip under test is an artificial intelligence chip. The input information includes at least one of the hardware command package type, hardware command package descriptor, and register configuration parameters corresponding to the target task; Based on the hardware specifications of the chip under test, the input information required for the chip under test to perform the target task and the storage format of the input information in memory are determined, including: Based on the hardware specifications of the chip under test and the target network model running on the chip under test, the input information required for the chip under test to perform the target task and the storage format of the input information in memory are determined. The command packet format protocol includes at least one of the following: command packet storage format, hardware command packet storage location, hardware command packet type acquisition method, data and data storage address association method, data storage address type, and register configuration storage method. The data storage address types include virtual addresses and hardware physical addresses.

2. The command package generation method according to claim 1, characterized in that, The hardware command package descriptor includes multiple fields, including at least an address field. Generating the command package corresponding to the target task includes: Based on the hardware command packet type in the input information, determine the address field in the hardware command packet; Generate the data storage address corresponding to the address field, and store the data corresponding to the address field and the data storage address into the command packet according to the command packet format protocol.

3. The command packet generation method according to any one of claims 1 to 2, characterized in that, When the parsing software parses the command packet, if the data storage address is a hardware physical address, it directly uses the data storage address; if the data storage address is not a hardware physical address, it replaces the data storage address with a dynamically allocated physical address.

4. A command packet generation apparatus, characterized in that, include: The determining unit is configured to determine, based on the hardware specifications of the chip under test, the input information required for the chip under test to perform a target task and the storage format of the input information in memory; the input information includes at least one of the hardware command package type, hardware command package descriptor and register configuration parameters corresponding to the target task; Based on the hardware specifications of the chip under test, the input information required for the chip under test to perform the target task and the storage format of the input information in memory are determined, including: Based on the hardware specifications of the chip under test and the target network model running on the chip under test, the input information required for the chip under test to perform the target task and the storage format of the input information in memory are determined. The generation unit is used to generate a command package corresponding to the target task based on the input information, the storage format of the input information in memory, and the command package format protocol supported by the parsing software of the chip under test. The parsing software parses the command package to generate a hardware command package, and loads the data in the hardware command package into the memory for the chip under test to read; the chip under test is an artificial intelligence chip. The command packet format protocol includes at least one of the following: command packet storage format, hardware command packet storage location, hardware command packet type acquisition method, data and data storage address association method, data storage address type, and register configuration storage method. The data storage address types include virtual addresses and hardware physical addresses.

5. An electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the steps of the command package generation method as described in any one of claims 1 to 3.

6. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the command package generation method as described in any one of claims 1 to 3.

7. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the command package generation method as described in any one of claims 1 to 3.

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