Chip integration method and apparatus

By obtaining chip functional information and using a preset module library to automatically match and connect functional modules, the problem of low chip integration efficiency is solved and efficient and flexible chip integration is achieved.

CN114239482BActive Publication Date: 2025-10-10XIAN UNISOC TECH CO LTD
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Patent Information

Application Number
CN202111549018.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-12-17
Publication Date
2025-10-10
Estimated Expiration
2041-12-17

AI Technical Summary

Technical Problem

The chip integration efficiency in the existing technology is low, mainly because the selection, position setting and connection relationship of the chip module need to be completed manually.

Method used

By obtaining the functional information of the chip, automatically matching the target functional modules using the preset functional module library, and automatically connecting them according to the preset connection relationship, the automatic integration of the chip is achieved.

Benefits of technology

It improves the efficiency of chip integration, reduces the workload of manual operation, and enhances the flexibility and accuracy of integration.

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Abstract

Embodiments of the present application provide a chip integration method and device, the method comprising: obtaining function information corresponding to a target chip to be integrated, the function information being used to indicate functions possessed by the target chip; determining a plurality of target function modules in a preset function module library according to the function information; determining first connection information between the plurality of target function modules; displaying the plurality of target function modules in a chip design interface and connecting the plurality of target function modules according to the first connection information to obtain the target chip, the target chip comprising the plurality of target function modules. The technical solution of the present application can automatically integrate the target chip, thereby effectively improving the integration efficiency of the chip.
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Description

Technical Field

[0001] The embodiments of the present application relate to computer technology, and in particular to a chip integration method and device. Background Art

[0002] With the continuous development of chip-related technologies, there are usually many functional requirements for chips, such as 4G, 5G, WIFI, etc.

[0003] Currently, in the existing technology, after the functional requirements of the chip are determined, technicians are usually required to design and integrate the corresponding functional modules by themselves. The chip design integrating various functional modules is then handed over to R&D personnel for implementation. However, this implementation method manually selected by technicians will lead to low efficiency of chip integration. Summary of the Invention

[0004] The embodiments of the present application provide a chip integration method and device to overcome the problem of low efficiency of chip integration.

[0005] In a first aspect, an embodiment of the present application provides a chip integration method, comprising:

[0006] Acquire function information corresponding to the target chip to be integrated, where the function information is used to indicate the functions possessed by the target chip;

[0007] Determining a plurality of target function modules in a preset function module library according to the function information;

[0008] Determining first connection information between the multiple target functional modules;

[0009] The plurality of target functional modules are displayed in a chip design interface, and the plurality of target functional modules are connected according to the first connection information to obtain a target chip, wherein the target chip includes the plurality of target functional modules.

[0010] In one possible design, based on the functional information, multiple target functional modules are determined in a preset functional module library, including:

[0011] Determining at least one target function field according to the function information;

[0012] The plurality of target function modules are determined in the preset function module library according to the at least one target function field and a preset corresponding relationship, wherein the preset corresponding relationship includes a plurality of function fields and a function module corresponding to each function field.

[0013] In one possible design, determining the plurality of target function modules in the preset function module library according to the at least one target function field and the preset correspondence includes:

[0014] Determining a plurality of candidate function modules in the preset function module library according to the at least one target function field and the preset corresponding relationship;

[0015] Displaying the identifiers of the multiple to-be-selected functional modules in the chip design interface;

[0016] An editing operation input by a user in the identifiers of the plurality of candidate function modules is received, so as to determine the edited candidate function modules as the plurality of target function modules.

[0017] In one possible design, determining at least one target function field according to the function information includes:

[0018] Acquire a first set, wherein the first set includes a plurality of preset function fields;

[0019] Each text field included in the function information is matched with a plurality of preset function fields in the first set, and a text field having a matching preset function field is determined as the target function field.

[0020] In one possible design, determining first connection information between the multiple target functional modules includes:

[0021] Acquire connection configuration information, wherein the connection configuration information includes connection examples, and each connection example includes identifiers of at least two functional modules and a connection method between the at least two functional modules;

[0022] First connection information between the multiple target functional modules is determined according to the identifiers of the multiple target functional modules and the connection configuration information.

[0023] In one possible design, displaying the identifiers of the multiple target functional modules in a chip design interface and obtaining a target chip according to the first connection information includes:

[0024] Displaying the multiple target functional modules in a chip design interface;

[0025] receiving second connection information input by a user between the plurality of target functional modules;

[0026] The plurality of target functional modules are connected in the chip design interface according to the first connection information and the second connection information to obtain a target chip.

[0027] In a second aspect, an embodiment of the present application provides a chip integrated device, including:

[0028] An acquisition module, configured to acquire functional information corresponding to a target chip to be integrated, wherein the functional information indicates the functions possessed by the target chip;

[0029] a determination module, configured to determine a plurality of target function modules in a preset function module library according to the function information;

[0030] The determining module is further configured to determine first connection information between the plurality of target functional modules;

[0031] The processing module is configured to display the plurality of target functional modules in a chip design interface, and connect the plurality of target functional modules according to the first connection information to obtain a target chip, wherein the target chip includes the plurality of target functional modules.

[0032] In one possible design, the determining module is specifically configured to:

[0033] Determining at least one target function field according to the function information;

[0034] The plurality of target function modules are determined in the preset function module library according to the at least one target function field and a preset corresponding relationship, wherein the preset corresponding relationship includes a plurality of function fields and a function module corresponding to each function field.

[0035] In one possible design, the determining module is specifically configured to:

[0036] Determining a plurality of candidate function modules in the preset function module library according to the at least one target function field and the preset corresponding relationship;

[0037] Displaying the identifiers of the multiple to-be-selected functional modules in the chip design interface;

[0038] An editing operation input by a user in the identifiers of the plurality of candidate function modules is received, so as to determine the edited candidate function modules as the plurality of target function modules.

[0039] In one possible design, the determining module is specifically configured to:

[0040] Acquire a first set, wherein the first set includes a plurality of preset function fields;

[0041] Each text field included in the function information is matched with a plurality of preset function fields in the first set, and a text field having a matching preset function field is determined as the target function field.

[0042] In one possible design, the determining module is specifically configured to:

[0043] Acquire connection configuration information, wherein the connection configuration information includes connection examples, and each connection example includes identifiers of at least two functional modules and a connection method between the at least two functional modules;

[0044] First connection information between the multiple target functional modules is determined according to the identifiers of the multiple target functional modules and the connection configuration information.

[0045] In one possible design, the processing module is specifically configured to:

[0046] Displaying the multiple target functional modules in a chip design interface;

[0047] receiving second connection information input by a user between the plurality of target functional modules;

[0048] The plurality of target functional modules are connected in the chip design interface according to the first connection information and the second connection information to obtain a target chip.

[0049] In a third aspect, an embodiment of the present application provides a chip integrated device, including:

[0050] Memory, used to store programs;

[0051] A processor is used to execute the program stored in the memory. When the program is executed, the processor is used to execute the method described in the first aspect and any one of the various possible designs of the first aspect.

[0052] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium comprising instructions, which, when executed on a computer, enables the computer to execute the method described in the first aspect and any one of the various possible designs of the first aspect.

[0053] In a fifth aspect, an embodiment of the present application provides a computer program product, including a computer program, which, when executed by a processor, implements the method described in the first aspect and any of the various possible designs of the first aspect.

[0054] An embodiment of the present application provides a chip integration method and device, the method comprising: obtaining functional information corresponding to a target chip to be integrated, the functional information being used to indicate the functions possessed by the target chip. Based on the functional information, multiple target functional modules are determined in a preset functional module library. The first connection information between the multiple target functional modules is determined. Multiple target functional modules are displayed in a chip design interface, and the multiple target functional modules are connected according to the first connection information to obtain a target chip, wherein the target chip includes multiple target functional modules. By automatically determining multiple target functional modules corresponding to the functional information in a preset functional module library according to the functional information of the target chip to be integrated, and determining the first connection information between the multiple target functional modules according to the preset connection relationship between the various functional modules, and then connecting the various target functional modules according to the first connection information, the integrated target chip can be automatically obtained, thereby effectively improving the chip integration efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, a brief introduction will be given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0056] Figure 1 A schematic diagram of a chip module according to an embodiment of the present application;

[0057] Figure 2 A flowchart of a chip integration method provided in an embodiment of the present application;

[0058] Figure 3 The process of the chip integration method provided in the embodiment of the present application Figure 2 ;

[0059] Figure 4 A schematic diagram of matching the first set and function information provided in an embodiment of the present application;

[0060] Figure 5 A schematic diagram illustrating the implementation of the preset correspondence relationship provided in the embodiment of the present application;

[0061] Figure 6 A schematic diagram of a chip design interface provided in an embodiment of the present application;

[0062] Figure 7 A schematic diagram of the processing flow of the chip integration method provided in an embodiment of the present application;

[0063] Figure 8 A schematic diagram of the structure of a chip integrated device provided in an embodiment of the present application;

[0064] Figure 9 A schematic diagram of the hardware structure of the chip integration device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0065] To make the purpose, technical solutions, and advantages of the embodiments of this application more clear, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0066] In order to better understand the technical solution of this application, the relevant technologies involved in this application are further introduced in detail below.

[0067] With the continuous development of chip-related technologies, current chips can support a variety of functions, such as 4G, 5G, WiFi, Near Field Communication (NFC), video compression, etc. It is understandable that the functions that the chip needs to support can be designed according to the actual needs of users.

[0068] At present, in the existing technology, after the functional requirements of the chip are determined, the chip designers usually manually integrate the chip according to the functional requirements of the chip, that is, manually perform the specific design of the chip. The design here may include determining the placement position of the modules for each functional requirement, determining the size of the module, determining the specific parameters of the module, etc. After the integrated design of the chip is completed, the designed chip can be handed over to the R&D personnel for chip implementation.

[0069] In a possible implementation, for example, Figure 1 Understand integrated chips, Figure 1 A schematic diagram of the module of the chip provided in the embodiment of the present application.

[0070] Reference Figure 1 , a chip can include a variety of functions, and each function that the chip needs to support can be expressed as a module in the chip, for example Figure 1 The shown modules include 4G module, 5G module, WIFI module, NFC module, etc.

[0071] The modules described above can also be further understood as IP. An intellectual property core (IP core) refers to the mature design of a circuit module with independent functionality within a chip. This circuit module design can be applied to other chip design projects that also incorporate it, reducing design workload, shortening design cycles, and increasing chip design success rates. Because this mature circuit module design embodies the designer's wisdom and intellectual property, the chip industry uses the term "IP core" to refer to this mature circuit module design. An IP core can also be understood as an intermediate component of chip design.

[0072] Therefore, in the actual chip integration process, for example, the chip can be implemented based on the IP core. Each IP core can correspond to a module, and the module corresponding to each IP core can further include many sub-modules.

[0073] Based on the above introduction, it can be determined that during chip integration, the selection of chip modules, setting of module positions, determination of module connection relationships, and setting of module parameters all need to be done manually by designers, which results in low chip integration efficiency.

[0074] In response to the problems in the existing technology, this application proposes the following technical concept: generate a requirement document based on the functional requirements of the chip, and then analyze it based on the requirement document to automatically match the modules corresponding to the current functional requirements, and automatically connect the modules to each other, so as to realize automatic integration of the chip and effectively improve the integration efficiency of the chip.

[0075] Based on the above introduction, the following Figure 2 The chip integration method provided in this application is further introduced in detail. Figure 2 Flowchart of the chip integration method provided in an embodiment of the present application.

[0076] like Figure 2 As shown, the method includes:

[0077] S201: Acquire functional information corresponding to a target chip to be integrated, where the functional information is used to indicate functions possessed by the target chip.

[0078] In this embodiment, for the target chip to be integrated, it is necessary to determine the functions that the target chip needs to have. Therefore, for example, functional information corresponding to the target chip to be integrated can be obtained, where the functional information is used to indicate the functions that the target chip has.

[0079] In one possible implementation, the functional information may be, for example, some fields, such as an input text, or the functional information may be, for example, a requirement document. This embodiment does not limit the specific implementation of the functional information, as long as the functional information can indicate the functions that the current target chip needs to have.

[0080] In the actual implementation process, the functions that the target chip needs to have depend on the actual needs of the current target chip audience, which may include, for example, the 4G, 5G, NFC, video compression, etc. introduced above. This embodiment does not impose any special restrictions on the specific implementation of the functions that the target chip needs to have, and it can be selected according to actual needs.

[0081] In one possible implementation, for example, an interactive interface can be set up in the current chip integration system, and the user can input functional information in the interactive interface, such as uploading a requirement document, or entering a text in an edit box and submitting it, etc. This embodiment does not limit the specific implementation method of the user uploading functional information. After the user uploads the functional information, the functional information corresponding to the target chip can be obtained in this embodiment.

[0082] S202: Determine multiple target function modules in a preset function module library according to the function information.

[0083] In this embodiment, a preset functional module library is also included. The preset functional module library may include, for example, all functional modules required by the chip, and for each functional module, the sub-modules included therein, and the related configuration information, parameter information, etc. may all be included in the preset functional module library.

[0084] After determining the functional information, for example, multiple target functional modules can be determined in a preset functional module library. In one possible implementation, for example, matching can be performed in the preset functional module library based on the functional information to determine at least one functional module corresponding to each functional information, thereby determining multiple target functional modules.

[0085] S203: Determine first connection information between multiple target functional modules.

[0086] In addition, the preset function module library may also store preset connection relationships of various function modules, so after determining multiple function modules, for example, the preset connection relationships between various function modules can be used to determine the first connection information between various target function modules. The first connection information here can be understood as the connection relationship between various target function modules.

[0087] S204 , displaying a plurality of target functional modules in a chip design interface, and connecting the plurality of target functional modules according to the first connection information to obtain a target chip, wherein the target chip includes the plurality of target functional modules.

[0088] After determining multiple target functional modules, the multiple target functional modules determined above can be displayed on the chip design interface, for example. At the same time, the multiple target functional modules can be automatically connected in the chip design interface according to the above-mentioned first connection information. The chip design interface here is, for example, the interface displayed on the display screen of the terminal device.

[0089] At this point, the target chip can be obtained. The target chip in this embodiment includes the multiple target functional modules introduced above, and the multiple target functional modules included in the target chip are connected according to the first connection information introduced above.

[0090] Based on the above introduction, it can be determined that in this application, it is possible to automatically obtain an integrated target chip based on the functional information of the target chip, thereby effectively improving the efficiency of chip integration.

[0091] The chip integration method provided in the embodiment of the present application includes: obtaining functional information corresponding to the target chip to be integrated, the functional information being used to indicate the functions possessed by the target chip. Based on the functional information, multiple target functional modules are determined in a preset functional module library. The first connection information between the multiple target functional modules is determined. Multiple target functional modules are displayed in a chip design interface, and the multiple target functional modules are connected according to the first connection information to obtain a target chip, wherein the target chip includes multiple target functional modules. By automatically determining multiple target functional modules corresponding to the functional information in a preset functional module library according to the functional information of the target chip to be integrated, and determining the first connection information between the multiple target functional modules according to the preset connection relationship between the various functional modules, and then connecting the various target functional modules according to the first connection information, the integrated target chip can be automatically obtained, thereby effectively improving the chip integration efficiency.

[0092] Based on the above embodiments, Figures 3 to 6 Further introduce the chip integration method provided by this application, Figure 3 The process of the chip integration method provided in the embodiment of the present application Figure 2 , Figure 4 A schematic diagram of matching the first set and function information provided in an embodiment of the present application is provided. Figure 5 This is a schematic diagram of the implementation of the preset correspondence provided in the embodiment of the present application. Figure 6 A schematic diagram of the chip design interface provided in an embodiment of the present application.

[0093] like Figure 3 As shown, the method includes

[0094] S301: Acquire functional information corresponding to a target chip to be integrated, where the functional information is used to indicate functions possessed by the target chip.

[0095] The implementation of S301 is similar to that of S201 described above and will not be described in detail here.

[0096] S302: Acquire a first set, where the first set includes multiple preset function fields.

[0097] In this embodiment, after the functional information is acquired, for example, at least one target function field may be determined first according to the functional information. The target function field here may be understood as a field indicating the function that the current target chip needs to have.

[0098] In one possible implementation, for example, a first set may be preset, including a plurality of preset function fields, wherein the preset function fields may be understood as functions that can be supported by chips currently on the market, that is, for example, all function fields that can be supported by the chip may be stored in the first set.

[0099] For example, the first set may include preset function fields such as 4G, 5G, NFC, H264, and H265, among which H264 and H265 are video compression formats. It can be understood that the specific implementation of the preset function fields included in the first set can be selected according to actual needs. Under the current technology, the function fields corresponding to any functions that the chip can support can be stored in the first set as preset function fields.

[0100] S303: Match each text field included in the function information with a plurality of preset function fields in the first set, and determine a text field with a matching preset function field as a target function field.

[0101] Based on the above introduction, it can be determined that the functional information in this embodiment can be, for example, a piece of text, or a requirement document, etc. Therefore, it can be understood that the functional information can include many text fields. For example, any word in the functional information can be understood as a text field in this embodiment.

[0102] For example, the sentences in the functional information may be split into fields to determine the various text fields in the functional information, and then, for example, the various text fields included in the functional information may be matched with a plurality of preset functional fields in the first set.

[0103] Then, some text fields have matching preset functional fields in the first set, which means that these text fields can be found in the first set, and it can be understood that these text fields exist in the first set. Then it can be determined that these text fields are the functional fields of the chip, so these text fields can be determined as target functional fields.

[0104] In addition, there is another part of the text fields that do not have matching preset functional fields in the first set, which means that this part of the text fields cannot be found in the first set, and it can be understood that this part of the text fields does not exist in the first set. Then it can be determined that this part of the text fields is not the functional field of the chip, for example, it can be some descriptive information, etc., so this part of the text fields can be ignored.

[0105] Based on the above introduction, we can combine Figure 4 To understand, such as Figure 4 As shown, for example, the first set includes preset function fields such as 4G, 5G, NFC, H264, H265, etc., and assuming that the current function information is as follows Figure 4 As shown in , the function information includes some sentences for describing the functions that the current chip needs to support. The text fields included in the function information can include, for example, 4G, function, chip, 5G, can, H264, need, and so on. Among them, when splitting each text field from the function chip, for example, corresponding word segmentation processing can be used, and this embodiment does not limit this.

[0106] Afterwards, each text field included in the function information can be matched with the preset function field in the first set to determine whether there is a text field with a matching preset function field in the first set. Figure 4 What can be determined is that among the function fields such as 4G, 5G, and H264, there are matching preset function fields in the first set. Therefore, these matching function fields can be determined as the target function fields in this embodiment, that is, the function fields indicating the functions that the current target chip needs to support.

[0107] S304: Determine a plurality of candidate function modules in a preset function module library according to at least one target function field and a preset corresponding relationship; the preset corresponding relationship includes a plurality of function fields and a function module corresponding to each function field.

[0108] After determining the target function field, it is necessary to determine the specific function module based on the target function field. In one possible implementation method, a preset correspondence relationship can be set in this embodiment, for example, wherein the preset correspondence relationship can include, for example, multiple function fields and the function module corresponding to each function field.

[0109] For example, you can refer to Figure 5 To understand, Figure 5 The schematic diagram of the implementation of the preset functional relationship is given in Figure 5 The preset correspondence shown, for example, may include functional modules such as 4G, 5G, and H264, and it is assumed that the functional module corresponding to the 4G functional field is functional module 1, and it is assumed that the functional modules corresponding to the 5G functional field are functional module 1 and functional module 2, and it is assumed that the functional module corresponding to the H264 functional field is functional module 4.

[0110] Based on the above Figure 5 It is certain that each function field may correspond to one or more function modules. In actual implementation, the number of function modules corresponding to each function field, as well as the specific corresponding function modules, may depend on the actual functional requirements corresponding to the current function field and the specific implementation of the function modules. It is understood that any function module that can implement the chip function corresponding to the current function field can serve as the function module corresponding to the function field. Therefore, this embodiment does not impose any specific restrictions on the specific implementation of the preset correspondence relationship.

[0111] Because the target function field determined above indicates the various functions that the current chip needs to support, and includes the functional modules corresponding to each functional field in the preset correspondence, the functional modules corresponding to each target function field can be determined in the preset correspondence, for example. These functional modules determined here can be called, for example, candidate functional modules.

[0112] For example, in the above example, the currently determined target function field may include 4G, 5G, H264, and Figure 5 It can be determined that the functional modules corresponding to these target functional fields include functional module 1, functional module 2, and functional module 4, and thus it can be determined that the current functional modules to be selected include functional module 1, functional module 2, and functional module 4.

[0113] Based on the above description, it can be determined that the preset function module library includes various function modules, and then, for example, multiple current function modules to be selected can be determined from the preset function module library.

[0114] S305 : Displaying identifiers of multiple function modules to be selected in the chip design interface.

[0115] After determining the functional modules to be selected, the identification of each functional module to be selected can be displayed in the chip design interface, for example, where the identification of the functional module to be selected can be, for example, a block diagram including the name of the functional module to be selected, or the identification of the functional module to be selected can be simply the name of the functional module to be selected, etc. This embodiment does not impose any restrictions on this.

[0116] The chip design interface introduced here can be understood as the interface displayed on the operating terminal device for chip integration. The chip design interface can display the corresponding integration information of the chip, such as the identification of the multiple candidate functional modules introduced above.

[0117] For example, you can refer to Figure 6 To understand, such as Figure 6 As shown, assuming Figure 6 601 is a chip design interface. After determining each candidate functional module, the identification of each candidate functional module can be displayed in the chip design interface. Figure 6 602 in the figure, where 602 can be understood as the frame of the chip, and the identification of each candidate functional module determined above can be displayed inside the chip frame. Figure 6 The identifier of the candidate functional module in is a block diagram including the name of the candidate functional module.

[0118] And in a possible implementation, in this embodiment, when displaying the identification of each candidate functional module in the chip design interface, each candidate functional module can be displayed according to the size of the preset functional module and the arrangement position of the preset functional module, so as to minimize the user's operation.

[0119] S306: receiving an editing operation input by the user in the identifiers of the multiple candidate function modules, so as to determine the edited candidate function modules as multiple target function modules.

[0120] Afterwards, the user may, for example, edit the identifiers of the modules of the selected functions in the chip design interface, wherein the editing operation may be, for example, a deletion operation of the function module or an addition operation of the function module.

[0121] For example, if the user currently determines that function module 2 is unnecessary, the user can perform a deletion operation on function module 2. Furthermore, each function module in this embodiment may further include corresponding sub-function modules, and the current deletion operation may also be performed on the sub-modules of the function module. For example, the sub-modules of each function module to be selected may be automatically displayed when each function module to be selected is displayed, or the sub-modules of the currently clicked function module to be selected may be displayed after the user clicks on the corresponding function module to be selected.

[0122] As well as the above-mentioned addition operations for functional modules, refer to Figure 6 For example, the chip design interface may also include a function module list unit. The function module list may include, for example, various function modules included in the preset function module library. If there is a new chip function requirement, the corresponding function module can be searched in the function module list, for example, by entering the name of the function module or by sliding the page progress bar. After finding the corresponding function module, the function module can be displayed on the current chip design interface, for example, by clicking or dragging. The specific implementation method of displaying the added function module here is similar to the above description and will not be repeated here.

[0123] After the user performs the above-mentioned editing operation, the embodiment can receive the editing operation input by the user in the identifiers of multiple candidate functions, and then determine the edited candidate function modules as multiple target function modules.

[0124] It is understandable that the edited candidate functional modules introduced here include the candidate functional modules remaining after the above deletion operation and the newly added functional modules, and the currently determined target functional modules are the functional modules that implement the functions that the chip needs to support.

[0125] In one possible implementation, the preset functional module library in this embodiment also includes parameter information for each functional module. When displaying the available functional modules in the chip design interface, the parameter information for each available functional module can also be displayed. For example, the parameter information for each available functional module can be automatically displayed when the available functional modules are displayed, or the parameter information for the currently selected functional module can be displayed after the user clicks the corresponding available functional module. This allows the user to quickly and effectively determine the specific parameters of each current functional module. The parameter information can include, for example, power, area, performance, etc.

[0126] S307: Acquire connection configuration information, where the connection configuration information includes connection examples. Each connection example includes identifiers of at least two functional modules and a connection method between the at least two functional modules.

[0127] In this embodiment, the connection relationship between the target functional modules can also be automatically generated. In one possible implementation method, for example, connection configuration information can be obtained, and the connection configuration information can include connection examples. Each connection example includes the identifiers of at least two functional modules and the connection method between at least two functional modules. That is to say, in this embodiment, the connection relationship between each functional module can be pre-configured.

[0128] S308: Determine first connection information between the multiple target functional modules according to the identifiers and connection configuration information of the multiple target functional modules.

[0129] After the connection configuration information is determined, the connection relationship between each target function module can be determined according to the identifiers of the multiple target function modules and the connection configuration information determined above, thereby automatically generating the first connection information between each target function module. Figure 6 In the example, the connection relationship between functional module 1, functional module 2, and functional module 4 can be automatically generated.

[0130] S309: Receive second connection information input by the user between multiple target functional modules.

[0131] Furthermore, the first connection relationship generated above is automatically generated based on the preset connection configuration information, and there may be some parts that do not quite meet the actual needs of the current user, or the connection method between some functional modules does not exist in the connection configuration information, then it may also happen that no connection relationship is automatically generated between some target functional modules.

[0132] Therefore, this embodiment can also receive the second connection information input by the user between multiple target functional modules. The second connection information here can be, for example, the connection information between functional modules newly input by the user, or it can be the connection information modified by the user based on the currently automatically generated connection information. This embodiment does not limit this. Any connection information input by the user can be used as the second connection information in this embodiment.

[0133] S310 . Connect multiple target functional modules in a chip design interface according to the first connection information and the second connection information to obtain a target chip.

[0134] Based on the first connection information and the second connection information introduced above, the final connection method of each target functional module can be determined. Therefore, multiple target functional modules can be connected in the chip design interface according to the first connection information and the second connection information to obtain the target chip.

[0135] The chip integration method provided in the embodiment of the present application matches the text field in the function field with the preset function field in the first set, thereby effectively and automatically extracting the target function field of the function that the current chip needs to support from the function field. And then, based on the target function field and the preset correspondence, the candidate function module corresponding to each target function field can be determined, thereby automatically determining the function module required by the current chip. And based on the candidate function module, the candidate function module can also be updated accordingly according to the user's editing operation, so that the target function field required by the current chip function can be accurately and effectively determined. And then, based on the preset connection configuration information, the first connection information between each function module can be automatically generated, thereby effectively reducing the workload of manual operation and improving the efficiency of chip integration. At the same time, it can also support the user to input the second connection information by himself, and then determine the final connection relationship between each target function module based on the first connection information and the second connection information. So, on the basis of automatically realizing chip integration, it can support the user to adjust the automatically integrated chip according to actual needs, thereby effectively improving the flexibility and accuracy of chip integration.

[0136] On the basis of the above-mentioned embodiments, Figure 7 A systematic introduction to the specific implementation process of the chip integration method provided in this application is given. Figure 7 A schematic diagram of the processing flow of the chip integration method provided in an embodiment of the present application.

[0137] like Figure 7 As shown, when performing chip integration processing, for example, an input requirement document can be received first. The requirement document here can be, for example, a document in the common doc format, or a document in the common excel format, etc. This embodiment does not limit the specific format of the requirement document. As long as the requirement document includes a description of the requirements for the target chip to be integrated, the requirement document here can be understood as the functional information introduced in the above embodiment.

[0138] After obtaining the input requirement document, for example, the chip function definition can be first performed based on the requirement document. The chip function definition specifically aims to determine the functions that the current target chip needs to have from the requirement document. It is worth noting here that in the chip function definition link, the functions that the chip needs to have are some larger functions, such as Universal Serial Bus (USB), video compression, etc.

[0139] After determining the functions that the target chip needs to have in the chip function definition phase, refer to Figure 7 , further requirements decomposition can be performed. When implementing the requirements decomposition, the required chip functions specified in the chip function definition are further refined. For example, for the USB function described above, the requirements decomposition step can specifically determine whether the current chip should support USB2.0, USB3.0, or both. For another example, for the video compression function described above, the requirements decomposition step can specifically determine whether the current chip should support H264, H265, or both.

[0140] therefore, Figure 7 The chip function definition and requirement decomposition steps shown are for jointly determining the functions that the current target chip needs to have. The specific implementation method can be, for example, determining the target function field in the requirement document as introduced in the above embodiment. The specific implementation can refer to the introduction in the above embodiment and will not be repeated here.

[0141] After the chip function definition and requirement decomposition steps are completed, the required functions that the current chip needs to have can be determined. Then, for example, the corresponding IP that meets the current required functions can be determined in the IP library. The IP here corresponds to the functional module introduced in the above embodiment.

[0142] For example, the implementation of IP library can refer to Figure 7 To understand, the IP library can include multiple IPs, such as Figure 7 The shown application processor (AP) core, on-chip bus, Mem (memory), multimedia IP, low-speed interface, high-speed interface, double data rate synchronous dynamic random access memory (DDR), USB, image signal processing (ISP), baseband, embedded neural network processor (NPU), etc.

[0143] In the actual implementation process, the specific implementation of the IP contained in the IP library can be selected according to actual needs. In theory, all IPs that can be assembled on a chip can be included in the IP library.

[0144] The IP library can also include IP-related information such as the performance, power, area, interface, frequency (clk), timer (timing) of each IP, so that the relevant parameter information of the chip can be quickly and effectively displayed to users in the future.

[0145] Among them, the specific implementation of determining the IP that meets the current functional requirements in the IP library can refer to the implementation of determining the target functional module introduced in the above embodiment, which will not be repeated here.

[0146] After determining the IP that the current chip needs to have, the IP can be integrated and interconnected in a graphical manner. The specific implementation can refer to the display of each target functional module and the connection relationship between each target functional module in the chip design interface introduced in the above embodiment, which will not be repeated here.

[0147] The final output based on the above process may include a chip architecture diagram, that is, the specific identification of each IP and the connection relationship between each IP. At the same time, chip resource information can also be output, where the chip resource information may include, for example, the relevant parameters of each IP, that is, the performance, power, area, interface, frequency, timer and other information introduced above, and the chip resource information may also include the overall performance, power, area, interface, frequency, timer and other information of the currently integrated chip. The chip resource information can also be displayed in a graphical user interface to facilitate users to quickly and effectively determine the relevant information of the currently integrated chip.

[0148] In summary, the chip integration method provided in this application can effectively improve the flexibility and accuracy of chip integration.

[0149] Figure 8 This is a schematic diagram of the structure of the chip integrated device provided in the embodiment of the present application. Figure 8 As shown, the device 80 includes: an acquisition module 801 , a determination module 802 and a processing module 803 .

[0150] An acquisition module 801 is configured to acquire functional information corresponding to a target chip to be integrated, where the functional information indicates the functions of the target chip.

[0151] A determination module 802 is configured to determine a plurality of target function modules in a preset function module library according to the function information;

[0152] The determining module 802 is further configured to determine first connection information between the plurality of target functional modules;

[0153] The processing module 803 is configured to display the multiple target functional modules in a chip design interface, and connect the multiple target functional modules according to the first connection information to obtain a target chip, wherein the target chip includes the multiple target functional modules.

[0154] In one possible design, the determining module 802 is specifically configured to:

[0155] Determining at least one target function field according to the function information;

[0156] The plurality of target function modules are determined in the preset function module library according to the at least one target function field and a preset corresponding relationship, wherein the preset corresponding relationship includes a plurality of function fields and a function module corresponding to each function field.

[0157] In one possible design, the determining module 802 is specifically configured to:

[0158] Determining a plurality of candidate function modules in the preset function module library according to the at least one target function field and the preset corresponding relationship;

[0159] Displaying the identifiers of the multiple to-be-selected functional modules in the chip design interface;

[0160] An editing operation input by a user in the identifiers of the plurality of candidate function modules is received, so as to determine the edited candidate function modules as the plurality of target function modules.

[0161] In one possible design, the determining module 802 is specifically configured to:

[0162] Acquire a first set, wherein the first set includes a plurality of preset function fields;

[0163] Each text field included in the function information is matched with a plurality of preset function fields in the first set, and a text field having a matching preset function field is determined as the target function field.

[0164] In one possible design, the determining module 802 is specifically configured to:

[0165] Acquire connection configuration information, wherein the connection configuration information includes connection examples, and each connection example includes identifiers of at least two functional modules and a connection method between the at least two functional modules;

[0166] First connection information between the multiple target functional modules is determined according to the identifiers of the multiple target functional modules and the connection configuration information.

[0167] In one possible design, the processing module 803 is specifically configured to:

[0168] Displaying the multiple target functional modules in a chip design interface;

[0169] receiving second connection information input by a user between the plurality of target functional modules;

[0170] The plurality of target functional modules are connected in the chip design interface according to the first connection information and the second connection information to obtain a target chip.

[0171] The device provided in this embodiment can be used to execute the technical solution of the above method embodiment. Its implementation principle and technical effects are similar and will not be described in detail in this embodiment.

[0172] Figure 9 A schematic diagram of the hardware structure of the chip integrated device provided in the embodiment of the present application is shown as follows: Figure 9 As shown, the chip integrated device 90 of this embodiment includes: a processor 901 and a memory 902;

[0173] Memory 902, for storing computer-executable instructions;

[0174] The processor 901 is configured to execute computer-executable instructions stored in the memory to implement the various steps of the chip integration method in the above embodiment. For details, please refer to the relevant description in the above method embodiment.

[0175] Optionally, the memory 902 may be independent or integrated with the processor 901 .

[0176] When the memory 902 is independently provided, the chip integrated device further includes a bus 903 for connecting the memory 902 and the processor 901 .

[0177] An embodiment of the present application further provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions. When a processor executes the computer-executable instructions, the chip integration method performed by the above chip integration device is implemented.

[0178] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the modules is merely a logical function division. In actual implementation, there may be other division methods, such as multiple modules can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interface, device or module, which can be electrical, mechanical or other forms.

[0179] The integrated modules implemented in the form of software functional modules can be stored in a computer-readable storage medium. The software functional modules stored in a storage medium include instructions for causing a computer device (which can be a personal computer, server, or network device, etc.) or a processor to execute some of the steps of the methods described in various embodiments of the present application.

[0180] It should be understood that the processor described above may be a central processing unit (CPU), other general-purpose processors, digital signal processors (DSP), or application-specific integrated circuits (ASICs). A general-purpose processor may be a microprocessor or any conventional processor. The steps of the method disclosed in the present invention may be directly executed by a hardware processor or by a combination of hardware and software modules within the processor.

[0181] The memory may include a high-speed RAM memory, and may also include non-volatile storage NVM, such as at least one disk memory, and may also be a USB flash drive, a mobile hard disk, a read-only memory, a magnetic disk or an optical disk.

[0182] A bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus. Buses can be categorized as address buses, data buses, and control buses. For ease of illustration, the buses in the drawings of this application are not limited to just one bus or just one type of bus.

[0183] The storage medium may be implemented by any type of volatile or non-volatile memory device, or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk. The storage medium may be any available medium that can be accessed by a general-purpose or special-purpose computer.

[0184] Those skilled in the art will appreciate that all or part of the steps in the above-described method embodiments can be implemented using hardware associated with program instructions. The aforementioned program can be stored in a computer-readable storage medium. When executed, the program performs the steps of the above-described method embodiments. The aforementioned storage medium includes various media capable of storing program code, such as ROM, RAM, magnetic disks, or optical disks.

[0185] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some or all of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A chip integration method, characterized in that: include: Acquire function information corresponding to the target chip to be integrated, where the function information is used to indicate the functions possessed by the target chip; Determining a plurality of target function modules in a preset function module library according to the function information; Determining first connection information between the multiple target functional modules; Displaying the plurality of target functional modules in a chip design interface, and connecting the plurality of target functional modules according to the first connection information to obtain a target chip, wherein the target chip includes the plurality of target functional modules; According to the functional information, multiple target functional modules are determined in a preset functional module library, including: Determining at least one target function field according to the function information; The plurality of target function modules are determined in the preset function module library according to the at least one target function field and a preset corresponding relationship, wherein the preset corresponding relationship includes a plurality of function fields and a function module corresponding to each function field.

2. The method according to claim 1, characterized in that Determining the plurality of target function modules in the preset function module library according to the at least one target function field and the preset corresponding relationship includes: Determining a plurality of candidate function modules in the preset function module library according to the at least one target function field and the preset corresponding relationship; Displaying the identifiers of the multiple to-be-selected functional modules in the chip design interface; An editing operation input by a user in the identifiers of the plurality of candidate function modules is received, so as to determine the edited candidate function modules as the plurality of target function modules.

3. The method according to claim 1 or 2, characterized in that Determining at least one target function field according to the function information includes: Acquire a first set, wherein the first set includes a plurality of preset function fields; Each text field included in the function information is matched with a plurality of preset function fields in the first set, and a text field having a matching preset function field is determined as the target function field.

4. The method according to claim 1 or 2, characterized in that Determining first connection information between the multiple target functional modules includes: Acquire connection configuration information, wherein the connection configuration information includes connection examples, and each connection example includes identifiers of at least two functional modules and a connection method between the at least two functional modules; First connection information between the multiple target functional modules is determined according to the identifiers of the multiple target functional modules and the connection configuration information.

5. The method according to claim 1 or 2, characterized in that Displaying the identifiers of the plurality of target functional modules in a chip design interface and obtaining a target chip according to the first connection information includes: Displaying the multiple target functional modules in a chip design interface; receiving second connection information input by a user between the plurality of target functional modules; The plurality of target functional modules are connected in the chip design interface according to the first connection information and the second connection information to obtain a target chip.

6. A chip integrated device, characterized in that: include: An acquisition module, configured to acquire functional information corresponding to a target chip to be integrated, wherein the functional information indicates the functions possessed by the target chip; a determination module, configured to determine a plurality of target function modules in a preset function module library according to the function information; The determining module is further configured to determine first connection information between the plurality of target functional modules; a processing module, configured to display the plurality of target functional modules in a chip design interface, and connect the plurality of target functional modules according to the first connection information to obtain a target chip, wherein the target chip includes the plurality of target functional modules; The determination module is specifically used to determine at least one target function field based on the function information; and determine the multiple target function modules in the preset function module library based on the at least one target function field and a preset correspondence relationship, wherein the preset correspondence relationship includes multiple function fields and function modules corresponding to each function field.

7. A chip integrated device, characterized in that: include: Memory, used to store programs; A processor is configured to execute the program stored in the memory. When the program is executed, the processor is configured to execute the method according to any one of claims 1 to 5.

8. A computer-readable storage medium, characterized in that The method comprises instructions which, when executed on a computer, cause the computer to perform the method according to any one of claims 1 to 5.

9. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the method according to any one of claims 1 to 5 is implemented.

Citation Information

Patent Citations

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    CN112214957A