A laminated TCO film, silicon heterojunction battery and preparation method thereof

Abstract

The present invention discloses a laminated TCO film, which includes a first TCO film layer, a second TCO film layer and a third TCO film layer in sequence, wherein the first TCO film layer and the third TCO film layer are ITO film layers, and the second TCO film layer is an IWO or ICO film layer. The laminated TCO film of the present invention adopts a three-layer film structure, and the TCO films near the amorphous silicon and metal electrode ends take advantage of the good contact between different ITO films and amorphous silicon and metal electrodes, and the intermediate main body TCO layer takes advantage of the low carrier concentration and high carrier mobility of the IWO or ICO film. The laminated TCO film is used as a transparent conductive layer of a silicon heterojunction battery, which is beneficial to reducing the battery electrical and optical losses and improving the battery short-circuit current density and fill factor.

Description

Technical Field

[0001] The present invention belongs to the technical field of silicon heterojunction solar cells, and specifically relates to a laminated TCO film, and in particular also relates to a silicon heterojunction cell and a preparation method thereof. Background Art

[0002] In silicon heterojunction solar cells, the TCO film plays a role in conducting electricity and transmitting light, so good electrical and optical properties must be guaranteed. The electrical and optical properties of the film affect each other and must be optimized simultaneously to maximize the film performance. On the other hand, the TCO film is in contact with the amorphous silicon film and the metal electrode respectively. There will be contact resistance when different materials contact each other. It is necessary to optimize the contact properties of the film interface to reduce the contact resistance and improve the battery efficiency.

[0003] Therefore, it is necessary to develop a TCO film for silicon heterojunction solar cells that can take into account both electrical and optical properties and effectively improve cell efficiency. Summary of the invention

[0004] The present invention is based on the inventor's discovery and understanding of the following facts and problems: The resistivity of the TCO film is inversely proportional to the product of the carrier concentration and the mobility, which can be achieved by increasing the carrier concentration and the mobility. However, if the carrier concentration is too high, the film will absorb more light from the visible light to the near-infrared range, affecting the short-circuit current density of the battery. Therefore, the parameter that needs to be adjusted more is the carrier mobility. The contact between the TCO film and the amorphous silicon and metal electrodes is mainly related to the film work function. Different contact interfaces have different work function requirements for the TCO film. It is necessary to select a suitable TCO film to achieve work function matching between different interfaces and reduce the interface contact resistance.

[0005] In the related art, single-layer TCO films are commonly used. The material is doped indium oxide prepared by PVD or IWO or ICO films prepared by RPD. The typical carrier mobility of doped indium oxide films is 15-40cm 2 / (V·s), the carrier mobility of ICO or IWO thin films can reach 70-100cm 2 / (V·s). The carrier mobility of doped indium oxide film is low, which is not conducive to reducing the resistivity of the film itself. Although the mobility of ICO or IWO film is very high and the film itself has good conductivity, the interface contact resistance between the film and amorphous silicon and metal electrodes is large when used as an interface contact layer. Regardless of doping indium oxide or ICO and IWO, the existing single-layer film is difficult to take into account its interface contact performance with amorphous silicon or metal electrodes while optimizing its own photoelectric performance, resulting in a large contact resistance, which restricts the improvement of the battery fill factor. CN110993718 provides a high conversion efficiency heterojunction battery and its preparation method, specifically, the front side of the battery adopts a multilayer TCO film, the number of film layers is 2-3 layers, each film layer is one of a low refractive index (1.8-1.9) sputtered TCO film, a medium refractive index (1.9-2.0) sputtered TCO film and a high refractive index (2.0-2.1) sputtered TCO film, and the patent regulates the refractive index of each film layer to match the refractive index between the TCO and the amorphous silicon layer, reduce the light reflection at the material interface, and increase the short-circuit current density. However, the structural setting of the multilayer TCO film in the patent is only considered from the perspective of the refractive index matching between TCO and amorphous silicon, and the electrical contact of the amorphous silicon / TCO / metal electrode multi-interface is completely ignored. In fact, to achieve such a large range of changes in the TCO refractive index from 1.8 to 2.1, the adjustment range of process parameters such as the oxygen-argon gas ratio is also very large, and too high or too low gas ratios usually affect the volume resistance or contact performance of the film.

[0006] The present invention aims to solve at least one of the technical problems in the related art to a certain extent. To this end, an embodiment of the present invention proposes a laminated TCO film, which adopts a three-layer film structure. The TCO films near the amorphous silicon and near the metal electrode end take advantage of the good contact between different ITO films and amorphous silicon and metal electrodes, and the middle main body TCO layer takes advantage of the low carrier concentration and high carrier mobility of IWO or ICO films. The laminated TCO film is used as a transparent conductive layer of a silicon heterojunction battery, which is beneficial to reduce the battery electrical and optical losses and improve the battery short-circuit current density and fill factor.

[0007] A laminated TCO film according to an embodiment of the present invention comprises a first TCO film layer, a second TCO film layer and a third TCO film layer in sequence, wherein the first TCO film layer and the third TCO film layer are ITO film layers, and the second TCO film layer is IWO or ICO film layer.

[0008] The advantages and technical effects brought by the laminated TCO film of the embodiment of the present invention are as follows: 1. The laminated TCO film of the embodiment of the present invention adopts a three-layer structure, and the two interface contact layers are respectively made of ITO films, which optimizes the interface contact between the TCO film and the amorphous silicon and the metal electrode. The IWO or ICO film is used in the middle of the film to reduce the carrier concentration and improve the carrier mobility, thereby optimizing the conductivity and light transmittance of the film; 2. In the embodiment of the present invention, the use of the three-layer TCO film not only retains the low resistivity and low carrier absorption characteristics of the IWO or ICO film, but also utilizes the characteristics that the ITO film can form good contact with the amorphous silicon and the metal electrode, thereby reducing electrical and optical losses and improving the short-circuit current density and fill factor of the battery.

[0009] In some embodiments, the thickness of the first TCO thin film layer or the third TCO thin film layer is 10-15 nm, and the thickness of the second TCO thin film layer is 70-90 nm.

[0010] An embodiment of the present invention also provides a silicon heterojunction battery, including a silicon crystal substrate, and an intrinsic amorphous silicon film, an N-type / P-type doped amorphous silicon film, a transparent conductive oxide layer and a metal electrode deposited in sequence on both sides of the silicon crystal substrate, wherein the transparent conductive oxide layer is the stacked TCO film of the embodiment of the present invention.

[0011] The advantages and technical effects brought by the silicon heterojunction battery of the embodiment of the present invention are as follows: 1. In the silicon heterojunction battery of the embodiment of the present invention, the transparent conductive oxide layer adopts a three-layer TCO film, and the two interface contact layers are respectively selected from ITO films, which optimizes the interface contact between the TCO film and the amorphous silicon and the metal electrode. The IWO or ICO film is used in the middle of the film to reduce the carrier concentration and improve the carrier mobility, thereby optimizing the conductivity and light transmittance of the film; 2. In the embodiment of the present invention, the three-layer TCO film not only retains the low resistivity and low carrier absorption characteristics of the IWO or ICO film, but also utilizes the characteristics that the ITO film can form good contact with the amorphous silicon and the metal electrode, thereby reducing electrical and optical losses and improving the short-circuit current density and fill factor of the battery.

[0012] In some embodiments, in the stacked TCO thin film deposited on the N-type doped amorphous silicon film, the sputtering target material of the first TCO thin film layer in contact with the N-type doped amorphous silicon film is an ITO target material, and the mass ratio of In2O3 and SnO2 in the ITO target material is 97:3; the sputtering target material of the second TCO thin film layer is an IWO or ICO target material; the sputtering target material of the third TCO thin film layer in contact with the electrode is an ITO target material, and the mass ratio of In2O3 and SnO2 in the ITO target material is 97:3 or 90:10.

[0013] In some embodiments, in the stacked TCO thin film deposited on the P-type doped amorphous silicon film, the sputtering target material of the first TCO thin film layer in contact with the P-type doped amorphous silicon film is an ITO target material, and the mass ratio of In2O3 and SnO2 in the ITO target material is 90:10; the sputtering target material of the second TCO thin film layer is an IWO or ICO target material; the sputtering target material of the third TCO thin film layer in contact with the electrode is an ITO target material, and the mass ratio of In2O3 and SnO2 in the ITO target material is 97:3.

[0014] An embodiment of the present invention also provides a method for preparing a silicon heterojunction battery, comprising depositing an intrinsic amorphous silicon film, an N-type / P-type doped amorphous silicon film and a transparent conductive oxide layer on both sides of a silicon crystal substrate in sequence, and forming a metal electrode on the transparent conductive oxide layer, wherein depositing the transparent conductive oxide layer on the N-type / P-type doped amorphous silicon film comprises depositing a first TCO thin film layer, a second TCO thin film layer and a third TCO thin film layer in sequence on the N-type / P-type doped amorphous silicon film.

[0015] The advantages and technical effects brought by the preparation method of the silicon heterojunction battery of the embodiment of the present invention are as follows: 1. In the method of the embodiment of the present invention, a three-layer TCO film is deposited on an N-type / P-type doped amorphous silicon film, and ITO films are selected for the two interface contact layers, respectively, to optimize the interface contact between the TCO film and the amorphous silicon and the metal electrode. An IWO or ICO film is used in the middle of the film to reduce the carrier concentration and improve the carrier mobility, thereby optimizing the conductivity and light transmittance of the film; 2. In the method of the embodiment of the present invention, the three-layer TCO film formed by deposition not only retains the low resistivity and low carrier absorption characteristics of the IWO or ICO film, but also utilizes the characteristic that the ITO film can form good contact with the amorphous silicon and the metal electrode, thereby reducing electrical and optical losses and improving the short-circuit current density and fill factor of the battery.

[0016] In some embodiments, depositing a transparent conductive oxide layer on the N-type doped amorphous silicon film comprises the following steps:

[0017] Depositing a first TCO thin film layer on the N-type doped amorphous silicon thin film, using PVD equipment for film coating, using an ITO target as the sputtering target, wherein the mass ratio of In2O3 to SnO2 in the ITO target is 97:3, the sputtering power is 0.6-3KW, the substrate temperature is 25-200°C, the vacuum chamber pressure is 0.2-0.6Pa, and the oxygen partial pressure accounts for 1-3%;

[0018] Depositing a second TCO thin film layer on the first TCO thin film layer, using an RPD device for film coating, and using an IWO or ICO target material for sputtering, wherein when using the IWO target material for film coating, the coating current is 140-180A, the substrate temperature is 20-30°C, the vacuum chamber pressure is 0.1-0.4Pa, and the oxygen partial pressure accounts for 10-35%; when using the ICO target material for film coating, the coating current is 160-180A, the substrate temperature is 20-30°C, the vacuum chamber pressure is 0.1-0.4Pa, and the oxygen partial pressure accounts for 10-40%;

[0019] A third TCO thin film layer is deposited on the second TCO thin film layer, and PVD equipment is used for film coating. The sputtering target is an ITO target, and the mass ratio of In2O3 and SnO2 in the ITO target is 97:3 or 90:10. The sputtering power is 1-3KW, the substrate temperature is 25-200°C, the vacuum chamber pressure is 0.2-0.6Pa, and the oxygen partial pressure accounts for 0.25-1.5%.

[0020] In some embodiments, depositing a transparent conductive oxide layer on the P-type doped amorphous silicon film comprises the following steps:

[0021] Depositing a first TCO thin film layer on the P-type doped amorphous silicon thin film, using PVD equipment for film coating, using an ITO target as the sputtering target, wherein the mass ratio of In2O3 to SnO2 in the ITO target is 90:10, the sputtering power is 0.6-3KW, the substrate temperature is 25-200°C, the vacuum chamber pressure is 0.2-0.6Pa, and the oxygen partial pressure accounts for 1-4%;

[0022] Depositing a second TCO thin film layer on the first TCO thin film layer, using an RPD device for film coating, and using an IWO or ICO target material for sputtering, wherein when using the IWO target material for film coating, the coating current is 140-180A, the substrate temperature is 20-30°C, the vacuum chamber pressure is 0.1-0.4Pa, and the oxygen partial pressure accounts for 10-35%; when using the ICO target material for film coating, the coating current is 160-180A, the substrate temperature is 20-30°C, the vacuum chamber pressure is 0.1-0.4Pa, and the oxygen partial pressure accounts for 10-40%;

[0023] A third TCO thin film layer is deposited on the second TCO thin film layer, and PVD equipment is used for coating. The sputtering target is an ITO target, the mass ratio of In2O3 and SnO2 in the ITO target is 97:3, the sputtering power is 1-3KW, the substrate temperature is 25-200°C, the vacuum chamber pressure is 0.2-0.6Pa, and the oxygen partial pressure accounts for 0.25-1.5%.

[0024] In some embodiments, in depositing a transparent conductive oxide layer on the N / P-type doped amorphous silicon film, an annealing process is performed after the second TCO thin film layer is deposited.

[0025] In some embodiments, the annealing is performed in air at a temperature of 180-230° C. and for a time of 20-50 min. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a schematic diagram of the structure of the silicon heterojunction battery prepared in Example 1. DETAILED DESCRIPTION

[0027] Embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings. The embodiments described below with reference to the accompanying drawings are exemplary and intended to be used to explain the present invention, but should not be understood as limiting the present invention.

[0028] A laminated TCO film according to an embodiment of the present invention comprises a first TCO film layer, a second TCO film layer and a third TCO film layer in sequence, wherein the first TCO film layer and the third TCO film layer are ITO film layers, and the second TCO film layer is IWO or ICO film layer.

[0029] The laminated TCO film of the embodiment of the present invention adopts a three-layer structure, and the two interface contact layers are respectively made of ITO films, which optimizes the interface contact between the TCO film and the amorphous silicon and the metal electrode. The IWO or ICO film is used in the middle of the film to reduce the carrier concentration and improve the carrier mobility, thereby optimizing the conductivity and light transmittance of the film. In the embodiment of the present invention, the three-layer TCO film is used to retain the low resistivity and low carrier absorption characteristics of the IWO or ICO film, and utilizes the characteristics that the ITO film can form good contact with the amorphous silicon and the metal electrode, thereby reducing electrical and optical losses and improving the short-circuit current density and fill factor of the battery.

[0030] In some embodiments, the thickness of the first TCO film layer or the third TCO film layer is 10-15 nm, and the thickness of the second TCO film layer is 70-90 nm. In the embodiments of the present invention, the thickness of each layer in the stacked TCO film is optimized, and the stacked TCO film is used as a transparent conductive layer in a silicon heterojunction battery, which further improves the optical transmittance and interface contact, and improves the battery short-circuit current density and fill factor.

[0031] An embodiment of the present invention also provides a silicon heterojunction battery, including a silicon crystal substrate, and an intrinsic amorphous silicon film, an N-type / P-type doped amorphous silicon film, a transparent conductive oxide layer and a metal electrode deposited in sequence on both sides of the silicon crystal substrate, wherein the transparent conductive oxide layer is the stacked TCO film of the embodiment of the present invention.

[0032] In the silicon heterojunction battery of the embodiment of the present invention, the transparent conductive oxide layer adopts a three-layer TCO film, and the two interface contact layers are respectively selected from ITO films, which optimizes the interface contact between the TCO film and the amorphous silicon and the metal electrode. The IWO or ICO film is used in the middle of the film to reduce the carrier concentration and improve the carrier mobility, thereby optimizing the conductivity and light transmittance of the film. In the embodiment of the present invention, the three-layer TCO film retains the low resistivity and low carrier absorption characteristics of the IWO or ICO film, and utilizes the characteristics that the ITO film can form good contact with the amorphous silicon and the metal electrode, thereby reducing electrical and optical losses and improving the short-circuit current density and fill factor of the battery.

[0033] In some embodiments, in the stacked TCO thin film deposited on the N-type doped amorphous silicon film, preferably, the sputtering target material of the first TCO thin film layer in contact with the N-type doped amorphous silicon film is an ITO target material, and the mass ratio of In2O3 and SnO2 in the ITO target material is 97:3; the sputtering target material of the second TCO thin film layer is an IWO or ICO target material, wherein the IWO target material refers to W-doped In2O3 and the ICO target material refers to Ce-doped In2O3; the sputtering target material of the third TCO thin film layer in contact with the electrode is an ITO target material, and the mass ratio of In2O3 and SnO2 in the ITO target material is 97:3 or 90:10. In the stacked TCO film deposited on the P-type doped amorphous silicon film, preferably, the sputtering target material of the first TCO film layer in contact with the P-type doped amorphous silicon film is an ITO target material, and the mass ratio of In2O3 and SnO2 in the ITO target material is 90:10; the sputtering target material of the second TCO film layer is an IWO or ICO target material; the sputtering target material of the third TCO film layer in contact with the electrode is an ITO target material, and the mass ratio of In2O3 and SnO2 in the ITO target material is 97:3. In the embodiment of the present invention, the target materials of the contact layer between the stacked TCO film and the N / P-type doped amorphous silicon film and the contact layer between the stacked TCO film and the electrode are preferably selected, which further improves the optical transmittance and interface contact, and improves the short-circuit current density and fill factor of the silicon heterojunction battery.

[0034] An embodiment of the present invention also provides a method for preparing a silicon heterojunction battery, comprising depositing an intrinsic amorphous silicon film, an N-type / P-type doped amorphous silicon film and a transparent conductive oxide layer on both sides of a silicon crystal substrate in sequence, and forming a metal electrode on the transparent conductive oxide layer, wherein depositing the transparent conductive oxide layer on the N-type / P-type doped amorphous silicon film comprises depositing a first TCO thin film layer, a second TCO thin film layer and a third TCO thin film layer in sequence on the N-type / P-type doped amorphous silicon film.

[0035] In the preparation method of the silicon heterojunction battery of the embodiment of the present invention, a three-layer TCO film is deposited on the N-type / P-type doped amorphous silicon film, and the two interface contact layers are respectively selected from ITO films, which optimizes the interface contact between the TCO film and the amorphous silicon and the metal electrode. The IWO or ICO film is used in the middle of the film to reduce the carrier concentration and improve the carrier mobility, thereby optimizing the conductivity and light transmittance of the film. In the method of the embodiment of the present invention, the deposited three-layer TCO film retains the low resistivity and low carrier absorption characteristics of the IWO or ICO film, and utilizes the characteristics that the ITO film can form good contact with the amorphous silicon and the metal electrode, thereby reducing electrical and optical losses and improving the short-circuit current density and fill factor of the silicon heterojunction battery. The short-circuit current density can reach 39.6 mA / cm 2 , the fill factor can reach 85.0% and the battery efficiency can reach 24.8%.

[0036] In some embodiments, depositing a transparent conductive oxide layer on the N-type doped amorphous silicon film comprises the following steps:

[0037] A first TCO thin film layer is deposited on the N-type doped amorphous silicon thin film, and a PVD device is used for film coating. The sputtering target is an ITO target, the mass ratio of In2O3 to SnO2 in the ITO target is 97:3, the sputtering power is 0.6-3KW, the substrate temperature is 25-200°C, the vacuum chamber pressure is 0.2-0.6Pa, and the oxygen partial pressure accounts for 1-3%; the performance of the first TCO thin film layer formed by deposition is: the carrier concentration is 0.8-1.5×10 20 cm -3 , the carrier mobility is 15-30cm 2 / (V·s), preferably, the film thickness is 10-15nm;

[0038] A second TCO thin film layer is deposited on the first TCO thin film layer, and the RPD equipment is used for film coating, and the sputtering target is IWO or ICO target. When the IWO target is used for film coating, the coating current is 140-180A, the substrate temperature is 20-30°C, the vacuum chamber pressure is 0.1-0.4Pa, and the oxygen partial pressure accounts for 10-35%. The performance of the deposited second TCO thin film layer is: the carrier concentration is 1.5-3.5×10 20 cm -3 , the carrier mobility is 80-100cm 2 / (V·s), preferably, the film thickness is 70-90nm; when the ICO target material is used for film coating, the coating current is 160-180A, the substrate temperature is 20-30°C, the vacuum chamber pressure is 0.1-0.4Pa, the oxygen partial pressure accounts for 10-40%, and the performance of the deposited second TCO film layer is: the carrier concentration is 1.5-3.0×10 20 cm -3 , the carrier mobility is 70-100cm 2 / (V·s), preferably, the film thickness is 70-90nm;

[0039] A third TCO thin film layer is deposited on the second TCO thin film layer, and a PVD device is used for film coating. The sputtering target is an ITO target, and the mass ratio of In2O3 to SnO2 in the ITO target is 97:3 or 90:10. The sputtering power is 1-3KW, the substrate temperature is 25-200°C, the vacuum chamber pressure is 0.2-0.6Pa, and the oxygen partial pressure accounts for 0.25-1.5%. When an ITO target with a mass ratio of In2O3 to SnO2 of 97:3 is used, the performance of the deposited third TCO thin film layer is: the carrier concentration is 1.5-3.0×10 20 cm -3 , the carrier mobility is 15-30cm 2 / (V·s); When the ITO target material with a mass ratio of In2O3 to SnO2 of 90:10 is used, the performance of the deposited third TCO thin film layer is: the carrier concentration is 1.5-5.0×10 20 cm -3 , the carrier mobility is 15-30cm 2 / (V·s), preferably, the film thickness is 10-15nm.

[0040] In some embodiments, depositing a transparent conductive oxide layer on the P-type doped amorphous silicon film comprises the following steps:

[0041] The first TCO thin film layer is deposited on the P-type doped amorphous silicon thin film, and the film is coated by PVD equipment. The sputtering target is an ITO target. The mass ratio of In2O3 and SnO2 in the ITO target is 90:10, the sputtering power is 0.6-3KW, the substrate temperature is 25-200°C, the vacuum chamber pressure is 0.2-0.6Pa, and the oxygen partial pressure accounts for 1-4%; the performance of the first TCO thin film layer formed by deposition is: the carrier concentration is 1.25-2.5×10 20 cm -3 , the carrier mobility is 15-30cm 2 / (V·s), preferably, the film thickness is 10-15nm;

[0042] A second TCO thin film layer is deposited on the first TCO thin film layer, and the RPD equipment is used for film coating, and the sputtering target is IWO or ICO target. When the IWO target is used for film coating, the coating current is 140-180A, the substrate temperature is 20-30°C, the vacuum chamber pressure is 0.1-0.4Pa, and the oxygen partial pressure accounts for 10-35%. The performance of the deposited second TCO thin film layer is: the carrier concentration is 1.5-3.5×10 20 cm -3 , the carrier mobility is 80-100cm 2 / (V·s), preferably, the film thickness is 70-90nm; when the ICO target material is used for film coating, the coating current is 160-180A, the substrate temperature is 20-30°C, the vacuum chamber pressure is 0.1-0.4Pa, the oxygen partial pressure accounts for 10-40%, and the performance of the deposited second TCO film layer is: the carrier concentration is 1.5-3.0×10 20 cm -3 , the carrier mobility is 70-100cm 2 / (V·s), preferably, the film thickness is 70-90nm;

[0043] A third TCO thin film layer is deposited on the second TCO thin film layer, and a PVD device is used for film coating. The sputtering target is an ITO target, and the mass ratio of In2O3 to SnO2 in the ITO target is 97:3. The sputtering power is 1-3KW, the substrate temperature is 25-200°C, the vacuum chamber pressure is 0.2-0.6Pa, and the oxygen partial pressure accounts for 0.25-1.5%. The performance of the deposited third TCO thin film layer is: the carrier concentration is 1.5-3.0×10 20 cm -3 , the carrier mobility is 15-30cm 2 / (V·s), preferably, the film thickness is 10-15nm.

[0044] In some embodiments, in depositing a transparent conductive oxide layer on the N / P-type doped amorphous silicon film, an annealing treatment is performed after the second TCO thin film layer is deposited. Preferably, the annealing is performed in air, the annealing temperature is 180-230° C., and the annealing time is 20-50 min. In the method of the embodiment of the present invention, the annealing treatment is performed after the second TCO thin film layer is deposited, which can effectively improve the carrier mobility.

[0045] The present invention is described in detail below with reference to the accompanying drawings and embodiments.

[0046] Example 1

[0047] (1) Intrinsic amorphous silicon thin films and N-type / P-type doped amorphous silicon thin films are sequentially deposited on both sides of the single crystal silicon wafer. The N-side of the cell is deposited with the N-type doped amorphous silicon thin film, and the P-side of the cell is deposited with the P-type doped amorphous silicon thin film.

[0048] (2) Depositing a first TCO film on the N / P surface of the cell, including:

[0049] The PVD equipment is used for coating. The sputtering target is an ITO target with a mass ratio of In2O3 and SnO2 of 97:3. The sputtering power is 1KW, the substrate temperature is 150°C, the vacuum chamber pressure is 0.4Pa, and the oxygen partial pressure is 1.3%. The first TCO thin film layer is deposited on the N side of the cell with a thickness of 12nm. This thin film layer is in contact with the N-type doped amorphous silicon thin film layer.

[0050] PVD equipment is used for coating. The sputtering target is an ITO target with a mass ratio of In2O3 and SnO2 of 90:10. The sputtering power is 2KW, the substrate temperature is 150°C, the vacuum chamber pressure is 0.4Pa, the oxygen partial pressure is 3.0%, and the first TCO thin film layer with a thickness of 12nm is deposited on the P side of the battery cell. This thin film layer is in contact with the P-type doped amorphous silicon thin film layer.

[0051] (3) Depositing a second TCO film on the first TCO film, comprising:

[0052] RPD equipment was used for coating, the sputtering target material was IWO, the coating current was 170A, the substrate temperature was 25°C, the vacuum chamber pressure was 0.2Pa, the oxygen partial pressure was 29%, and the second TCO thin film layer was deposited on the first TCO thin film layer on the N side of the cell, with a thickness of 80nm;

[0053] RPD equipment was used for coating, the sputtering target material was IWO, the coating current was 170A, the substrate temperature was 25°C, the vacuum chamber pressure was 0.2Pa, the oxygen partial pressure was 24%, and the second TCO thin film layer was deposited on the first TCO thin film layer on the P side of the cell, with a thickness of 80nm;

[0054] (4) Annealing the first TCO thin film layer and the second TCO thin film layer, including:

[0055] After the second TCO thin film layer is deposited, the first TCO thin film layer and the second TCO thin film layer are annealed in air at the same time, with the annealing temperature being 210° C. and the annealing time being 30 minutes.

[0056] (5) Depositing a third TCO film on the second TCO film, comprising:

[0057] The PVD equipment was used for coating. The sputtering target was an ITO target with a mass ratio of In2O3 and SnO2 of 90:10. The sputtering power was 2KW, the substrate temperature was 150°C, the vacuum chamber pressure was 0.4Pa, and the oxygen partial pressure was 1.0%. The third TCO thin film layer was deposited on the second TCO thin film layer on the N side of the cell, with a thickness of 12nm.

[0058] The PVD equipment was used for coating. The sputtering target was an ITO target with a mass ratio of In2O3 and SnO2 of 97:3. The sputtering power was 2KW, the substrate temperature was 150°C, the vacuum chamber pressure was 0.4Pa, the oxygen partial pressure was 1.0%, and the third TCO thin film layer was deposited on the second TCO thin film layer on the P side of the cell. The thickness was 12nm.

[0059] The total thickness of the stacked TCO film deposited on the N-type doped amorphous silicon film is 104 nm, and the total thickness of the stacked TCO film deposited on the P-type doped amorphous silicon film is 104 nm.

[0060] (6) After the N-type doped amorphous silicon film and the P-type doped amorphous silicon film are deposited to form a stacked TCO film, a metal electrode is formed by screen printing or electroplating.

[0061] The schematic diagram of the structure of the silicon heterojunction battery prepared in this embodiment is as follows: Figure 1 The performance data are shown in Table 1.

[0062] Example 2

[0063] The method is the same as that in Example 1, except that the target material used when depositing the third TCO thin film layer in the stacked TCO thin film on the N-type doped amorphous silicon thin film is an ITO target material with a mass ratio of In2O3 to SnO2 of 97:3.

[0064] The performance data of the silicon heterojunction cell prepared in this example are shown in Table 1.

[0065] Example 3

[0066] The method is the same as that in Example 1, except that the target material used when depositing the second TCO thin film layer in the stacked TCO thin film on the N-type doped amorphous silicon thin film and the P-type doped amorphous silicon thin film is ICO.

[0067] The performance data of the silicon heterojunction cell prepared in this example are shown in Table 1.

[0068] Example 4

[0069] The method is the same as that in Example 1, except that, in depositing the stacked TCO film on the N-type doped amorphous silicon film and the P-type doped amorphous silicon film, the thickness of the first TCO film layer is 10 nm, the thickness of the second TCO film layer is 70 nm, and the thickness of the third TCO film layer is 10 nm, that is, the thickness of the deposited stacked TCO film is 90 nm.

[0070] The performance data of the silicon heterojunction cell prepared in this example are shown in Table 1.

[0071] Example 5

[0072] The method is the same as that in Example 1, except that, in depositing the stacked TCO film on the N-type doped amorphous silicon film and the P-type doped amorphous silicon film, the thickness of the first TCO film layer is 15 nm, the thickness of the second TCO film layer is 90 nm, and the thickness of the third TCO film layer is 15 nm, that is, the thickness of the deposited stacked TCO film is 120 nm.

[0073] The performance data of the silicon heterojunction cell prepared in this example are shown in Table 1.

[0074] Example 6

[0075] The method is the same as that in Example 1, except that in depositing the stacked TCO film on the P-type doped amorphous silicon film, the target material for depositing the first TCO film is an ITO target material with a mass ratio of In2O3 to SnO2 of 97:3.

[0076] The performance data of the silicon heterojunction cell prepared in this example are shown in Table 1.

[0077] Example 7

[0078] The method is the same as that in Example 1, except that in depositing the stacked TCO film on the P-type doped amorphous silicon film, the target material for depositing the third TCO film is an ITO target material with a mass ratio of In2O3 to SnO2 of 90:10.

[0079] The performance data of the silicon heterojunction cell prepared in this example are shown in Table 1.

[0080] Example 8

[0081] The method is the same as that in Example 1, except that, in depositing the stacked TCO film on the N-type doped amorphous silicon film and the P-type doped amorphous silicon film, the thickness of the first TCO film layer is 34 nm, the thickness of the second TCO film layer is 36 nm, and the thickness of the third TCO film layer is 34 nm, that is, the thickness of the deposited stacked TCO film is 104 nm.

[0082] The performance data of the silicon heterojunction cell prepared in this example are shown in Table 1.

[0083] Comparative Example 1

[0084] The method is the same as that in Example 1, except that in depositing the stacked TCO film on the N-type doped amorphous silicon film and the P-type doped amorphous silicon film, the target material for depositing the middle layer second TCO film layer is an ITO target material with a mass ratio of In2O3 and SnO2 of 90:10.

[0085] The performance data of the silicon heterojunction cell prepared in Comparative Example 1 is shown in Table 1.

[0086] Comparative Example 2

[0087] The method is the same as that in Example 1, except that in depositing the stacked TCO film on the N-type doped amorphous silicon film and the P-type doped amorphous silicon film, the target material for depositing the first TCO film and the third TCO film is IWO.

[0088] The performance data of the silicon heterojunction cell prepared in Comparative Example 2 is shown in Table 1.

[0089] Comparative Example 3

[0090] The method is the same as that in Example 1, except that, in depositing the stacked TCO film on the N-type doped amorphous silicon film and the P-type doped amorphous silicon film, the thickness of the first TCO film layer is 7 nm, the thickness of the second TCO film layer is 46 nm, and the thickness of the third TCO film layer is 7 nm, that is, the thickness of the deposited stacked TCO film is 60 nm.

[0091] The performance data of the silicon heterojunction cell prepared in Comparative Example 3 is shown in Table 1.

[0092] Table 1

[0093]

[0094] In the present invention, the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" etc. mean that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the described specific features, structures, materials or characteristics may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0095] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.

Claims

1. A silicon heterojunction battery, characterized in that: It comprises a silicon crystal substrate, and an intrinsic amorphous silicon film, an N-type / P-type doped amorphous silicon film, a transparent conductive oxide layer and a metal electrode deposited in sequence on both sides of the silicon crystal substrate, wherein the transparent conductive oxide layer is a stacked TCO film, which in sequence comprises a first TCO film layer, a second TCO film layer and a third TCO film layer, wherein the first TCO film layer and the third TCO film layer are ITO film layers, and the second TCO film layer is an IWO or ICO film layer, wherein the thickness of the first TCO film layer or the third TCO film layer is 10-15 nm, and the thickness of the second TCO film layer is 70-90 nm; In the stacked TCO thin film deposited on the N-type doped amorphous silicon thin film, the sputtering target material of the first TCO thin film layer in contact with the N-type doped amorphous silicon thin film is an ITO target material, and the mass ratio of In2O3 to SnO2 in the ITO target material is 97:3; the sputtering target material of the second TCO thin film layer is an IWO or ICO target material; the sputtering target material of the third TCO thin film layer in contact with the electrode is an ITO target material, and the mass ratio of In2O3 to SnO2 in the ITO target material is 90:10; In the stacked TCO thin film deposited on the P-type doped amorphous silicon film, the sputtering target material of the first TCO thin film layer in contact with the P-type doped amorphous silicon film is an ITO target material, and the mass ratio of In2O3 and SnO2 in the ITO target material is 90:10; the sputtering target material of the second TCO thin film layer is an IWO or ICO target material; the sputtering target material of the third TCO thin film layer in contact with the electrode is an ITO target material, and the mass ratio of In2O3 and SnO2 in the ITO target material is 97:

3.

2. A method for preparing a silicon heterojunction battery according to claim 1, characterized in that: The method comprises depositing an intrinsic amorphous silicon film, an N-type / P-type doped amorphous silicon film and a transparent conductive oxide layer in sequence on both sides of a silicon crystal substrate, and forming a metal electrode on the transparent conductive oxide layer, wherein depositing the transparent conductive oxide layer on the N-type / P-type doped amorphous silicon film comprises depositing a first TCO thin film layer, a second TCO thin film layer and a third TCO thin film layer in sequence on the N-type / P-type doped amorphous silicon film.

3. The method for preparing a silicon heterojunction battery according to claim 2, characterized in that: Depositing a transparent conductive oxide layer on the N-type doped amorphous silicon film comprises the following steps: Depositing a first TCO thin film layer on the N-type doped amorphous silicon thin film, using PVD equipment for film coating, using an ITO target as the sputtering target, wherein the mass ratio of In2O3 to SnO2 in the ITO target is 97:3, the sputtering power is 0.6-3KW, the substrate temperature is 25-200°C, the vacuum chamber pressure is 0.2-0.6Pa, and the oxygen partial pressure accounts for 1-3%; A second TCO thin film layer is deposited on the first TCO thin film layer, and an RPD device is used for film coating, and the sputtering target is an IWO or ICO target. When the IWO target is used for film coating, the coating current is 140-180A, the substrate temperature is 20-30°C, the vacuum chamber pressure is 0.1-0.4Pa, and the oxygen partial pressure accounts for 10-35%; when the ICO target is used for film coating, the coating current is 160-180A, the substrate temperature is 20-30°C, the vacuum chamber pressure is 0.1-0.4Pa, and the oxygen partial pressure accounts for 10-40%; A third TCO thin film layer is deposited on the second TCO thin film layer, and PVD equipment is used for film coating. The sputtering target is an ITO target, the mass ratio of In2O3 and SnO2 in the ITO target is 90:10, the sputtering power is 1-3KW, the substrate temperature is 25-200°C, the vacuum chamber pressure is 0.2-0.6Pa, and the oxygen partial pressure accounts for 0.25-1.5%.

4. The method for preparing a silicon heterojunction battery according to claim 2, characterized in that: Depositing a transparent conductive oxide layer on the P-type doped amorphous silicon film comprises the following steps: Depositing a first TCO thin film layer on the P-type doped amorphous silicon thin film, using PVD equipment for film coating, using an ITO target as the sputtering target, wherein the mass ratio of In2O3 to SnO2 in the ITO target is 90:10, the sputtering power is 0.6-3KW, the substrate temperature is 25-200°C, the vacuum chamber pressure is 0.2-0.6Pa, and the oxygen partial pressure accounts for 1-4%; A second TCO thin film layer is deposited on the first TCO thin film layer, and an RPD device is used for film coating, and the sputtering target is an IWO or ICO target. When the IWO target is used for film coating, the coating current is 140-180A, the substrate temperature is 20-30°C, the vacuum chamber pressure is 0.1-0.4Pa, and the oxygen partial pressure accounts for 10-35%; when the ICO target is used for film coating, the coating current is 160-180A, the substrate temperature is 20-30°C, the vacuum chamber pressure is 0.1-0.4Pa, and the oxygen partial pressure accounts for 10-40%; A third TCO thin film layer is deposited on the second TCO thin film layer, and PVD equipment is used for coating. The sputtering target is an ITO target, and the mass ratio of In2O3 and SnO2 in the ITO target is 97:

3. The sputtering power is 1-3KW, the substrate temperature is 25-200°C, the vacuum chamber pressure is 0.2-0.6Pa, and the oxygen partial pressure accounts for 0.25-1.5%.

5. The method for preparing a silicon heterojunction battery according to claim 3 or 4, characterized in that: In depositing a transparent conductive oxide layer on the N / P type doped amorphous silicon film, an annealing process is performed after the second TCO thin film layer is deposited and formed.

6. The method for preparing a silicon heterojunction battery according to claim 5, characterized in that: The annealing is carried out in air at a temperature of 180-230° C. and for a time of 20-50 min.

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