Switching device and communication equipment test system for multi-channel RF product testing

By achieving time-frequency synchronization between the control circuit and the device under test and accurately controlling the switching time of the switches in the switch matrix circuit, the problems of low test efficiency and poor compatibility in the existing technology are solved, and efficient and accurate multi-channel RF product testing is achieved.

CN114253167BActive Publication Date: 2025-09-30HUAWEI TECH CO LTD
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202011027681.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-09-25
Publication Date
2025-09-30
Estimated Expiration
2040-09-25

AI Technical Summary

Technical Problem

In existing multi-channel RF product testing, the switch matrix cannot achieve precise control, resulting in low test efficiency, poor compatibility and scalability, and reduced accuracy and reliability of test results.

Method used

By controlling the circuit and the device under test to achieve time and frequency synchronization, the switching time of the switches in the switch matrix circuit is accurately controlled to reduce the number of interactions with the terminal device. A modularly designed switch matrix circuit is used to adapt to test requirements with different channel numbers.

Benefits of technology

It improves test efficiency, reduces operational errors, ensures the accuracy and reliability of test results, and reduces test costs.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN114253167B_ABST
    Figure CN114253167B_ABST
Patent Text Reader

Abstract

An embodiment of the present application discloses a switching device for multi-channel radio frequency product testing. The switching device includes a control circuit and a switch matrix circuit. The control circuit is used to receive a first trigger signal and a clock signal of the device under test to synchronize with the time and frequency of the device under test, and is used to output a control signal to the switch matrix circuit. The multiple input terminals of the switch matrix circuit are used to connect the device under test, and the multiple output terminals of the switch matrix circuit are used to connect to an instrument. The switch matrix circuit is used to control the switching of any one of the multiple input terminals to the multiple output terminals according to the control signal. An embodiment of the present application also provides a communication equipment testing system. By adopting the embodiment of the present application, the switching time of the switch can be accurately controlled by synchronizing the time and frequency of the control circuit with the device under test, and the number of interactions with the terminal device can be reduced, thereby effectively improving the test efficiency.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a switch device and a communication equipment testing system for multi-channel radio frequency product testing. Background Art

[0002] Currently, the overall RF performance test of multi-channel RF products mainly includes uplink and downlink testing of the RF channels. Testing multi-channel RF products also requires switching the connection between different channels and instruments. During the test process, testers generally use manual connection and removal of cables, which results in low test efficiency and easily accelerates the wear and tear of instruments and consumables, ultimately reducing the consistency and reliability of RF product performance test results. However, considering the small number of samples tested in R&D, the limited test time and number of switching operations, the impact is acceptable. Production, on the other hand, requires efficient and fast testing due to large-scale shipments, while also ensuring the authenticity and accuracy of test results. Therefore, a serial switch matrix is ​​usually used to achieve automatic switching of multiple channels. This technical solution greatly improves test efficiency and prevents human factors from affecting test accuracy.

[0003] An existing switch matrix for RF product testing is Figure 1 As shown in , the switch matrix includes functional units such as a main control unit 201, a switch drive unit 202, a switch array 203, an EPLD 204, and a power supply 210. The main control unit 201 can communicate and exchange instructions with a personal computer through a general-purpose interface bus (GPIB) 205. The main control unit 201 is also connected to a FLASH 206 and a double data rate synchronous dynamic random access memory (DDR) 207, and converts the operation instructions into switch switching commands that can be recognized by the switch drive unit 202, which controls the switch array 203 to complete the switch switching action. The switch array 203 is connected to RF products and instruments at the same time to complete automatic switching. The fan monitoring circuit 208 and the temperature monitoring circuit 209 are mainly composed of an MCU, an EPLD, and related fans, temperature sensors, etc., so that the fan output air volume is automatically controlled by the MCU according to the real-time ambient temperature.

[0004] During implementation, the applicant discovered at least the following problems with the prior art: First, the switch matrix is ​​limited by the duration and frequency of command interactions between the main control unit and the personal computer, making it impossible to precisely control switch closures. Second, the personal computer is required to control instrumentation for test sampling, resulting in single-channel testing taking seconds and exponentially increasing the testing time for multiple channels, leading to low test efficiency. Furthermore, its scalability and compatibility are poor, and the number of RF channels it supports is fixed, requiring customization for different RF product series, which increases testing costs. Summary of the Invention

[0005] The embodiments of the present application provide a switching device and a communication equipment testing system for multi-channel RF product testing. By achieving time-frequency synchronization between the control circuit and the device under test, the switching time of the switches in the switch matrix circuit can be accurately controlled, and the number of interactions with the terminal device can be reduced, thereby improving test efficiency.

[0006] In the first aspect, a switching device for testing a radio frequency remote unit is provided, the switching device comprising a control circuit and a switch matrix circuit; the control circuit is connected to a device under test and is used to receive a synchronization signal from the device under test so that the control circuit can achieve time and frequency synchronization with the device under test, and is used to output a control signal to the switch matrix circuit; the multiple input terminals of the switch matrix circuit are used to connect to the device under test and / or an instrument, the multiple output terminals of the switch matrix circuit are used to connect to an instrument and / or the device under test, and the switch matrix circuit is used to control the switching of any one of the multiple input terminals to the multiple output terminals according to the control signal. By adopting the switching device provided in the embodiment of the present application, time and frequency synchronization is achieved with the device under test through the control circuit, the compatibility is good, and the switch matrix can be switched quickly, thereby enabling precise control of the switch closing time point, the time granularity of the control can reach the millisecond level, the time switching accuracy and the conversion time can reach the microsecond level, and the test efficiency can be greatly improved.

[0007] In one possible design, the control circuit includes a logic device connected to the device under test. The logic device is configured to receive a first trigger signal in the synchronization signal to synchronize time with the device under test, and to lock a clock signal in the synchronization signal via a phase-locked loop (PLL) to synchronize frequency with the device under test. Thus, the logic device can utilize the first trigger signal from the device under test to achieve time synchronization with the device under test, while simultaneously combining with an internal PLL to achieve frequency synchronization with the device under test. Once the logic device and the device under test are synchronized in time and frequency, the switch matrix circuit can be precisely controlled.

[0008] In one possible design, the control circuit includes a main control chip, which is used to receive test instructions and transmit the test instructions to the logic device. Thus, the main control chip transmits the test instructions to the logic device, and the logic device can automatically generate control signals based on the test instructions and preset parameters to control the switch matrix circuit to complete the closing of corresponding switches.

[0009] In one possible design, the control circuit is further configured to output a second trigger signal, which is used to trigger the instrument to test the RF signal of the device under test. Thus, the control circuit can automatically trigger the instrument to complete the relevant test based on the trigger signal required by the externally connected instrument, eliminating the need for an external terminal device to control the instrument's operation and reducing the time and frequency of command interactions with the external terminal device.

[0010] In one possible design, the control signal is multi-channel and is used to control the on / off of one or more switch matrix circuits. Thus, using the switch device of the present application, the control signal output by the control circuit can be multi-channel, and multiple switch matrix circuits can be connected and used in combination. In other words, multiple switch matrix circuits can be replaced or used in combination to adapt to the testing requirements of RF products with different channel counts.

[0011] In one possible design, the switching device further includes a switch control line, and the logic device is configured to generate the control signal based on the test instruction and preset parameters, and transmit the control signal to the switch matrix circuit via the switch control line. Thus, using the switching device of the present application, the logic device can transmit the control signal to the switch matrix circuit via the switch control line.

[0012] In one possible design, the switch device further includes a plurality of first connectors for connecting to the plurality of RF interfaces to be tested or the instrument, and the plurality of first connectors are further configured to connect to the plurality of input terminals of the switch matrix circuit. Thus, connection between the switch matrix circuit and the RF input signal can be achieved.

[0013] In one possible design, the switch device further includes multiple second connectors for connecting to an instrument or the multiple RF interfaces to be tested, and the multiple second connectors are further connected to multiple output terminals of the switch matrix circuit. Thus, connection between the switch matrix circuit and the RF output signal can be achieved.

[0014] In one possible design, the switch device further includes a third connector and a fourth connector, wherein the third connector is used to receive the first trigger signal and transmit the first trigger signal to the logic device, and the fourth connector is used to receive the clock signal and transmit the clock signal to the logic device. Thus, the logic device can receive the first trigger signal and the clock signal via the third connector and the fourth connector, and use the first trigger signal and the clock signal to achieve time and frequency synchronization with the device under test.

[0015] In one possible design, the switch device further includes a fifth connector configured to transmit the second trigger signal output by the logic device to the instrument. Thus, the logic device can output the second trigger signal to the instrument via the fifth connector to trigger the instrument to complete the relevant test.

[0016] In one possible design, the switch device further includes a sixth connector and a seventh connector, and the control circuit is configured to receive the test instruction via the sixth connector and the seventh connector. Therefore, the control circuit receives the test instruction and related parameters via the sixth connector and the seventh connector.

[0017] In one possible design, the control circuit includes a processing chip connected to the device under test. The processing chip is configured to receive a first trigger signal within the synchronization signal to synchronize time with the device under test, and to lock a clock signal within the synchronization signal via a phase-locked loop (PLL) to achieve frequency synchronization with the device under test. Thus, the processing chip can utilize the first trigger signal to achieve time synchronization with the device under test, while simultaneously integrating with an internal PLL to achieve frequency synchronization with the device under test. Once the logic device and the device under test are synchronized in time and frequency, the switching timing of switches in the switch matrix circuit can be precisely controlled.

[0018] In one possible design, the processing chip is further configured to output a second trigger signal to the instrument to trigger the instrument to test the radio frequency signal of the device under test. The processing chip is further configured to receive a test instruction, generate the control signal based on the test instruction and preset parameters, and transmit the control signal to the switch matrix circuit. Thus, the processing chip can automatically generate the control signal based on the test instruction and preset parameters to control the switch matrix circuit to close the corresponding switch.

[0019] In one possible design, the switch device further includes an eighth connector configured to receive the first trigger signal and the clock signal and transmit the first trigger signal and the clock signal to the control circuit. By adopting appropriate interface replacement or merging strategies, as well as partial component replacement solutions, the surface interfaces of the switch device described in this application can be streamlined to a certain extent, simplifying the panel and even reducing the device size.

[0020] In one possible design, the control circuit includes multiple switch control line bundle interfaces, through which the control circuit is connected to multiple switch matrix circuits. The switch matrix circuit of the present application adopts a modular design, is replaceable and can be used in conjunction, and can improve the compatibility of the entire switch device.

[0021] In a second aspect, a communication equipment testing system is provided, comprising an instrument, a terminal device, and a switch device as described above, wherein the switch device is used to connect the device under test, the instrument, and the terminal device, the terminal device is used to send instructions to the switch device for control, and the switch device is used to control the RF interface under test of the device under test to form a path with the instrument according to the instructions, so as to test the RF channel corresponding to the RF interface under test. According to the above design, the test speed of the device under test can be accelerated, the production and testing efficiency can be greatly improved, and the manual wiring and manual operation of the instrument equipment during the operation process can be reduced to avoid operational errors during the test process that affect the accuracy of the test.

[0022] The switching device and communication equipment testing system provided in the embodiments of the present application can accurately control the switching time of switches in the switch matrix circuit by achieving time-frequency synchronization between the control circuit and the device under test, and reduce the number of interactions with the personal computer, thereby effectively improving the testing efficiency. In addition, the switch matrix circuit in the embodiments of the present application adopts a modular design, which can be expanded or replaced to adapt to the testing requirements of RF products of different channels, thereby reducing costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 The present invention is a schematic diagram of a switch matrix used for testing radio frequency products in the prior art.

[0024] Figure 2 This is an application scenario diagram of the switch device in the embodiment of the present application.

[0025] Figure 3 This is another application scenario diagram of the switch device in the embodiment of the present application.

[0026] Figure 4 This is a schematic diagram of a switch device provided in the first embodiment of the present application.

[0027] Figure 5 This is a schematic diagram of the connection between a control circuit of a switch device and multiple switch matrix circuits provided in an embodiment of the present application.

[0028] Figure 6 This is a schematic diagram of a switch device provided in the second embodiment of the present application.

[0029] Figure 7 This is a schematic diagram of a switch device provided in the third embodiment of the present application.

[0030] Figure 8 This is a schematic diagram of a switch device provided in the fourth embodiment of the present application.

[0031] Figure 9 This is a schematic diagram of a switch device provided in the fifth embodiment of the present application.

[0032] Description of main component symbols

[0033] Switch device 100

[0034] Device Under Test 101

[0035] RF Cable 102

[0036] Signal Source 104

[0037] LAN 105

[0038] Spectrum Analyzer 106

[0039] Personal Computer 107

[0040] Instrument 108

[0041] Terminal device 109

[0042] Control circuit 10

[0043] FPGA chip 12

[0044] Phase-locked loop 13

[0045] MCU 14

[0046] Switch matrix circuit 20

[0047] Input 21

[0048] Output 22

[0049] Switch control line 30

[0050] First connector 40

[0051] Second connector 41

[0052] Eighth connector 42

[0053] The third connector 43

[0054] Fourth connector 44

[0055] Fifth connector 45

[0056] Sixth connector 46

[0057] Seventh connector 47

[0058] RF interface to be tested 48

[0059] Switch control line bundle interface 49

[0060] Power module 50

[0061] Serial port 51

[0062] Network port 52

[0063] Logic device U1

[0064] Main control chip U2

[0065] Processing chip U3 DETAILED DESCRIPTION

[0066] To make the purpose, technical solutions, and advantages of the embodiments of this application more clear, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0067] An embodiment of the present application provides a switching device for multi-channel radio frequency product testing. The switching device can be applied in the technical field of communication equipment testing and can meet the high-efficiency testing requirements of future multi-channel radio frequency product indicators.

[0068] See also Figure 2 , Figure 2 This is a structural diagram of a communication equipment test system that can be applied in the embodiment of the present application. Figure 2As shown, the communication equipment testing system may include a switch device 100, a meter 108, and a terminal device 109. The terminal device 109 may be a user equipment (UE), for example, a mobile phone, a tablet computer (Tablet Personal Computer), a laptop computer (Laptop Computer), a personal digital assistant (PDA), a mobile internet device (MID), a wearable device (Wearable Device), or a personal computer (Personal Computer, PC) and other terminal-side devices. It should be noted that the specific type of the terminal device 109 is not limited in the embodiments of the present application.

[0069] Specifically, a switch device 100 is connected to a device under test (DUT) 101 via a radio frequency cable 102. The switch device 100 is also connected to an instrument 108 via the radio frequency cable 102. Specifically, the instrument 108 includes a signal source 104 and a spectrum analyzer 106. The signal source 104 is connected to the switch device 100 via the radio frequency cable 102, and the spectrum analyzer 106 is connected to the switch device 100 via the radio frequency cable 102. A terminal device 109 is connected to and controls the switch device 100 via a local area network (LAN) 105. Simultaneously, the terminal device 109 is connected to and controls the signal source 104 and the spectrum analyzer 106 via the LAN 105. Through the control of the terminal device 109, any radio frequency interface to be tested in the DUT 101 can be connected to any interface on the interface end of the instrument 108.

[0070] It can be understood that the device under test 101 in the embodiment of the present application can be a multi-channel radio frequency product, such as a macro / micro base station, a smart phone, a router and other radio frequency products.

[0071] See also Figure 3 , a more specific application scenario is also provided in the embodiment of the present application, as follows: the above-mentioned terminal device is a personal computer.

[0072] In this embodiment, the switch device 100 and a personal computer 107 can quickly switch multiple radio frequency channels and switch uplink and downlink signals, thereby performing multi-channel testing on the device under test 101, which can speed up the test speed, greatly improve production and testing efficiency, reduce manual wiring and manual operation of instrument equipment during operation, and avoid operational errors during the test that affect the accuracy of the test.

[0073] Specifically in the embodiments of the present application, Figure 3 As shown, in the present application, the personal computer 107 can be connected to and control the switch device 100 through the local area network 105. At the same time, the personal computer 107 can also be connected to and control the signal source 104 and the spectrum analyzer 106 through the local area network 105.

[0074] In the embodiment of the present application, the personal computer 107 can be used to send instructions to other devices for control, and can be used to obtain data from other devices for data processing.

[0075] In the embodiment of the present application, the switch device 100 is connected to each RF interface to be tested of the device under test 101. In one embodiment, the switch device 100 can be used to trigger one of the RF interfaces to be tested to form a path with the spectrum analyzer 106, thereby testing the RF channel corresponding to the RF interface to be tested. As a result, the switch device 100 in the embodiment of the present application can quickly switch between various signals, can simultaneously connect multiple RF channels of a multi-channel RF product, and automatically switch to each RF channel for testing, thereby reducing test time.

[0076] In a specific implementation, the personal computer 107 sends a test instruction to the switch device 100, sends an uplink signal transmission instruction to the signal source 104, and sends a power test instruction to the spectrum analyzer 106. The test instruction instructs the switch device 100 to trigger the current radio frequency interface under test to establish a path between the spectrum analyzer and the device under test 101. The uplink signal transmission instruction instructs the signal source 104 to transmit an uplink signal to the device under test 101, causing the device under test 101 to process the uplink signal. The power test instruction instructs the spectrum analyzer 106 to measure the actual transmit power.

[0077] In a specific embodiment, the device under test 101 transmits a radio frequency signal, and then the switch device 100 switches the multi-channel transmission signal to the spectrum analyzer 106 for downlink testing, thereby achieving a high-efficiency test that can test multi-channel base station downlink radio frequency indicators.

[0078] At the same time, the signal source 104 sends a multi-channel test signal, and then the multi-channel signal source test signal is switched to the device under test 101 through the switch device 100, thereby achieving high-efficiency uplink testing.

[0079] In an embodiment of the present application, the personal computer 107 can perform the above-mentioned analysis and processing functions by configuring at least one processor and at least one memory, wherein the memory can be used to store software programs and modules, and the processor can execute various application functions and data processing of the personal computer by running the software programs and modules stored in the memory.

[0080] See also Figure 4 , showing a schematic diagram of a first embodiment of a switch device 100 for multi-channel radio frequency product testing of the present application.

[0081] In this embodiment, the switch device 100 may include a control circuit 10 and a switch matrix circuit 20 .

[0082] The control circuit 10 in the embodiment of the present application is configured to receive a test instruction from the terminal device 109 (such as a personal computer) and output a control signal to the switch matrix circuit 20 , wherein the control signal is used to perform switching control on the switch matrix circuit 20 .

[0083] The switch matrix circuit 20 in the embodiment of the present application can be configured as an M×N switch matrix. For example, the switch matrix circuit 20 in the embodiment of the present application can be configured to have M RF input terminals 21 and N RF output terminals 22. Where M and N are both integers greater than 1.

[0084] The M RF input terminals 21 of the switch matrix circuit 20 can be used to connect to the device under test 101. The M RF input terminals 21 of the switch matrix circuit 20 can also be used to connect to the instrument 108, such as the signal source 104. The N RF output terminals 22 of the switch matrix circuit 20 can be used to connect to the instrument 108, such as the spectrum analyzer 106. The N RF output terminals 22 of the switch matrix circuit 20 can also be used to connect to the device under test 101. The switch matrix circuit 20 can control the switching of any one of the M RF input terminals 21 to the N RF output terminals 22 according to the control signal output by the control circuit 10.

[0085] For example, the switch matrix circuit 20 can control the switch switching according to the control signal so that the RF input terminal 21 of the 8th channel is connected to the RF output terminal 22 of the 3rd channel, or the switch matrix circuit 20 can also control the switch switching according to the control signal so that the RF input terminal 21 of the 7th channel is connected to the RF output terminal 22 of the 2nd channel.

[0086] In some embodiments of the present application, the RF input end 21 of the switch matrix circuit 20 can be connected to the device under test 101 and the signal source 104 through the RF cable 102, and the RF output end 22 of the switch matrix circuit 20 can be connected to the spectrum analyzer 106 and the device under test 101 through the RF cable 102.

[0087] It is understandable that the number of ports (i.e., RF input and RF output) of the switch matrix circuit 20 can be set according to actual needs. Therefore, in the embodiment of the present application, multiple devices can be connected to the test at the same time, or a single device can be tested separately without affecting the test results. In the specific implementation process, the switch matrix circuit 20 is configured to receive the control signal transmitted by the control circuit 10 through the switch control line 30, and is configured to complete the channel switching according to the control signal, that is, it can complete the switching of any one of the M RF input terminals 21 to the N RF output terminals 22 according to the control signal of the control circuit 10.

[0088] It can be understood that the control signal controls the switching of switches in the switch matrix circuit 20 , so that any RF interface in the device under test 101 can be connected to any interface of the signal source 104 or the spectrum analyzer 106 .

[0089] In one embodiment, the switch matrix circuit 20 may include a controller, which is used to receive a control signal from the control circuit 10. The controller can control the closing of the switch according to the control signal, thereby controlling the switching of any one of the M RF input terminals 21 to the N RF output terminals 22.

[0090] In one embodiment of the present application, the control signal may be transmitted to the switch matrix circuit 20 via the switch control line 30. The control signal may be multi-channel and used to control the on / off of one or more switch matrix circuits.

[0091] In some specific application scenarios, the switch control line 30 may be a 4-way serial port control line, that is, the control circuit 10 may control the on-off combination of 4 arbitrary switch matrix circuits 20 through the 4-way serial port control lines.

[0092] In a more specific application scenario, the switch matrix circuit 20 may include an 8-channel x 3-channel solid-state switch matrix. The 8 channels may be used to connect to the RF channels or instruments of the device under test 101, and the 3 channels may be used to connect to the instruments or the device under test. The switch matrix circuit 20 may be built into the switch device 100 and connected to the control circuit 10 via a serial port control line (such as the switch control line 30). As a result, the number of test connection cables in the embodiment of the present application is small, and component installation is flexible and compact.

[0093] In other embodiments, the switch matrix circuit 20 may also include solid-state switch matrices of other specifications and combinations of channels. It is understood that those skilled in the art may select the specific specifications and combinations of the switch matrix according to actual needs, and the present embodiment does not impose any specific limitations on this.

[0094] In a specific example of an embodiment of the present application, the control circuit 10 can be configured to interact with the terminal device 109 for instructions, and can be used to output a control signal to the switch matrix circuit 20 according to the test instructions and preset parameters issued by the terminal device 109, and control it to complete the closure of the corresponding switch.

[0095] It can be understood that the test instructions and pre-set parameters sent by the terminal device 109 can set the switch switching of the switch matrix circuit to establish a physical path of the test link of any device under test and then perform the test.

[0096] In an optional example of the embodiment of the present application, the control circuit 10 is configured to receive a synchronization signal from the device under test 101 to achieve time and frequency synchronization between the control circuit 10 and the device under test 101. It can be understood that the synchronization signal is the trigger input signal (Trigger in) and the reference clock signal (RefCLK) output by the device under test.

[0097] It is understood that time-frequency synchronization can be achieved by using the same time base and reference frequency clock between different systems. The time-frequency synchronization mentioned in the embodiments of the present application can be achieved by using a pulse signal with a specific period and pulse width (time alignment) and a reference clock with a specific frequency (frequency alignment) between the switching device 100 and the device under test 101. However, the present application does not limit the specific signal parameters.

[0098] Therefore, the control circuit 10 in the embodiment of the present application can control the switching timing of the switch matrix circuit 20 based on the timing of the transmission of the data by the device under test 101 or the signal source 104. The control circuit 10 can also output a trigger output signal (Triggerout) to the instrument 108, whereby the trigger output signal can trigger the instrument to automatically complete data acquisition or transmission at the time when the switch of the switch matrix circuit 20 is closed, thereby completing the relevant tests on the uplink / downlink signals of the device under test 101. It can be understood that the trigger output signal output by the control circuit 10 can serve as a second trigger signal and be used to trigger the instrument 108 to start relevant tests on the uplink and downlink signals.

[0099] It is understood that the "transmitting data" mentioned herein refers to the device under test or signal source being configured to transmit RF signals. The "acquiring data" mentioned herein refers to the test instrument such as a spectrum analyzer or the device under test being configured to receive RF signals and perform relevant tests on the RF signals.

[0100] As an example of a specific application of this application, Figure 4As shown in , the switch device 100 may be configured to have M first connectors 40 , where the first connector 40 is the radio frequency input interface of the switch device 100 .

[0101] In a specific implementation, the M first connectors 40 can be configured to be provided on a panel of the switch device 100, so that the RF interface 48 to be tested or the signal source 104 in the device to be tested 101 can be connected to some of the M first connectors 40. Furthermore, the M first connectors 40 are configured to be connected in a one-to-one correspondence with the M RF input terminals 21 in the switch matrix circuit 20.

[0102] In an embodiment of the present application, the first connector 40 may be an SMA type female connector, which has the advantages of long life, superior performance, and high reliability. That is, the switch device in an embodiment of the present application may include one or more SMA type female connectors, and these SMA type female connectors may all be installed on the front panel of the switch device 100.

[0103] As an example, the RF input terminals 21 in the switch matrix circuit 20 can be connected to the one or more SMA-type female connectors via a semi-flexible RF cable. In some specific embodiments, there can be multiple SMA-type female connectors. For example, 11 RF input terminals 21 in the switch matrix circuit 20 can be used to connect to 11 SMA-type female connectors via semi-flexible RF cables, while 9 SMA-type female connectors in the switch matrix circuit 20 can be reserved and unused.

[0104] Therefore, the switch device 100 in the embodiment of the present application, by setting multiple first connectors 40 (such as SMA-type female connectors) on the front panel of the switch device 100 for use with the switch matrix circuit 20, can facilitate the replacement or combined use of the switch matrix circuit to meet different RRU testing requirements, thereby improving the compatibility of the switch device 100.

[0105] It is understandable that in other preferred embodiments, the first connector 40 may also be other RF interfaces, such as N-type, DIN-type, TNC-type, etc., and the number of such interfaces is generally greater than the total number of channels supported by the switch matrix circuit 20. This application will not impose any specific restrictions on this.

[0106] Furthermore, in some embodiments, the switch device 100 may be configured to have N second connectors 41 , where the second connector 41 is a radio frequency output interface of the switch device 100 .

[0107] The N second connectors 41 may also be configured to be disposed on a panel of the switch device 100 , and the N second connectors 41 may be configured to be connected to the spectrum analyzer 106 or the device under test 101 .

[0108] Exemplarily, the N second connectors 41 are used to be connected to the N output terminals 22 in the switch matrix circuit 20 in a one-to-one correspondence.

[0109] In some embodiments, the switch device 100 may further include a third connector 43 , a fourth connector 44 , and a fifth connector 45 .

[0110] In an embodiment of the present application, the third connector 43 may be configured to receive a trigger input signal from the device under test 101 and transmit the trigger input signal to the control circuit 10. The fourth connector 44 may be configured to receive a clock signal from the device under test 101 and transmit the clock signal to the control circuit 10. In one embodiment, the fifth connector 45 may be connected to the instrument 108 via a radio frequency cable 102. For example, the fifth connector 45 may be connected to the spectrum analyzer 106 via the radio frequency cable 102. The fifth connector 45 is configured to receive a trigger output signal output by the control circuit 10 and transmit the trigger output signal to an instrument (such as the spectrum analyzer 106).

[0111] In a specific embodiment of the present application, the third connector 43 , the fourth connector 44 , and the fifth connector 45 may all be BNC connectors. The third connector 43 , the fourth connector 44 , and the fifth connector 45 may all be mounted on a rear panel of the switch device 100 .

[0112] As an example of a specific application of the present application, the switch device 100 may further include a sixth connector 46 and a seventh connector 47 .

[0113] In some embodiments, the sixth connector 46 and the seventh connector 47 are communication interfaces for interaction between the switch device 100 and the terminal device 109, that is, the control circuit 10 can be configured to communicate with the terminal device 109 through the sixth connector 46 and the seventh connector 47. The sixth connector 46 and the seventh connector 47 can both communicate with the terminal device 109 through the local area network 105 and receive some relevant instructions from the terminal device 109. For example, the sixth connector 46 and the seventh connector 47 can receive test instructions from the terminal device 109 through the local area network 105, transmit the test instructions to the control circuit 10, and control the on and off of the switch matrix circuit 20 accordingly.

[0114] During testing, the channel and instrument selection for uplink or downlink testing may be determined by the connection position in the switch matrix circuit 20 , and the connection position of the switch matrix circuit 20 may be automatically controlled by the terminal device 109 according to the test items.

[0115] During the uplink test, the terminal device 109 controls the connection position of the switch matrix circuit 20 so that a tested RF interface of the device under test 101 is connected to the signal source 104. At this time, the connection of the tested channel of the uplink test is completed.

[0116] During the downlink test, the terminal device 109 controls the connection position of the switch matrix circuit 20 so that a radio frequency interface to be tested of the device under test 101 is connected to the spectrum analyzer 106 .

[0117] Compared to the traditional manual wiring test mode, the embodiments of the present application can reduce misjudgments caused by manual operation errors, thereby ensuring the factory yield and pass rate. Moreover, it can also greatly improve test efficiency while ensuring the reliability of test items and test results. In addition, by introducing a switch matrix circuit, the flexibility of the system can be improved and can be applied to a variety of production test schemes. That is, the embodiments of the present application can quickly switch multiple channels and uplink and downlink signals, reducing manual wiring and switching time, thereby achieving rapid testing.

[0118] See also Figure 5 In one embodiment, the control circuit 10 may be configured to have a plurality of switch control line bundle interfaces 49 .

[0119] Specifically in the embodiment of the present application, the switch control lines 30 may have multiple paths, and may be connected to and used with multiple switch matrix circuits 20. These switch control line bundle interfaces 49 may be used to connect multiple switch matrix circuits 20.

[0120] For example, Figure 5 The control circuit 10 shown in FIG can correspond to three switch matrix circuits 20. It is understandable that those skilled in the art can adjust the number of switch matrices according to actual needs, and this embodiment of the present application does not impose any specific limitation on this.

[0121] Since the switch matrix circuit in the embodiment of the present application can adopt a modular design, it can be expanded or replaced to adapt to the testing requirements of different devices under test 101, thereby reducing some production costs.

[0122] In some embodiments of the present application, the switch device 100 can complete multi-channel test sampling by interacting with the terminal device 109 twice, and the multi-channel sampling time can be reduced to seconds, which can also be equal to the sampling time of a single channel. As a result, there is no need for the terminal device to control the instrument, thereby reducing the number of interactions between the instrument and the terminal device and further improving test efficiency.

[0123] In one embodiment, the device under test 101 may include multiple RF interfaces 48 to be tested. The RF interfaces 48 to be tested in the device under test 101 may be connected to the first connector 40, and the RF interfaces 48 to be tested in the device under test 101 may also be connected to the second connector 41. Specifically, the first connector 40 may be connected to the RF interfaces 48 to be tested in the device under test 101 via the RF cable 102, and the second connector 41 may also be connected to the RF interfaces 48 to be tested in the device under test 101 via the RF cable 102.

[0124] The switch matrix circuit 20 can trigger the formation of a path between any of the first connectors 40 and any of the second connectors 41 based on a control signal from the control circuit 10. That is, the RF interface 48 under test in the device under test 101 can be connected to the spectrum analyzer 106 sequentially via the first connector 40 and the second connector 41, and can also be connected to the signal source 104 sequentially via the second connector 41 and the first connector 40. The switch matrix circuit 20 is configured to control the formation of a path between one of the first connectors 40 and one of the second connectors 41 based on a control signal from the control circuit 10, thereby achieving a path between the RF interface 48 under test and the instrument 108.

[0125] In the embodiment of the present application, the specific structure and type of the switch matrix circuit 20 can be set according to the actual number of RF interfaces 48 to be tested, thereby realizing the on-off control of each RF interface 48 to be tested by the switch matrix circuit 20, and can be used to switch different RF interfaces on to complete the test of each RF channel of the device under test 101.

[0126] See also Figure 6 , showing a schematic diagram of a second embodiment of a switching device for multi-channel radio frequency product testing of the present application.

[0127] The switch device 100 of this embodiment differs from the switch device 100 of the first embodiment in that:

[0128] In the embodiment of the present application, the control circuit 10 may be further configured to include a logic device U1 and a main control chip U2.

[0129] The logic device U1 in the embodiment of the present application is configured to receive a first trigger signal input by the device under test 101 and perform time synchronization with the device under test 101, and lock the input reference clock signal through its internal phase-locked loop (PLL) 13 to achieve frequency synchronization.

[0130] Therefore, after the logic device U1 is synchronized with the device under test 101 in time and frequency, the logic device U1 can be configured to accurately control the switching time of the switch matrix circuit 20 according to the time point when the device under test 101 sends a number, and the time granularity of the control can reach millisecond level.

[0131] In addition, the logic device U1 in the embodiment of the present application can be further configured to control the generation of one or more second trigger signals according to the actual needs of the externally connected instrument, which is used to automatically trigger the instrument to complete data collection or transmission after the switch of the switch matrix circuit 20 is switched, thereby breaking through the limitation of the prior art in which the terminal device controls the instrument action.

[0132] In this embodiment, the main control chip U2 may be configured to perform command interaction with a personal computer through the seventh connector 47 , and to transmit the test instructions output by the personal computer to the logic device U1 .

[0133] Therefore, the main control chip U2 in this embodiment can simply interact with a personal computer to achieve multi-channel self-collection. The logic device U1 is configured to generate a control signal based on the test instruction and preset parameters, and transmit it to the switch matrix circuit 20 via the switch control line 30 to control it to complete the closing of the corresponding switch.

[0134] Next, the switch matrix circuit 20 is configured to receive a control signal transmitted by the logic device U1 , thereby completing the switching from the M RF input channels to any one of the N RF output channels.

[0135] Therefore, the control circuit described in the embodiment of the present application can reduce program modifications to logic devices and main control chips, thereby improving system compatibility.

[0136] See also Figure 7 , showing a schematic diagram of a third embodiment of a switching device for multi-channel radio frequency product testing of the present application.

[0137] The switch device 100 of this embodiment differs from the switch device 100 of the second embodiment in that:

[0138] Specifically in one embodiment of the present application, Figure 7As shown, the logic device is a field programmable gate array (FPGA) chip 12 , and the main control chip may be a microcontroller unit (MCU) 14 .

[0139] It is understandable that the main control chip U2 in other embodiments may also select a commonly used single-chip microcomputer, Arm series chip, STM32 series chip, or digital signal processing (DSP) chip, as long as its functions can meet the requirements of this application.

[0140] In other embodiments, the logic device U1 may also be a commonly used Xilinx chip, Altera chip, or a complex programmable logic device (CPLD) chip or an erasable programmable logic device (EPLD) chip, as long as its logic resources can meet the requirements of this application.

[0141] The FPGA chip 12 is used to receive the first trigger signal input by the device under test 101 to synchronize time with the device under test 101, and lock the input reference clock signal through its internal phase-locked loop 13 to synchronize frequency with the device under test 101.

[0142] Therefore, after the FPGA chip 12 and the device under test 101 are synchronized in time and frequency, the FPGA chip 12 can accurately control the switching time point of the switch matrix circuit according to the time point when the device under test 101 sends data.

[0143] As a specific application of the present application, the sixth connector may be a serial port 51, such as a DB9 female connector, and the seventh connector may be a network port 52, such as an RJ45 connector.

[0144] It is understood that the RJ45 connector, as an important conversion connection point for information link lines, can adapt to complex working environments and ensure safe and stable signal transmission. That is, the switch device 100 in the embodiment of the present application can be configured to include one or more RJ45 connectors and one or more DB9 female connectors.

[0145] Therefore, the control circuit 10 can be connected to one or more RJ45 connectors and one or more DB9 female connectors respectively, and then communicate with the personal computer through the RJ45 connector or the DB9 female connector.

[0146] As an example of a specific application of the present application, the one or more RJ45 connectors and the one or more DB9 female connectors can be respectively installed on the front panel of the switch device 100.

[0147] It is understandable that, in other preferred embodiments, the switch device 100 may include only one of the network port and the serial port, and the serial port is the only interface for interactive instructions between the switch device 100 and the terminal device 109 .

[0148] In this embodiment, the micro control unit 14 exchanges commands with the personal computer through the network port 52 , and transmits the test commands issued by the personal computer to the FPGA chip 12 .

[0149] Therefore, the microcontroller unit 14 in this embodiment can simply interact with a personal computer to achieve multi-channel self-collection. The FPGA chip 12 is also used to automatically generate control signals based on test instructions and pre-set parameters, and forward them to the switch matrix circuit 20 via the switch control line 30 to control the corresponding switch to complete the closing.

[0150] The switch matrix circuit 20 receives the control signal transmitted by the FPGA chip 12, thereby completing the switching from M RF input channels to any one of N RF output channels.

[0151] In this embodiment, the control circuit 10 may further include an MCU-related circuit and an FPGA-related circuit.

[0152] The MCU-related circuits may include a circuit between the micro control unit 14 and the network port 52 , a circuit between the micro control unit 14 and the serial port 51 , and a circuit between the micro control unit 14 and the FPGA chip 12 .

[0153] The FPGA-related circuits may include circuits between the FPGA chip 12 and the switch matrix circuit 20 and circuits between the FPGA chip 12 and the third connector 43 , the fourth connector 44 and the fifth connector 45 .

[0154] In this embodiment, the switch device 100 may further include a power module 50 .

[0155] Specifically, the power module 50 in this embodiment is used to provide a DC voltage to the switch matrix circuit 20, the FPGA chip 12, and the microcontroller unit 14. In one embodiment of the present application, the power module 50 is an AC-DC power supply, so that it can provide a DC voltage to the switch matrix circuit 20 and the control circuit 10.

[0156] Furthermore, the power module 50 can use an AC-DC power supply that converts AC 220V to DC 12V, 5V or 3.3V. Therefore, the power module 50 can be configured to provide the required DC voltage to the switch matrix circuit, the logic device and the main control chip.

[0157] In some other preferred embodiments, the switch matrix circuit 20 may also be connected to the logic device U1 via a set of RapidIO control lines.

[0158] RapidIO is a high-performance, low-pin-count, packet-based interconnect architecture. It is an open interconnect technology standard designed to meet the needs of future high-performance embedded systems. RapidIO is primarily used for internal interconnects within embedded systems, supporting chip-to-chip and board-to-board communication and serving as a backplane connection for embedded devices.

[0159] Therefore, in the embodiment of the present application, the switch matrix circuit 20 and the logic device U1 are interconnected through chips that comply with the RapidIO protocol, and control instructions are exchanged through data packets.

[0160] See also Figure 8 , showing a schematic diagram of a fourth embodiment of a switching device for multi-channel radio frequency product testing of the present application.

[0161] The switch device 100 of this embodiment differs from the switch device 100 of the second embodiment in that:

[0162] In this embodiment, the control circuit 10 is configured to include a processing chip U3. Compared with the second embodiment, the processing chip U3 in this embodiment needs to complete the work of the logic device and the main control chip at the same time.

[0163] That is to say, the processing chip U3 in this embodiment is not only configured to interact with the terminal device 109 for instructions, and generate a control signal to the switch matrix circuit 20 according to the test instruction issued by the terminal device 109, but the processing chip U3 will also be configured to receive the synchronization signal of the device under test 101, that is, the first trigger signal and the reference clock signal, so as to achieve time and frequency synchronization with the device under test 101, and output a second trigger signal to the instrument 108 to complete the relevant test items.

[0164] See also Figure 9 , showing a schematic diagram of a fifth example of a switching device for multi-channel RF product testing of the present application.

[0165] The switch device 100 of this embodiment differs from the switch device 100 of the second embodiment in that:

[0166] In an embodiment of the present application, the switch device 100 may further include an eighth connector 42 . Specifically, in one embodiment, the eighth connector 42 may be a universal serial bus (USB) interface 42 .

[0167] Specifically, the first trigger signal and the reference clock signal can share an eighth connector 42 as an input interface to replace one or more BNC connectors, that is, the control circuit 10 receives the synchronization signal of the device under test 101 through the eighth connector 42. At this time, the control circuit 10 needs to separate the first trigger signal and the reference clock signal from the input signal of the eighth connector 42.

[0168] Therefore, by adopting appropriate interface replacement or merging designs, as well as partial component replacement solutions, the surface interface of the switch device of the present application can be streamlined to a certain extent, the panel can be simplified, and even the volume of the entire switch device can be reduced.

[0169] Since the terminal device must control the instrument to collect or send data in the switch matrix in the prior art, this results in a large number of interactions between the instrument and the terminal device, which increases the test time. Compared with the automated testing solution using a traditional serial matrix switch, the switch device 100 provided in the embodiment of the present application achieves precise control of the switch closing time point through time and frequency synchronization between the logic device and the device under test. The time granularity of the control reaches the millisecond level, and the time switching accuracy and conversion time reach the microsecond level, which greatly reduces the single-channel sampling time and improves the efficiency by 4 to 5 times, further improving the test efficiency.

[0170] In the switch device 100 provided in the embodiment of the present application, the modular design of the switch matrix circuit 20 and the provision of multiple switch control line bundle interfaces within the control circuit 10 enable expansion or replacement of multiple switch matrix circuits to accommodate the needs of various multi-channel RF products and multiple testing scenarios. Furthermore, the RF and digital control components of the switch device 100 are isolated, thereby improving the device's scalability. The use of a highly integrated embedded control system further reduces the device's size and cost.

[0171] In an embodiment of the present application, after the time-frequency synchronization is achieved between the switch device 100 and the device to be tested 101, precise control of the switch device 100 can be achieved, and the control time granularity can reach the millisecond level according to the time-frequency synchronization. Therefore, it can be applied to various application scenarios that require precise control of switches. For example, the RF switch matrix in the switch matrix circuit 20 is replaced with a gas valve switch matrix, and the RF interface of the first connector 40 is replaced with a trachea interface. Similarly, the first trigger signal and the reference clock signal come from the gas source system. When the FPGA chip 12 obtains the first trigger signal and the reference clock and synchronizes with the gas source system in time and frequency, the switch device 100 of the present application can be used for precise control of gas flow. Other extended application scenarios include LED array switch control and fast switching of multiple power supplies.

[0172] The switch device 100 provided in the embodiments of the present application has excellent compatibility and can precisely control the switch closing time point, achieving millisecond-level granularity and microsecond-level switching accuracy and conversion time. Furthermore, it can reduce the number of communications between the personal computer, the switch matrix, and the instrument, significantly shortening the sampling time of a single channel and further improving the production and testing efficiency of multi-channel RF products.

[0173] It is obvious to those skilled in the art that the present application is not limited to the details of the above exemplary embodiments and that the present application can be implemented in other specific forms without departing from the spirit or essential features of the present application. Therefore, as long as they are within the scope of the essence of the present application, appropriate changes and modifications made to the above embodiments should fall within the scope of protection claimed in the present application.

Claims

1. A switch device for multi-channel radio frequency product testing, characterized in that: The switch device includes a control circuit and a switch matrix circuit; The control circuit includes a logic device, the logic device is connected to the device under test, the logic device is used to receive a first trigger signal in a synchronization signal of the device under test to achieve time synchronization with the device under test, and lock a clock signal in the synchronization signal through a phase-locked loop to achieve frequency synchronization between the logic device and the device under test, and the logic device is further used to output a control signal to the switch matrix circuit; The multiple input terminals of the switch matrix circuit are used to connect to the device under test and / or the instrument, the multiple output terminals of the switch matrix circuit are used to connect to the instrument and / or the device under test, and the switch matrix circuit is used to control the switching of any one of the multiple input terminals to the multiple output terminals according to the control signal.

2. The switch device according to claim 1, wherein: The control circuit includes a main control chip, and the main control chip is used to receive a test instruction and transmit the test instruction to the logic device.

3. The switch device according to claim 1 or 2, characterized in that: The logic device is further configured to output a second trigger signal, and the second trigger signal is configured to trigger the instrument to test the radio frequency signal of the device under test.

4. The switch device according to claim 1, wherein: The control signal is multi-channel and is used to control the on / off of one switch matrix circuit or multiple switch matrix circuits.

5. The switch device according to claim 2, wherein: The switch device further includes a switch control line, and the logic device is used to output the control signal according to the test instruction and transmit the control signal to the switch matrix circuit through the switch control line.

6. The switch device according to claim 1, wherein: The switching device also includes multiple first connectors, the device under test includes multiple radio frequency interfaces to be tested, the multiple first connectors are used to connect to the multiple radio frequency interfaces to be tested or the instrument, and the multiple first connectors are also used to connect to multiple input terminals of the switch matrix circuit.

7. The switch device according to claim 6, characterized in that The switch device further includes a plurality of second connectors for connecting to the instrument or the plurality of radio frequency interfaces to be tested. The plurality of second connectors are further used for connecting to a plurality of output terminals of the switch matrix circuit.

8. The switch device according to claim 1, wherein: The switching device also includes a third connector and a fourth connector, the third connector is used to receive the first trigger signal and to transmit the first trigger signal to the logic device, and the fourth connector is used to receive the clock signal and to transmit the clock signal to the logic device.

9. The switch device according to claim 3, wherein: The switch device further includes a fifth connector, which is used to transmit the second trigger signal output by the logic device to the meter.

10. The switch device according to claim 2, wherein: The switch device further includes a sixth connector and a seventh connector, and the control circuit is configured to receive the test instruction through the sixth connector and the seventh connector.

11. The switch device according to claim 1, wherein: The control circuit includes a processing chip, which is connected to the device under test. The processing chip is used to receive a first trigger signal in the synchronization signal to synchronize time with the device under test, and lock the clock signal in the synchronization signal through a phase-locked loop to synchronize frequency with the device under test.

12. The switch device according to claim 11, wherein The processing chip is further configured to output a second trigger signal to the instrument to trigger the instrument to test the radio frequency signal of the device under test. The processing chip is further configured to receive a test instruction, output the control signal according to the test instruction, and transmit the control signal to the switch matrix circuit.

13. The switch device according to any one of claims 1, characterized in that: The switch device further includes an eighth connector configured to receive a first trigger signal and a clock signal in the synchronization signal, and transmit the first trigger signal and the clock signal to the control circuit.

14. The switch device according to claim 1, wherein The control circuit includes a plurality of switch control line bundle interfaces, and the control circuit is connected to a plurality of switch matrix circuits via the plurality of switch control line bundle interfaces.

15. A communication equipment testing system, characterized in that: The apparatus comprises a meter, a terminal device, and a switching device according to any one of claims 1 to 14, wherein the switching device is used to connect the device under test, the meter, and the terminal device, the terminal device is used to send instructions to the switching device for control, and the switching device is used to control the radio frequency interface under test of the device under test to form a path with the meter according to the instructions, so as to test the radio frequency channel corresponding to the radio frequency interface under test.

Citation Information

Patent Citations

  • Phased-array antenna active standing wave automatic testing device and method

    CN107796991A

  • FPGA-based bypass attack power consumption curve acquisition synchronous clock system

    CN110022201A