Data transmission and processing method, distributed unit, radio frequency unit, medium

Abstract

The present disclosure provides a data transmission method, including: reading, according to a plurality of descriptors, data to be transmitted corresponding to the plurality of descriptors from an on-chip storage device of a local device; and transmitting the data to be transmitted according to the plurality of descriptors; wherein the descriptors are used to define a storage manner of the data to be transmitted in the on-chip storage device and a presence manner of the data to be transmitted on a transmission link when transmitting the data to be transmitted. Embodiments of the present disclosure further provide a data processing method, a distributed unit, a radio frequency unit, and a computer-readable medium.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to the field of communication technologies, and in particular, to a data transmission method, a data processing method, a distributed unit, a radio frequency unit, and a computer-readable medium. Background Art

[0002] In an Open Radio Access Network (O-RAN), a base station is divided into an O-RAN Distributed Unit (O-DU) and an O-RAN Radio Unit (O-RU). Among them, the O-RU is controlled by the O-DU and communicates with the O-DU through an optical fiber.

[0003] Figure 1 FIG. is a signaling diagram of the communication process between the O-DU and the O-RU. As Figure 1 (a) shows that in the downlink, the O-DU sends control data to the O-RU, and the O-RU receives the user data sent by the O-DU according to the received control data; as Figure 1 (b) shows that in the uplink, the O-DU sends control data to the O-RU, and the O-RU sends the user data to the O-DU according to the received control data.

[0004] However, in the communication process between the O-DU and the O-RU as Figure 1 shown, the data reading and writing efficiency is relatively low. Summary of the Invention

[0005] Embodiments of the present disclosure provide a data transmission method, a data processing method, a distributed unit, a radio frequency unit, and a computer-readable medium.

[0006] In a first aspect, embodiments of the present disclosure provide a data transmission method, including:

[0007] Reading, from a local on-chip storage device, data to be transmitted corresponding to a plurality of descriptors;

[0008] Transmitting the data to be transmitted according to the plurality of descriptors;

[0009] wherein the descriptor is used to define the storage mode of the data to be transmitted in the on-chip storage device and the existence mode of the data to be transmitted on the transmission link when transmitting the data to be transmitted.

[0010] In some embodiments, the data to be transmitted includes a plurality of data segments, each descriptor corresponds to one of the data segments, the descriptor includes a data address parameter, and the data storage information of the data segment corresponding to the descriptor in the on-chip storage device is configured in the data address parameter;

[0011] The step of reading the data to be transmitted corresponding to the plurality of descriptors from the local on-chip storage device according to the plurality of descriptors includes:

[0012] According to the data storage information configured in the data address parameter in the descriptor, read the data segment corresponding to the descriptor from the on-chip storage device.

[0013] In some embodiments, the descriptor further includes a frame format parameter, a time domain parameter, and a frequency domain parameter,

[0014] The frame format information of the data segment corresponding to the descriptor is configured in the frame format parameter;

[0015] The time domain information of the data segment corresponding to the descriptor is configured in the time domain parameter;

[0016] The frequency domain information of the data segment corresponding to the descriptor is configured in the frequency domain parameter;

[0017] The step of transmitting the data to be transmitted according to the plurality of descriptors includes:

[0018] According to the frame format information configured in the frame format parameter, the time domain information configured in the time domain parameter, and the frequency domain information configured in the frequency domain parameter in each descriptor, frame and transmit the data to be transmitted.

[0019] In some embodiments, before the step of reading the data to be transmitted from the on-chip storage device according to the plurality of descriptors, the data transmission method further includes:

[0020] Read a plurality of the descriptors from the on-chip storage device.

[0021] In some embodiments, in the data transmission method, the step of reading a plurality of the descriptors from the on-chip storage device is periodically executed.

[0022] In some embodiments, the descriptor further includes a descriptor address parameter, and the descriptor storage information is configured in the descriptor address parameter of the current descriptor, and the descriptor storage information is used to characterize the storage information of the next descriptor of the current descriptor in the on-chip storage device. The step of reading a plurality of the descriptors from the on-chip storage device includes:

[0023] Read the next descriptor according to the descriptor storage information configured in the descriptor address parameter of the current descriptor.

[0024] In some embodiments, storage addresses of multiple ones of the descriptors are consecutive in the on-chip storage device, and the step of reading multiple ones of the descriptors from the on-chip storage device includes:

[0025] Read multiple ones of the descriptors from a storage space of the on-chip storage device for storing multiple ones of the descriptors according to a start address of multiple ones of the descriptors in the on-chip storage device.

[0026] In some embodiments, before the step of reading data to be transmitted from the on-chip storage device according to multiple descriptors, the data transmission method further includes:

[0027] Configure multiple ones of the descriptors;

[0028] Store the configured multiple ones of the descriptors in the on-chip storage device.

[0029] In a second aspect, an embodiment of the present disclosure provides a data processing method, including:

[0030] Generate multiple descriptors according to received control data, where the multiple descriptors correspond to data to be transmitted corresponding to the control data;

[0031] Write the data to be transmitted into a local on-chip storage device according to the multiple descriptors;

[0032] Wherein, the descriptor is used to define a storage manner of the data to be transmitted in the on-chip storage device and a presence manner of the data to be transmitted on a transmission link when transmitting the data to be transmitted.

[0033] In some embodiments, the data to be transmitted includes multiple data segments, each of the descriptors corresponds to one of the data segments, the descriptor includes a data address parameter, and the step of generating multiple descriptors according to the received control data includes:

[0034] Configure data storage information for storing the data segment corresponding to the descriptor in the on-chip storage device in the data address parameter according to the control data.

[0035] In some embodiments, the descriptor further includes a frame format parameter, a time domain parameter, and a frequency domain parameter, and the step of generating the descriptor corresponding to the data segment according to the control data further includes:

[0036] Configure frame format information of the data segment corresponding to the descriptor in the frame format parameter according to the control data;

[0037] Configure the time domain information of the data segment corresponding to the descriptor in the time domain parameter according to the control data;

[0038] Configure the frequency domain information of the data segment corresponding to the descriptor in the frequency domain parameter according to the control data.

[0039] In some embodiments, the data to be transmitted includes uplink data to be transmitted. Before the step of writing the data to be transmitted into the on-chip storage device of the local device according to multiple descriptors, the data processing method further includes:

[0040] Segment the uplink data to be transmitted according to the storage address information configured in the descriptor to obtain the data segment corresponding to the descriptor.

[0041] In some embodiments, the data to be transmitted includes downlink data to be transmitted. Before the step of writing the data to be transmitted into the on-chip storage device of the local device according to multiple descriptors, the data processing method further includes:

[0042] Process the downlink data to be transmitted according to the frame format information configured in the frame format parameter, the time domain information configured in the time domain parameter, and the frequency domain information configured in the frequency domain parameter to obtain multiple data segments;

[0043] Determine the correspondence between multiple descriptors and multiple data segments.

[0044] In some embodiments, the step of writing the data to be transmitted into the on-chip storage device of the local device according to multiple descriptors includes:

[0045] Write the data segment into the on-chip storage device according to the data storage information configured in the data address parameter of the descriptor corresponding to the data segment.

[0046] In some embodiments, the descriptor further includes a descriptor address parameter. The step of generating multiple descriptors according to the received control data further includes:

[0047] Determine the descriptor storage information of multiple descriptors in the on-chip storage device;

[0048] Configure the descriptor storage information of the next descriptor in the on-chip storage device in the descriptor address parameter.

[0049] In some embodiments, the data processing method further includes:

[0050] Read the data to be transmitted corresponding to multiple descriptors stored in the on-chip storage device according to multiple descriptors;

[0051] Transmit the data to be transmitted according to the multiple descriptors.

[0052] In some embodiments, the step of reading the data to be transmitted corresponding to the descriptor stored in the on-chip storage device according to the descriptor includes:

[0053] Read the data segment corresponding to the descriptor from the on-chip storage device according to the data storage information configured in the data address parameter in the descriptor.

[0054] In some embodiments, before the step of reading the data to be transmitted corresponding to the multiple descriptors stored in the on-chip storage device according to the multiple descriptors, the data processing method further includes:

[0055] Read multiple descriptors from the on-chip storage device.

[0056] In some embodiments, the step of reading multiple descriptors from the on-chip storage device includes:

[0057] Periodically read multiple descriptors from the on-chip storage device.

[0058] In a third aspect, an embodiment of the present disclosure provides a distributed unit, including:

[0059] One or more processors;

[0060] A storage device, on which one or more programs are stored, and when the one or more programs are executed by the one or more processors, the one or more processors implement the data transmission method described in the first aspect of the embodiments of the present disclosure.

[0061] In a fourth aspect, an embodiment of the present disclosure provides a radio frequency unit, including:

[0062] One or more processors;

[0063] A storage device, on which one or more programs are stored, and when the one or more programs are executed by the one or more processors, the one or more processors implement the data processing method described in the second aspect of the embodiments of the present disclosure.

[0064] In a fifth aspect, an embodiment of the present disclosure provides a computer-readable medium, on which a computer program is stored, and when the program is executed by a processor, it implements at least one of the following methods:

[0065] The data transmission method described in the first aspect of the embodiments of the present disclosure;

[0066] The data processing method described in the second aspect of the embodiments of the present disclosure.

[0067] Embodiments of the present disclosure provide a data transmission method and a distributed unit for executing the data transmission method, a data processing method and a radio frequency unit for executing the data processing method, and a computer-readable medium storing a computer program capable of implementing the data transmission method and / or the data processing method. In the embodiments of the present disclosure, by constructing a descriptor, the hardware logic can directly access the on-chip storage device, read and transmit the data to be transmitted from the on-chip storage device, and during the communication between the O-DU and the O-RU, the frequency of direct interaction between the general-purpose processor or accelerator and the on-chip storage device is reduced, thereby reducing the bus occupancy time and improving the data reading and writing efficiency; the descriptor also defines the storage method of the data to be transmitted in the on-chip storage device, thereby improving the utilization rate and flexibility of the on-chip storage device; the descriptor in the embodiments of the present disclosure can also be constructed by the user, thereby further improving the flexibility and scalability of accessing the on-chip storage device during the communication between the O-DU and the O-RU. Description of the Drawings

[0068] Figure 1 is a schematic diagram of the communication process between the O-DU and the O-RU;

[0069] Figure 2 is a flowchart of a data transmission method provided by an embodiment of the present disclosure;

[0070] Figure 3 is a flowchart of some steps in another data transmission method provided by an embodiment of the present disclosure;

[0071] Figure 4 is a flowchart of some steps in yet another data transmission method provided by an embodiment of the present disclosure;

[0072] Figure 5 is a flowchart of some steps in still another data transmission method provided by an embodiment of the present disclosure;

[0073] Figure 6 is a flowchart of some steps in still another data transmission method provided by an embodiment of the present disclosure;

[0074] Figure 7 is a flowchart of some steps in still another data transmission method provided by an embodiment of the present disclosure;

[0075] Figure 8 is a flowchart of some steps in still another data transmission method provided by an embodiment of the present disclosure;

[0076] Figure 9 is a flowchart of some steps in still another data transmission method provided by an embodiment of the present disclosure;

[0077] Figure 10It is a flowchart of a data processing method provided by an embodiment of the present disclosure;

[0078] Figure 11 It is a flowchart of some steps in another data processing method provided by an embodiment of the present disclosure;

[0079] Figure 12 It is a flowchart of some steps in yet another data processing method provided by an embodiment of the present disclosure;

[0080] Figure 13 It is a flowchart of some steps in still another data processing method provided by an embodiment of the present disclosure;

[0081] Figure 14 It is a flowchart of some steps in still another data processing method provided by an embodiment of the present disclosure;

[0082] Figure 15 It is a flowchart of some steps in still another data processing method provided by an embodiment of the present disclosure;

[0083] Figure 16 It is a flowchart of some steps in still another data processing method provided by an embodiment of the present disclosure;

[0084] Figure 17 It is a flowchart of some steps in still another data processing method provided by an embodiment of the present disclosure;

[0085] Figure 18 It is a flowchart of some steps in still another data processing method provided by an embodiment of the present disclosure;

[0086] Figure 19 It is a block diagram of the composition of a distributed unit provided by an embodiment of the present disclosure;

[0087] Figure 20 It is a block diagram of the composition of a radio frequency unit provided by an embodiment of the present disclosure;

[0088] Figure 21 It is a block diagram of the composition of a computer-readable medium provided by an embodiment of the present disclosure;

[0089] Figure 22 It is a schematic diagram of the correspondence between data segments and descriptors in an embodiment of the present disclosure;

[0090] Figure 23 It is a schematic diagram of a storage method of descriptors in an embodiment of the present disclosure;

[0091] Figure 24 It is a schematic diagram of another storage method of descriptors in an embodiment of the present disclosure;

[0092] Figure 25Schematic diagram of communication between O-DU and O-RU through the downlink in the embodiments of the present disclosure;

[0093] Figure 26 Schematic diagram of communication between O-DU and O-RU through the uplink in the embodiments of the present disclosure. Detailed implementation manners

[0094] To enable those skilled in the art to better understand the technical solutions of the present disclosure, the data transmission method, data processing method, distributed unit, radio frequency unit, and computer-readable medium provided by the present disclosure will be described in detail below with reference to the accompanying drawings.

[0095] Example embodiments will be described more fully hereinafter with reference to the accompanying drawings, but the example embodiments may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0096] Without conflict, the embodiments of the present disclosure and the features in the embodiments may be combined with each other.

[0097] As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0098] The terms used herein are only for describing specific embodiments and are not intended to limit the present disclosure. As used herein, the singular forms "a" and "the" are also intended to include the plural forms unless the context clearly indicates otherwise. It will also be understood that when the terms "comprises" and / or "consists of" are used in this specification, the specified features, wholes, steps, operations, elements, and / or components are present, but one or more other features, wholes, steps, operations, elements, components, and / or groups thereof are not excluded.

[0099] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. It will also be understood that terms such as those defined in a commonly used dictionary should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted as having an idealized or overly formal meaning unless expressly so defined herein.

[0100] Through research by the inventors of the present disclosure, it is found that in Figure 1During the communication process between the O-DU and the O-RU shown, in order to improve the system throughput and save the cache resources of the system, a general-purpose processor, an accelerator, etc. need to pre-cache the control data (control message) to be transmitted or user data such as symbol 0, symbol 1, ……, symbol N, etc. (user message) in the on-chip storage device on the O-DU side or the O-RU side. Since the general-purpose processor or accelerator accesses the on-chip storage device with a relatively high frequency, the bus is occupied for a relatively long time, resulting in a relatively low data reading and writing efficiency during the communication process between the O-DU and the O-RU.

[0101] In view of this, the embodiments of the present disclosure aim to provide a direct memory access (DMA, Direct Memory Access) method for the O-RAN fronthaul interface. It should be noted that DMA refers to an interface technology in which an external device directly exchanges data with the system memory without passing through the CPU.

[0102] In a first aspect, referring to Figure 2 , the embodiments of the present disclosure provide a data transmission method, including:

[0103] In step S110, read the data to be transmitted corresponding to the plurality of descriptors from the local on-chip storage device according to the plurality of descriptors;

[0104] In step S120, transmit the data to be transmitted according to the plurality of descriptors;

[0105] Wherein, the descriptor is used to define the storage mode of the data to be transmitted in the on-chip storage device and the existence mode of the data to be transmitted on the transmission link when transmitting the data to be transmitted.

[0106] In the embodiments of the present disclosure, the descriptor is an intermediate parameter for transmitting data in the on-chip storage device in the O-DU. The descriptor corresponds to the data to be transmitted. Each descriptor defines the size, content, storage mode, etc. of its corresponding data to be transmitted. The hardware logic can determine the storage location of the data to be transmitted corresponding to the descriptor in the on-chip storage device by parsing the descriptor, so as to be able to read the user data to be transmitted corresponding to the descriptor from the on-chip storage device, realizing direct memory access (DMA, Direct Memory Access); the descriptor also defines the existence form of the data to be transmitted on the link between the O-DU and the O-RU, and the hardware logic can transmit the data to be transmitted through the link by parsing the descriptor.

[0107] It should be noted that in the embodiments of the present disclosure, for the link between the O-DU and the O-RU, the direction from the O-DU to the O-RU is the downlink, and the direction from the O-RU to the O-DU is the uplink.

[0108] In the embodiments of the present disclosure, there is no special limitation on how to construct the descriptor. As an alternative implementation, the descriptor can be planned and constructed by the user according to the actual situation of the system.

[0109] In the embodiments of the present disclosure, the data to be transmitted can be control data (control message) for controlling the operation of the O-RU, user data (user message), or time information (sync message) for system synchronization. The user data to be transmitted can be downlink user data, that is, user data sent from the O-DU to the O-RU; or uplink user data, that is, user data sent from the O-RU to the O-DU.

[0110] It should be noted that when the data to be transmitted is user data, transmitting the data to be transmitted in step S120 can be sending user data to the O-RU through the downlink, or receiving user data sent by the O-RU through the uplink.

[0111] In the data transmission method described in the embodiments of the present disclosure, by constructing the descriptor, the hardware logic can directly access the on-chip storage device, read and transmit the data to be transmitted from the on-chip storage device. During the communication between the O-DU and the O-RU, the frequency of direct interaction between the general-purpose processor or accelerator and the on-chip storage device is reduced, thereby reducing the bus occupation time and improving the data reading and writing efficiency; the descriptor also defines the storage method of the data to be transmitted in the on-chip storage device, thereby improving the utilization rate and flexibility of the on-chip storage device; the descriptor in the embodiments of the present disclosure can also be constructed by the user, thereby further improving the flexibility and scalability of accessing the on-chip storage device during the communication between the O-DU and the O-RU.

[0112] In the embodiments of the present disclosure, the descriptor is specifically a set of at least one parameter configured by the software layer. The parameters constituting the descriptor include parameters that define the storage method of the data to be transmitted in the on-chip storage device. The hardware logic determines the storage location information of the data to be transmitted corresponding to the descriptor in the on-chip storage device by parsing the parameters that define the storage method of the data to be transmitted in the on-chip storage device in the descriptor, and then reads the data to be transmitted corresponding to the descriptor from the on-chip storage device through step S110.

[0113] In the embodiments of the present disclosure, there is no special limitation on how multiple descriptors correspond to the data to be transmitted. As an alternative implementation, the data that the O-DU needs to transmit is segmented into multiple data segments, and each descriptor corresponds to one data segment. Among them, each descriptor defines information such as the storage method of the data segment corresponding to it in the on-chip storage device and the existence method in the link. Storing the data to be transmitted in segments in the on-chip storage device can further improve the flexibility of data storage and access in the on-chip storage device. Further, among the parameters defining the storage method of the data to be transmitted in the on-chip storage device in the descriptor, the storage information of the data segment corresponding to the descriptor is configured.

[0114] Correspondingly, in some embodiments, the data to be transmitted includes multiple data segments, each of the descriptors corresponds to one of the data segments, the descriptor includes a data address parameter, and the data storage information of the data segment corresponding to the descriptor is configured in the data address parameter in the on-chip storage device;

[0115] Refer to Figure 3 , step S110 includes:

[0116] In step S111, according to the data storage information configured in the data address parameter in the descriptor, the data segment corresponding to the descriptor is read from the on-chip storage device.

[0117] In the embodiments of the present disclosure, there is no special limitation on the specific content of the data storage information. For example, the data storage information includes the starting address of the storage space in the on-chip storage device for storing the data segment corresponding to the descriptor, the size of the storage space, etc.

[0118] In the embodiments of the present disclosure, there is no special limitation on how to segment the data to be transmitted to obtain multiple data segments. For example, the data that the O-DU needs to transmit within a certain period of time can be used as one data segment; it can also be segmented by symbol, and the data that the O-DU needs to transmit within a certain period of time is divided into multiple data segments, for example, one symbol is one data segment, or multiple symbols are one data segment.

[0119] As an alternative implementation, a general-purpose processor or an accelerator segments the data that the O-DU needs to transmit and stores it in segments in the on-chip storage device.

[0120] In the embodiments of the present disclosure, the parameters constituting the descriptor further include parameters defining the existence manner of the data to be transmitted in the link. The hardware logic transmits the read data to be transmitted through step S120 by parsing the parameters defining the existence manner of the data to be transmitted in the link in the descriptor. Further, in the parameters defining the existence manner of the data to be transmitted in the link in the descriptor, the existence manner information of the data segment corresponding to the descriptor in the link is configured. As an alternative embodiment, the existence manner information of the data segment in the link includes, but is not limited to, frame format information, time domain information, and frequency domain information.

[0121] Accordingly, in some embodiments, the descriptor further includes a frame format parameter, a time domain parameter, and a frequency domain parameter.

[0122] The frame format information of the data segment corresponding to the descriptor is configured in the frame format parameter.

[0123] The time domain information of the data segment corresponding to the descriptor is configured in the time domain parameter.

[0124] The frequency domain information of the data segment corresponding to the descriptor is configured in the frequency domain parameter.

[0125] Referring to Figure 4 , step S120 includes:

[0126] In step S121, the data to be transmitted is framed and transmitted according to the frame format information configured in the frame format parameter, the time domain information configured in the time domain parameter, and the frequency domain information configured in the frequency domain parameter in each descriptor.

[0127] In the embodiments of the present disclosure, the content of the frame format information is not specifically limited. For example, the frame format information includes frame type, frame length, etc. The content of the time domain information in the embodiments of the present disclosure is also not specifically limited. For example, the frequency domain information includes the starting physical resource block (PRB) number. The content of the time domain information in the embodiments of the present disclosure is also not specifically limited. For example, the time domain information includes 10 ms frame number, 1 ms sub-frame number, link delay information, etc.

[0128] In the embodiments of the present disclosure, the descriptor is also stored in the on-chip storage device. The hardware logic can directly access the on-chip storage device, read the descriptor, and then read and transmit the data to be transmitted stored in the on-chip storage device according to the descriptor through steps S110 to S120.

[0129] Accordingly, referring to Figure 5 , in some embodiments, before step S110, the data transmission method further includes:

[0130] In step S130, a plurality of the descriptors are read from the on-chip storage device.

[0131] The embodiments of the present disclosure do not make special limitations on how to execute step S130. As an alternative implementation, the hardware logic periodically reads the descriptors from the on-chip storage device according to the storage location information of the descriptors in the on-chip storage device.

[0132] Correspondingly, referring to Figure 6 , in some embodiments, step S130 includes:

[0133] In step S131, a plurality of the descriptors are periodically read from the on-chip storage device.

[0134] The embodiments of the present disclosure do not make special limitations on the storage manner of the descriptors in the on-chip storage device. As an alternative implementation, the descriptors can be discretely stored in the on-chip storage device. For example, the storage address of the next descriptor is used as one of the parameters of the current descriptor to implement the chained storage of the descriptors. The hardware logic obtains the storage location of the next descriptor by parsing the parameters in the current descriptor, thereby completing the reading and writing of all the descriptors.

[0135] Correspondingly, in some embodiments, the descriptor further includes a descriptor address parameter, and the descriptor storage information is configured in the descriptor address parameter of the current descriptor. The descriptor storage information is used to characterize the storage information of the next descriptor of the current descriptor in the on-chip storage device. Referring to Figure 7 , step S130 includes:

[0136] In step S132, the next descriptor is read according to the descriptor storage information configured in the descriptor address parameter of the current descriptor.

[0137] It should be noted that in the embodiments of the present disclosure, if the current descriptor is the last descriptor, the descriptor address parameter of the current descriptor can be empty, that is, no descriptor storage information is configured; or the descriptor storage information of the first descriptor can be configured in the descriptor address parameter of the current descriptor, so as to implement the circular chained storage. The embodiments of the present disclosure do not make special limitations on this.

[0138] It should also be noted that in the embodiments of the present disclosure, the descriptor storage information includes, but is not limited to, information such as the start address of the storage space for storing the descriptors in the on-chip storage device and the storage space size.

[0139] As another alternative embodiment, the descriptors can be continuously stored in the on-chip storage device. For example, a section of address space is pre-planned as the dedicated storage space for the descriptors, and the addresses of each parameter of the descriptors are fixed and known. The general-purpose processor, accelerator, or hardware logic, etc., read and write the descriptors in a loop within this storage space.

[0140] Correspondingly, referring to Figure 8 , in some embodiments, step S130 includes:

[0141] In step S133, multiple descriptors are read from the storage space of the on-chip storage device for storing the multiple descriptors according to the starting addresses of the multiple descriptors in the on-chip storage device.

[0142] In the embodiments of the present disclosure, the storage space of the on-chip storage device for storing multiple descriptors is a section of continuous address space. As an alternative embodiment, the starting addresses of the multiple descriptors in the on-chip storage device are default. The hardware logic starts from the first descriptor according to this default starting address and reads the multiple descriptors in a loop.

[0143] In the embodiments of the present disclosure, the descriptors can be configured by a general-purpose processor or an accelerator, or can be configured by hardware logic. The embodiments of the present disclosure do not make special limitations on this.

[0144] Correspondingly, referring to Figure 9 , in some embodiments, before step S110, the data transmission method further includes:

[0145] In step S141, multiple descriptors are configured;

[0146] In step S142, the configured multiple descriptors are stored in the on-chip storage device.

[0147] It should be noted that in the embodiments of the present disclosure, configuring the descriptors means configuring the data storage information of the data segment corresponding to the descriptor in the on-chip storage device in the data address parameter of the descriptor, configuring the frame format information of the data segment corresponding to the descriptor in the frame format parameter, configuring the time domain information of the data segment corresponding to the descriptor in the time domain parameter, configuring the frequency domain information of the data segment corresponding to the descriptor in the frequency domain parameter, configuring the descriptor storage information of the next descriptor in the on-chip storage device in the descriptor address parameter, and configuring the corresponding information in other parameters.

[0148] In the embodiments of the present disclosure, there are no special limitations on how to construct the descriptors. As an alternative embodiment, the descriptors can be planned and constructed by the user according to the actual situation of the system, so as to improve the flexibility and scalability of accessing the on-chip storage device during the communication between the O-DU and the O-RU.

[0149] It should be noted that in the embodiments of the present disclosure, a construction descriptor is determined, that is, the number, type, etc. of parameters such as data address parameters, frame format parameters, time domain parameters, frequency domain parameters, and descriptor address parameters in the descriptor are determined.

[0150] In a second aspect, referring to Figure 10 , the embodiments of the present disclosure provide a data processing method, including:

[0151] In step S210, a plurality of descriptors are generated according to the received control data, and the plurality of descriptors correspond to the data to be transmitted corresponding to the control data;

[0152] In step S220, the data to be transmitted is written into an on-chip storage device locally according to the plurality of descriptors;

[0153] Wherein, the descriptor is used to define the storage mode of the data to be transmitted in the on-chip storage device and the existence mode of the data to be transmitted on the transmission link when the data to be transmitted is transmitted.

[0154] In the embodiments of the present disclosure, the descriptor is an intermediate parameter for transmitting data in the on-chip storage device in the O-RU. The descriptor corresponds to the data to be transmitted. Each descriptor defines the size, content, storage mode, etc. of its corresponding data to be transmitted. The hardware logic can determine the storage location of the data to be transmitted corresponding to the descriptor in the on-chip storage device by parsing the descriptor, so as to write the data to be transmitted into the on-chip storage device, and can read the user data to be transmitted corresponding to the descriptor from the on-chip storage device, realizing direct memory access (DMA, Direct Memory Access); the descriptor also defines the existence form of the data to be transmitted on the link between the O-DU and the O-RU. The hardware logic can transmit the data to be transmitted through the link by parsing the descriptor. The O-RU side completes local data caching and framing by parsing the information sent by the O-DU side, realizing remote direct memory access (RDMA, Remote Direct Memory Access).

[0155] It should be noted that in the embodiments of the present disclosure, for the link between the O-DU and the O-RU, the direction from the O-DU to the O-RU is the downlink, and the direction from the O-RU to the O-DU is the uplink.

[0156] Communication controls data, user data, time data, etc. between the O-DU and the O-RU. In the downlink, the O-DU sends control data to the O-RU through the control channel. After waiting for the O-RU to be ready to receive new data, the corresponding user data is sent in sequence. In the uplink, the O-DU sends control data to the O-RU through the control channel, and the O-RU frames and packages the user data according to the received control data and sends it to the O-DU. Among them, the control data defines the frame structure information, frequency domain information, time domain information, etc. of the user data corresponding to the control data. Step S210 is the process in which the hardware logic on the O-RU side maps the frame structure information, frequency domain information, time domain information, etc. defined in the control data to the descriptor after receiving the control data.

[0157] In the embodiments of the present disclosure, the data to be transmitted can be user data sent by the O-DU to the O-RU through the downlink, or user data that needs to be sent by the O-RU to the O-DU through the uplink, or other data. The embodiments of the present disclosure do not make special limitations on this.

[0158] In the data processing method described in the embodiments of the present disclosure, a descriptor is constructed according to the received control data, so that the hardware logic can directly access the on-chip storage device, write the data to be transmitted into the on-chip storage device, and reduce the frequency of direct interaction between the general-purpose processor or accelerator and the on-chip storage device during the communication between the O-DU and the O-RU, thereby reducing the bus occupation time and improving the data reading and writing efficiency; the descriptor also defines the storage method of the data to be transmitted in the on-chip storage device, so as to improve the utilization rate and flexibility of the on-chip storage device; the descriptor in the embodiments of the present disclosure can also be constructed by the user, thereby further improving the flexibility and scalability of accessing the on-chip storage device during the communication between the O-DU and the O-RU.

[0159] In the embodiments of the present disclosure, the descriptor is specifically a set of at least one parameter configured by the software layer. The parameters constituting the descriptor include the parameters defining the storage method of the data to be transmitted in the on-chip storage device. In step S210, the storage information of the data to be transmitted in the on-chip storage device is configured in the parameters defining the storage method of the data to be transmitted in the on-chip storage device in the descriptor according to the control data, and then the data to be transmitted is written into the on-chip storage device through step S220.

[0160] In the embodiments of the present disclosure, there is no special limitation on how multiple descriptors correspond to the data to be transmitted. As an alternative implementation, the data to be transmitted is segmented into multiple data segments, and each descriptor corresponds to one data segment. Among them, each descriptor defines information such as the storage method of the data segment corresponding to it in the on-chip storage device and the existence method in the link. Storing the data to be transmitted in segments in the on-chip storage device can further improve the flexibility of data storage and access in the on-chip storage device. Further, in the process of generating descriptors through step S210, in the parameters defining the storage method of the data to be transmitted in the on-chip storage device in the descriptor, configure the storage information of the data segment corresponding to the descriptor in the on-chip storage device.

[0161] Correspondingly, in some embodiments, the data to be transmitted includes multiple data segments, each of the descriptors corresponds to one of the data segments, and the descriptor includes a data address parameter. Refer to Figure 11 , step S210 includes:

[0162] In step S211, configure the data storage information for storing the data segment corresponding to the descriptor in the on-chip storage device according to the control data in the data address parameter.

[0163] In the embodiments of the present disclosure, there is no special limitation on the specific content of the data storage information. For example, the data storage information includes the starting address of the storage space in the on-chip storage device for storing the data segment corresponding to the descriptor, the storage space size, etc.

[0164] In the embodiments of the present disclosure, when the data to be transmitted is user data, the data to be transmitted can be user data sent from the O-DU to the O-RU through the downlink, or user data that needs to be sent from the O-RU to the O-DU through the uplink.

[0165] In the embodiments of the present disclosure, the parameters constituting the descriptor further include parameters defining the existence method of the data to be transmitted in the link. The hardware logic determines the existence method of the data to be transmitted in the downlink by parsing the parameters defining the existence method of the data to be transmitted in the link in the descriptor, so as to establish the mapping relationship between the user data sent from the O-DU to the O-RU and the descriptor; or determine the existence method of the data to be transmitted in the uplink, so as to establish the mapping relationship between the user data that needs to be sent from the O-RU to the O-DU through the uplink and the descriptor. Further, in the process of generating descriptors through step S210, in the parameters defining the existence method of the data to be transmitted in the link in the descriptor, configure the existence method information of the data segment corresponding to the descriptor in the link. As an alternative implementation, the existence method information of the data segment in the link includes, but is not limited to, frame format information, time domain information, and frequency domain information.

[0166] Accordingly, in some embodiments, the descriptor further includes frame format parameters, time domain parameters, and frequency domain parameters. Refer to Figure 11 , step S210 further includes:

[0167] In step S212, configure the frame format information of the data segment corresponding to the descriptor in the frame format parameters according to the control data;

[0168] In step S213, configure the time domain information of the data segment corresponding to the descriptor in the time domain parameters according to the control data;

[0169] In step S214, configure the frequency domain information of the data segment corresponding to the descriptor in the frequency domain parameters according to the control data.

[0170] In the embodiments of the present disclosure, when the data to be transmitted is uplink data to be transmitted, in the descriptor generated in step S210, the storage information of the uplink data to be transmitted in the on-chip storage device is configured. According to the storage information, it is possible to determine the size of each data segment when the uplink data to be transmitted is segmented and stored in the on-chip storage device. As an alternative implementation, the uplink data to be transmitted is segmented according to the descriptor to obtain the data segment corresponding to the descriptor. Then, each data segment is written into the on-chip storage device through step S220.

[0171] Accordingly, in some embodiments, the data to be transmitted includes uplink data to be transmitted. Refer to Figure 12 , before step S220, the data processing method further includes:

[0172] In step S230, segment the uplink data to be transmitted according to the storage address information configured in the descriptor to obtain the data segment corresponding to the descriptor.

[0173] In the embodiments of the present disclosure, when the data to be transmitted is downlink data to be transmitted, in the descriptor generated in step S210, the information indicating the existence mode of the downlink data to be transmitted in the downlink is configured. The data segment corresponding to the descriptor can be determined through the information indicating the existence mode of the downlink data to be transmitted in the downlink configured in the descriptor.

[0174] Accordingly, in some embodiments, the data to be transmitted includes downlink data to be transmitted. Refer to Figure 13 , before step S220, the data processing method further includes:

[0175] In step S240, according to the frame format information configured in the frame format parameters, the time domain information configured in the time domain parameters, and the frequency domain information configured in the frequency domain parameters, the downlink data to be transmitted is processed to obtain multiple data segments corresponding to the multiple descriptors.

[0176] In the embodiments of the present disclosure, after receiving the control data sent by the O-DU, the O-RU allocates storage space for each data segment, and in step S210, configures the address information of the storage space allocated for each data segment into the descriptor corresponding to the data segment. When writing the data to be transmitted into the on-chip storage device through step S220, according to the address information configured in the descriptor corresponding to the data segment, the data segment is written into the pre-allocated storage space.

[0177] Correspondingly, referring to Figure 14 , in some embodiments, step S220 includes:

[0178] In step S221, according to the data storage information configured in the data address parameter in the descriptor corresponding to the data segment, the data segment is written into the on-chip storage device.

[0179] In the embodiments of the present disclosure, the descriptors generated through step S210 are also stored in the on-chip storage device. The present disclosure does not make special limitations on the storage method of descriptors in the on-chip storage device. As an optional implementation manner, the descriptors can be discretely stored in the on-chip storage device. For example, the storage address of the next descriptor is used as one of the parameters of the current descriptor to implement the chained storage of descriptors. The hardware logic obtains the storage location of the next descriptor by parsing the parameters in the current descriptor, thereby completing the reading and writing of all descriptors.

[0180] Correspondingly, in some embodiments, the descriptor further includes a descriptor address parameter. Referring to Figure 15 , step S210 further includes:

[0181] In step S216, determine the descriptor storage information of the multiple descriptors in the on-chip storage device;

[0182] In step S217, configure the descriptor storage information of the next descriptor in the on-chip storage device in the descriptor address parameter.

[0183] In the embodiments of the present disclosure, after writing the data to be transmitted into the on-chip storage device, the O-RU further sends the user data sent by the O-DU to the O-RU through the downlink to the subsequent module; or sends the user data that needs to be sent by the O-RU to the O-DU through the uplink to the O-DU.

[0184] Accordingly, referring to Figure 16 , in some embodiments, the data processing method further includes:

[0185] In step S250, according to a plurality of the descriptors, read the data to be transmitted corresponding to the plurality of descriptors stored in the on-chip storage device;

[0186] In step S260, transmit the data to be transmitted according to a plurality of the descriptors.

[0187] In the embodiments of the present disclosure, when the data to be transmitted is uplink data to be transmitted, step S260 includes: according to the frame format information configured in the frame format parameter in each of the descriptors, the time domain information configured in the time domain parameter, and the frequency domain information configured in the frequency domain parameter, frame the data to be transmitted and send it to the O-DU.

[0188] When the data to be transmitted is downlink data to be transmitted, step S260 includes: sending the data to be transmitted to a subsequent module.

[0189] Accordingly, referring to Figure 17 , in some embodiments, step S250 includes:

[0190] In step S251, according to the data storage information configured in the data address parameter in the descriptor, read the data segment corresponding to the descriptor from the on-chip storage device.

[0191] In the embodiments of the present disclosure, the descriptors are also stored in the on-chip storage device. The hardware logic can directly access the on-chip storage device, read the descriptors, and then read and transmit the data to be transmitted stored in the on-chip storage device through steps S250 to S260 according to the descriptors.

[0192] Accordingly, referring to Figure 16 , in some embodiments, before step S250, the data processing method further includes:

[0193] In step S270, read a plurality of the descriptors from the on-chip storage device.

[0194] The embodiments of the present disclosure do not make special limitations on how to execute step S270. As an optional implementation manner, the hardware logic reads the descriptors from the on-chip storage device at regular intervals according to the storage location information of the descriptors in the on-chip storage device.

[0195] Accordingly, referring to Figure 18 , in some embodiments, step S270 includes:

[0196] In step S271, a plurality of the descriptors are periodically read from the on-chip storage device.

[0197] In a third aspect, referring to Figure 19 , an embodiment of the present disclosure provides a distributed unit, including:

[0198] One or more processors 101;

[0199] A memory 102, on which one or more programs are stored. When the one or more programs are executed by the one or more processors, the one or more processors implement the data transmission method described in the first aspect of the embodiments of the present disclosure;

[0200] One or more I / O interfaces 103, connected between the processor and the memory, configured to implement information interaction between the processor and the memory.

[0201] Wherein, the processor 101 is a device with data processing capabilities, including but not limited to a central processing unit (CPU), etc.; the memory 102 is a device with data storage capabilities, including but not limited to a random access memory (RAM, more specifically such as SDRAM, DDR, etc.), a read-only memory (ROM), an electrically erasable programmable read-only memory (EEPROM), a flash memory (FLASH); the I / O interface (read / write interface) 103 is connected between the processor 101 and the memory 102 and can implement information interaction between the processor 101 and the memory 102, including but not limited to a data bus (Bus), etc.

[0202] In some embodiments, the processor 101, the memory 102, and the I / O interface 103 are interconnected through a bus 104 and further connected to other components of the computing device.

[0203] In a fourth aspect, referring to Figure 20 , an embodiment of the present disclosure provides a radio frequency unit, including:

[0204] One or more processors 201;

[0205] A memory 202, on which one or more programs are stored. When the one or more programs are executed by the one or more processors, the one or more processors implement the data processing method described in the second aspect of the embodiments of the present disclosure;

[0206] One or more I / O interfaces 203, connected between the processor and the memory, configured to implement information interaction between the processor and the memory.

[0207] Among them, the processor 201 is a device with data processing capabilities, including but not limited to a central processing unit (CPU), etc.; the memory 202 is a device with data storage capabilities, including but not limited to random access memory (RAM, more specifically such as SDRAM, DDR, etc.), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory (FLASH); the I / O interface (read / write interface) 203 is connected between the processor 201 and the memory 202, and can realize the information interaction between the processor 201 and the memory 202, including but not limited to a data bus (Bus), etc.

[0208] In some embodiments, the processor 201, the memory 202, and the I / O interface 203 are interconnected through a bus 204, and then connected to other components of the computing device.

[0209] In a fifth aspect, referring to Figure 21 , an embodiment of the present disclosure provides a computer-readable medium, on which a computer program is stored, and when the program is executed by a processor, it implements at least one of the following methods:

[0210] The data transmission method described in the first aspect of the embodiments of the present disclosure;

[0211] The data processing method described in the second aspect of the embodiments of the present disclosure.

[0212] To enable those skilled in the art to more clearly understand the technical solutions provided by the embodiments of the present disclosure, the technical solutions provided by the embodiments of the present disclosure will be described in detail through specific embodiments below:

[0213] Embodiment 1

[0214] As Figure 22 shown, in the first embodiment, the data to be transmitted includes data segments Frag 0, Frag 1, Frag 2,...; each data segment corresponds to a descriptor. For example, data segment Frag 0 corresponds to descriptor descriptor0, data segment Frag 2 corresponds to descriptor descriptor 2,... The data to be transmitted can be control data (control message), user data (user message), or time information (syncmessage); the descriptor includes frame structure parameters, frequency domain parameters, time domain parameters, data address parameters, and descriptor address parameters.

[0215] In the first embodiment, the descriptors can be discretely stored in an on-chip storage device. As Figure 23As shown, the storage address of the next descriptor is used as one of the parameters of the current descriptor to implement the chained storage of descriptors. The hardware logic obtains the storage location of the next descriptor by parsing the parameters within the current descriptor, thereby completing the reading and writing of all descriptors.

[0216] Descriptors can also be continuously stored in the on-chip storage device. As Figure 24 shown, a section of address space is pre-planned as the dedicated storage space for descriptors. The address of each parameter of the descriptor is fixed and known. General-purpose processors, accelerators, or hardware logic, etc., read and write descriptors in a loop within this storage space.

[0217] In Figure 23 and Figure 24 , data_start_addr represents the starting address where the current data segment is stored, length represents the length of the stored data, frame_id represents the 10ms frame number of the stored data segment, start_prb represents the starting number of PRBs, num_prb represents the number of PRBs used, and next_descriptor_start_addr represents the starting address of the next descriptor.

[0218] Embodiment 2

[0219] Figure 25 It is a schematic diagram of the communication between O-DU and O-RU through the downlink.

[0220] The process of communication between O-DU and O-RU through the downlink includes:

[0221] Downlink O-DU side:

[0222] Configuration. The general-purpose processor or accelerator segments the data within a certain period of time and configures the starting position of the descriptor in the on-chip storage device and the descriptor parameters corresponding to each data segment, and then writes the descriptor and the data segment into the on-chip storage device.

[0223] Segmentation can be done in units of symbols, with each symbol as a segment, and a corresponding storage space is allocated for each data segment. Each data segment corresponds to a descriptor, and the relevant information of the data segment will be translated into the parameters of the descriptor and written into the on-chip storage device.

[0224] The storage method of the data segment is defined by the parameters within the descriptor, such as the starting address of data storage, the size of the cache space, etc. The storage method of the descriptor can be defined by the parameters inside the descriptor or pre-planned.

[0225] The segmented data and descriptors are stored in the on-chip storage device. The parameters within the descriptors define the addresses of the descriptors themselves and the data segments within the on-chip storage device, enabling the general-purpose processor or hardware logic to correctly read the data from the on-chip storage device.

[0226] Transmit data. The hardware logic periodically reads the descriptors in the on-chip storage device according to the starting position of the descriptors configured by the general-purpose processor and the position of the next descriptor defined by the parameters within the descriptors. Then, according to the read descriptors, it reads the corresponding data segments at the specified addresses and sends them to the O-RU.

[0227] Downlink O-RU side:

[0228] Mapping and segmentation. The hardware logic on the O-RU side generates descriptors by mapping according to the received control data and initializes the starting position of the descriptors. The hardware logic processes the received data according to the descriptors and writes the descriptors and the corresponding data segments into the on-chip storage device;

[0229] The control data sent from the O-DU defines the format and size of the user data, such as the starting position of the resource block, the number of resource blocks, and whether each resource block is used, etc. The hardware logic on the O-RU side needs to extract these parameters from the control data and map them into the parameters within the descriptors: data segment label, starting position of the data segment storage space, data segment storage space size, etc.

[0230] The descriptors and data are stored in segments in the on-chip storage device.

[0231] Embodiment III

[0232] Figure 26 It is a schematic diagram of the communication between the O-DU and the O-RU through the uplink.

[0233] The process of communication between the O-DU and the O-RU through the uplink includes:

[0234] Uplink O-DU side:

[0235] The uplink O-DU only sends control information, and the O-RU sends user data to the O-DU according to the received control information.

[0236] Configuration. The general-purpose processor or accelerator segments the data within a certain period of time and configures the starting position of the descriptors in the on-chip storage device and the descriptor parameters corresponding to each data segment, and then writes the descriptors and the data segments into the on-chip storage device.

[0237] The segmented data and descriptors are stored in the on-chip storage device. The parameters within the descriptor define the address of the descriptor itself and the data segment within the on-chip storage device, enabling the general-purpose processor or hardware logic to correctly read the data from the on-chip storage device.

[0238] Transmit data. The hardware logic periodically reads the descriptors in the on-chip storage device based on the starting position of the descriptor configured by the general-purpose processor and the position of the next descriptor defined by the parameters within the descriptor. Then, according to the read descriptors, it reads the corresponding data segments at the specified addresses and transmits them to the O-RU.

[0239] Upstream O-RU side:

[0240] Mapping and segmentation. The hardware logic on the O-RU side generates descriptors through mapping based on the received control data and initializes the starting position of the descriptors. The hardware logic processes the received data according to the descriptors and writes the descriptors and the corresponding data segments into the on-chip storage device;

[0241] The control data sent from the O-DU defines the format and size of the user data, such as the starting position of the resource block, the number of resource blocks, and whether each resource block is used, etc. The hardware logic on the O-RU side needs to extract these parameters from the control data and map them into the parameters within the descriptor: data segment label, starting position of the data segment storage space, data segment storage space size, etc.

[0242] The descriptors and data are stored in the on-chip storage device in a segmented manner.

[0243] Framing and transmitting data. The hardware logic periodically reads the descriptors in the on-chip storage device based on the starting position of the descriptor and the position of the next descriptor defined by the parameters within the descriptor. Then, according to the read descriptors, it reads the data and frames and transmits it to the O-DU or the lower-level module.

[0244] It will be appreciated by those skilled in the art that all or some of the steps, systems, and functional modules / units in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. In hardware implementations, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or temporary medium). As known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, it is well known to those skilled in the art that communication media typically contain computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0245] Example embodiments have been disclosed herein, and although specific terms are employed, they are used and should be interpreted only in a general illustrative sense and not for limiting purposes. In some instances, it will be apparent to those skilled in the art that, unless otherwise expressly noted, features, characteristics, and / or elements described in conjunction with a particular embodiment may be used alone or in combination with features, characteristics, and / or elements described in conjunction with other embodiments. Therefore, those skilled in the art will appreciate that various changes in form and detail may be made without departing from the scope of the present disclosure as set forth in the appended claims.

Claims

1. A data transmission method, applied to the O-RAN fronthaul interface, includes: Read data to be transmitted corresponding to the multiple descriptors from a local on-chip storage device according to the multiple descriptors; Transmit the data to be transmitted according to the multiple descriptors; Wherein, the descriptor is an intermediate parameter for transmitting data in the on-chip storage device in O-DU or O-RU, and the descriptor is used to define the storage mode of the data to be transmitted in the on-chip storage device and the existence mode of the data to be transmitted on the transmission link when transmitting the data to be transmitted.

2. The data transmission method according to claim 1, wherein, The data to be transmitted includes multiple data segments, each descriptor corresponds to one data segment, and the descriptor includes a data address parameter, and the data storage information of the data segment corresponding to the descriptor is configured in the data address parameter; The step of reading data to be transmitted corresponding to the multiple descriptors from a local on-chip storage device according to the multiple descriptors includes: Read the data segment corresponding to the descriptor from the on-chip storage device according to the data storage information configured in the data address parameter in the descriptor.

3. The data transmission method according to claim 2, wherein, The descriptor further includes a frame format parameter, a time domain parameter, and a frequency domain parameter, The frame format information of the data segment corresponding to the descriptor is configured in the frame format parameter; The time domain information of the data segment corresponding to the descriptor is configured in the time domain parameter; The frequency domain information of the data segment corresponding to the descriptor is configured in the frequency domain parameter; The step of transmitting the data to be transmitted according to the multiple descriptors includes: Frame and transmit the data to be transmitted according to the frame format information configured in the frame format parameter, the time domain information configured in the time domain parameter, and the frequency domain information configured in the frequency domain parameter in each descriptor.

4. The data transmission method according to any one of claims 1 to 3, wherein, Before the step of reading data to be transmitted from the on-chip storage device according to the multiple descriptors, the data transmission method further includes: Read multiple descriptors from the on-chip storage device.

5. The data transmission method according to claim 4, wherein, In the data transmission method, the step of reading multiple descriptors from the on-chip storage device is periodically executed.

6. The data transmission method according to claim 4, wherein, The descriptor further includes a descriptor address parameter, and the descriptor storage information is configured in the descriptor address parameter of the current descriptor. The descriptor storage information is used to represent the storage information of the next descriptor of the current descriptor in the on-chip storage device. The step of reading multiple descriptors from the on-chip storage device includes: Read the next descriptor according to the descriptor storage information configured in the descriptor address parameter of the current descriptor.

7. The data transmission method according to claim 4, wherein, The storage addresses of the multiple descriptors in the on-chip storage device are consecutive. The step of reading multiple descriptors from the on-chip storage device includes: Read multiple descriptors from the storage space of the on-chip storage device storing the multiple descriptors according to the first address of the multiple descriptors in the on-chip storage device.

8. The data transmission method according to any one of claims 1 to 3, wherein, Before the step of reading data to be transmitted from the on-chip storage device according to the multiple descriptors, the data transmission method further includes: Configure multiple descriptors; Store the configured multiple descriptors in the on-chip storage device.

9. A data processing method, applied to the O-RAN fronthaul interface, includes: Generate a plurality of descriptors according to the received control data, where the plurality of descriptors correspond to the data to be transmitted corresponding to the control data, and the descriptors are intermediate parameters for transmitting data in the on-chip storage device in O-DU or O-RU; Write the data to be transmitted into the local on-chip storage device according to the plurality of descriptors; Wherein, the descriptors are used to define the storage mode of the data to be transmitted in the on-chip storage device and the existence mode of the data to be transmitted on the transmission link when transmitting the data to be transmitted.

10. The data processing method according to claim 9, wherein, The data to be transmitted includes a plurality of data segments, and each descriptor corresponds to one data segment. The descriptor includes a data address parameter. The step of generating a plurality of descriptors according to the received control data includes: Configure data storage information for storing the data segment corresponding to the descriptor in the on-chip storage device in the data address parameter according to the control data.

11. The data processing method according to claim 10, wherein,The descriptor further includes a frame format parameter, a time domain parameter, and a frequency domain parameter. The step of generating a descriptor corresponding to the data segment according to the control data further includes: Configure frame format information of the data segment corresponding to the descriptor in the frame format parameter according to the control data; Configure time domain information of the data segment corresponding to the descriptor in the time domain parameter according to the control data; Configure frequency domain information of the data segment corresponding to the descriptor in the frequency domain parameter according to the control data.

12. The data processing method according to claim 11, wherein, The data to be transmitted includes uplink data to be transmitted. Before the step of writing the data to be transmitted into the local on-chip storage device according to the plurality of descriptors, the data processing method further includes: Segment the uplink data to be transmitted according to the storage address information configured in the descriptor to obtain the data segment corresponding to the descriptor.

13. The data processing method according to claim 11, wherein, The data to be transmitted includes downlink data to be transmitted. Before the step of writing the data to be transmitted into the local on-chip storage device according to the plurality of descriptors, the data processing method further includes: Process the downlink data to be transmitted according to the frame format information configured in the frame format parameter, the time domain information configured in the time domain parameter, and the frequency domain information configured in the frequency domain parameter to obtain a plurality of data segments corresponding to the plurality of descriptors.

14. The data processing method according to any one of claims 10 to 13, wherein, The step of writing the data to be transmitted into the local on-chip storage device according to the plurality of descriptors includes: Write the data segment into the on-chip storage device according to the data storage information configured in the data address parameter of the descriptor corresponding to the data segment.

15. The data processing method according to any one of claims 10 to 13, wherein, The descriptor further includes a descriptor address parameter. The step of generating a plurality of descriptors according to the received control data further includes: Determine descriptor storage information of the plurality of descriptors in the on-chip storage device; Configure descriptor storage information of the next descriptor in the on-chip storage device in the descriptor address parameter.

16. The data processing method according to any one of claims 10 to 13, wherein, The data processing method further includes: Read the data to be transmitted corresponding to the plurality of descriptors stored in the on-chip storage device according to the plurality of descriptors; Transmit the data to be transmitted according to the plurality of descriptors.

17. The data processing method according to claim 16, wherein, The step of reading the data to be transmitted corresponding to the descriptor stored in the on-chip storage device according to the descriptor includes: Reading the data segment corresponding to the descriptor from the on-chip storage device according to the data storage information configured in the data address parameter in the descriptor.

18. The data processing method according to claim 16, wherein, Before the step of reading the data to be transmitted corresponding to multiple descriptors stored in the on-chip storage device according to the multiple descriptors, the data processing method further includes: Reading multiple descriptors from the on-chip storage device.

19. The data processing method according to claim 18, wherein, The step of reading multiple descriptors from the on-chip storage device includes: Periodically reading multiple descriptors from the on-chip storage device.

20. A distributed unit, comprising: One or more processors; A storage device storing one or more programs, which when executed by the one or more processors, cause the one or more processors to implement the data transmission method according to any one of claims 1 to 8.

21. A radio frequency unit, comprising: One or more processors; A storage device storing one or more programs, which when executed by the one or more processors, cause the one or more processors to implement the data processing method according to any one of claims 9 to 19.

22. A computer-readable medium having a computer program stored thereon, the program, when executed by a processor, implements at least one of the following methods: The data transmission method according to any one of claims 1 to 8; The data processing method according to any one of claims 9 to 19.

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