A storage unit anti-aging method, device and related equipment

Abstract

An embodiment of the present invention provides an anti-aging method, device and related equipment for a storage unit, wherein the anti-aging method for a storage unit includes: determining a target storage unit; generating an exchange instruction for the target storage unit; according to the exchange instruction, controlling the target storage unit to exchange storage data with other storage units, so as to achieve flipping of storage data of the target storage unit by exchanging storage data between different storage units, thereby achieving anti-aging of the target storage unit.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of integrated circuit technology, and specifically to an anti-aging method, device and related equipment for a storage unit. Background Art

[0002] The BTI (Bias Temperature Instability) effect is one of the aging effects that has seriously affected the reliability of memory cells in recent years. The BTI effect refers to the effect that when a bias voltage is applied to the gate of a transistor, the electrical characteristics of the transistor degrade, such as threshold voltage drift, saturation current and transconductance reduction, and are positively correlated with temperature. Based on this, how to reduce the aging effect of the BTI effect on memory cells has become one of the problems that technicians in this field need to solve urgently. Summary of the invention

[0003] In view of this, an embodiment of the present invention provides an anti-aging method, an apparatus and related equipment for a memory cell to reduce the influence of the BTI effect on the aging of the memory cell.

[0004] To solve the above problems, the embodiments of the present invention provide the following technical solutions:

[0005] A first aspect of the present invention provides an anti-aging method for a storage unit, comprising:

[0006] Determine the target storage unit;

[0007] generating a swap instruction for the target storage unit;

[0008] According to the exchange instruction, the target storage unit is controlled to exchange storage data with other storage units to achieve anti-aging of the target storage unit.

[0009] A second aspect of the present invention provides an anti-aging device for a storage unit, comprising:

[0010] An aging determination module, used for determining a target storage unit;

[0011] An instruction generation module, used for generating a swap instruction for the target storage unit;

[0012] The control module is used to control the target storage unit to exchange storage data with other storage units according to the exchange instruction, so as to achieve anti-aging of the target storage unit.

[0013] A third aspect of the present invention provides a computer device, comprising:

[0014] a memory storing at least one set of instructions;

[0015] The processor executes the at least one set of instructions to perform the anti-aging method of the storage unit as described in any one of the above items.

[0016] A fourth aspect of the present invention provides a readable storage medium, wherein the readable storage medium stores at least one set of instructions, and the at least one set of instructions is used to enable a processor to execute the anti-aging method of a storage unit as described in any one of the above items.

[0017] The anti-aging method, device and related equipment of the storage unit provided by the embodiment of the present invention, after determining the target storage unit, generate an exchange instruction for the target storage unit, and control the target storage unit to exchange storage data with other storage units according to the exchange instruction, so as to realize the flipping of the storage data of the target storage unit by exchanging the storage data between different storage units, and realize the anti-aging of the target storage unit. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0019] Figure 1 A schematic diagram of a storage array structure of a memory is shown exemplarily;

[0020] Figure 2 A schematic diagram of the structure of a storage unit is shown exemplarily;

[0021] Figure 3 A flow chart of an anti-aging method for a storage unit provided by one embodiment of the present invention;

[0022] Figure 4 A flow chart of exchanging storage data with a target storage array provided by an embodiment of the present invention;

[0023] Figure 5 A schematic diagram of the structure of a target storage array and a redundant storage array provided by an embodiment of the present invention;

[0024] Figure 6 A schematic diagram of the structure of an anti-aging device for a storage unit provided by one embodiment of the present invention;

[0025] Figure 7 A schematic diagram of the connection relationship between a memory in a target storage array and an anti-aging device provided in one embodiment of the present invention. DETAILED DESCRIPTION

[0026] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are protected by the present invention.

[0027] Figure 1 The schematic diagram of the memory array structure of a memory is shown as an example, and the memory array includes a plurality of memory cells arranged in an array. Each row of memory cells is connected to a word line WL, and each column of memory cells is connected to two complementary bit lines BLT and BLC. By selecting the corresponding word line and the corresponding bit line, a memory cell connected to the word line and the bit line can be selected, and the memory cell can be read and written. For example, by selecting the word line WL1 and the bit lines BLT1 and BLC1, the memory cell in the first row and the first column can be selected, and the memory cell can be read and written.

[0028] Figure 2 The schematic diagram of the structure of a memory cell is shown as an example, and the memory cell includes NMOS transistors N1 and N2, and PMOS transistors P1 and P2. Among them, the NMOS transistor N1 and the PMOS transistor P1 constitute an inverter, and the NMOS transistor N2 and the PMOS transistor P2 constitute another inverter. The two inverters are arranged back to back to constitute a latch structure for latching data. In addition, the on and off of the NMOS transistors N3 and N4 can be controlled by the word line WL. When the NMOS transistors N3 and N4 are turned on, the data stored in the latch structure can be read and written through the complementary bit lines BLT and BLC.

[0029] However, for a memory cell storing the same data for a long time, since the bias state of the transistor in the memory cell remains unchanged, one of the PMOS transistors P1 and P2 will always suffer from the NBTI (Negative Bias Temperature Instability) effect for a long time, and one of the NMOS transistors N1 and N2 will always suffer from the PBTI (positive bias temperature instability) effect for a long time. Among them, the NBTI effect and the PBTI effect are both BTI effects.

[0030] For example, if the data stored in the memory cell for a long time is 1, then Q'=0, Q=1, the gate of transistor N1 is connected to VDD, the source and drain of transistor N1 are grounded, transistor N1 suffers from the PBTI effect for a long time, the gate of transistor P2 is grounded, the source and drain of transistor P2 are connected to VDD, and transistor P2 suffers from the NBTI effect for a long time.

[0031] Since the BTI effect can cause aging phenomena such as threshold voltage drift, saturation current and transconductance reduction in the transistors in the storage unit, and the anti-interference ability of the aged storage unit is poor, the storage data of the storage unit is easily disturbed by the read and write operations of other storage units and flipped, resulting in the loss of storage data. It can be seen that the BTI effect will seriously affect the reliability of the storage unit and even the entire storage array.

[0032] The inventors have found that applying an appropriate reverse voltage to the gate of the transistor can repair transistor aging caused by the BTI effect. The reverse voltage can be applied to the gate of the transistor in the memory cell by flipping the data stored in the memory cell, such as flipping the stored data, i.e., the data of the Q node, from 1 to 0, or from 0 to 1. That is, compared with the memory cell whose stored data is frequently flipped, the memory cell whose stored data is not flipped for a long time is more seriously affected by the BTI effect.

[0033] Based on this, an embodiment of the present invention provides an anti-aging solution for a storage unit, which realizes the flipping of the storage data in the storage unit by exchanging the storage data of different storage units, and realizes the flipping of the gate voltage of the transistor in the storage unit, so as to reduce the aging influence of the BTI effect on the storage unit and realize the anti-aging of the storage unit.

[0034] As an optional implementation of the disclosure of the embodiments of the present invention, the embodiments of the present invention provide an anti-aging method for a storage unit, which is applied to a storage device to reduce the aging effect of the BTI effect on the storage unit in the storage device. The storage device includes but is not limited to a static random access memory (SRAM) and the like.

[0035] like Figure 3 As shown, Figure 3 A flowchart of an anti-aging method for a storage unit provided by an embodiment of the present invention, the anti-aging method comprising:

[0036] S301: Determine a target storage unit;

[0037] In the embodiment of the present invention, the target memory cell may be an aged memory cell in the memory device, that is, a memory cell that has aged due to the long-term non-flipping of the stored data causing the transistor to suffer from the BTI effect for a long time, or a memory cell that has not yet aged. However, whether it is an aged memory cell or a memory cell that has not yet aged, the anti-aging solution of the present invention can be used to increase the number of flipping times of the stored data of the memory cell and avoid aging of the memory cell.

[0038] In some optional examples of the present invention, the target storage unit in the memory in the chip can be determined according to the read-write strategy of the chip design. For example, if the read-write strategy of the chip design is to frequently perform read-write operations on the storage unit at the low address, then the storage unit at the high address is likely to store the same data for a long time, that is, the probability of aging of the storage unit at the high address is relatively large. At this time, the storage unit at the high address can be determined as the target storage unit. If the read-write strategy of the chip design is to frequently perform read-write operations on the storage unit at the high address, then the storage unit at the low address is likely to store the same data for a long time, that is, the probability of aging of the storage unit at the low address is relatively large. At this time, the storage unit at the low address can be determined as the target storage unit.

[0039] Of course, the present invention is not limited to this. In other optional examples, at least part of the storage cells in the storage device can be determined as target storage cells after a period of time, and an anti-aging solution can be implemented for the storage cells regardless of whether the storage cells are aged.

[0040] S302: Generate a swap instruction for a target storage unit;

[0041] After determining the target storage unit, such as determining the storage unit whose storage data does not flip for a long time, the data exchange strategy of the target storage unit can be determined, and then the exchange instruction can be generated according to the exchange strategy. For example, the exchange strategy for causing the storage unit with the high address to exchange storage data with the storage unit with the low address can be determined, and the exchange strategy for causing the target storage unit to exchange storage data with the storage unit in a different row can be determined, and the corresponding exchange instruction for different rows can be generated; the exchange strategy for causing the target storage unit to exchange storage data with the storage unit in a different column can also be determined, and the corresponding exchange instruction for different columns can be generated; the exchange strategy for causing the target storage unit to exchange storage data with the storage unit in a different row and the storage unit in a different column can also be determined, and the corresponding exchange instruction for different rows and different columns can be generated.

[0042] S303: According to the exchange instruction, the target storage unit is controlled to exchange storage data with other storage units to achieve anti-aging of the target storage unit.

[0043] After generating the exchange instruction for the target storage unit, the target storage unit is controlled to exchange storage data with other storage units according to the exchange instruction. For example, according to the exchange instruction for different rows, the target storage unit is controlled to exchange storage data with storage units in different rows, or the row where the target storage unit is located is controlled to exchange storage data with storage units in other rows; according to the exchange instruction for different columns, the target storage unit is controlled to exchange storage data with storage units in different columns, or the column where the target storage unit is located is controlled to exchange storage data with storage units in other columns.

[0044] It should be noted that if it can be determined that the storage data of the target storage unit and the storage unit to be exchanged are opposite, such as one storage data is 0 and the other storage data is 1, then the target storage unit can be made to exchange storage data with one storage unit. However, if it is not certain whether the storage data of the target storage unit and the storage unit to be exchanged are opposite, then the target storage unit can be made to exchange storage data with multiple storage units.

[0045] Since the storage data in the storage cell is either 0 or 1, there must be a storage cell with storage data opposite to that of the target storage cell among the multiple storage cells. After the target storage cell is controlled to exchange storage data with the multiple storage cells, there must be a storage cell with storage data opposite to that of the target storage cell and the target storage cell exchanges storage data, and the storage data of the target storage cell must be flipped, such as from 0 to 1, and from 1 to 0, thereby inevitably realizing the flipping of the gate voltage of the transistor of the target storage cell, such as the gate voltage of the transistor flipping from positive bias to negative bias, and from negative bias to positive bias, thereby reducing the aging effect of the BTI effect on the target storage cell, realizing the anti-aging of the target storage cell, reducing the storage cell mismatch caused by aging, and increasing the life of the storage device.

[0046] It should be noted that after the target storage unit exchanges storage data, in order to ensure that data can be correctly read and written according to external input instructions, the anti-aging method of the storage unit in some embodiments of the present invention also includes: controlling the target storage unit and the storage unit with which the storage data is exchanged to exchange addresses.

[0047] For example, the physical address or virtual address of the target storage unit and the storage unit with which the storage data is exchanged may be exchanged. After the physical address or virtual address is exchanged, the correspondence between the virtual address and the address of the actual storage unit storing the data is exchanged. If the externally input read instruction is an instruction to read the storage data of the target storage unit, after the instruction is parsed to obtain the virtual address of the target storage unit, since the correspondence between the virtual address and the actual storage unit storing the data is exchanged, the virtual address corresponds to the address of the storage unit with which the storage data is exchanged, that is, according to the parsed virtual address, the storage data previously located in the target storage unit can be obtained from the storage unit with which the storage data is exchanged.

[0048] In some embodiments of the present invention, if there are multiple target storage units, in order to improve the exchange efficiency, after determining the target storage unit, the target storage array where the multiple target storage units are located can also be determined, the storage units in the target storage array are arranged in an array, and the storage units in the target storage array are allowed to exchange storage data with each other to achieve anti-aging of the target storage array.

[0049] It should be noted that the target storage array where the multiple target storage units are located can be the entire storage array of the memory where the multiple target storage units are located, or it can be a partial storage array of the memory where the multiple target storage units are located, which will not be described in detail here. Among them, when the storage data is exchanged in a partial storage array of the memory, it will not affect the normal operation of the storage array of other parts of the memory, and the anti-aging scheme in the present invention is not affected by power failure or power-on. Therefore, the anti-aging scheme in the present invention has high feasibility and low complexity, especially for a small-area memory, it is more valuable to achieve anti-aging.

[0050] It should also be noted that if multiple target storage cells are arranged in an array, each storage cell in the target storage array is a target storage cell; if multiple target storage cells are not arranged in an array, some storage cells in the target storage array are target storage cells. When the storage data of the storage cells in the target storage array are exchanged, not only the target storage cells are anti-aging, but also other storage cells are anti-aging.

[0051] In some embodiments of the present invention, multiple target memory cells and the memory arrays in which they are located can be determined by performing aging detection on multiple memory cells in a memory device. That is, determining the target memory array in which the multiple target memory cells are located includes: performing aging detection on multiple memory cells to determine multiple aged memory cells and the memory arrays in which they are located; and determining the memory array in which the aged memory cells are located as the target memory cell array. Among them, the aging detection can be achieved by replicating the memory cells and based on the change of the current of the replica cells. Of course, other means can also be used to achieve the aging detection, which will not be described in detail here.

[0052] After determining the target storage array where the multiple target storage units are located, an exchange instruction for the target storage array can be generated, and the storage units in the target storage array can be controlled to exchange storage data with each other according to the exchange instruction. That is, in some embodiments of the present invention, generating the exchange instruction for the target storage unit includes: generating the exchange instruction for the target storage array; controlling the target storage unit to exchange storage data with other storage units includes: controlling all storage units in the target storage array to exchange storage data with each other.

[0053] Since there must be two storage units with opposite storage data in the target storage array, after controlling all storage units in the target storage array to exchange storage data with each other, there must be storage units with opposite storage data to the target storage unit and the target storage unit will exchange storage data, and multiple target storage units will most likely all achieve storage data flipping, thereby reducing the aging effect of the BTI effect on most target storage units and achieving anti-aging of most target storage units. Of course, in actual applications, the probability of storage data flipping in the target storage array can also be increased by controlling the target storage array to exchange storage data in different ways for multiple times.

[0054] It should be noted that the target storage cells in the target storage array can be controlled to exchange storage data with each other by controlling the exchange mode in which the target storage cells in the target storage array exchange storage data with each other; the target storage array can also be divided into multiple sub-storage arrays, and the storage cells in the target storage array can be controlled to exchange storage data with each other by controlling the exchange mode in which the sub-storage arrays in the target storage array exchange storage data with each other; the storage cells in the target storage array can also be controlled to exchange storage data with each other by controlling the exchange mode in which any two rows of target storage cells in the target storage array exchange storage data; the storage cells in the target storage array can also be controlled to exchange storage data with each other by controlling the exchange mode in which any two columns of target storage cells in the target storage array exchange storage data; the storage cells in the target storage array can also be controlled to exchange storage data with each other by at least two of the above exchange modes, which will not be repeated here.

[0055] In some embodiments of the present invention, controlling all storage units in the target storage array to exchange storage data with each other includes: controlling each row of storage units in the target storage array to exchange storage data with other row of storage units.

[0056] On this basis, if the target storage array includes m rows of storage cells, m is a natural number greater than or equal to 2, then controlling each row of storage cells in the target storage array to exchange storage data with other row of storage cells includes: controlling the i-th row of storage cells to exchange storage data with the m-i+1-th row of storage cells, i is any natural number between 1 and m / 2.

[0057] That is to say, when controlling each row of storage cells in the target storage array to exchange storage data with other row storage cells, the first row of storage cells can be controlled to exchange storage data with the mth row of storage cells, the second row of storage cells can be controlled to exchange storage data with the m-1th row of storage cells, the third row of storage cells can be controlled to exchange storage data with the m-2th row of storage cells, and so on. Based on this, it is only necessary to traverse m / 2 rows to realize the exchange of storage data of m rows of storage cells.

[0058] In some embodiments of the present invention, when controlling two rows of storage cells to exchange storage data, the storage data of one row of storage cells can be read out and cached in a temporary storage unit. After the storage data of another row of storage cells are written into the row of storage cells, the data of the temporary storage unit is written into the other row of storage cells, thereby realizing the exchange of the two rows of storage data.

[0059] That is to say, in some embodiments of the present invention, Figure 4 As shown, Figure 4 A flow chart of a target storage array performing storage data exchange is provided for one embodiment of the present invention, wherein controlling each row storage unit in the target storage array to exchange storage data with other row storage units includes:

[0060] S401: Reading out the storage data of any row of storage cells in the target storage array, and saving the storage data of any row of storage cells in a temporary storage unit;

[0061] S402: Reading out the storage data of other row storage units to be exchanged with any row storage unit, and writing the storage data of other row storage units into any row storage unit;

[0062] S403: writing the storage data of any row storage unit in the temporary storage unit into other row storage units.

[0063] Taking the exchange of storage data between the first row storage unit and the mth row storage unit as an example, after the storage data of the first row storage unit is read out, the storage data is cached in the temporary storage unit, and then the storage data of the mth row storage unit is read out and written into the first row storage unit, and then the storage data in the temporary storage unit is written into the first row storage unit. Of course, the present invention is not limited to this, and the storage data of the mth row storage unit can also be read out and written into the temporary storage unit first, which will not be repeated here.

[0064] Since the number of memory cells between rows in the target memory array is the same, after the memory cells in two rows exchange the storage data, each memory cell in each row of the memory cells exchanges the storage data. In addition, a temporary storage unit can also be used to realize the exchange of storage data between two columns of memory cells and the exchange of storage data between two memory cells, which will not be described in detail here.

[0065] It should be noted that if m is an even number, each row of storage cells has a corresponding row of storage cells, but if m is an odd number, the (m+1) / 2th row of storage cells does not have a corresponding row of storage cells. Based on this, if m is an odd number, the (m+1) / 2th row of storage cells can exchange storage data with any other row of storage cells.

[0066] It should also be noted that the temporary storage unit may be a redundant storage unit, a redundant storage array, a latch structure constructed by transistors, or other structures having storage functions.

[0067] In some embodiments of the present invention, the temporary storage unit is a redundant storage array, the redundant storage cells in the redundant storage array are arranged in an array, and the redundant storage array and the target storage array are located in the same storage device. Figure 5 As shown, Figure 5 A schematic diagram of the structure of a target storage array and a redundant storage array provided for one embodiment of the present invention, wherein the redundant storage array may be located on one side or both sides of the target storage array, and the redundant storage cells in the redundant storage array are used to replace erroneous or damaged storage cells in the target storage array.

[0068] Based on this, saving the storage data of any row of storage cells to the temporary storage unit includes: storing the storage data of any row of storage cells in a row of redundant storage cells. Of course, the present invention is not limited to this. In other embodiments, the exchange of storage data between columns and column storage cells in the target storage array can also be achieved through a redundant storage array, that is, the storage data of a column of storage cells can be stored in a column of redundant storage cells to achieve storage data caching.

[0069] Furthermore, in any of the above embodiments, a memory built-in self-test (MBIST) algorithm may be used to exchange storage data of a target storage array where multiple target storage units are located, that is, an exchange instruction for exchanging storage data of the target storage array is generated based on the MBIST algorithm.

[0070] Since the MBIST algorithm is an algorithm for performing fault detection on a storage array in a memory, in some embodiments of the present invention, an exchange instruction for exchanging storage data with a target storage array is generated based on the MBIST algorithm. It is only necessary to add a small amount of control logic to the MBIST module that executes the MBIST algorithm, thereby eliminating the need to add a large amount of control logic to the memory, and further eliminating the need to increase the overall area of ​​the memory.

[0071] Certainly, the MBIST module in the embodiment of the present invention can also generate the fault detection instruction for the storage device at the target storage array based on the MBIST algorithm, so as to detect the storage unit of the fault in the target storage array according to the fault detection instruction. Wherein, the MBIST module can generate different instructions under different modes, such as generating the fault detection instruction under the test mode, and generating the exchange instruction under the flip mode.

[0072] In the embodiment of the present invention, before exchanging storage data with the target storage unit or the target storage array, it is necessary to ensure that the target storage unit or the target storage array is not performing reading, writing, etc. That is to say, in the embodiment of the present invention, the scheme for exchanging storage data with the target storage unit or the target storage array is performed during the idle period of the target storage unit or the target storage array, so as to avoid the exchange of storage data and affect the normal operation of the target storage unit or the target storage array.

[0073] Based on this, in some embodiments of the present invention, after determining the target storage unit or determining the target storage array, it also includes: determining whether there is an enable signal for the target storage unit or the target storage array to work; if not, executing the steps of generating a switch instruction for the target storage unit or the target storage array and the subsequent steps; if so, directly terminating the process without executing any anti-aging steps.

[0074] On this basis, in order to avoid receiving an enable signal during the storage data exchange process, in some embodiments of the present invention, before generating an exchange instruction for the target storage unit or the target storage array, it also includes: isolating the target storage unit or the target storage array to isolate the enable signal that enables the target storage unit or the target storage array to work.

[0075] Among them, all the read and write enable signals inside the memory where the target storage unit or target storage array is located can be pulled low so that it remains at a low level when the anti-aging step is executed. At the same time, the read data is isolated so that the data read during the storage data exchange cannot be actually read out.

[0076] It should be noted that after the storage data and address of the target storage unit or target storage array are exchanged, the target storage unit or target storage array must be released in time, and the enable signal of the target storage unit or target storage array and the read data must be restored so that the target storage unit or target storage array can resume normal operation.

[0077] As another optional implementation of the disclosure of the embodiment of the present invention, the embodiment of the present invention provides an anti-aging device for a storage unit, which is applied to a storage device to reduce the aging effect of the BTI effect on the storage unit in the storage device. The storage device includes but is not limited to a static random access memory (SRAM) and the like.

[0078] like Figure 6 As shown, Figure 6 A schematic diagram of the structure of an anti-aging device for a storage unit provided in one embodiment of the present invention, the anti-aging device comprises:

[0079] An aging determination module 61 is used to determine a target storage unit;

[0080] An instruction generation module 62, used to generate a swap instruction for a target storage unit;

[0081] The control module 63 is used to control the target storage unit to exchange storage data with other storage units according to the exchange instruction, so as to achieve anti-aging of the target storage unit.

[0082] In the embodiment of the present invention, after the aging determination module 61 determines the target storage unit, the instruction generation module 62 generates an exchange instruction for the target storage unit, and the control module 63 controls the target storage unit to exchange storage data with other storage units according to the exchange instruction, so as to realize the flipping of storage data of the target storage unit by exchanging storage data between different storage units, thereby realizing the anti-aging of the target storage unit.

[0083] In some embodiments of the present invention, after the aging determination module 61 determines the target storage unit, it is also used to determine the target storage array where multiple target storage units are located, and the array arrangement of the storage units in the target storage array; the instruction generation module 62 generates an exchange instruction for the target storage unit, including: generating an exchange instruction for the target storage array; the control module 63 controls the target storage unit to exchange storage data with other storage units, including: controlling all storage units in the target storage array to exchange storage data with each other.

[0084] like Figure 7 As shown, Figure 7 A schematic diagram of the connection relationship between the memory where the target storage array is located and the aging device provided in one embodiment of the present invention, wherein the circuit structure of the memory where the target storage array is located includes a storage array, an address decoder, a sense amplifier, a control circuit, an input and output port, etc. Among them, the control module 63 also has other functions besides exchanging storage data, such as controlling the storage unit to perform read and write operations, etc., which will not be repeated here.

[0085] Among them, the CPU and other devices select the storage array through the address signal and read and write data to the storage array. The read data and the written data enter and exit the storage array through the input and output ports and the sense amplifier. The address decoder decodes the address in the external input instruction, such as determining the physical address based on the virtual address in the instruction such as the exchange instruction, and then finds the corresponding storage unit based on the physical address.

[0086] In some embodiments of the present invention, the instruction generation module 62 is further used to generate a swap instruction for the target storage array based on the memory built-in self-test algorithm, and to generate a fault detection instruction for the storage device where the target storage array is located based on the memory built-in self-test algorithm, so as to detect the faulty storage unit in the target storage array according to the fault detection instruction. The instruction generation module 62 is the MBSIT module.

[0087] In some embodiments of the present invention, the control module 63 is further used to control the target storage unit to exchange addresses with the storage unit with which the target storage unit exchanges storage data.

[0088] In some embodiments of the present invention, the control module 63 controls all storage units in the target storage array to exchange storage data with each other, including:

[0089] Each row storage unit in the target storage array is controlled to exchange storage data with other row storage units.

[0090] On the basis of the above embodiments, in some embodiments of the present invention, the target storage array includes m rows of storage units, where m is a natural number greater than or equal to 2, and the control module 63 controls each row of storage units in the target storage array to exchange storage data with other row of storage units, including:

[0091] Control the storage unit in the i-th row to exchange storage data with the storage unit in the m-i+1-th row, where i is any natural number between 1 and m / 2;

[0092] Furthermore, if m is an odd number, the storage units in the (m+1) / 2th row exchange storage data with any other row of storage units.

[0093] In some embodiments of the present invention, the control module 63 controls each row of storage cells in the target storage array to exchange storage data with other row of storage cells, including:

[0094] Reading out the storage data of any row of storage cells in the target storage array, and saving the storage data of any row of storage cells in a temporary storage unit;

[0095] Reading out the storage data of other row storage units to be exchanged with any row storage unit, and writing the storage data of other row storage units into any row storage unit;

[0096] The storage data of any row storage unit in the temporary storage unit is written into other row storage units.

[0097] Based on the above embodiments, in some embodiments of the present invention, the temporary storage unit includes a redundant storage array, the redundant storage cells in the redundant storage array are arranged in an array, and the redundant storage array and the target storage array are located in the same storage device;

[0098] Saving the storage data of any row of storage units in the temporary storage unit includes: storing the storage data of any row of storage units in a row of redundant storage units.

[0099] In some embodiments of the present invention, the control module 63 is further used to control the target storage unit to exchange addresses with the storage unit with which the target storage unit exchanges storage data.

[0100] In some embodiments of the present invention, the aging determination module 61 determines that the target storage array where the plurality of target storage units are located includes:

[0101] Performing aging detection on a plurality of storage units to determine a plurality of aged storage units and the storage arrays in which they are located;

[0102] The storage array where the aged storage unit is located is determined as the target storage array.

[0103] In some embodiments of the present invention, after the aging determination module 61 determines the target storage unit or determines the target storage array, the control module 63 is further used to determine whether there is an enable signal for the target storage unit or the target storage array to work; if not, execute the generation of a switch instruction for the target storage unit or the target storage array and subsequent steps.

[0104] In some embodiments of the present invention, before the instruction generation module 62 generates an exchange instruction for the target storage unit or the target storage array, the control module 63 is also used to isolate the target storage unit or the target storage array to isolate the enable signal that enables the target storage unit or the target storage array to work.

[0105] Figure 7 The area within the dotted box is the area that needs to be isolated. During the data exchange process, the enable signal is set to a low level to isolate the area that needs to be isolated, so that no data is written or read, no new external input address signal, only power signal and clock signal, and the working state of the memory is standby.

[0106] As another optional implementation of the content disclosed in the embodiments of the present invention, the embodiments of the present invention provide a computer device, including: a memory, storing at least one set of instructions; a processor, executing at least one set of instructions to execute the anti-aging method of the storage unit provided in any embodiment.

[0107] As another optional implementation of the contents disclosed in the embodiments of the present invention, the embodiments of the present invention provide a readable storage medium, which stores at least one set of instructions, and the at least one set of instructions is used to enable a processor to execute the anti-aging method of a storage unit provided in any of the above embodiments.

[0108] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0109] The above description of the disclosed embodiments enables one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An anti-aging method for a storage unit, characterized in that: include: Determine the target storage unit; Determining a target storage array where a plurality of target storage units are located, comprising: performing aging detection on a plurality of storage units to determine a plurality of aged storage units and the storage arrays where they are located; determining the storage array where the aged storage units are located as the target storage array; arranging the storage units in the target storage array; generating a swap instruction for the target storage array; According to the exchange instruction, controlling the target storage unit to exchange storage data with other storage units includes: controlling each row storage unit in the target storage array to exchange storage data with other row storage units to achieve anti-aging of the target storage unit; Wherein, the target storage array includes m rows of storage units, m is a natural number greater than or equal to 2, and the step of controlling each row of storage units in the target storage array to exchange storage data with other row of storage units includes: Control the storage unit in the i-th row to exchange storage data with the storage unit in the m-i+1-th row, where i is any natural number between 1 and m / 2; Furthermore, if m is an odd number, the storage unit in the (m+1) / 2th row exchanges storage data with any other row of storage units.

2. The anti-aging method of a storage unit according to claim 1, characterized in that: The generating of the exchange instruction for the target storage array comprises: A swap instruction for the target memory array is generated based on a memory built-in self-test algorithm.

3. The anti-aging method of a storage unit according to claim 1, characterized in that: The controlling each row storage unit in the target storage array to exchange storage data with other row storage units comprises: Reading out the storage data of any row of storage cells in the target storage array, and saving the storage data of any row of storage cells in a temporary storage unit; Reading out the storage data of other row storage units to be exchanged with the any row storage unit, and writing the storage data of the other row storage units into the any row storage unit; The storage data of any row storage unit in the temporary storage unit is written into the other row storage units.

4. The anti-aging method of the storage unit according to claim 3, characterized in that: The temporary storage unit includes a redundant storage array, the redundant storage cells in the redundant storage array are arranged in an array, and the redundant storage array and the target storage array are located in the same storage device; The storing the storage data of any row of storage units in the temporary storage unit includes: storing the storage data of any row of storage units in a row of redundant storage units.

5. The anti-aging method of a storage unit according to claim 1, characterized in that: Also includes: The target storage unit is controlled to exchange addresses with a storage unit with which storage data is exchanged.

6. The anti-aging method of a storage unit according to claim 1, characterized in that: After determining the target storage unit or the target storage array, the method further includes: Determine whether there is an enable signal for operating the target storage unit or the target storage array; If not, executing the step of generating the exchange instruction for the target storage unit or the target storage array and the subsequent steps.

7. The anti-aging method of a storage unit according to claim 6, characterized in that: Before generating the exchange instruction for the target storage array, the method further includes: An isolation process is performed on the target storage unit or the target storage array to isolate an enable signal for enabling the target storage unit or the target storage array to operate.

8. An anti-aging device for a storage unit, characterized in that: include: An aging determination module, used for determining a target storage unit; Determining a target storage array where a plurality of target storage units are located, comprising: performing aging detection on a plurality of storage units to determine a plurality of aged storage units and the storage arrays where they are located; determining the storage array where the aged storage units are located as the target storage array; the target storage array comprises m rows of storage units, where m is a natural number greater than or equal to 2; and an array arrangement of storage units in the target storage array; An instruction generation module, used for generating a swap instruction for the target storage array; A control module is used to control the target storage unit to exchange storage data with other storage units according to the exchange instruction, including: controlling each row of storage units in the target storage array to exchange storage data with other row of storage units, wherein the control of each row of storage units in the target storage array to exchange storage data with other row of storage units includes: controlling the i-th row of storage units to exchange storage data with the m-i+1-th row of storage units, i is any natural number between 1 and m / 2; and if m is an odd number, the (m+1) / 2-th row of storage units exchanges storage data with any other row of storage units to achieve anti-aging of the target storage unit.

9. The anti-aging device of the storage unit according to claim 8, characterized in that: The instruction generation module is also used to generate an exchange instruction for the target storage array based on a memory built-in self-test algorithm, and to generate a fault detection instruction for the storage device where the target storage array is located based on the memory built-in self-test algorithm, so as to detect faulty storage units in the target storage array according to the fault detection instructions.

10. The anti-aging device of the storage unit according to claim 8, characterized in that: The control module is also used to control the target storage unit to exchange addresses with the storage unit with which the target storage unit exchanges storage data.

11. A computer device, characterized in that: include: a memory storing at least one set of instructions; A processor executes the at least one set of instructions to perform the anti-aging method of the storage unit as described in any one of claims 1 to 7.

12. A readable storage medium, characterized in that: The readable storage medium stores at least one set of instructions, and the at least one set of instructions is used to enable a processor to execute the anti-aging method of a storage unit according to any one of claims 1 to 7.

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