Hall bar-based multi-input parallel multiply-accumulate in-memory computing circuit

Abstract

The present invention discloses a multi-input parallel multiply-accumulate in-memory computing integrated circuit based on Hall bars, which includes an input encoding module, a parallel multiplication module, and an analog addition module. The input encoding module is used to encode the input signal into a current signal. The parallel multiplication module includes a plurality of parallel Hall bars, and takes the current at the input end of the Hall bar as the multiplier of the multiplication operation, the resistance value as the multiplicand, and the Hall voltage at the output end as the multiplication result. The parallel Hall bars output their respective multiplication calculation results, which are accumulated in the analog addition module, thereby realizing the multiply-accumulate operation of the circuit. Since the multiplicand Hall resistance value is directly stored in the Hall bar, this circuit can achieve the goal of in-memory computing without an additional storage unit. The in-memory computing integrated circuit in the present invention has the advantages of non-volatile storage of the multiplicand and continuous change, multi-input parallel operation, etc., and is very suitable for hardware acceleration in convolutional neural network computing.

Description

Technical Field

[0001] The present invention belongs to the technical field of in-memory computing, and relates to an in-memory computing circuit based on a novel electronic device, especially a multi-input parallel multiply-accumulate in-memory computing circuit based on a Hall bar. Background Art

[0002] With the rapid development of technology, a new generation of revolution in artificial intelligence is on the verge of breaking out. The rapid spread of multimedia data has led to an unprecedented increase in the data generated by people daily. The information economy era is gradually transforming into the digital economy era, and people's requirements for computer systems are getting higher and higher. In the traditional von Neumann computer architecture, due to the separation of the storage unit and the computing unit, the process of moving data from the memory to the computing unit consumes nearly 1000 times the computing power consumption. As a result, the "memory wall" and "power wall" existing between the CPU and the memory have become the main problems in improving computer performance. Therefore, it is necessary to find a new architecture system to reduce the power consumption caused by data movement.

[0003] If a device itself has storage and computing capabilities, it can not only reduce the occupancy of storage units, reduce the volume of the computer, but also reduce the transfer energy consumption generated by moving data between the storage unit and the computing unit. Summary of the Invention

[0004] Aiming at the deficiencies of the prior art, the present invention proposes a multi-input parallel multiply-accumulate in-memory computing circuit based on a Hall bar. Based on the non-volatile, multi-state programmable and other characteristics of the Hall bar, an integrated circuit with both storage and computing functions is designed.

[0005] The multi-input parallel multiply-accumulate in-memory computing circuit based on a Hall bar includes an input encoding module, a parallel multiplication module and an analog addition module.

[0006] The input encoding module is used to encode the input signal, convert it into a current signal and then input it into the parallel multiplication module in parallel. The input signal is a voltage signal, a current signal or a digital signal.

[0007] The parallel multiplication module includes a plurality of parallel Hall bars, which are used to receive the current value output by the input encoding module as the multiplier, perform a multiplication operation with the multiplicand, that is, the resistance value of the Hall bar, and the Hall voltage output by the Hall bar is used as the result of the multiplication operation. The resistance value of the Hall bar can be reprogrammed by applying an external continuous pulsed current to realize the rewriting of the preset value of the multiplicand in the parallel multiplication module, and the Hall resistance value should not change during the multiplication operation.

[0008] Preferably, the structure of the magnetic multilayer film of the Hall bar is a Co / Pt stacked structure, specifically a Co layer with a thickness of 0.8 nm and a Pt layer with a thickness of 0.3 nm above it. The material of the heavy metal layer is Pt with a thickness of 5.5 nm, and the metal isolation layers at the bottom and top are Ta layers with thicknesses of 1 nm and 3 nm respectively.

[0009] Preferably, the bottom metal isolation layer of the Hall bar is used to ensure the flatness of the bottom of the Hall bar, and the top metal isolation layer is used to prevent the magnetic multilayer film from oxidizing.

[0010] Preferably, the parallel multiplication module further includes a plurality of parallel amplifiers, which are used to amplify the Hall voltage output by the Hall bar and then input it into the analog addition module.

[0011] Preferably, the amplifier is a differential amplifier.

[0012] The analog addition module accumulates the multiple multiplication operation results output by the parallel multiplication module through an adder and outputs the multiplication-addition operation result of the input signal.

[0013] Preferably, the Hall bar-based multi-input parallel multiplication-addition-storage-in-computation integrated circuit further includes an analog-to-digital converter, which is used to convert the analog multiplication-addition operation result output by the analog addition circuit into a digital form.

[0014] In the Hall bar-based multi-input parallel multiplication-addition-storage-in-computation integrated circuit, the Hall bar has both storage and computing functions. The input signal is encoded by the input encoding module to obtain different output current values, which are parallelly input into multiple Hall bars as the multipliers of the multiplication operation. The Hall resistance values preset in advance are stored in the Hall bars, and the Hall resistance values are used as the multiplicands. The output Hall voltage value, which is the product of the current and the Hall resistance, is used as the product of the multiplication operation. During the operation process, since the multiplicand, that is, the Hall resistance value of the Hall bar, is directly stored in the Hall bar, no additional storage unit is required, reducing the data transfer process, and the integration of operation and storage can be realized.

[0015] The present invention has the following beneficial effects:

[0016] 1. By adopting the multi-input parallel method, it is possible to complete the multiplication operation of multiple input data and multiple pre-set and reprogrammable Hall resistance values within a single cycle, and complete the multi-input parallel multiplication-addition operation through the accumulation of an analog adder.

[0017] 2. Using the Hall bar as a storage device has the advantages of non-volatility and multi-state. The Hall resistance value is used as the multiplicand of the multiplication operation and is directly stored in the Hall bar device, eliminating the need for additional storage units, realizing the function of integration of storage and computation, and being very suitable for hardware acceleration in convolutional neural network computing. Description of the Drawings

[0018] Figure 1 Schematic diagram of a multi-input parallel multiply-accumulate-in-memory integrated circuit based on a Hall bar in the embodiment;

[0019] Figure 2 Schematic diagram of the structure of the Hall bar used in the parallel multiplication module in the embodiment;

[0020] Figure 3 Schematic diagram of the multi-layer film structure of the Hall bar;

[0021] Figure 4 Schematic diagram of the change of the Hall resistance value of the Hall bar with the excitation current. Detailed Embodiment

[0022] In order to make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further explained and described below with reference to the accompanying drawings; it must be noted that the embodiments described below are only partial embodiments of the present invention, not all embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts fall within the protection scope of the present invention.

[0023] As Figure 1 shown, the multi-input parallel multiply-accumulate-in-memory integrated circuit based on a Hall bar includes an input encoding module, a parallel multiplication module, an analog addition module, and an analog-to-digital conversion module.

[0024] The input encoding module is used to encode a group of externally input voltage, current, or digital signals, convert them into current signals according to rules, and then input them into the parallel multiplication module in a parallel manner, which is the basis for realizing parallel calculation of multiple signals.

[0025] The parallel multiplication module includes n parallel Hall bars and n parallel differential amplifiers, and is used to receive the current values output by the input encoding module as multipliers, perform multiplication operations with the multiplicand, i.e., the resistance value of the Hall bar, and the Hall voltage output by the Hall bar is used as the result of the multiplication operation.

[0026] During use, the Hall bar includes at least 4 electrodes forming two paths, the two paths are perpendicular to each other, one path is the current input path, and the other is the voltage output path. As Figure 2As shown, the single Hall bar in this embodiment has 8 electrodes, among which 2 are input path lead-out electrodes, serving as the current input terminals of the Hall bar to receive the current value output by the input coding module. The remaining 6 electrodes are output loop lead-out electrodes. Among them, the 2 electrodes perpendicular to the current direction serve as the Hall voltage output terminals of the Hall bar. The output Hall voltage value is the product of the input current and the Hall resistance stored inside. After being amplified by the differential amplifier, it is input into the analog addition module. The 2 electrodes along the current direction serve as test terminals for measuring the channel resistance, and thus the resistivity of the Hall bar can be obtained.

[0027] As Figure 3 shown, the Hall bar is a new type of device based on the Spin-Orbit Torque (SOT) effect, composed of multiple thin film materials. The material of the magnetic multi-layer film is generally Co / Pt or CoFeB / MgO. In addition, it also includes a metal isolation layer Ta at the bottom for planarizing the device, a heavy metal layer Pt with Spin-Orbit Coupling (SOC) effect, and a metal isolation layer Ta at the top for protecting the thin film from oxidation. The magnetic multi-layer film of the Hall bar used in this embodiment is Co / Pt, where the thicknesses of the Co layer and the Pt layer are 0.8 nm and 0.3 nm respectively, the thickness of the Pt layer of the heavy metal layer is 5.5 nm, and the thicknesses of the metal isolation layers Ta at the bottom and the top are 1 nm and 3 nm respectively. When an external pulsed current is applied to the Hall bar, most of the current will pass through the heavy metal layer Pt with strong spin-orbit coupling effect, generating the spin Hall effect, and generating a spin-polarized current under the spin Hall effect, flowing towards the magnetic multi-layer film Co / Pt, and generating spin accumulation at the interface of the magnetic multi-layer film Co / Pt. When the current density of the spin-polarized current exceeds the critical current density for flipping it, the magnetic moment of the magnetic multi-layer film Co / Pt will change, and thus the Hall resistance value of the Hall bar will change.

[0028] As Figure 4As shown, the Hall resistance value stored in the Hall bar has a maximum value R_max and a minimum value R_min. A current pulse I with a varying amplitude is applied to the input end of the Hall bar. When the amplitude of the current pulse I reaches the critical current value Icp that causes the Hall resistance value to change, the Hall resistance value stored in the Hall bar will change. Specifically, a negative current pulse increases the Hall resistance value, and a positive current pulse decreases the Hall resistance value, with the change range from R_min to R_max. When the Hall resistance value reaches the extreme value R_max or R_min, the Hall resistance value is no longer affected by the amplitude of the input current pulse I and will no longer change. Therefore, by applying an external current excitation to the Hall bar before calculation, the multiplicand in the multiplication module can be rewritten. And by converting the input signal into a current signal smaller than the critical current value Icp through the input coding situation, the multiplication operation of a specific multiplier can be achieved.

[0029] The input end of the differential amplifier is connected to the two Hall voltage value output ends of the Hall bar to amplify the output Hall voltage. Since the output Hall voltage is only in the millivolt range, an operational amplifier circuit with characteristics such as high gain and low drift is required to achieve amplification. Also, because the output node of the Hall bar straddles its input end, the selected operational amplifier also needs to have the characteristic of high common-mode rejection ratio. Therefore, in this embodiment, a differential amplifier circuit is selected to amplify the output Hall voltage.

[0030] The input of the analog addition module is the Hall voltage value amplified by the differential amplifier circuit, that is, the result of the multiplication operation of the current at the input end of the Hall bar and the Hall resistance value. The analog addition module sums up this result in a fixed ratio, thereby realizing the multiply-add function of the circuit. At the same time, the multi-input parallel method enables the multiply-add operation to be completed within a single cycle.

[0031] The analog-to-digital conversion module is used to convert the analog signal output by the analog addition module into a digital signal and output it.

[0032] It should be noted that the protection scope of the present invention should be subject to the protection scope of the claims, rather than being limited to these specific embodiments. Any substitution, modification, and improvement conceived by any person skilled in the art within the principle of the present invention should be covered within the protection scope of the present invention.

Claims

1. A multi-input parallel multiply-accumulate in-memory computing integrated circuit based on a Hall bar, characterized in that: It includes an input encoding module, a parallel multiplication module, and an analog addition module; The input encoding module is used to encode a set of input signals, convert them into current signals, and then input them into the parallel multiplication module in parallel; The parallel multiplication module includes multiple parallel Hall bars, which are used to receive the current values output by the input encoding module as multipliers, perform multiplication operations with the Hall resistance values stored in the Hall bars, and output Hall voltages as the results of the multiplication operations; the Hall resistance values are reprogrammed by applying an external pulsed current to achieve the change of the multiplicand values stored in the parallel multiplication module; The analog addition module accumulates the multiple multiplication operation results output by the parallel multiplication module and outputs the multiplication and addition operation results of the input signals.

2. The multi-input parallel multiply-accumulate-in-memory integrated circuit based on Hall bars according to claim 1, wherein: The multiplicand stored in the parallel multiplication module, that is, the Hall resistance value of the Hall bar, is preset before the multiplication operation. The specific method is as follows: under the action of an external magnetic field of a certain magnitude, a pulsed current excitation with an amplitude exceeding the critical current value of the Hall bar resistance change is input to the input end of the Hall bar in the parallel multiplication module. After the required Hall resistance value is written, the external magnetic field and the pulsed current excitation are removed.

3. The multi-input parallel multiply-accumulate in-memory computing integrated circuit based on Hall bars according to claim 1, wherein: The input encoding module encodes the input signals in the form of voltage, current, or digital into current signals with a magnitude not exceeding the critical current value of the Hall bar resistance change.

4. The multi-input parallel multiply-accumulate in-memory computing integrated circuit based on a Hall bar according to claim 1, wherein: The Hall bar includes multiple layers of thin film materials, which are, from top to bottom, a top metal isolation layer, a magnetic multi-layer film, a heavy metal layer, and a bottom metal isolation layer.

5. The multi-input parallel multiply-accumulate-in-memory integrated circuit based on Hall bars according to claim 4, wherein: The bottom metal isolation layer is made of Ta material with a thickness of 1 nm, and the top metal isolation layer is made of Ta material with a thickness of 3 nm; the heavy metal layer is made of Pt material with a thickness of 5.5 nm; the magnetic multi-layer film is a Co / Pt stacked structure, where the thicknesses of Co and Pt are 0.8 nm and 0.3 nm respectively.

6. The multi-input parallel multiply-accumulate-in-memory integrated circuit based on Hall bars as claimed in claim 4 or 5, characterized in that: The bottom metal isolation layer is used to ensure the flatness of the bottom of the Hall bar, and the top metal isolation layer is used to prevent the magnetic multi-layer film from oxidizing.

7. The multi-input parallel multiply-accumulate-in-memory integrated circuit based on Hall bars according to claim 1, wherein: The parallel multiplication module further includes multiple parallel amplifiers, which are used to amplify the Hall voltages output by the Hall bars and then input them into the analog addition module.

8. The multi-input parallel multiply-accumulate-in-memory integrated circuit based on Hall bars according to claim 7, wherein: The amplifier selects a differential amplifier.

9. The multi-input parallel multiply-accumulate-in-memory integrated circuit based on Hall bars according to claim 1, wherein: The multi-input parallel multiplication, addition, storage, and computing integrated circuit based on the Hall bar further includes an analog-to-digital converter, which is used to convert the analog multiplication and addition operation results output by the analog addition circuit into digital form.

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