A circuit capable of reducing the starting impact current of multiple loads

By introducing a load start control circuit into the circuit, controlling the power-on timing of multiple loads, the fusion welding or adhesion problem caused by excessive arcing of the contacts of the relay at the moment of cold start of the load is solved, and the safety and reliability of the circuit is achieved.

CN114300306BActive Publication Date: 2025-04-04TRANSCEND COMM TIANJIN CO LTD
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Patent Information

Application Number
CN202111412998.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-11-25
Publication Date
2025-04-04
Estimated Expiration
2041-11-25

AI Technical Summary

Technical Problem

In the prior art, the contact arc of the relay is too large at the moment when the multi-channel load is cold-started, resulting in problems of welding or adhesion.

Method used

A circuit is designed to connect the AC_L_OUT1 and AC_L_OUT2 signals output by the load start control circuit to control the power-up timing of multiple loads and avoid excessive arcing of the relay contacts.

Benefits of technology

It effectively solves the fusion welding or adhesion problem caused by excessive arcing of the contacts of the relay at the moment of cold opening of the load. It is simple and easy to use, safe and reliable.

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Abstract

The present invention discloses a circuit capable of reducing the start-up impact current of multiple loads, comprising: an AC 220V input circuit, an AC 220V to +12V power module, a +3.3V voltage stabilizing circuit, a processor, a load start-up control circuit, and a load output circuit; the AC 220V input circuit provides power input for the entire system; the AC 220V to +12V power module provides +12V power input for the entire system; the +3.3V voltage generated by the +3.3V voltage stabilizing circuit is used to power the processor, and the start and stop state of the load start-up control circuit is controlled by the CTRL signal output by the processor; the AC_L_OUT1 and AC_L_OUT2 signals output by the load start-up control circuit are connected to the load output circuit. The present invention can effectively solve the problem of relay contact welding and adhesion caused by excessive arcing of relay contacts at the moment of cold start of multiple loads. The overall design is simple, easy to use, safe and reliable.
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Description

Technical Field

[0001] The invention relates to the field of automation control technology, and in particular to a circuit capable of reducing startup impact current of multiple loads. Background Art

[0002] A relay is an electrical control device. When the change of the input quantity (excitation quantity) reaches the specified requirement, it causes the controlled quantity to undergo a predetermined step change in the electrical output circuit. It has an interactive relationship between the control system (also known as the input circuit) and the controlled system (also known as the output circuit). It is usually used in automated control circuits. It is actually an "automatic switch" that uses a small current to control the operation of a large current. Therefore, it plays the role of automatic adjustment, safety protection, and circuit conversion in the circuit.

[0003] The reason for the arcing of the relay contacts is that there is an inductive load in the circuit it controls. Since the current of the inductor will not change suddenly, at the moment the switch is disconnected, the electromagnetic energy needs to rely on the self-inductance high voltage generated by the breakpoint to break through the air to maintain the current, thereby generating an arc, and releasing energy through the heat energy of the arc. The magnitude of the high voltage generated by the self-inductance is determined by the rate of change of the magnetic field. Therefore, the greater the magnetic field energy of the load, the greater the arc will be.

[0004] In order to solve the problem of excessive arcing of relay contacts at the moment of cold start of multiple loads, causing welding and adhesion of relay contacts, parallel RC absorption and DRC absorption circuits are generally used to consume this part of the energy through resistance. This is also a relatively common method.

[0005] The information disclosed in this background technology section is only intended to deepen the understanding of the overall background technology of the present invention, and should not be regarded as acknowledging or suggesting in any form that the information constitutes the prior art already known to those skilled in the art. Summary of the invention

[0006] The object of the present invention is to provide a circuit capable of reducing the startup impact current of multiple loads, so as to solve the technical problems existing in the prior art.

[0007] In order to achieve the above object, the present invention adopts the following technical solutions:

[0008] The present invention provides a circuit capable of reducing the starting impact current of multiple loads, comprising: an AC 220V input circuit, an AC 220V to +12V power supply module, a +3.3V voltage stabilizing circuit, a processor, a load starting control circuit and a load output circuit; the AC 220V input circuit provides power input for the entire system; the AC 220V to +12V power supply module provides +12V power input for the entire system; the +3.3V voltage generated by the +3.3V voltage stabilizing circuit is used to power the processor, and the start and stop state of the load starting control circuit is controlled by a CTRL signal output by the processor; AC_L_OUT1 and AC_L_OUT2 signals output by the load starting control circuit are connected to the load output circuit, so as to control the power-on timing of multiple loads, and avoid excessive arcing of relay contacts at the moment of cold start of the entire system load, resulting in welding and adhesion of relay contacts.

[0009] Further, the load startup control circuit includes a second resistor R2, a second optical coupler Q2, a fourth diode D4, a fourteenth relay RLY14, a third resistor R3, a ninth resistor R9, a thirteenth MOS tube Q13, a sixth diode D6, a third relay RLY3, a fifth capacitor C5, a tenth resistor R10, a twentieth resistor R20, a seventh resistor R7, an eighth resistor R8, a first voltage comparator U1, a second capacitor C2, a fourteenth resistor R14, a nineteenth resistor R19, an eighteenth resistor R18, an eleventh transistor Q11, a sixteenth resistor R16, a sixth resistor R6, a seventh MOS tube Q7, a fifth diode D5 and a fifteenth relay RLY15;

[0010] Among them, one end of the second resistor R2 is connected to the CTRL signal output by the processor, and the other end is connected to Pin1 of the second optical coupler Q2, while Pin2 of the second optical coupler Q2 is connected to GND, Pin4 is connected to the +12V power supply, Pin3 is connected to one end of the fourth diode D4 and Pin1 of the fourteenth relay RLY14, the other end of the fourth diode D4 is connected to GND, while Pin2 of the fourteenth relay RLY14 is connected to GND, Pin5 is connected to AC_L AC 220V input, Pin4 is connected to AC_L_OUT1 first load AC 220V output, Pin3 is floating, and one end of the third resistor R3 is also connected to the CTRL signal output by the processor. The 13th MOS tube Q13 is connected to the RL signal, and the other end is connected to one end of the ninth resistor R9 and the gate of the 13th MOS tube Q13. The other end of the ninth resistor R9 is connected to GND. At the same time, the source of the 13th MOS tube Q13 is connected to GND, and the drain is connected to one end of the sixth diode D6 and Pin5 of the third relay RLY3. The other end of the sixth diode D6 is connected to GND. At the same time, Pin4 of the third relay RLY3 is connected to the CTRL signal output by the processor, Pin3 is connected to the +12V power supply, Pin2 is floating, Pin1 is connected to one end of the 20th resistor R20, one end of the fifth diode D5 and Pin1 of the fifteenth relay RLY15, and the second The other end of the tenth resistor R20 is connected to one end of the fifth capacitor C5, one end of the tenth resistor R10 and Pin2 of the first voltage comparator U1, the other end of the fifth capacitor C5 is connected to GND, the other end of the tenth resistor R10 is connected to GND, Pin3 of the first voltage comparator U1 is respectively connected to one end of the seventh resistor R7 and the eighth resistor R8, the other end of the seventh resistor R7 is connected to GND, the other end of the eighth resistor R8 is connected to the +12V power supply, and Pin5, Pin6 and Pin7 of the first voltage comparator U1 are floating, Pin4 is connected to GND, Pin8 is connected to the +12V power supply and one end of the second capacitor C2, and the other end of the second capacitor C2 is connected to GND. In addition, Pin1 of the first voltage comparator U1 is respectively connected to the fourteenth resistor R14 and one end of the nineteenth resistor R19, the other end of the fourteenth resistor R14 is connected to the +12V power supply, the other end of the nineteenth resistor R19 is connected to one end of the eighteenth resistor R18 and the base of the eleventh transistor Q11, the other end of the eighteenth resistor R18 is connected to the +12V power supply and the emitter of the eleventh transistor Q11, the collector of the eleventh transistor Q11 is connected to one end of the sixteenth resistor R16, the other end of the sixteenth resistor R16 is connected to one end of the sixth resistor R6 and the gate of the seventh MOS transistor Q7, the other end of the sixth resistor R6 is connected to GND and the source of the seventh MOS transistor Q7,The drain of the seventh MOS tube Q7 is respectively connected to the other end of the fifth diode D5 and Pin2 of the fifteenth relay RLY15, while Pin5 of the fifteenth relay RLY15 is connected to the AC_L AC 220V input, Pin3 is connected to the AC_L_OUT2 second load AC 220V output, and Pin4 is floating.

[0011] By adopting the above technical solution, the present invention has the following beneficial effects:

[0012] Compared with the prior art, the circuit for reducing the startup impact current of multiple loads of the present invention solves the impact current problem of the load cold start moment by utilizing the power supply timing of the load output circuit. When the entire system load is cold started, the AC_L_OUT1 and AC_L_OUT2 signals output by the load startup control circuit are connected to the load output circuit to control the power-on timing of the multiple loads, which can solve the problem of excessive arcing of the relay contacts at the moment of the entire system load cold start, causing the relay contacts to weld and stick. This design is simple, easy to use, safe and reliable. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0014] Figure 1 It is a system principle block diagram of the present invention;

[0015] Figure 2 The load startup control circuit schematic diagram of the present invention. DETAILED DESCRIPTION

[0016] The technical solution of the present invention will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0017] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0018] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0019] The specific implementation of the present invention is described in detail below in conjunction with the accompanying drawings. It should be understood that the specific implementation described here is only used to illustrate and explain the present invention, and is not used to limit the present invention.

[0020] Combination Figure 1 As shown, this embodiment provides a circuit that can reduce the start-up impact current of multiple loads. The circuit mainly includes an AC 220V input circuit, an AC 220V to +12V power module, a +3.3V voltage regulator circuit, a processor circuit, a load start-up control circuit, and a load output circuit. The AC 220V input circuit provides power input for the entire system; the AC 220V to +12V power module provides +12V power input for the entire system; in addition, the +3.3V voltage generated by the +3.3V voltage regulator circuit is used to power the processor, and the start and stop state of the load start-up control circuit is controlled by the CTRL signal output by the processor.

[0021] In the load startup control circuit, the AC_L_OUT1 and AC_L_OUT2 signals output by the load startup control circuit are connected to the load output circuit to control the power-on timing of multiple loads, thereby preventing the relay contacts from arcing excessively at the moment of cold start of the entire system load, causing welding and adhesion of the relay contacts.

[0022] Combination Figure 2As shown, the load startup control circuit includes a second resistor R2, a second optical coupler Q2, a fourth diode D4, a fourteenth relay RLY14, a third resistor R3, a ninth resistor R9, a thirteenth MOS tube Q13, a sixth diode D6, a third relay RLY3, a fifth capacitor C5, a tenth resistor R10, a twentieth resistor R20, a seventh resistor R7, an eighth resistor R8, a first voltage comparator U1, a second capacitor C2, a fourteenth resistor R14, a nineteenth resistor R19, an eighteenth resistor R18, an eleventh transistor Q11, a sixteenth resistor R16, a sixth resistor R6, a seventh MOS tube Q7, a fifth diode D5 and a fifteenth relay RLY15. One end of the second resistor R2 is connected to the CTRL signal output by the processor, and the other end is connected to Pin1 of the second optocoupler Q2. Pin2 of the second optocoupler Q2 is connected to GND, Pin4 is connected to the +12V power supply, Pin3 is connected to one end of the fourth diode D4 and Pin1 of the fourteenth relay RLY14, the other end of the fourth diode D4 is connected to GND, Pin2 of the fourteenth relay RLY14 is connected to GND, Pin5 is connected to AC_L AC 220V input, Pin4 is connected to AC_L_OUT1 first load AC 220V output, Pin3 is floating, and one end of the third resistor R3 is also connected to the CTRL signal output by the processor, and the other end is connected to one end of the ninth resistor R9 and the gate of the thirteenth MOS tube Q13. The other end of the ninth resistor R9 is connected to GND, and the source of the thirteenth MOS tube Q13 is connected to GND, and the drain is connected to one end of the sixth diode D6 and Pin5 of the third relay RLY3. The other end of the sixth diode D6 is connected to GND, and Pin4 of the third relay RLY3 is connected to the processor. The CTRL signal outputted, Pin3 is connected to the +12V power supply, Pin2 is floating, Pin1 is connected to one end of the twentieth resistor R20, one end of the fifth diode D5 and Pin1 of the fifteenth relay RLY15, the other end of the twentieth resistor R20 is connected to one end of the fifth capacitor C5, one end of the tenth resistor R10 and Pin2 of the first voltage comparator U1, the other end of the fifth capacitor C5 is connected to GND, the other end of the tenth resistor R10 is connected to GND, Pin3 of the first voltage comparator U1 is connected to the seventh resistor R7 and the eighth resistor R10, respectively. One end of the resistor R8 is connected, the other end of the seventh resistor R7 is connected to GND, the other end of the eighth resistor R8 is connected to the +12V power supply, and at the same time, Pin5, Pin6 and Pin7 of the first voltage comparator U1 are floating, Pin4 is connected to GND, Pin8 is connected to the +12V power supply and one end of the second capacitor C2, and the other end of the second capacitor C2 is connected to GND. In addition, Pin1 of the first voltage comparator U1 is respectively connected to one end of the fourteenth resistor R14 and the nineteenth resistor R19, and the other end of the fourteenth resistor R14 is connected to the +12V power supply.The other end of the nineteenth resistor R19 is connected to one end of the eighteenth resistor R18 and the base of the eleventh transistor Q11, the other end of the eighteenth resistor R18 is connected to the +12V power supply and the emitter of the eleventh transistor Q11, the collector of the eleventh transistor Q11 is connected to one end of the sixteenth resistor R16, the other end of the sixteenth resistor R16 is connected to one end of the sixth resistor R6 and the gate of the seventh MOS transistor Q7, the other end of the sixth resistor R6 is connected to GND and the source of the seventh MOS transistor Q7, the drain of the seventh MOS transistor Q7 is respectively connected to the other end of the fifth diode D5 and Pin2 of the fifteenth relay RLY15, while Pin5 of the fifteenth relay RLY15 is connected to the AC_L AC 220V input, Pin3 is connected to the AC_L_OUT2 second load AC 220V output, and Pin4 is floating. ,

[0023] When the whole system starts, the AC_L_OUT1 and AC_L_OUT2 signals output by the load startup control circuit are connected to the load output circuit to control the power-on timing of multiple loads. This can solve the problem of excessive arcing of the relay contacts at the moment of cold start of the entire system load, causing welding and adhesion of the relay contacts.

[0024] When the whole system is started, if the CTRL signal output is low level through the processor, the light-controlled thyristor of the second optocoupler Q2 is in the off state, the coil of the fourteenth relay RLY14 is de-energized, its moving contact does not move, the normally closed contact is closed, the normally open contact is opened, the AC_L_OUT1 first load AC 220V output is valid, the first load starts power supply first, and at the same time, because the CTRL signal is low level, the thirteenth MOS tube Q13 is cut off, the coil of the third relay RLY3 is de-energized, its moving contact does not move, the normally closed contact is closed, the normally open contact is opened, the DC +12V output of VCC12_RLY15 is valid, and the voltage divider resistors R10, R20 and R7, R8 act Under the condition that the voltage at the Pin2, i.e., the "-" input terminal of the first voltage comparator U1, is higher than the voltage at the Pin3, i.e., the "+" input terminal, the Pin1 output of the first voltage comparator U1 is low level, the eleventh transistor Q11 is turned on, and then the seventh MOS tube Q7 is turned on, the coil of the fifteenth relay RLY15 is energized, its moving contact is actuated, the normally closed contact is opened, the normally open contact is closed, the AC_L_OUT2 second load AC 220V output is valid, and the second load then starts to supply power, thereby controlling the power-on timing of multiple loads. The system can adjust the startup power supply interval between the first load and the second load through the RC circuit related to the Pin2, i.e., the "-" input terminal of the first voltage comparator U1. If the processor makes the CTRL signal output high, the light-controlled thyristor of the second optocoupler Q2 changes from the off state to the on state, the coil of the fourteenth relay RLY14 is energized, its moving contact is actuated, the normally closed contact is opened, the normally open contact is closed, the AC_L_OUT1 first load AC 220V output is invalid, and the first load stops supplying power. At the same time, because the CTRL signal is high, the thirteenth MOS tube Q13 is turned on, the coil of the third relay RLY3 is energized, its moving contact is actuated, the normally closed contact is opened, the normally open contact is closed, and the VCC12_RLY15 DC The +12V output is invalid. Under the action of the voltage-dividing resistors R10, R20, R7 and R8, the voltage at the Pin2, i.e., the "-" input terminal, of the first voltage comparator U1 is lower than the voltage at the Pin3, i.e., the "+" input terminal. The Pin1 output of the first voltage comparator U1 is high level, the eleventh transistor Q11 is turned off, and then the seventh MOS tube Q7 is turned off, the coil of the fifteenth relay RLY15 loses power, its moving contact is actuated, the normally closed contact resumes closing, the normally open contact resumes opening, the AC 220V output of the second load AC_L_OUT2 is invalid, and the second load stops supplying power.

[0025] The present invention can effectively solve the problem of relay contact welding and adhesion caused by excessive arcing of relay contacts at the moment of cold start of multiple loads. The overall design is simple, easy to use, safe and reliable.

[0026] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A circuit capable of reducing the startup impact current of multiple loads, characterized in that: include: AC 220V input circuit, AC 220V to +12V power module, +3.3V voltage stabilizing circuit, processor, load start control circuit and load output circuit; the AC 220V input circuit provides power input for the entire system; the AC 220V to +12V power module provides +12V power input for the entire system; the +3.3V voltage generated by the +3.3V voltage stabilizing circuit is used to power the processor, and the start and stop state of the load start control circuit is controlled by the CTRL signal output by the processor; the AC_L_OUT1 and AC_L_OUT2 signals output by the load start control circuit are connected to the load output circuit to control the power-on timing of multiple loads, so as to avoid excessive arcing of the relay contacts at the moment of cold start of the entire system load, causing welding and adhesion of the relay contacts; The load startup control circuit includes a second resistor R2, a second optical coupler Q2, a fourth diode D4, a fourteenth relay RLY14, a third resistor R3, a ninth resistor R9, a thirteenth MOS tube Q13, a sixth diode D6, a third relay RLY3, a fifth capacitor C5, a tenth resistor R10, a twentieth resistor R20, a seventh resistor R7, an eighth resistor R8, a first voltage comparator U1, a second capacitor C2, a fourteenth resistor R14, a nineteenth resistor R19, an eighteenth resistor R18, an eleventh transistor Q11, a sixteenth resistor R16, a sixth resistor R6, a seventh MOS tube Q7, a fifth diode D5 and a fifteenth relay RLY15; Among them, one end of the second resistor R2 is connected to the CTRL signal output by the processor, and the other end is connected to Pin1 of the second optical coupler Q2, while Pin2 of the second optical coupler Q2 is connected to GND, Pin4 is connected to the +12V power supply, Pin3 is connected to one end of the fourth diode D4 and Pin1 of the fourteenth relay RLY14, the other end of the fourth diode D4 is connected to GND, while Pin2 of the fourteenth relay RLY14 is connected to GND, Pin5 is connected to AC_L AC 220V input, Pin4 is connected to AC_L_OUT1 first load AC 220V output, Pin3 is floating, and one end of the third resistor R3 is also connected to the CTRL signal output by the processor. The 13th MOS tube Q13 is connected to the RL signal, and the other end is connected to one end of the ninth resistor R9 and the gate of the 13th MOS tube Q13. The other end of the ninth resistor R9 is connected to GND. At the same time, the source of the 13th MOS tube Q13 is connected to GND, and the drain is connected to one end of the sixth diode D6 and Pin5 of the third relay RLY3. The other end of the sixth diode D6 is connected to GND. At the same time, Pin4 of the third relay RLY3 is connected to the CTRL signal output by the processor, Pin3 is connected to the +12V power supply, Pin2 is floating, Pin1 is connected to one end of the 20th resistor R20, one end of the fifth diode D5 and Pin1 of the fifteenth relay RLY15, and the second The other end of the tenth resistor R20 is connected to one end of the fifth capacitor C5, one end of the tenth resistor R10 and Pin2 of the first voltage comparator U1, the other end of the fifth capacitor C5 is connected to GND, the other end of the tenth resistor R10 is connected to GND, Pin3 of the first voltage comparator U1 is respectively connected to one end of the seventh resistor R7 and the eighth resistor R8, the other end of the seventh resistor R7 is connected to GND, the other end of the eighth resistor R8 is connected to the +12V power supply, and Pin5, Pin6 and Pin7 of the first voltage comparator U1 are floating, Pin4 is connected to GND, Pin8 is connected to the +12V power supply and one end of the second capacitor C2, and the other end of the second capacitor C2 is connected to GND. In addition, Pin1 of the first voltage comparator U1 is respectively connected to the fourteenth resistor R14 and one end of the nineteenth resistor R19, the other end of the fourteenth resistor R14 is connected to the +12V power supply, the other end of the nineteenth resistor R19 is connected to one end of the eighteenth resistor R18 and the base of the eleventh transistor Q11, the other end of the eighteenth resistor R18 is connected to the +12V power supply and the emitter of the eleventh transistor Q11, the collector of the eleventh transistor Q11 is connected to one end of the sixteenth resistor R16, the other end of the sixteenth resistor R16 is connected to one end of the sixth resistor R6 and the gate of the seventh MOS transistor Q7, the other end of the sixth resistor R6 is connected to GND and the source of the seventh MOS transistor Q7,The drain of the seventh MOS tube Q7 is respectively connected to the other end of the fifth diode D5 and Pin2 of the fifteenth relay RLY15, while Pin5 of the fifteenth relay RLY15 is connected to the AC_L AC 220V input, Pin3 is connected to the AC_L_OUT2 second load AC 220V output, and Pin4 is floating.

Citation Information

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