Semiconductor device

Abstract

The semiconductor device of the embodiment includes a first electrode having a first plate portion including a first surface and a second surface opposite to the first surface; a plurality of semiconductor chips disposed on the second surface; and a second electrode having a second plate portion disposed on the plurality of semiconductor chips, including a third surface opposite to the second surface and a fourth surface opposite to the third surface, the second plate portion including a plurality of convex portions disposed between the plurality of semiconductor chips and the third surface, connected to the third surface, and each having a top surface in a plane parallel to the second surface and having the same shape as the semiconductor chips, the second plate portion having a second outer diameter larger than a first diameter, the first diameter being a diameter of a smallest circle circumscribing a plurality of the convex portions disposed at the outermost side among the plurality of convex portions in a plane parallel to the third surface; and a third plate portion including a fifth surface connected to the fourth surface and a sixth surface opposite to the fifth surface, and having a third outer diameter smaller than or equal to the first diameter.

Description

[0001] Related applications

[0002] This application enjoys priority based on Japanese Patent Application No. 2020-158215 (filed on September 23, 2020). This application incorporates the entire contents of that basic application by reference. Technical Field

[0003] The implementation involves a semiconductor device. Background Technology

[0004] Press-fit semiconductor devices achieve increased power density and high reliability under high voltage and high current conditions due to heat dissipation from both sides. A press-fit semiconductor device has a structure in which multiple semiconductor elements are sandwiched between upper and lower electrode blocks. Internal electrical contact is maintained by applying pressure to the upper and lower electrode blocks from the outside.

[0005] Heat is generated during the use of press-fit semiconductor devices. Therefore, it is necessary to reduce the thermal resistance within press-fit semiconductor devices. Summary of the Invention

[0006] The embodiments of the present invention provide a highly reliable semiconductor device.

[0007] One embodiment of a semiconductor device includes: a first electrode having a first plate portion having a first surface and a second surface facing the first surface; a plurality of semiconductor chips disposed on the second surface; a second electrode having a second plate portion and a third plate portion, the second plate portion being disposed on the plurality of semiconductor chips and having a third surface facing the second surface and a fourth surface facing the third surface, the second plate portion having a plurality of protrusions disposed between each of the plurality of semiconductor chips and the third surface, connected to the third surface, and each having a top surface of the same shape as the semiconductor chip in a plane parallel to the second surface, the second plate portion having a second outer diameter larger than a first diameter, the first diameter being the diameter of the smallest circle circumscribed by the outermost of the plurality of protrusions in a plane parallel to the third surface; the third plate portion having a fifth surface connected to the fourth surface and a sixth surface facing the fifth surface, and having a third outer diameter less than the first diameter. Attached Figure Description

[0008] Figures 1A-1C This is a schematic diagram of the semiconductor device according to the first embodiment.

[0009] Figures 2A-2B This is a schematic cross-sectional view of the semiconductor chip according to the first embodiment.

[0010] Figure 3 This is an example of a schematic cross-sectional view of the semiconductor device of the first embodiment.

[0011] Figure 4 This is an example of a schematic cross-sectional view of the semiconductor device of the first embodiment.

[0012] Figure 5 This is an example of a schematic cross-sectional view of the semiconductor device of the first embodiment.

[0013] Figure 6 This is an example of a schematic cross-sectional view of the semiconductor device of the first embodiment.

[0014] Figures 7A-7C This is a schematic diagram of a semiconductor device as a comparative embodiment of the first embodiment.

[0015] Figures 8A-8B This is a schematic diagram illustrating the effects of the semiconductor device according to the first embodiment.

[0016] Figures 9A-9B This is a schematic cross-sectional view of the semiconductor device according to the second embodiment.

[0017] Figures 10A-10C This is a schematic cross-sectional view of the semiconductor device according to the third embodiment. Detailed Implementation

[0018] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. Furthermore, in the following description, the same reference numerals will be used to denote the same parts, and descriptions of parts that have already been described once will be omitted as appropriate.

[0019] In this specification, to indicate the positional relationship of components, the upper direction in the accompanying drawings is described as "upper," and the lower direction is described as "lower." In this specification, the concepts of "upper" and "lower" do not necessarily refer to their relationship with the direction of gravity.

[0020] (First Embodiment)

[0021] The semiconductor device of this embodiment includes: a first electrode having a first plate portion having a first surface and a second surface facing the first surface; a plurality of semiconductor chips disposed on the second surface; and a second electrode having a second plate portion and a third plate portion, the second plate portion being disposed on the plurality of semiconductor chips and having a third surface facing the second surface and a fourth surface facing the third surface. The second plate portion has a plurality of protrusions disposed between each of the plurality of semiconductor chips and the third surface, connected to the third surface, and each having a top surface with the same shape as the semiconductor chip in a plane parallel to the second surface. The second plate portion has a second outer diameter larger than a first diameter, the first diameter being the diameter of the smallest circle circumscribed by the outermost of the plurality of protrusions in a plane parallel to the third surface; the third plate portion has a fifth surface connected to the fourth surface and a sixth surface facing the fifth surface, and has a third outer diameter less than the first diameter.

[0022] Figures 1A-1C This is a schematic diagram of the semiconductor device 100 according to this embodiment. Figure 1A This is a schematic cross-sectional view of the semiconductor device 100 of this embodiment. Figure 1B This is a schematic cross-sectional view of the semiconductor device 100 of this embodiment. Figure 1C This is a schematic bottom view of the third surface 66 of the second plate portion 64 of the semiconductor device 100 according to this embodiment. More specifically, Figure 1A yes Figure 1C A schematic cross-sectional view of the semiconductor device 100 at the B-B' section shown. Figure 1B yes Figure 1C A schematic cross-sectional view of the semiconductor device 100 at section A-A' shown.

[0023] Figures 2A-2B This is a schematic cross-sectional view of the semiconductor chip 40 in this embodiment.

[0024] use Figures 1A-1C as well as Figures 2A-2B The semiconductor device 100 of this embodiment will be described.

[0025] The semiconductor device 100 in this embodiment is a press-fit semiconductor device.

[0026] The semiconductor device 100 includes a first electrode 10, a first buffer 30, a semiconductor chip 40, a second buffer 50, and a second electrode 60.

[0027] The first electrode 10 has a first plate portion 12 and a fourth plate portion 18. The first electrode 10 is, for example, an electrode containing a metal such as Cu (copper).

[0028] The first plate portion 12 is, for example, a plate-shaped component. The first plate portion 12 is, for example, a component having a cylindrical shape. The first plate portion 12 has a first surface 14 and a second surface 16 opposite to the first surface 14. Here, for example, the first surface 14 and the second surface 16 are provided in a plane perpendicular to the Z-axis.

[0029] The first buffer portion 30 is provided on the second surface 16 of the first plate portion 12. The first buffer portion 30 is provided to alleviate the thermal stress on the semiconductor chip 40 when the first electrode 10 and the second electrode 60 are pressed together. The first buffer portion 30 may contain, for example, a conductive metal such as Mo (molybdenum).

[0030] A semiconductor chip 40 is disposed on the first buffer portion 30. The semiconductor chip 40 has a first chip electrode 42, a semiconductor element region 44 disposed on the first chip electrode 42, and a second chip electrode 46 disposed on the semiconductor element region 44. For example, the semiconductor chip 40 may have the same number of protrusions 62 as described later. The semiconductor chip 40 may be, for example, an IGBT (Insulated Gate Bipolar Transistor). When the semiconductor chip 40 is an IGBT, for example, the first chip electrode 42 is the collector electrode, and the second chip electrode 46 is the emitter electrode. However, the semiconductor chip 40 is not limited to an IGBT and may also be a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) or a diode. For example, the first chip electrode 42, the semiconductor element region 44, and the second chip electrode 46 may be rectangular in shape in a plane perpendicular to the Z-axis or in a plane parallel to the second plane 16. However, the shapes of the first chip electrode 42, the semiconductor element region 44, and the second chip electrode 46 in the plane perpendicular to the Z-axis are not limited to rectangles.

[0031] exist Figure 2A In the semiconductor chip 40 shown, to ensure the surface distance, the size of the semiconductor element region 44 and the second chip electrode 46 is smaller than the size of the first chip electrode 42. However, it is also possible to... Figure 2B As shown in the semiconductor chip 40, the first chip electrode 42, the semiconductor element region 44, and the second chip electrode 46 are the same size.

[0032] The second electrode 60 has a protrusion 62, a second plate portion 64, and a third plate portion 70. The second electrode 60 is, for example, an electrode containing a metal such as Cu (copper).

[0033] A second plate portion 64 is disposed on the semiconductor chip 40. The second plate portion 64 has a third surface 66 and a fourth surface 68 opposite to the third surface 66. The third surface 66 is opposite to the second surface 66. In addition, the second plate portion 64 has a plurality of protrusions 62. The plurality of protrusions 62 are disposed between each of the plurality of semiconductor chips 40 and the third surface 66. Furthermore, the plurality of protrusions 62 are connected to the third surface 66.

[0034] like Figure 1C As shown, the second plate portion 64 has, for example, a total of 21 protrusions 62. However, the number of protrusions 62 is not limited to this. When the shape of the semiconductor chip 40 is rectangular, the top surface 62a of the protrusions 62 in the plane perpendicular to the Z-axis or in the plane parallel to the second surface 16 has the same rectangular shape as the semiconductor chip 40. For example, in the use of Figure 2AIn the case of the semiconductor chip 40 shown, the top surface 62a of the protrusion 62 in the plane perpendicular to the Z-axis or in the plane parallel to the second plane 16 has the same rectangular shape as the second chip electrode 46 of the semiconductor chip 40. Additionally, for example, when using... Figure 2B In the case of the semiconductor chip 40 shown, the top surface 62a of the protrusion 62 in the plane perpendicular to the Z-axis or in the plane parallel to the second plane 16 has the same rectangular shape as the first chip electrode 42, the semiconductor element region 44 and the second chip electrode 46 of the semiconductor chip 40.

[0035] The second plate portion 64 has a first diameter L1 that is larger than the diameter of the protrusion 62 in the plane parallel to the third surface 66. Figure 1C The larger second outer diameter d2. Here, the first diameter L1 of the protrusion 62 is the diameter of the smallest circle that circums the outermost of the plurality of protrusions 62 in a plane parallel to the third surface 66. Furthermore, inside this circle, the protrusions 62 are arranged, for example, in a matrix.

[0036] The third plate portion 70 has a fifth surface 72 and a sixth surface 74. For example, the fifth surface 72 and the sixth surface 74 are disposed in a plane perpendicular to the Z-axis. The fifth surface 72 is connected to the fourth surface 68 of the second plate portion 64. The third plate portion 70 has a third outer diameter d3 less than or equal to the first diameter L1.

[0037] A second buffer portion 50 is disposed between each semiconductor chip 40 and each protrusion 62. In the semiconductor device 100 of this embodiment, a plurality of second buffer portions 50 are provided. However, the form of the second buffer portion 50 is not limited thereto. The second buffer portion 50 is provided to alleviate the thermal stress experienced by the semiconductor chip 40 when the first electrode 10 and the second electrode 60 are pressed together. The second buffer portion 50 may contain, for example, a conductive metal such as Mo (molybdenum). For example, the shape and size of each second buffer portion 50 in the plane perpendicular to the Z-axis are the same as the shape and size of each semiconductor chip 40 in the plane perpendicular to the Z-axis.

[0038] In addition, Figure 1C In the plane perpendicular to the Z-axis, that is, in other words, in the plane parallel to the second surface 16, the shape and dimensions of the first buffer portion 30 are the same as those of the second surface 16 of the first plate portion 12 in the plane perpendicular to the Z-axis. Furthermore, the shape and dimensions of the second buffer portion 50 in the plane perpendicular to the Z-axis are the same as those of the top surface 62a of the protrusion 62 in the plane perpendicular to the Z-axis. However, the shapes of the first buffer portion 30 and the second buffer portion 50 are not limited to these.

[0039] Alternatively, a resin support (not shown) may be provided around the semiconductor chip 40, the second buffer portion 50, and the protrusion 62. Additionally, a ceramic insulating component (not shown) may be provided around the semiconductor device 100.

[0040] Figure 3 as well as Figure 4 This is an example of a schematic cross-sectional view of the semiconductor device 100 of this embodiment. Preferably, a first virtual straight line is drawn from the outermost end 62b of the outermost of the plurality of protrusions 62, intersecting the center 66a of the third surface 66 on the side of the fourth surface 68, and extending at a 45-degree angle relative to the third surface 66, through the third plate portion 70. Figure 3 This is an example where the third outer diameter d3 of the third plate portion 70 is equal to the first diameter L1. The first virtual straight line passes through the third plate portion 70. Figure 4 This is an example where the first virtual straight line passes through the upper end of the side 75 of the third plate 70. The third outer diameter d3 is... Figure 4 In the example shown, in the case of a small number of cases, the first virtual straight line does not pass through the third plate section 70.

[0041] The fourth plate portion 18 has a seventh surface 20 and an eighth surface 22. The eighth surface 22 of the fourth plate portion 18 is connected to the first surface 14 of the first plate portion 12. The fourth plate portion 18 has a fourth outer diameter d4 of a second diameter L2 or less. This second diameter L2 is the diameter of the smallest circle that circums the outermost of the plurality of semiconductor chips 40 in a plane parallel to the second surface 16 of the first plate portion 12. In this embodiment, the first diameter L1 and the second diameter L2 are assumed to be equal for explanation.

[0042] Figure 5 as well as Figure 6 This is an example of a schematic cross-sectional view of the semiconductor device 100 according to this embodiment. Preferably, a second virtual straight line is drawn from the outermost end 40a of the semiconductor chip 40 in a plane perpendicular to the Z-axis or in a plane parallel to the second surface 16 of the first plate portion 12, at a 45-degree angle relative to the second surface 16, intersecting the center 16a of the second surface 16 on the side of the first surface 14, and passing through the fourth plate portion 18. Here, the second virtual straight line is drawn from, for example, the lower surface of the semiconductor chip 40. Figure 5 This is an example where the fourth outer diameter d4 of the fourth plate portion 18 is equal to the second diameter L2. The second virtual straight line passes through the fourth plate portion 18. Figure 6 This is an example of the second virtual straight line passing through the lower end of the side 15 of the fourth plate portion 18. The fourth outer diameter d4 is... Figure 6 In the example shown, in the case of a small number of cases, the first virtual straight line does not pass through the fourth plate section 18.

[0043] The shapes of the first plate portion 12, the second plate portion 64, the third plate portion 70, and the fourth plate portion 18 in the plane perpendicular to the Z-axis are, for example, circles. However, the shapes of the first plate portion 12, the second plate portion 64, the third plate portion 70, and the fourth plate portion 18 in the plane perpendicular to the Z-axis may also be, for example, shapes with chamfered corners relative to square or rectangular shapes.

[0044] The first plate portion 12 and the fourth plate portion 18 are formed integrally from a single metal block by mechanical grinding or the like.

[0045] The protrusion 62, the second plate 64, and the third plate 70 are formed integrally from a single metal block by mechanical grinding or the like.

[0046] Next, the effects of the semiconductor device 100 in this embodiment will be described.

[0047] Figures 7A-7C This is a schematic diagram of a semiconductor device 1000 as a comparative embodiment of this invention. In the semiconductor device 1000, the fourth plate portion 18 and the third plate portion 70 are not provided. In this case, the semiconductor device 1000 is press-fitted from above and below using the first electrode block B1 and the second electrode block B2. Figure 7A When the second plate portion 64, which is located outside the protrusion 62, is not able to maintain its planarity, it deforms downwards (droops). Figure 7B The area where the second plate 64 deforms downwards is, for example, as shown in the example... Figure 7C As shown, the components are distributed on the outer side of the second plate portion 64. At this time, particularly in the portion further outward than the protrusion 62, there is a problem of insufficient pressure. Consequently, the thermal resistance of the semiconductor chip 40 located below the portion outside the protrusion 62 becomes high, potentially leading to damage to the semiconductor chip 40.

[0048] Therefore, the semiconductor device 100 of this embodiment includes: a first electrode 10 having a first plate portion 12, the first plate portion 12 having a first surface 14 and a second surface 16 opposite to the first surface 14; a plurality of semiconductor chips 40 disposed on the second surface 16; and a second electrode 60 having a second plate portion 64 and a third plate portion 70, the second plate portion 64 being disposed on the plurality of semiconductor chips 40, having a third surface 66 opposite to the second surface 16 and a fourth surface 68 opposite to the third surface 66, the second plate portion 64 having a plurality of protrusions 62 disposed on the plurality of semiconductor chips 40. Each of the chip 40 has a top surface 62a of the same shape as the semiconductor chip 40, which is connected to the third surface 66 and is in a plane parallel to the second surface 16. The second plate portion 64 has a second outer diameter d2 that is larger than the first diameter L1. The first diameter L1 is the diameter of the smallest circle that is connected to the outermost of the plurality of protrusions 62 in a plane parallel to the third surface 66. The third plate portion 70 has a fifth surface 72 connected to the fourth surface 68 and a sixth surface 74 opposite to the fifth surface 72, and has a third outer diameter d3 that is less than the first diameter L1.

[0049] In order to suppress pressure loss with a simple structure, the semiconductor device 100 of this embodiment is provided with a protrusion 62 having a top surface 62a of the same shape as the semiconductor chip 40 in a plane parallel to the second surface 16. In addition, a third plate portion 70 as described above is provided.

[0050] Figures 8A-8B This diagram illustrates the effect of the semiconductor device according to this embodiment. The third plate portion 70 is directly pressed by the second electrode block B2. Here, the third outer diameter d3 of the third plate portion 70 is less than or equal to the first diameter L1. Therefore, the second plate portion 64 on the outer side of the protrusion 62 is less likely to deform downwards. Therefore, pressure loss in the semiconductor chip 40 is less likely to occur. Therefore, a highly reliable semiconductor device can be provided.

[0051] Furthermore, even with the third plate 70, there are no significant changes such as volume variations around the protrusion 62 and the semiconductor chip 40. Therefore, pressure loss can be easily suppressed.

[0052] Furthermore, preferably, a first virtual straight line is drawn from the outermost end 62b of the outermost protrusion 62 among the plurality of protrusions 62, intersecting the fourth surface 68 side with a perpendicular line from the center 66a of the third surface 66, and extending at a 45-degree angle relative to the third surface 66, through the third plate portion 70. It is assumed that the pressure applied to the third plate portion 70 by the second electrode block B2 is dispersed within a range of 45 degrees downward relative to the vertical. Therefore, if the third plate portion 70 exists within the aforementioned range, it is less likely to apply pressure to the second plate portion 64 outside the protrusion 62, and pressure loss in the semiconductor chip 40 is suppressed.

[0053] Furthermore, when the first plate portion 12 is pressed by the first electrode block B1, there is a problem that the first plate portion 12 on the outer side of the semiconductor chip 40 deforms upward. As a result, the thermal resistance of the semiconductor chip 40 below the portion located on the outer side of the protrusion 62 increases, which may lead to damage to the semiconductor chip 40.

[0054] Therefore, preferably, the first electrode 10 has a fourth plate portion 18, which has a fourth outer diameter d4 less than or equal to the second diameter L2, and is connected to the first surface 14. The second diameter L2 is the diameter of the smallest circle that circums the outermost of the plurality of semiconductor chips 40 in a plane parallel to the second surface 16. The fourth plate portion 18 is directly pressed by the first electrode block B1. Here, the fourth outer diameter d4 of the fourth plate portion 18 is less than or equal to the second diameter L2. Therefore, the first plate portion 12 on the outer side of the semiconductor chip 40 is less likely to deform upwards. Therefore, pressure loss of the semiconductor chip 40 is less likely to occur. Therefore, a semiconductor device with high reliability can be provided.

[0055] Furthermore, even with the fourth plate portion 18, there are no significant changes such as volume variations around the protrusion 62 and the semiconductor chip 40. Therefore, pressure loss can be easily suppressed.

[0056] Furthermore, preferably, a second virtual straight line is drawn from the outermost end 40a of the outermost semiconductor chip among the plurality of semiconductor chips 40, intersecting the center 16a of the second surface 16 on the side of the first surface 14 at a 45-degree angle relative to the second surface 16, and passes through the fourth plate portion 18. It is assumed that the pressure applied to the fourth plate portion 18 by the first electrode block B1 is dispersed within a range of 45 degrees relative to the vertical. Therefore, if the fourth plate portion 18 exists within the above-mentioned range, it is not easy to apply pressure to the first plate portion 12 on the outer side of the plurality of semiconductor chips 40, and the lack of pressure on the semiconductor chips 40 is suppressed.

[0057] The semiconductor device 100 according to this embodiment can provide a semiconductor device with high reliability.

[0058] (Second Implementation)

[0059] The semiconductor device of this embodiment includes: a first electrode having a first plate portion having a first surface and a second surface facing the first surface; a plurality of semiconductor chips disposed on the second surface; and a second electrode disposed on the plurality of semiconductor chips, having a second plate portion having a third surface facing the second surface and a fourth surface facing the third surface. The second electrode has a plurality of protrusions disposed between and connected to the third surface of each of the plurality of semiconductor chips. The second plate portion has a second outer diameter equal to a first diameter, which is the diameter of the smallest circle circumscribed by the outermost of the plurality of protrusions in a plane parallel to the third surface. Descriptions repeated in the first embodiment are omitted here.

[0060] Figures 9A-9B This is a schematic cross-sectional view of the semiconductor device 110 of this embodiment.

[0061] The second plate portion 64 has a second outer diameter d2 equal to the first diameter L1. The first diameter L1 is the diameter of the smallest circle that circums the outermost of the plurality of protrusions 62 in a plane parallel to the third surface 66. Similarly, the first outer diameter d1 of the first plate portion 12 is equal to the second diameter L2, which is the diameter of the smallest circle that circums the outermost of the plurality of semiconductor chips 40 in a plane parallel to the second surface 16. In this embodiment, the first diameter L1 and the second diameter L2 will be described as equal.

[0062] The second outer diameter d2 of the second plate portion 64 is equal to the first diameter L1. Furthermore, the first outer diameter d1 of the first plate portion 12 is equal to the second diameter L2. Additionally, in... Figures 9A-9B In the given information, d2 = L1 = L2 = d1.

[0063] The second plate portion 64 on the outer side of the protrusion 62 of the semiconductor device 110 in this embodiment is also less likely to deform downwards. Furthermore, the first plate portion 12 on the outer side of the semiconductor chip 40 is less likely to deform upwards. Therefore, the loss of pressure on the semiconductor chip 40 is suppressed.

[0064] The semiconductor device 110 of this embodiment can also provide a highly reliable semiconductor device.

[0065] (Third Implementation)

[0066] The semiconductor device of this embodiment includes: a first electrode having a first plate portion having a first surface and a second surface facing the first surface; a plurality of semiconductor chips disposed on the second surface; and a second electrode having a second plate portion and a fifth plate portion, the second plate portion being disposed on the plurality of semiconductor chips and having a third surface facing the second surface and a fourth surface facing the third surface, the second plate portion having a plurality of protrusions disposed between and connected to the third surface of each of the plurality of semiconductor chips, the second plate portion having a second outer diameter larger than a first diameter, the first diameter being the diameter of the smallest circle circumscribed in a plane parallel to the third surface and circumscribed by the outermost of the plurality of protrusions; and a fifth plate portion disposed between the end of the third surface and the third surface of the plurality of protrusions. Descriptions repeated in the first and second embodiments are omitted here.

[0067] Figures 10A-10C This is a schematic cross-sectional view of the semiconductor device 120 of this embodiment.

[0068] A fifth plate portion 80 is provided on the third surface 66, between the end 66b of the third surface 66 and the outermost of the plurality of protrusions 62. Specifically, the fifth plate portions 80a, 80b, 80c and 80d are provided as the fifth plate portions 80.

[0069] With the fifth plate portion 80, the second plate portion 64 located outside the outermost protrusion 62 among the plurality of protrusions 62 is less likely to deform downward. Therefore, the lack of pressure on the semiconductor chip 40 is suppressed.

[0070] Furthermore, it is preferable that the fifth plate portion 80 contacts the outer side surface 62c of the outermost of the plurality of protrusions 62. This is because, by the contact between the fifth plate portion 80 and the outer side surface 62c of the protrusion 62, the strength of the second plate portion 64 on the outer side of the protrusion 62 is further increased, making it less prone to downward deformation.

[0071] In addition, in order to increase the strength of the second plate portion 64 on the outer side of the protrusion 62, it is preferable that the height t of the fifth plate portion 80 in the direction perpendicular to the third surface 66 is more than 20% of the height h of the protrusion 62 in the direction perpendicular to the third surface 66.

[0072] The semiconductor device 120 of this embodiment can also provide a highly reliable semiconductor device.

[0073] Several embodiments and examples of the present invention have been described, but these embodiments and examples are provided as examples and are not intended to limit the scope of the invention. These new embodiments can be implemented in various other ways, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, and are included within the scope of the invention as described in the claims and its equivalents.

Claims

1. A semiconductor device comprising: The first electrode has a first plate portion, which has a first surface and a second surface opposite to the first surface; Multiple semiconductor chips are disposed on the second surface; and The second electrode has a second plate portion and a fifth plate portion: The second plate is disposed on the plurality of semiconductor chips and has a third surface facing the second surface and a fourth surface opposite to the third surface. The second plate has a plurality of protrusions disposed between each of the plurality of semiconductor chips and the second plate, protruding from the third surface. The second plate has a second outer diameter larger than a first diameter, which is the diameter of the smallest circle circumscribed in a plane parallel to the third surface and circumscribed by the outermost of the plurality of protrusions. The fifth plate is disposed between the first electrode and the second plate, and the end of the third surface is disposed between the outermost of the plurality of protrusions. The side of the fifth plate portion contacts the side of the outermost of the plurality of protrusions.

2. The semiconductor device according to claim 1, wherein, The height of the fifth plate portion in the direction perpendicular to the third surface is more than 20% of the height of the protrusion in the direction perpendicular to the third surface.

3. The semiconductor device according to claim 1, wherein, Each of the protrusions has a top surface that has the same dimensions as each of the semiconductor chips in a plane parallel to the second surface.

4. The semiconductor device according to claim 1, wherein, The side of the fifth plate is in direct contact with the side of the outermost of the plurality of protrusions.

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