Controlling power dissipation in output stages of test channels

Abstract

An example test system includes an output stage to supply at least one of a voltage or a current to a channel of a test instrument, a tracking circuit to detect a channel voltage after the output stage and to control a supply voltage to the output stage based on the channel voltage, and a controller to determine a power dissipation of the output stage based on the supply voltage and the channel voltage and to control the output stage based on the power dissipation in the output stage.

Description

TECHNICAL FIELD

[0001] This specification describes example implementations of a test system configured to control power dissipation in an output stage of a test channel. BACKGROUND

[0002] Test systems are configured to test the operation of electronic devices such as microprocessors and memory chips. Testing can include sending signals to a device and determining how the device reacts to these signals based on its response. For example, testing can include imposing a voltage and current onto a test channel and receiving a signal from the device based on the imposed voltage and current. The reaction of the device will determine whether the device passes or fails the test. SUMMARY

[0003] An example test system includes an output stage to supply at least one of a voltage or a current to a channel of a test instrument; a tracking circuit to detect a channel voltage after the output stage and to control a supply voltage to the output stage based on the channel voltage; and a controller to determine a power dissipation of the output stage based on the supply voltage and the channel voltage and to control the output stage based on the power dissipation in the output stage. An example test system can include one or more of the following features, alone or in combination.

[0004] Controlling the supply voltage can include adjusting the supply voltage to track changes in the channel voltage. The output stage can operate based on an overhead voltage. Controlling the supply voltage can include limiting the supply voltage to a value based on a sum of the channel voltage and the overhead voltage. The value of the supply voltage can be equal to the sum of the channel voltage and the overhead voltage.

[0005] An example test system can include a current sensor to detect an output current from the output stage. The controller can include a compensator circuit configured to determine the power dissipation based also on the output current. The compensator circuit can be configured to determine the power dissipation by performing operations including obtaining a difference voltage between the supply voltage and the channel voltage and obtaining a product of the output current and the difference voltage. The compensator circuit can be configured to determine the power dissipation over time and to determine whether the power dissipation is acceptable over the time. The output stage can be controlled based on whether the power dissipation is acceptable over the time. The compensator circuit can be configured to control the output stage by discontinuing operation of the output stage in response to the power dissipation exceeding an acceptable limit for a period of time. The compensator circuit can be configured to compare the power dissipation to a predefined power dissipation and to control the output stage by discontinuing operation of the output stage if the power dissipation exceeds the predefined power dissipation.

[0006] The tracking circuit can be configured to provide an input voltage to the output stage. At least one of the voltage or current supplied by the test system onto the channel can be based on the input voltage. Controlling the output stage can include varying the input voltage based on power dissipation. The tracking circuit can be configured to vary the supply voltage over a duration of single-digit or double-digit microseconds in which the channel voltage being tracked varies. The tracking circuit can be configured to control the supply voltage to limit a voltage difference between the supply voltage and the channel voltage.

[0007] The supplied voltage can be at least 100 volts, and the supplied current can be at least 2 ampere pulse current. The size of the output stage can be proportional to a difference between the supply voltage and the channel voltage at a maximum current through the output stage. A reduction in the difference between the supply voltage and the channel voltage at the maximum current can enable a reduction in the size of the output stage. The smaller the size of the output stage, the less power dissipation the output stage will tolerate. The maximum power dissipation of the output stage can be based on the supply voltage, the channel voltage, and the current from the output stage.

[0008] An example test system includes test instruments for sending signals to and receiving signals from devices under test (DUTs). Each test instrument can include one or more channels. A channel of the one or more channels can include an output stage for supplying at least one of a voltage or a current. A device interface board (DIB) can be used to electrically and mechanically connect one or more of the test instruments to the DUTs. A computing system can be configured (e.g., programmed) to control operation of one or more of the test instruments. The channel can include a tracking circuit to limit a voltage difference between a supply voltage to the output stage and a channel voltage on the channel, and a controller to control the output stage based on power dissipation in the output stage. An example test system can include one or more of the following features, alone or in combination.

[0009] An output stage can be configured to receive an input voltage and to supply at least one of a voltage or a current based on the input voltage. A controller can be configured to control the output stage by varying the input voltage. The controller can include a compensator circuit configured to determine power dissipation in the output stage by performing operations including obtaining a difference voltage between a supply voltage and a channel voltage, and obtaining a product of the difference voltage and a channel current on the channel. The controller can be configured to determine power dissipation over time and to determine whether the power dissipation is acceptable over the time. The controller can be configured to control the output stage based on whether the power dissipation is acceptable. The controller can be configured to control the output stage by interrupting operation of the output stage in response to the power dissipation exceeding an acceptable limit for a period of time. The controller can be configured to compare the power dissipation to a predefined power dissipation and to control the output stage by interrupting operation of the output stage if the power dissipation exceeds the predefined power dissipation. Interrupting operation of the output stage can include adjusting a voltage input to the output stage from the controller.

[0010] A size of the output stage can be proportional to a difference between the supply voltage and the channel voltage at a maximum current through the output stage. A reduction in the difference between the supply voltage and the channel voltage at the maximum current can enable a reduction in the size of the output stage. The smaller the size of the output stage, the less power dissipation the output stage will tolerate, where a maximum power dissipation of the output stage is based on the supply voltage, the channel voltage, and a current from the output stage.

[0011] Any two or more of the features described in this specification, including in this summary section, can be combined to form specific embodiments of the specification.

[0012] At least a portion of the test systems and processes described in this specification can be configured or controlled by executing instructions stored on one or more non-transitory machine-readable storage media on one or more processing devices. Examples of non-transitory machine-readable storage media include read-only memory, optical disk drives, memory disk drives, and random access memory. At least a portion of the test systems and processes described in this specification can be configured or controlled using a computing system composed of one or more processing devices and memory storing instructions that can be executed by the one or more processing devices to perform various control operations.

[0013] The details of one or more specific embodiments are set forth in the accompanying drawings and the detailed description below. Other features and advantages will be apparent from the detailed description, the drawings, and the claims. BRIEF DESCRIPTION OF DRAWINGS

[0014] Figure 1 is a block diagram of an example test system.

[0015] Figure 2 is a block diagram of components included in Figure 1 an exemplary test channel in a test system.

[0016] Figure 3 is a flowchart showing operations in an exemplary process for controlling power dissipation in an output stage of a test channel.

[0017] Like reference numbers in different figures indicate like elements. DETAILED DESCRIPTION

[0018] Exemplary implementations of a test system configured to control power dissipation in an output stage of a test channel are described herein. In some cases, a test channel includes one or more physical media through which signals are sent from the test system to a device under test (DUT) and through which signals are received from the DUT. The test channel includes a conductive medium at least partially between the test system and the DUT. The test channel can also include a wireless medium or an optical medium partially between the test system and the DUT.

[0019] Each exemplary test channel includes an output stage. In some implementations, the output stage includes a power amplifier circuit (also referred to herein as a “power amplifier”) for imposing a voltage (V) and a current (I) onto the test channel. For example, a user can specify a voltage or a current to be provided on the test channel. A controller is configured to provide an input to the output stage to control an amount of voltage or current provided by the output stage to the test channel based on the user’s specification. An example of the controller includes a compensator circuit, which can be or include an analog compensator circuit or a digital compensator circuit.

[0020] The output stage also receives a supply voltage. The supply voltage includes a voltage that powers the output stage. The supply voltage is different from the received input that is used to control the voltage or current output to the test channel.

[0021] Generally, the physical size of the output stage is proportional to the power dissipation in the output stage. The power dissipation in the output stage is based on a difference between the supply voltage provided to the output stage and the voltage on the test channel provided by the output stage at a maximum current from the output stage. The maximum current is used in this calculation because it results in the maximum power dissipation that the output stage should support for different voltages.

[0022] Traditionally, the magnitude of the supply voltage is set to accommodate the wide range of voltage and current outputs of the output stage. In an example, the supply voltage of the output stage can be 110 volts (V). However, in some cases, the output stage can need to be controlled to output only 2 V onto a test channel. The power dissipation in the output stage is based on the difference between 110 V and 2 V. In an example, where the current through the output stage is 1 amp (A), the power dissipation in the output stage is (110 V - 2 V)*(1 A), which is 108 watts (W). To accommodate such a magnitude of power dissipation, the output stage is relatively large. A larger sized output stage can support a larger power dissipation. An output stage that is too small for a given power dissipation will be damaged by the power dissipation. Thus, in the foregoing example, the output stage can occupy 1000 square millimeters (mm 2 ) of area on a printed circuit board (PCB) connected to the test channel.

[0023] Large scale output stages can limit the amount of devices that can be tested by a test system because large scale output stages occupy a large amount of space. To enable higher density testing, the size of the output stage can be reduced. To this end, the example test systems described herein employ a tracking circuit to detect the output voltage provided by the output stage and control the supply voltage to the output stage based on the output voltage. In implementations, the tracking circuit is or includes an envelope tracker that detects the channel voltage after the output stage and adjusts the supply voltage to the output stage. The detection and adjustment are performed at a fast rate, enabling the envelope tracker and the output stage to react quickly enough to limit the output stage power dissipation duration. For example, the detection and adjustment can be performed in single digit microseconds (ps) or double digit microseconds (ps).

[0024] Using the values in the foregoing example, the envelope tracker can detect the 2 V on the test channel at or after the output of the output stage. In some examples, the envelope tracker adjusts the supply voltage within a span of single or double digit microseconds to reduce the power dissipation in the output stage. For example, the envelope tracker can change the supply voltage from 110 V to 6.5 V. In this regard, the circuitry implementing the output stage requires a certain excess supply voltage to achieve the target output voltage due to an overhead voltage (also referred to as a "headroom voltage"). In this example, the output stage requires a supply voltage of 6.5 V to provide 2 V on the test channel. In this example, the power dissipation in the output stage is (6.5 V - 2 V)*(1 A), where 1 A is the maximum current output from the output stage. Thus, the power dissipation in the output stage is 4.5 W. This magnitude of dissipation is significantly less than the 108 W produced in the example above. As a result, the size of the output stage can be reduced relative to the 108 W example. In some implementations, the size of the output stage can be reduced to about 50 mm 2 ; however, any suitable size reduction can be implemented.

[0025] In another example, to illustrate the same effect using a high voltage output from the output stage, assume that the output stage is programmed to output 90V onto the test channel. The envelope tracker can detect the 90V on the test channel at or after the output of the output stage. The envelope tracker adjusts the supply voltage over the span of a single digit or double digit microseconds to reduce the power dissipation in the output stage. For example, the envelope tracker can change the supply voltage from 110V to 94.5V. As described above, due to the overhead voltage, the circuitry implementing the output stage requires a certain excess supply voltage to achieve the target channel voltage. The overhead voltage can not be the same for all channel voltages; however, for this example, assume that the overhead voltage is 4.5V. Thus, in this example, the output stage requires a 94.5V supply voltage to provide 90V on the test channel. The power dissipation in the output stage is (94.5V - 90V) * (1A) (where 1A is the maximum current as described above). Thus, even with the larger voltage output, the power dissipation in the output stage remains 4.5W. As a result, the size of the output stage can remain the same or similar for a wide range of channel voltage magnitudes. Thus, by adjusting the supply voltage, the size of the output stage can be reduced without reducing the range of voltage outputs that the test system can provide. In other words, the reduction in the difference between the supply voltage at the maximum current and the channel voltage enables the size of the output stage to be reduced.

[0026] The reduction in the size of the output stage can have consequences. For example, a smaller sized output stage can be more susceptible to damage than a larger sized output stage. As previously explained, a reduced sized output stage can handle less power dissipation. Generally, the smaller the size of the output stage, the less power dissipation that the output stage can tolerate. In an example, an accidental short circuit can cause a spike in the voltage applied to the output stage. As a result, the power dissipation in the output stage can increase beyond the power dissipation that the output stage can accommodate without failure. To address this potential problem, the compensator circuit is configured to compare the power dissipation in the output stage to a predefined power dissipation and, if the power dissipation in the output stage exceeds the predefined power dissipation, control the output stage, for example, by changing the input to the output stage or by interrupting the operation of the output stage. For example, the compensator circuit can be configured (e.g., programmed, structured, or both programmed and structured) to determine the power dissipation in the output stage by obtaining the difference between the supply voltage and the channel voltage on the test channel and by obtaining the power dissipation based on the difference. The compensator circuit can be configured to control the output stage based on the power dissipation over a single digit microsecond (e.g., within 1 μβ). In some examples, the compensator circuit can be configured to control the output stage based on the power dissipation over a double digit microsecond.

[0027] Figure 1Components of an example automatic test equipment (ATE) 10 configured to control power dissipation in an output stage of a test channel using example techniques described herein are shown. However, it is noted that the techniques described herein are not limited to use with ATE of Figure 1 or use in test applications, but can be used in any appropriate technical environment. In Figure 1 , dashed lines represent possible signal paths between devices, not actual wiring.

[0028] The ATE 10 includes a test head 11 and a test computer 12. The test head 11 interfaces with a DUT (not shown) on which testing is performed. The test computer 12 communicates with the test head 11 to control testing. For example, the test computer can download a test program set to test instruments on the test head, and then run the test program set to test a DUT in communication with the test head. The computer 12 can also present a user with options to set voltages and currents on test channels. In this regard, multiple test channels (e.g., each test channel) can include an instance of an output stage power amplifier circuit, one or more processing devices dedicated to that test channel, or both an instance of an output stage power amplifier circuit and one or more dedicated processing devices. Examples of types of processing devices that can be used are described herein.

[0029] The ATE 10 includes test instruments 13A-13N. In this example, one or more of the test instruments are VI (voltage-current) test instruments configured to impose a direct current (DC) voltage and a DC current onto a test channel and receive a signal from a device based on the imposed DC voltage and the imposed DC current. However, other types of test instruments can be used instead of or in addition to VI test instruments. For example, test instruments configured to generate alternating current (AC) voltage and / or AC current signals having a frequency greater than 1 kilohertz (KHZ) can be used. Each test instrument can be configured to output a test signal to test a DUT and receive a signal from the DUT. The received signal can include a response signal based on the test signal and / or a signal originating from the DUT that is not prompted by (e.g., not responsive to) the test signal.

[0030] Signals can be sent to and received from a DUT through multiple test channels. As described above, a test channel can include one or more physical transmission mediums through which signals are sent from a test instrument to a DUT and through which signals are received from a DUT. The physical transmission medium can include, but is not limited to, individual electrical conductors or a combination of electrical conductors and optical conductors, a wireless transmission medium, or both optical conductors and a wireless transmission medium. In some examples, a test channel can include a range of frequencies through which signals are transmitted within the one or more physical transmission mediums.

[0031] ATE 10 includes a connection interface 14 that connects the test instrument test channels 15 to the DIB 16. The connection interface 14 can include connectors 20 or other devices for routing signals between the test instrument and the DIB 16. For example, the connection interface can include one or more circuit boards or other substrates on which such connectors are mounted. Conductors defining the instrument test channels can be routed through the connection interface and the DIB.

[0032] In Figure 1 example, the DIB 16 is electrically and mechanically connected to the test head 11. The DIB includes sites 21, which can include pins, conductive traces, or other electrical and mechanical connection points to which a DUT can be connected. Test signals, response signals, and other signals are passed between the DUT and the test instrument via the test channels through the sites. The DIB 16 also includes connectors, conductive traces, and circuitry for routing signals between the test instrument, DUTs connected to the sites 21, and other circuitry, among other things.

[0033] Figure 2 An example of components that can be included in an output stage of an example test channel 60, which can be, for example, a test channel that is part of and / or connected to a test instrument 13A, is shown. As Figure 2 shown, the test channel 60 includes an output stage 61. The output stage can include a power amplifier configured to impose a voltage and current to a transmission medium portion 64 of the test channel. The test channel also includes one or more processing devices 65 configured to control the output stage as described herein. For example, the processing devices can implement a controller, such as a digital compensator circuit, to control the output stage to produce a programmed voltage or current on the test channel and / or to adjust or interrupt operation of the output stage in response to unsustainable power dissipation in the output stage. In some implementations, the digital compensator circuit implements or includes a proportional-integral-derivative (PID) control loop to control operation of the output stage. In some implementations, the digital compensator circuit implements or includes a feedforward component, making it more than just a PID control loop.

[0034] The voltage regulator 67 provides a voltage from which the supply voltage is based. The voltage regulator can be a static voltage capable of outputting only a single DC voltage, or a programmable voltage source capable of being programmed to provide one or more voltages within a range of voltages. For example, the voltage regulator can supply a high voltage, such as 110 V, or any other appropriate voltage. The tracking circuit 76 can be or include an envelope tracker configured to track the voltage on the test channel (Vd) and control the supply voltage to the output stage based on the voltage. For example, the tracking circuit can control the supply voltage (V+) by adjusting the voltage from the voltage regulator. For example, the voltage from the voltage regulator can be adjusted by the tracking circuit to a value greater than or equal to the sum of the channel voltage Vd and the overhead voltage of the output stage on the test channel. In some implementations, there can be a second envelope tracker (not shown) connected to the ground side 69 of the output stage in order to adjust the lower supply voltage to the output stage in the event that the lower supply voltage is not electrically grounded.

[0035] The envelope tracker can limit or minimize the voltage difference by detecting the voltage on the test channel (Vd) 77 and by adjusting the voltage provided by the voltage regulator to produce the supply voltage (V) 78. As described above, in some implementations, the resulting supply voltage is greater than or equal to the sum of the voltage on the test channel (Vd) (e.g., the channel voltage after the output stage) and the overhead voltage of the output stage. Keeping the supply voltage close to this sum limits or minimizes power dissipation in the output stage, thereby enabling the use of an output stage with a smaller or minimized size.

[0036] The envelope tracker can also control the supply voltage by adjusting the supply voltage to track the changes in the channel voltage. By doing so, the envelope tracker can reduce or minimize the difference between the channel voltage and the supply voltage for different channel voltages, thereby reducing, minimizing, or keeping consistent the power dissipation of the output stage.

[0037] In some implementations, the envelope tracker can take into account the voltage drop across the resistor 72 and / or any other voltage drop on the test channel when controlling the supply voltage. For example, the envelope tracker can determine the voltage at point 75 by adding the voltage drop that occurs across the resistor and other voltage drops that occur before the point at which Vd is measured to Vd. In some implementations, the envelope tracker can detect the voltage Vd directly at point 75 instead of after the resistor 72. As described above, the envelope tracker also takes into account the overhead voltage of the output stage when setting the supply voltage. Generally, the greater the difference between the channel voltage and the supply voltage, the larger the size of the output stage will be.

[0038] In some implementations, the tracking circuit (e.g., envelope tracker) can be implemented using a buck regulator that tracks the channel voltage and updates the supply voltage within a time span measured in single digit microseconds (e.g., 1 ps, 2 ps, 3 ps, 4 ps, 5 ps, 6 ps, 7 ps, 8 ps, or 9 ps). Such speed can be achieved in a buck regulator by using an inductor with a relatively large inductance and a capacitor with a relatively small capacitance. In some implementations, the tracking circuit (e.g., envelope tracker) can be implemented using a buck regulator that tracks the channel voltage and updates the supply voltage within a time span measured in double digit microseconds (e.g., 10 ps, 20 ps, 30 ps, 40 ps, 50 ps, 60 ps, 70 ps, 80 ps, 90 ps, or any appropriate time span less than 100 ps).

[0039] In Figure 2 In some implementations, the user can select or program the voltage to output, and the test system can automatically determine the current based on the voltage. Also, in some implementations, the user can select the current, and the system can automatically determine the voltage. The compensator circuit can then control the power amplifier, the envelope tracker, or both, to force the voltage and current to the test channel. As explained, V+ is adjusted by the envelope tracker based on the voltage (Vd, in this example) detected by the envelope tracker on the test channel. By reducing or minimizing the difference between V and Vd, while maintaining sufficient headroom voltage for the output stage to produce the desired voltage output, the size of the output stage can be reduced relative to conventional implementations.

[0040] Power dissipation ~ ((V+) - (Vd)) * (Id),

[0041] where Vd is the voltage on the test channel, Id is the current consumed by the DUT, and V+ 78 is the supply voltage regulated by the envelope tracker.

[0042] In some implementations, the user can select or program the voltage to output, and the test system can automatically determine the current based on the voltage. Also, in some implementations, the user can select the current, and the system can automatically determine the voltage. The compensator circuit can then control the power amplifier, the envelope tracker, or both, to force the voltage and current to the test channel. As explained, V+ is adjusted by the envelope tracker based on the voltage (Vd, in this example) detected by the envelope tracker on the test channel. By reducing or minimizing the difference between V and Vd, while maintaining sufficient headroom voltage for the output stage to produce the desired voltage output, the size of the output stage can be reduced relative to conventional implementations.

[0043] The compensator circuit can be part of a control loop including an envelope tracker, an output stage, a voltage sensor, and a current sensor. For example, the output stage can be configured for outputting current and voltage to the transmission medium portion 64 of the test channel based on input current or voltage from the compensator circuit, which can be implemented by one or more processing devices 65. The voltage sensor 70 (VSENSE) senses voltage on the transmission medium portion 64 of the test channel and provides a magnitude of the sensed voltage to the compensator circuit. The voltage sensor 55 senses the supply voltage and provides a magnitude of the supply voltage to the compensator circuit. The current sensor 71 (ISENSE) senses current on the transmission medium portion 64 of the test channel (in this example, through the resistor 72) and provides a magnitude of the sensed current to the compensator circuit. In this example, an analog-to-digital converter (not shown) or digitizer generates digital values of the sensed voltage and the sensed current. The compensator circuit determines power dissipation in the output stage by performing operations including obtaining a difference voltage between the supply voltage (V+) and the channel voltage (Vd) on the test channel, and obtaining the power dissipation by determining a product of the current output from the output stage (I) and the difference voltage. The compensator circuit is configured to determine the power dissipation in the output stage and to control the output stage based on the power dissipation over a single digit microsecond, such as 1 ps, or over a double digit microsecond. For example, the compensator circuit can be configured to compare the power dissipation to a predefined power dissipation and to control the output stage by interrupting operation of the output stage or by adjusting input to the output stage if the power dissipation exceeds the predefined power dissipation. For example, the compensator circuit can control the output stage by reducing current or voltage input to the output stage by 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, or 90% for a period of time. The components of the compensator circuit for protecting the output stage in the event of a fault condition, such as those described herein, are referred to as a “joule clamp.”

[0044] In some implementations, a given output stage can be able to operate correctly for a short period of time in the presence of excessive power dissipation. In an example, if there is 10 W of power dissipation for a period of 20 μs or less, the output stage will not be damaged or destroyed. However, in this example, if there is 10 W of power dissipation for a period of more than 20 μs, the output stage can be damaged or destroyed. Thus, the compensation circuit can be configured to determine the power dissipation in the output stage over time, and determine whether the power dissipation is acceptable for a given period of time. The output stage is then controlled based on whether the power dissipation is acceptable for the given period of time. For example, the compensator circuit can be configured to control the output stage by interrupting operation of the output stage or by reducing its control inputs to the output stage in response to the power dissipation exceeding an acceptable limit for a period of time. In the foregoing example, if the compensation circuit detects 10 W of power dissipation for a period of 10 μs, the compensation circuit will take no action because the output stage can tolerate 10 W of power dissipation for a period of up to 20 μs. In contrast, the compensation circuit can continuously detect 10 W of power dissipation for a period approaching 20 μs. At the 20 μs mark, the compensation circuit can control the output stage by interrupting operation of the output stage or by reducing or otherwise adjusting the control inputs to the output stage. In some implementations, the compensation circuit can control the output stage by interrupting the supply voltage to the output stage. For example, the compensation circuit can control the regulator 67 to stop providing a voltage or to reduce the magnitude of the voltage provided. For example, the compensation circuit can control the envelope tracker (tracking circuit 76) to stop providing a supply voltage or to reduce the magnitude of the supply voltage.

[0045] Referring to Figure 3 The process 80 for controlling a test channel includes, but is not limited to, the following operations. The process includes receiving a voltage as an input to a test system (81). For example, the voltage can be programmed into the test computer by a user such as a test engineer. The voltage is a target forced voltage for output on a test channel of interest. The process includes generating (82) a current output based on the voltage input. In some implementations, the current can be programmed into the test computer by a user such as a test engineer, and the voltage can be an unknown voltage determined. The voltage and current are provided (83) as outputs to the test channel as part of a test process. An envelope tracker detects (84) the voltage on the test channel from or after the output stage, and controls (85) the supply voltage to the output stage based on the channel voltage of the output stage and the overhead voltage. For example, the envelope tracker can limit the supply voltage to a value based on the sum of the channel voltage of the output stage and the overhead voltage. The value can be a voltage equal to the sum, a voltage that exceeds the sum, or a voltage that is a multiple of the sum. The smaller the difference between the channel voltage and the supply voltage, the smaller the physical size that the output stage can become. In general, for smaller output stages, higher density testing can be achieved at lower cost and space.

[0046] The example systems and processes described herein can be used with any appropriate test system. For example, the systems and processes can be used with high voltage, moderate current test instruments, where an example high voltage is 100 V or more, and where an example moderate current is 2 A pulse current or less. For example, the systems and processes can be used with high voltage, moderate current test instruments, where an example high voltage is 100 V or more, and where an example moderate current is 2 A pulse current or more. For example, the systems and processes can be used with high voltage, moderate current test instruments, where an example high voltage is 50 V or more, and where an example moderate current is 2 A pulse current or less. For example, the systems and processes can be used with high voltage, moderate current test instruments, where an example high voltage is 50 V or more, and where an example moderate current is 2 A pulse current or more. A pulse current includes a current that is greater than a current that an output stage can accommodate without damage for a longer period of time, but that the output stage can accommodate without damage for a shorter period of time. In an example, a pulse current includes applying a current, such as 2 A or 3 A, for a period of 1 millisecond (ms). In an example, the current can be repeated (i.e., pulsed) at regular periods within 1 ms.

[0047] All or portions of the test systems and processes described in this specification and their various modifications can be configured or controlled, at least in part, by one or more computers using one or more computer programs tangibly embodied in one or more information carriers, such as in one or more non-transitory machine-readable storage media. The computer programs can be written in any form of programming language, including compiled or interpreted languages, and they can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. The computer programs can be deployed to be executed on one computer or on multiple computers at one site or distributed across multiple sites and interconnected by a network.

[0048] The acts associated with configuring or controlling the test systems and processes can be performed by one or more programmable processors executing one or more computer programs to control the all or some of the wafer formation operations described earlier. All or portions of the test systems and processes can be configured or controlled by a special purpose logic circuitry, such as an FPGA (field programmable gate array) and / or an ASIC (application specific integrated circuit).

[0049] Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer. Generally, a processor will receive instructions and data from a read-only memory or a random access memory or both. The elements of a computer include one or more processors for executing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more machine-readable storage media, such as mass storage devices for storing data like magnetic, magneto-optical disks, or optical disks. Non-transitory machine-readable storage media suitable for embodying computer program instructions and data include all forms of non-volatile memory, including by way of example semiconductor memory devices, such as EPROM, EEPROM, and flash memory devices; magnetic disks such as internal hard disks or removable disks; magneto-optical disks; and CD-ROM and DVD-ROM disks.

[0050] The elements of the different implementations described can be combined to form other implementations not specifically described herein. Elements can be left out of the systems described above without adversely affecting the operation of the systems or the operation of the elements. In addition, elements can be combined in one or more single elements to perform the functions described herein.

[0051] Other implementations not specifically described herein are also within the scope of the following claims.

Claims

1. A test system comprising: an output stage to receive a supply voltage and to source at least one of a voltage or a current to a channel of a test instrument; a tracking circuit to detect a channel voltage after the output stage and to control the supply voltage to reduce a voltage difference between the supply voltage and the channel voltage after the output stage while the output stage maintains a level of the at least one of the voltage or the current sourced onto the channel of the test instrument; and a controller to determine a power dissipation of the output stage based on the supply voltage and the channel voltage and to control the output stage based on the power dissipation of the output stage.

2. The test system of claim 1, wherein controlling the supply voltage comprises adjusting the supply voltage to track changes in the channel voltage.

3. The test system of claim 2, wherein the output stage operates based on an overhead voltage; and wherein controlling the supply voltage comprises limiting the supply voltage to a value based on a sum of the channel voltage and the overhead voltage.

4. The test system of claim 3, wherein the value of the supply voltage is equal to the sum of the channel voltage and the overhead voltage.

5. The test system of claim 1, wherein the smaller the size of the output stage, the less power dissipation the output stage will tolerate, wherein a maximum power dissipation of the output stage is based on the supply voltage, the channel voltage, and a current from the output stage.

6. The test system of claim 1, further comprising: a current sensor to detect an output current from the output stage; and wherein the controller comprises a compensator circuit configured to determine the power dissipation based further on the output current.

7. The test system of claim 6, wherein the compensator circuit is configured to determine the power dissipation by performing operations comprising: obtaining a difference voltage between the supply voltage and the channel voltage; and obtaining a product of the output current and the difference voltage.

8. The test system of claim 6, wherein the compensator circuit is configured to determine the power dissipation over time and to determine whether the power dissipation is acceptable over the time; and wherein the output stage is controlled based on whether the power dissipation is acceptable over the time.

9. The test system of claim 8, wherein the compensator circuit is configured to control the output stage by discontinuing operation of the output stage in response to the power dissipation exceeding an acceptable limit for a period of time.

10. The test system of claim 6, wherein the compensator circuit is configured to compare the power dissipation to a predefined power dissipation and to control the output stage by discontinuing operation of the output stage if the power dissipation exceeds the predefined power dissipation. ​ ​ 11. The test system of claim 1, wherein the tracking circuit is configured to provide an input voltage to the output stage, at least one of the voltage or current being based on the input voltage; and wherein controlling the output stage includes varying the input voltage based on the power dissipation.

12. The test system of claim 1, wherein the tracking circuit is configured to vary the supply voltage over a duration of single or double digit microseconds within which the channel voltage being tracked varies.

13. The test system of claim 1, wherein the tracking circuit is configured to control the supply voltage to limit the voltage difference between the supply voltage and the channel voltage.

14. The test system of claim 1, wherein the supplied voltage is at least 100 volts and the supplied current is at least 2 ampere pulse current.

15. The test system of claim 1, wherein a size of the output stage is proportional to a difference between the supply voltage and the channel voltage at a maximum current through the output stage.

16. The test system of claim 15, wherein a reduction in the difference between the supply voltage and the channel voltage at the maximum current enables a reduction in the size of the output stage.

17. A test system, comprising: test instruments for sending signals to and receiving signals from devices under test (DUTs), each test instrument including one or more channels, a channel of the one or more channels including an output stage for supplying at least one of a voltage or a current, the output stage for receiving a supply voltage; a device interface board (DIB) for electrically and mechanically connecting one or more of the test instruments to the devices under test; and a computing system for controlling operation of one or more of the test instruments; wherein the channels include: a tracking circuit for reducing a voltage difference between the supply voltage and a channel voltage on the channel while the output stage maintains a level of the voltage or the current supplied to the channel of the test instrument; and a controller for controlling the output stage based on a power dissipation in the output stage.

18. The test system of claim 17, wherein the output stage is configured to receive an input voltage and supply at least one of the voltage or the current based on the input voltage; and wherein the controller is configured to control the output stage by varying the input voltage.

19. The test system of claim 17, wherein the controller includes a compensator circuit configured to determine the power dissipation in the output stage by performing operations including: obtaining a difference voltage between the supply voltage and the channel voltage; and obtaining a product of the difference voltage and a channel current on the channel.

20. The test system of claim 17, wherein the controller is configured to determine the power dissipation over time and determine whether the power dissipation is acceptable over the time; and wherein the controller is configured to control the output stage based on whether the power dissipation is acceptable.

21. The test system of claim 20, wherein the controller is configured to control the output stage by discontinuing operation of the output stage in response to the power dissipation exceeding an acceptable limit for a period of time.

22. The test system of claim 18, wherein the controller is configured to compare the power dissipation to a predefined power dissipation and, if the power dissipation exceeds the predefined power dissipation, control the output stage by discontinuing operation of the output stage.

23. The test system of claim 22, wherein discontinuing operation of the output stage comprises adjusting a voltage input from the controller to the output stage.

24. The test system of claim 17, wherein a size of the output stage is proportional to a difference between the supply voltage and the channel voltage at a maximum current through the output stage.

25. The test system of claim 24, wherein a reduction in the difference between the supply voltage and the channel voltage at the maximum current enables a reduction in the size of the output stage.

26. The test system of claim 17, wherein the smaller the size of the output stage, the less power dissipation the output stage will tolerate, wherein a maximum power dissipation of the output stage is based on the supply voltage, the channel voltage, and a current from the output stage.

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