Bidirectional precise breakdown explosion-proof thyristor and preparation method thereof

Abstract

The application provides a bidirectional precise breakdown explosion-proof thyristor and a preparation method thereof. The bidirectional thyristor is divided into an A tube and a B tube, which are reversely connected in parallel and symmetrical, the anode of the A tube corresponds to the cathode of the B tube, the cathode of the A tube corresponds to the anode of the B tube, and the A tube and the B tube are isolated by a high-resistance P region. The A tube is from top to bottom, and the corresponding B tube is from bottom to top, and a cathode side aluminum layer is sequentially arranged, including a center gate aluminum layer, an amplification gate aluminum layer and a cathode aluminum layer, a center gate P+ region and a cathode N+ region, a cathode P- region, an N-base region, an anode P- region, an anode high-concentration P+ region and an anode aluminum layer. The thyristor of the application has a higher-concentration built-in N+ region near the center line between the anode P- region and the P+ region, a PNP transistor is parasitic, and the N-base region is designed as an electric field breakdown type, so that the explosion-proof and precise breakdown functions of the bidirectional thyristor can be realized. The application is mainly applied to a flexible direct current transmission system to protect parallel IGBT devices.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of power semiconductor device manufacturing, and particularly relates to a bidirectional precise breakdown explosion-proof thyristor and a preparation method thereof. BACKGROUND

[0002] In the flexible direct current transmission technology, a modular multilevel converter (MMC) has been applied to engineering. The MMC converter is composed of thousands of power modules, and a common half-bridge module is shown in FIG. 1. If a certain power module in the system loses control, that is, the IGBT cannot be triggered, the capacitor voltage will rise, which will cause the IGBT in the power module to be overvoltage breakdown, and eventually the entire converter may be burned out. Figure 1

[0003] In order to solve the above problems, a protection thyristor is added in the power module. If the power module loses control and the module capacitor voltage rises above the breakdown voltage of the thyristor, the thyristor is broken down and forms a path, protecting the normal operation of the entire converter, which requires that the breakdown voltage of the thyristor has a small deviation range, usually only ±100V. In addition, the thyristor will generate a large explosion force when it breaks down, and if the explosion point is not controlled, the fragments of the pipe shell after explosion will fly out and damage the entire system module, which causes a more dangerous chain reaction. Therefore, the position of the explosion point must also be accurately controlled. SUMMARY

[0004] The application aims at the above problems, and provides a bidirectional precise breakdown bypass thyristor and a preparation method thereof.

[0005] The technical scheme adopted by the application is a bidirectional precise breakdown bypass thyristor, which is divided into an A tube and a B tube, and is symmetrically connected in reverse parallel. The anode of the A tube corresponds to the cathode of the B tube, and the cathode of the A tube corresponds to the anode of the B tube. The A tube and the B tube are isolated by a high-resistance P-zone. The A tube is arranged from top to bottom, and the corresponding B tube is arranged from bottom to top. A cathode side aluminum layer is sequentially arranged, including a center gate aluminum layer, an amplification gate aluminum layer, and a cathode aluminum layer, a center gate P+ zone, a cathode N+ zone, a cathode P- zone, an N- base zone, an anode P- zone, an anode high-concentration P+ zone, and an anode aluminum layer. A high-concentration N+ zone is arranged in the center line between the anode P- zone and the P+ zone, which is equivalent to a parasitic PNP transistor on the anode side of the A tube and the B tube.

[0006] The depth of the cathode N+ zone is 10-20 μm, and the doping concentration is 1×10 19 -5×10 19 cm -3 .

[0007] The depth of the gate P+ zone is 5-10 μm, and the doping concentration is 5×10​19 ~1x10 20 cm -3 .

[0008] The depth of the cathode P- region is 45-140 μm, and the doping concentration is 1x10 14 ~1x10 17 cm -3 .

[0009] The depth of the anode P+ region is 5-10 μm, and the doping concentration is 5x10 19 ~1x10 20 cm -3 .

[0010] The thickness of the N-base region is 200-500 μm, and the doping concentration is 5x10 12 ~1x10 14 cm -3 .

[0011] The depth of the built-in N+ region near the center line is 5-10 μm, and the doping concentration is 1x10 19 ~5x10 19 cm -3 .

[0012] The upper side A tube cathode aluminum layer, the center gate aluminum layer and the B tube anode aluminum layer are short-circuited by Mo sheet compression, and the lower side B tube cathode aluminum layer, the center gate aluminum layer and the A tube anode aluminum layer are short-circuited by Mo sheet compression.

[0013] The preparation method of the bidirectional precise breakdown explosion-proof thyristor is implemented according to the following steps:

[0014] Step (1), selecting an original defect-free, dislocation-free high-resistance zone melting single crystal silicon wafer as the n - region substrate material, the thickness of the N-base region is 200-500 μm, and the doping concentration is 5x10 12 ~1x10 14 cm -3 ;

[0015] Step (2), aluminum impurity pre-deposition on both sides of the silicon wafer, followed by high-temperature oxidation promotion to form the A tube cathode and anode P- region (B tube anode and cathode P- region), the depth is 45-140 μm, and the doping concentration is 1x10 14 ~1x10 17 cm -3 . The typical high-temperature oxidation diffusion conditions are: temperature 1200-1250℃, time 20-50h.

[0016] Step (3), first photoetching, double-sided selective pre-deposition of phosphorus, high-temperature oxidation and pushing to form a higher concentration N+ region and an internal N+ region near the center line, the cathode N+ region has a depth of 10-20 μm and a doping concentration of 1×10 19 ~5×10 19 cm -3 ; the internal N+ region near the center line has a depth of 5-10 μm and a doping concentration of 1×10 19 ~5×10 19 cm -3 . Typical high-temperature oxidation and diffusion conditions are: temperature 1100-1200℃, time 5-10 h.

[0017] Step (4), second photoetching, double-sided selective pre-deposition of high-concentration boron, high-temperature oxidation and pushing to form a high-concentration P+ region and a gate P+ region, and to compensate for part of the internal N+ region in step (3), the P+ region has a depth of 5-10 μm and a doping concentration of 5×10 19 ~1×10 20 cm -3 ; the gate P+ region has a depth of 5-10 μm and a doping concentration of 5×10 19 ~1×10 20 cm -3 . Typical high-temperature oxidation and diffusion conditions are: temperature 1100-1200℃, time 1-3 h.

[0018] Step (5), double-sided first evaporation of aluminum and first reverse etching of aluminum to form a center gate aluminum layer and a cathode aluminum layer, followed by second evaporation of aluminum and second reverse etching of aluminum to form an amplifying gate aluminum layer, and then alloying; typical alloying conditions are: temperature 400-500℃, time 0.5-2 h.

[0019] Step (6), laser cutting of the silicon wafer to form a disc with a diameter of 80-130 mm, then mesa shaping and etching to form a double-negative-angle structure with an angle of 1°-3°, and then coating with glue for protection, thus forming a complete chip and completing the blocking voltage test.

[0020] The structure of the application has the following beneficial effects:

[0021] No matter which side the voltage is applied to, the thyristor is in a blocking state. The optimized N-base region can achieve precise voltage breakdown, and the breakdown voltage deviation range is ±100 V, and the parasitic PNP transistor in the body provides a multiplication current after breakdown, so that the breakdown position is controlled near the center line in the body, and the structure has an explosion-proof function.

[0022] Preferably, when the center gates of the A tube and the B tube are respectively applied with a trigger signal, the A tube and the B tube can be respectively turned on. BRIEF DESCRIPTION OF DRAWINGS

[0023] Figure 1 Fig. 1 is a schematic diagram of a MMC half-bridge power module.

[0024] Figure 2 Fig. 2 is a schematic diagram of a cross section of a conventional bidirectional thyristor device structure.

[0025] Figure 3 Fig. 3 is a schematic diagram of a cross section of the present application.

[0026] Figure 4 Fig. 4 is a schematic diagram of the electric field distribution in the N-base region of the present application compared with the conventional structure.

[0027] Figure 5 Fig. 5 is a front plan view of the present application.

[0028] Figure 6 Fig. 6 is a back plan view of the present application.

[0029] Figure 7 Fig. 7 is a schematic diagram of the key process steps of the preparation method of the present application.

[0030] Figure 8 Fig. 8 is a process flow chart of the preparation method of the present application.

[0031] BRIEF DESCRIPTION OF DRAWINGS

[0032] 10-B tube anode aluminum layer; 11-A tube center gate aluminum layer; 12-A tube amplification gate aluminum layer; 13-A tube cathode aluminum layer; 14-center gate P+ region; 15-amplification gate and cathode N+ region; 16-A tube cathode and B tube anode P- region; 17-B tube anode P+ region; 18-front isolation region; 19-B tube anode built-in N+ region; 20-B tube anode P- region; 2-N-base region; 30-A tube anode aluminum layer; 31-B tube center gate aluminum layer; 32-B tube amplification gate aluminum layer; 33-B tube cathode aluminum layer; 34-B tube center gate P+ region; 35-B tube amplification gate and cathode N+ region; 36-A tube anode and B tube cathode P- region; 37-A tube anode P+ region; 38-back isolation region; 39-A tube anode built-in N+ region; 40-B tube cathode P- region; 41-front and back negative bevel angle termination.

[0033] 50-edge termination; 51-A tube amplification gate; 52-A tube center gate; 53-front isolation region; 54-active region; 55-front high resistance P- isolation region; 56-B tube anode built-in N+ region; 61-B tube amplification gate; 62-B tube center gate; 63-back isolation region; 64-A tube anode built-in N+ region; 65-back high resistance P- isolation region. DETAILED DESCRIPTION

[0034] The present application will be described in detail below with reference to the drawings and specific embodiments.

[0035] Referring to Figure 3 , the application improves the structure of a bidirectional precise breakdown explosion-proof thyristor, which is divided into A tubes and B tubes, which are reversely connected in parallel and symmetrical, the anode of the A tube corresponds to the cathode of the B tube, the cathode of the A tube corresponds to the anode of the B tube, and the A tube and the B tube are isolated by high-resistance P-zones 18 and 38. The A tube is arranged from top to bottom, and the corresponding B tube is arranged from bottom to top, and the cathode-side aluminum layers are sequentially arranged, including center gate aluminum layers 11 and 31, amplification gate aluminum layers 12 and 32, and cathode aluminum layers 13 and 33, center gate P+ zones 14 and 34, cathode N+ zones 15 and 35, cathode P-zones 16 and 40, N-base zones 2, anode P-zones 36 and 20, anode high-concentration P+ zones 37 and 17, and anode aluminum layers 30 and 10. The depth of the cathode N+ zone 15 and 35 is 10-20 μm, the doping concentration is 1×10 19 ~5×10 19 cm -3 . The depth of the gate P+ zone 14 and 34 is 5-10 μm, the doping concentration is 5×10 19 ~1×10 20 cm -3 . The depth of the cathode P-zone 16 and 36 is 45-140 μm, the doping concentration is 1×10 14 ~1×10 17 cm -3 . The depth of the anode P+ zone 17 and 37 is 5-10 μm, the doping concentration is 5×10 19 ~1×10 20 cm -3 . The thickness of the N-base zone 2 is 200-500 μm, the doping concentration is 5×10 12 ~1×10 14 cm -3 . The depth of the built-in N+ zone 39 and 19 near the center line is 5-10 μm, the doping concentration is 1×10 19 ~5×10 19 cm -3 .

[0036] The upper A tube cathode aluminum layer 13, the center gate aluminum layer 11, and the B tube anode aluminum layer 10 are short-circuited by Mo sheet crimping, and the lower B tube cathode aluminum layer 33, the center gate aluminum layer 31, and the A tube anode aluminum layer 30 are short-circuited by Mo sheet crimping.

[0037] Figure 4is a schematic diagram of the electric field distribution of the N-base region of the present structure and the prior art structure. Unlike the prior art structure, the electric field lines of the N-base region of the present structure pass through the P-region, which is referred to as a punch through (PT) design. The prior art structure is a non-punch through design, and the electric field lines are cut off inside the N-base region, and there is a certain length of neutral region Wn between the N-base region and the P-region. The thyristor of the punch through design can achieve precise breakdown voltage, and the fluctuation range is only ±100 V, and the breakdown voltage at room temperature and high temperature (60°C) is almost equal.

[0038] In combination with Figures 2-4 , compared with the prior art structure, the present structure has the following characteristics:

[0039] (1) The N-base region of the present structure is designed as a punch through type. Since the gate-cathode is short-circuited, the thyristor is in a blocking state regardless of which side the voltage is applied. The optimized N-base region can achieve precise voltage breakdown, and the breakdown voltage fluctuation range is ±100 V.

[0040] (2) The A tube and the B tube respectively have a high-concentration N+ region 39, 19 built-in near the center line between the anode P-region 36, 16 and the P+ region 37, 17, which is equivalent to parasitic PNP transistors on the anode side of the A tube and the B tube, respectively, providing amplification current during breakdown, accurately controlling the failure explosion point to be located in the center area of the chip, and having an explosion-proof function.

[0041] Figure 5 and Figure 6 are the top views of the front and back of the chip, respectively. The front isolation region 53 and the back isolation region 63 isolate the A tube and the B tube. When the gate triggers the thyristor to conduct, the isolation region can prevent the A tube and the B tube from affecting each other. The amplification gate structures 51 and 61 can be designed as interdigital or T-shaped. The center high-resistance P-isolation region 55 and 65 have a shape similar to a horseshoe shape, also known as a horseshoe region. The N+ regions 56 and 64 built-in on the front and back can be designed as circular, square, rectangular or regular hexagonal structures, and the width needs to meet the high dV / dt capability of the thyristor in the off state and provide a large enough PNP transistor current during breakdown. For a circular structure, the typical design diameter D is 0.5-2 mm.

[0042] In combination with Figure 7 , 8 , the manufacturing process is described as follows:

[0043] Step (1), select an original defect-free, dislocation-free high-resistance zone melting single crystal silicon wafer as the substrate material of the N - region 2, the thickness of the N-base region 2 is 200-500 μm, and the doping concentration is 5×10 12 ~1×10 14 cm -3;

[0044] Step (2): Pre-deposit aluminum impurities on both sides of the silicon wafer, followed by high-temperature oxidation to form cathode P-region 16 and anode P-region 36 (anode P-region 20 and cathode P-region 40 of tube B), with a depth of 45-140 μm and a doping concentration of 1×10⁻⁶. 14 ~1×10 17 cm -3 Typical high-temperature diffusion conditions for oxidation are: temperature 1200–1250℃, time 20–50h.

[0045] Step (3): First photolithography, selective pre-deposition of phosphorus on both sides, and high-temperature oxidation to form high-concentration N+ regions 15 and 35 and built-in N+ regions 39 and 19 near the center line. The depth of N+ regions 15 and 35 is 10-20 μm, and the doping concentration is 1×10⁻⁶. 19 ~5×10 19 cm -3 The built-in N+ regions 39 and 19 near the center line have a depth of 5–10 μm and a doping concentration of 1 × 10⁻⁶. 19 ~5×10 19 cm -3 Typical high-temperature diffusion conditions for oxidation are: temperature 1100–1200℃, time 5–10h.

[0046] Step (4) Second photolithography: Double-sided selective pre-deposition of high-concentration boron, followed by high-temperature oxidation to form high-concentration P+ regions 37 and 17 and gate P+ regions 14 and 34, compensating for part of the built-in N+ regions 19 and 39 from step (3). The depth of P+ regions 37 and 17 is 5-10 μm, and the doping concentration is 5 × 10⁻⁶. 19 ~1×10 20 cm -3 The gate P+ regions 14 and 34 have a depth of 5–10 μm and a doping concentration of 5 × 10⁻⁶. 19 ~1×10 20 cm -3 Typical high-temperature diffusion conditions for oxidation are: temperature 1100~1200℃, time 1~3h.

[0047] Step (5): First aluminum evaporation and first reverse aluminum etching on both sides of the silicon wafer to form aluminum layers 10, 11, 13, 30, 31 and 33. Then aluminum evaporation and second reverse aluminum etching to form aluminum layers 12 and 32. Then alloying. Typical alloying conditions are: temperature 400~500℃, time 0.5~2h.

[0048] Step (6), the silicon wafer is cut into a circle with a diameter of 80-130 mm by laser cutting, and then the mesa is shaped and etched to form a double negative angle structure 41 with an angle of 1°-3°, and then the structure is coated with glue for protection. Thus, a complete chip is formed, and the blocking voltage test is completed.

Claims

1. A bidirectional precision-breakdown explosion-proof thyristor, characterized in that: The bidirectional thyristor is divided into an A tube and a B tube, which are reversely connected in parallel and symmetrical, the anode of the A tube corresponds to the cathode of the B tube, the cathode of the A tube corresponds to the anode of the B tube, and the A tube and the B tube are isolated by high-resistance P-zones (18 and 38); the A tube is from top to bottom, and the corresponding B tube is from bottom to top, and the cathode side aluminum layers are sequentially arranged, including a center gate aluminum layer (11 and 31), an amplification gate aluminum layer (12 and 32) and a cathode aluminum layer (13 and 33), a center gate P+ zone (14 and 34) and a cathode N+ zone (15 and 35), a cathode P- zone (16 and 40), an N-base zone (2), an anode P- zone (36 and 20), an anode high-concentration P+ zone (37 and 17) and an anode aluminum layer (30 and 10); in the lower right bottom P- zone (20) of the upper side P+ zone (17) of the B tube, and in the upper left top P- zone (36) of the lower side P+ zone (37) of the A tube, and in the position close to the center line, a higher-concentration N+ zone (39 and 19) is built, which is equivalent to parasitically existing a PNP transistor on the anode side of the A tube and the B tube respectively.

2. The bidirectional precise breakover surge protection thyristor according to claim 1, characterized in that: The cathode N+ region (15 and 35) has a depth of 10-20 mm and a doping concentration of 1×10 19 ~5×10 19 cm -3 ; the gate P+ region (14 and 34) has a depth of 5-10 mm and a doping concentration of 5×10 19 ~1×10 20 cm -3 ; the cathode P- region (16 and 36) has a depth of 45-140 mm and a doping concentration of 1×10 14 ~1×10 17 cm -3 ; and the anode P+ region (37 and 17) has a depth of 5-10 mm and a doping concentration of 5×10 19 ~1×10 20 cm -3 .

3. The bidirectional precise breakover surge protection thyristor according to claim 1, wherein: The N-base region (2) has a thickness of 200~500 mm and a doping concentration of 5×10⁻⁶. 12 ~1×10 14 cm -3 The built-in N+ regions (39 and 19) near the center line have a depth of 5~10 mm and a doping concentration of 1×10⁻⁶. 19 ~5×10 19 cm -3 .

4. The bidirectional precise breakover surge protection thyristor according to claim 1, characterized in that: The top cathode aluminum layer (13) and the top center gate aluminum layer (11) in the A tube are short-circuited by Mo sheet pressure bonding with the top anode aluminum layer (10) in the B tube, and the bottom cathode aluminum layer (33) and the bottom center gate aluminum layer (31) in the B tube are short-circuited by Mo sheet pressure bonding with the bottom anode aluminum layer (30) in the A tube.

5. The method of manufacturing a bidirectional precision-breakdown surge protection thyristor according to any one of claims 1 to 4, characterized in that, The method comprises the following steps: Step (1), selecting original defect-free, dislocation-free high resistance zone melting monocrystalline silicon wafer as n - substrate material of region (2), the N-base region (2) has a thickness of 200-500 mm and a doping concentration of 5×10 12 ~1×10 14 cm -3 ​ Step (2), double side aluminum impurity pre-deposition on the silicon wafer, followed by high temperature oxidation to form cathode and anode P- region (16, 20, 36 and 40), depth 45 ~ 140 mm, doping concentration 1 x 10 14 cm 17 -2 -3 ; typical high temperature oxidation diffusion conditions: temperature 1200 ~ 1250℃, time 20 ~ 50h; Step (3), first photoetching, then double-sided selective pre-deposition of phosphorus, high-temperature oxidation to form higher concentration cathode N+ region (15 and 35) and built-in N+ region (39 and 19) near the center line, the depth of cathode N+ region (15 and 35) is 10-20 mm, the doping concentration is 1×10 19 ~5×10 19 cm -3 ; the depth of built-in N+ region (39 and 19) near the center line is 5-10 mm, the doping concentration is 1×10 19 ~5×10 19 cm -3 ; typical high-temperature oxidation diffusion conditions are: temperature 1100-1200℃, time 5-10 h; Step (4), second photoetching, then double selective pre-deposition of high concentration boron, high temperature oxidation to form high concentration P+ region (37 and 17) and gate P+ region (14 and 34), to compensate for part of the built-in N+ region (39 and 19) in step (3), the P+ region (37 and 17) has a depth of 5-10 mm and a doping concentration of 5×1019-1×1020 cm-3; the gate P+ region (14 and 34) has a depth of 5-10 mm and a doping concentration of 5×1019-1×1020 cm-3; typical high temperature oxidation diffusion conditions are: temperature 1100-1200 ℃, time 1-3 h. 19 ~1×10 20 cm -3 ; typical high temperature oxidation diffusion conditions are: temperature 1100-1200 ℃, time 1-3 h. 19 ~1×10 20 cm -3 ; typical high temperature oxidation diffusion conditions are: temperature 1100-1200 ℃, time 1-3 h. Step (5), the silicon wafer is evaporated with aluminum on both sides for the first time and is etched back with aluminum for the first time to form aluminum layers (10, 11, 13, 30, 31 and 33), then is evaporated with aluminum for the second time and is etched back with aluminum for the second time to form aluminum layers (12 and 32), and then is alloyed; typical alloying conditions are: temperature 400-500℃, time 0.5-2h; Step (6), the silicon wafer is cut into a circular wafer with a diameter of 80-130mm by laser cutting, then is shaped and etched to form a double-negative-angle structure (41) with an angle of 1°-3°, and is protected by glue coating, thus forming a complete chip and completing the blocking voltage test.

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