Joint decoding method and device, storage medium and electronic device

Abstract

The present disclosure provides a joint decoding method and device, a storage medium and an electronic device, and relates to the field of wireless communication technology. The method includes obtaining target coding information; decoding the target coding information by a serial cancellation SC decoder to obtain a first sequence; decoding the target coding information by a pre-trained long short-term neural network LSTM decoder to obtain a second sequence; and comparing the first sequence and the second sequence, and determining the decoding result of the target coding information based on the comparison result. The joint decoding method provided by the present invention adopts an SC+LSTM decoding scheme, and performs error correction by comparing the LSTM decoding and SC decoding results, thereby improving the error correction capability. Furthermore, it is proved by simulation that the decoding performance of the joint decoding is improved compared with the performance of the previous scheme, thereby reducing the bit error rate and improving the end-to-end communication reliability.

Description

Background Art

[0002] Polar codes are the first type of linear block codes that can achieve the channel capacity of symmetric memoryless channels, and therefore have received extensive attention from researchers in the field of channel coding. Although polar codes can achieve the channel capacity of symmetric memoryless channels in the ideal case of infinite code length, the bit error rate performance of medium and short-length polar codes is lower than that of turbo codes and low-density parity-check codes under serial cancellation decoders; the complexity is relatively high under belief propagation decoders; there are also linear program (LP) decoders, spherical decoders, etc. Although these algorithms have achieved certain performance improvements, they usually increase the computational complexity. Traditional decoding methods have poor performance and are difficult to meet future communication needs. Therefore, it is necessary to study high-performance polar code short code decoders.

[0003] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention

[0004] The purpose of the present disclosure is to provide a joint decoding method and device, a storage medium and an electronic device, which can at least to some extent overcome the problem of poor decoding performance in the related art.

[0005] Other features and advantages of the present disclosure will become apparent from the following detailed description, or may be learned in part by the practice of the present disclosure.

[0006] According to one aspect of the present disclosure, a joint decoding method is provided, including: acquiring target coding information; decoding the target coding information by a serial cancellation (SC) decoder to obtain a first sequence; decoding the target coding information by a pre-trained long short-term neural network (LSTM) decoder to obtain a second sequence; and comparing the first sequence with the second sequence, and determining a decoding result of the target coding information based on the comparison result.

[0007] In some embodiments of the present disclosure, comparing a first sequence and a second sequence, and determining a decoding result of target coding information based on the comparison result includes: if the first decoding result is consistent with the second decoding result, determining the first sequence as the decoding result of the target coding information; if the first decoding result is inconsistent with the second decoding result, performing bit flipping on the first sequence to determine the decoding result of the target coding information.

[0008] In some embodiments of the present disclosure, performing bit flipping on a first sequence to determine a decoding result of first encoded information includes: performing a measurement calculation based on the first sequence and the result of performing bit flipping on the first sequence to determine a corresponding measurement, wherein the more correct the sequence data is, the smaller the measurement is; and determining the decoding result based on the measurement with the smallest value.

[0009] In some embodiments of the present disclosure, performing a measurement calculation based on a first sequence and a result of performing a bit flip on the first sequence to determine a corresponding measurement includes: obtaining a first measurement value of the first sequence according to a result of an exclusive OR operation of a re-encoding result of the first sequence and a hard decision result of target coding information; performing a bit flip on the first sequence to obtain a flipped sequence, so as to obtain a second measurement value corresponding to the flipped sequence according to a result of an exclusive OR operation of a re-encoding result of the flipped sequence and a hard decision result of the target coding information.

[0010] In some embodiments of the present disclosure, performing bit flipping on the first sequence to obtain a flipped sequence includes: bit-by-bit flipping of bits in the first sequence that are inconsistent with the second sequence, and obtaining a flipped sequence each time a bit is flipped.

[0011] In some embodiments of the present disclosure, the method further includes: obtaining original information and encoded information, wherein the encoded information is obtained by encoding the original information; using the encoded information as training data; and using the original information as a training label to train the LSTM decoder until the output of the loss function converges.

[0012] In some embodiments of the present disclosure, the formula for calculating the measure is:

[0013]

[0014] Where l represents the inconsistent bit position r between the decoding result sequence v and the decoding result sequence z corresponding to the coded information r j The cumulative sum of the absolute values ​​of .

[0015] According to another aspect of the present disclosure, a joint decoding device is provided, including: a first acquisition module, used to acquire target coding information; an SC serial offset decoding module, used to perform decoding on the target coding information by an SC decoder to obtain a first sequence; an LSTM long short-term neural network decoding module, used to perform decoding on the target coding information by a pre-trained long short-term neural network LSTM decoder to obtain a second sequence; and a comparison module, comparing the first sequence and the second sequence, and determining a decoding result of the target coding information based on the comparison result.

[0016] According to another aspect of the present disclosure, an electronic device is provided, comprising: a processor; and a memory for storing executable instructions of the processor; wherein the processor is configured to perform the above-mentioned joint decoding method by executing the executable instructions.

[0017] According to another aspect of the present disclosure, a computer-readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the above-mentioned joint decoding method is implemented.

[0018] The joint decoding method provided by the present invention adopts an SC+LSTM decoding scheme, performs error correction by comparing LSTM decoding and SC decoding results, and improves the error correction capability.

[0019] Furthermore, simulations have shown that the decoding performance of the joint decoding is improved compared to that of previous schemes, thereby reducing the bit error rate and improving the end-to-end communication reliability.

[0020] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The accompanying drawings herein are incorporated into the specification and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification are used to explain the principles of the present disclosure. Obviously, the accompanying drawings described below are only some embodiments of the present disclosure, and for ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without creative work.

[0022] Figure 1 A schematic diagram of a network architecture applicable to a joint decoding method in an embodiment of the present disclosure is shown.

[0023] Figure 2A and Figure 2B A flowchart and a system block diagram of a joint decoding method in an embodiment of the present disclosure are shown.

[0024] Figure 2C An example of SC decoding of a polar code with a length of 2 in an embodiment of the present disclosure is shown.

[0025] Figure 3 A flow chart of a method for comparing a first sequence and a second sequence in a joint decoding method in an embodiment of the present disclosure and determining a decoding result of target coded information based on the comparison result is shown.

[0026] Figure 4 A flow chart of an LSTM model training method in a joint decoding method in an embodiment of the present disclosure is shown.

[0027] Figure 5A A specific implementation block diagram of a joint decoding method in an embodiment of the present disclosure is shown.

[0028] Figure 5B The simulation results of a joint decoding method in an embodiment of the present disclosure are shown.

[0029] Figure 6 A schematic diagram of a joint decoding device in an embodiment of the present disclosure is shown.

[0030] Figure 7 A structural block diagram of a joint decoding computer device in an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0031] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that the disclosure will be more comprehensive and complete and to fully convey the concepts of the example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0032] In addition, the accompanying drawings are only schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the figures represent the same or similar parts, and their repeated description will be omitted. Some of the block diagrams shown in the accompanying drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities can be implemented in software form, or implemented in one or more hardware modules or integrated circuits, or implemented in different networks and / or processor devices and / or microcontroller devices.

[0033] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present disclosure, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0034] In view of the technical problems existing in the above-mentioned related technologies, the embodiments of the present disclosure provide a message display method to solve at least one or all of the above-mentioned technical problems.

[0035] Figure 1 A schematic diagram of a network architecture applicable to an embodiment of the present application is shown in FIG. 1. The network architecture may include at least one network device 110 (only one is shown) and one or more terminal devices 120 connected to the network device 100.

[0036] The network device 110 may be a device that can communicate with the terminal device 120. The network device 110 may be any device with wireless transceiver functions. Including but not limited to: base stations (for example, base station NodeB, evolved base station eNodeB, base stations in the fifth generation (5G) communication system, base stations or network devices in future communication systems, access nodes in WiFi systems, wireless relay nodes, wireless backhaul nodes), etc. The network device 110 may also be a wireless controller in a cloud radio access network (CRAN) scenario. The network device 110 may also be a network device in a 5G network or a network device in a future evolution network; it may also be a wearable device or a vehicle-mounted device, etc. The network device 110 may also be a small station, a transmission reference point (TRP), etc. Of course, the application is not limited to this.

[0037] The terminal device 120 is a device with wireless transceiver function that can be deployed on land, including indoors or outdoors, handheld, wearable or vehicle-mounted; it can also be deployed on the water surface (such as ships, etc.); it can also be deployed in the air (such as airplanes, balloons and satellites, etc.). The terminal device can be a mobile phone, a tablet computer (Pad), a computer with wireless transceiver function, a virtual reality (VR) terminal device, an augmented reality (AR) terminal device, a wireless terminal in industrial control, a wireless terminal in self-driving, a wireless terminal in remote medical, a wireless terminal in smart grid, a wireless terminal in transportation safety, a wireless terminal in smart city, a wireless terminal in smart home, etc. The embodiments of the present application do not limit the application scenarios. The terminal device may sometimes also be referred to as user equipment (UE), access terminal equipment, UE unit, UE station, mobile station, mobile station, remote station, remote terminal equipment, mobile device, UE terminal equipment, terminal equipment, wireless communication equipment, UE agent or UE device, etc.

[0038] The communication systems to which the above network architecture is applicable include, but are not limited to, 5G communication systems. Taking the 5G communication system as an example, in the 5G communication system, in addition to the interaction of data itself, there is also the interaction of instructions between the network device 110 and the terminal device 120. The network device 110 completes the scheduling of the terminal device 120 through instructions, and transmits the format information of the scheduling. In order to reduce the overhead of instruction interaction, the network device 110 often does not send or sends less certain scheduling signaling, and the terminal device 120 monitors whether there is scheduling according to certain rules. During the monitoring process, the terminal device 120 needs to perform blind detection decoding without knowing the exact format.

[0039] In the following, each step of the joint decoding method in this example implementation will be described in more detail with reference to the accompanying drawings and embodiments.

[0040] Figure 2A and Figure 2B The flowchart and system block diagram of a joint decoding method in the embodiment of the present disclosure are shown. The method provided in the embodiment of the present disclosure can be executed by any electronic device with computing and processing capabilities, such as Figure 1 The network device 110 and / or the terminal 120 in the embodiment. In the following examples, the network device 120 is used as the execution subject for example description.

[0041] like Figure 2A As shown, the joint decoding method provided by the embodiment of the present disclosure may include the following steps:

[0042] Step S210, obtaining target coding information.

[0043] In some embodiments of the present disclosure, the target encoding information is a sequence of real numbers.

[0044] In some embodiments of the present disclosure, the target coded information is the result of performing polar code coding on the target information sequence. The polar code coding process is, for example, Figure 2B As shown in steps S240a to S240d in the figure, the target information bit u is added to the frozen bit to perform encoding to generate the information sequence x; BPSK modulation and noise power estimation are then performed on x to obtain the result y, and then BPSK decoding is performed on the result y to generate the target coded information r.

[0045] like Figure 2C The SC decoding example of a polar code with a length of 2 is shown in FIG. The encoding process is performed sequentially from left to right. First, the information bit U is given. 2 , and U 2 =1. Then calculate the target coding information r and convert the information bit U 2 Join Freeze BitU 1 = 0, then generate (X 1 , X2 )=(11)After BPSK modulation, it becomes (S 1 , S 2 )=(-1,-1). Add noise to the modulated sequence, and the calculation formula of the noise variance is:

[0046]

[0047] The standard deviation σ is obtained from formula (1):

[0048]

[0049] The two Gaussian random variables generated by the above formula according to the program have noises of (n1, n2) = (0.3392, 1.1571).

[0050] The modulated signal (y1, y2) = (-1 + 0.3392, -1 + 1.1571) = (-0.6608, 0.1571) is obtained, so the log-likelihood ratio corresponding to y1 and y2 is

[0051]

[0052] In step S220, a serial cancellation (SC) decoder is used to decode the target coded information to obtain a first sequence.

[0053] In some embodiments of the present disclosure, the SC decoding process is to use the target coding information r to perform decoding in the above-mentioned encoding method. Figure 2C As shown, the decoding process is performed from right to left:

[0054] First, judge U 1 , you can use the commonly used approximate formula:

[0055]

[0056] Then U 1 The corresponding log-likelihood ratio is 0.7893, but U 1 Originally frozen bits, so U 1 =0.

[0057] Then judge U 2 , from the log-likelihood ratio

[0058]

[0059] It can be obtained that the LLR of U2 is -2.5302, so U2 is judged as 1, the decoding is completed, and the first sequence (0, 1) is output as the decoding result, and the decoding is completed.

[0060] Step S230, a pre-trained long short-term neural network (LSTM) decoder decodes the target encoded information to obtain a second sequence.

[0061] In some embodiments of the present disclosure, the pre-trained LSTM decoder is trained by the difference between a large number of randomly generated information sequences that are encoded, modulated, and noisy and then input into the LSTM decoder to generate a decoding result and the information sequence.

[0062] Step S240: compare the first sequence and the second sequence, and determine a decoding result of the target coding information based on the comparison result.

[0063] In some embodiments of the present disclosure, based on the comparison between the first sequence and the second sequence, erroneous bits are identified, thereby identifying whether there is an error in the decoding result.

[0064] The joint decoding method provided by the embodiment of the present disclosure adopts the SC+LSTM decoding scheme, and performs error correction by comparing the LSTM decoding and SC decoding results, thereby improving the error correction capability.

[0065] Furthermore, simulations have shown that the decoding performance of the joint decoding is improved compared to that of previous schemes, thereby reducing the bit error rate and improving the end-to-end communication reliability.

[0066] Figure 3 A flowchart of a method for comparing a first sequence and a second sequence in a joint decoding method according to an embodiment of the present disclosure and determining a decoding result of target coded information based on the comparison result is shown. Figure 3 As shown, the method may include the following steps:

[0067] Step S310, determining whether the first sequence is consistent with the second sequence.

[0068] In some embodiments of the present disclosure, the first sequence and the second sequence are compared bit by bit to see whether they are consistent.

[0069] If the results are consistent, step S320 is executed to determine that the first sequence is the decoding result of the target coding information.

[0070] If the results are inconsistent, step S330 is executed to perform bit flipping on the first sequence to determine the decoding result of the target coded information. In some embodiments of the present disclosure, the decoding performance is improved by gradually correcting a single-bit error in the SC decoding method, and the target coded information (i.e., the information to be decoded) is subjected to SC decoding and LSTM decoding. If the decoding results are inconsistent, the decoding is erroneous. The position where the decoding error occurs is determined, and the information bits at the position where the error occurs are flipped in sequence, and the results after each flip are evaluated to determine the decoding result.

[0071] The method of the present invention determines the flipped bit position by performing SC decoding and LSTM decoding, and when the decoding results are inconsistent, performs bit flipping bit by bit, evaluates the decoding result after each flipping, improves the decoding accuracy of bit flipping, reduces the complexity of decoding error correction, and can improve decoding performance.

[0072] Step S330 may further include: step S340, performing a measurement calculation based on the first sequence and the result of bit flipping the first sequence to determine a corresponding measurement, wherein the more correct the sequence data is, the smaller the measurement is; and determining the decoding result according to the measurement with the smallest value.

[0073] Due to the reliability measurement concept of this joint algorithm, this joint algorithm has a more reliable bit checking system and provides a more reliable error correction function.

[0074] In some embodiments of the present disclosure, the calculation formula for calculating the measure l is:

[0075]

[0076] Where l represents the sum of the absolute values ​​of the inconsistent bits rj of the decoding result sequence v and the decoding result sequence z corresponding to the coded information r. The accuracy of the decoding result is estimated by calculating the Hamming distance from the maximum likelihood decision, making the decoding method simpler and the decoding result more intuitive.

[0077] In some embodiments of the present disclosure, step S340 may further include the following steps:

[0078] Step S340a, obtaining a first measurement value of the first sequence according to an XOR operation result of the re-encoding result of the first sequence and the hard decision result of the target coding information.

[0079] In some embodiments of the present disclosure, the re-encoding result is to execute the process of step S210 to step S240 shown in FIG. 2 on the first sequence, which will not be described in detail here.

[0080] In some embodiments of the present disclosure, hard decision is to perform limited N-bit quantization on the output signal of the demodulator, and the value above the threshold is considered to be 1, and the value below the threshold is considered to be 0. For example, if the target coded information is 0.7, it may be (+1-0.3) or (0+0.7), so the actual decoding process is to determine which of the two possibilities is more likely. If the threshold value is 0.5, then (+1-0.3) is more likely and it is determined to be +1.

[0081] For example, the target coding information r = (-1.2, -2.3, 0.7, 1.9, 3.0, -9, -3.5, 2.8); the first sequence obtained by inputting the target coding information into the SC decoder is (1100); the second sequence obtained by inputting it into the LSTM decoder is (1010). The result of the hard decision of r is z = (11000110), and the decision rule is that numbers less than 0 are judged as 1, and numbers greater than 0 are judged as 0. Assume that the SC decoding result is re-encoded to obtain the codeword x 1 =(10100010). 1 XOR operation with z, According to formula (5), the r values ​​corresponding to the position d=1 are accumulated to obtain the first measure l 0 , i.e. l 0 =|r 2 |+|r 3 |+|r 6 |=2.3+0.7+9=12.

[0082] Step S340b: performing bit flipping on the first sequence to obtain a flipped sequence.

[0083] In some embodiments of the present disclosure, the first sequence is compared with the second sequence, and the first different position is found to perform bit flipping to obtain a flip sequence. For example, the first sequence is (1100) and the second sequence is (1010). The second bit of the first sequence is bit flipped to obtain a flip sequence of (1000). The flip sequence is re-encoded to obtain x 2 =(11001010), x 2 XOR operation with z, So we get the second measure l 1 , l 1 =2.3+0.7+3.0=6.

[0084] This embodiment verifies the SC decoding result. The SC decoding result and the measurement value obtained by performing bit flipping on the SC decoding result are respectively calculated. An accurate decoding comparison result can be obtained by comparison.

[0085] In some embodiments of the present disclosure, step S340b further includes step S3402b, bit by bit flipping the bits in the first sequence that are inconsistent with the second sequence, and obtaining a flip sequence each time a bit is flipped.

[0086] For example, the first sequence is (1100) and the second sequence is (1010). After comparison, the third bit is inconsistent, so the third bit of the first sequence is bit-flipped to obtain a flip sequence of (1110). Assuming that the re-encoding is x 3 =(00010101), then That is, the third measure is l 2 =1.2+2.3+0.7+1.9+3.0+3.5+2.8=15.4.

[0087] Execute step S342 to determine the decoding result according to the measure with the smallest value. In some embodiments of the present disclosure, the first measure, the second measure and the third measure are comprehensively compared to obtain the smallest second measure l 1 The corresponding flip sequence (1000) is the most reliable encoding result.

[0088] According to the method of the present invention, the probability of one bit error in the coded information is much greater than the probability of two bits or more error. The bit with the highest error probability is found out through bit-by-bit comparison and flipped, thereby ensuring the reliability and accuracy of decoding error correction to a certain extent.

[0089] Figure 4 A flow chart of the LSTM model training method in a joint decoding method in an embodiment of the present disclosure is shown. Figure 4 As shown, the method 400 includes the following steps:

[0090] Step S410, obtaining original information and coded information, wherein the coded information is obtained by encoding the original information.

[0091] In some embodiments of the present disclosure, the original information is channel-coded to form coded information. The specific process is steps S210 to S240 in FIG2 , which will not be described in detail here.

[0092] Step S420: using the encoded information as training data.

[0093] Step S430, using the original information as training labels, and training the LSTM decoder until the output of the loss function converges.

[0094] In some embodiments of the present disclosure, the LSTM model is built in the MATLAB environment; the LSTM network architecture is defined as follows, the number of input features and the number of output responses are both 6, and the number of hidden units in the network is set to 120; the solver of the training model is set to 'Adam' and 103 rounds of training are performed; to prevent gradient explosion, the gradient threshold is set to 1, the initial learning rate is 0.005, and the learning rate is reduced by multiplying by a reduction factor of 0.5 after every 25 rounds of training; the data set includes the original information and the encoded information corresponding to the original information. The data set is divided into a training data set and a test data set in a ratio of 6:4; the goal is to decode the encoded information; the encoded information is used as the input vector of the LSTM network, and the decoding result of the encoded information is the output vector of the LSTM. Again, the data passes through the activation function of the output layer to obtain the probability value of each bit, and the set threshold is used to determine whether each bit is 0 or 1. If the threshold is set to 0.5, when the probability value of the bit is greater than the threshold, the bit is judged to be 1; otherwise, the bit is judged to be 0. The judgment formula is

[0095]

[0096] Finally, the loss function of the decoding result and the original information is calculated to make the decoding result and the original information closer and closer. In this process, the parameters of the neural network are continuously adjusted to complete the training when the algorithm converges.

[0097] In the embodiments of the present disclosure, a decoding test phase is also included. For example, after the coding information of the test set is input into the trained LSTM neural network, the decoding result can be obtained. In some embodiments, the decoding bit error rate (BER) is used as an indicator to measure the decoding performance. The bit probability of decoding error can be obtained through the BER calculation function. The decoding result is compared with the original information one by one, and the number of error bits is counted. After all comparisons are completed, the number of error bits is divided by the total number of bits in the test set to obtain the BER.

[0098] The embodiment of the present invention adopts long short-term memory (LSTM) to process sample coding data, which can accelerate network convergence, further shorten the decoding and error correction time, and improve the efficiency of decoding and error correction.

[0099] Figure 5A FIG. 2 shows a specific implementation block diagram of a joint decoding method in an embodiment of the present disclosure. Figure 5A As shown, the method comprises the following steps:

[0100] Step S510, first input the r received vector into the hard decision decoder, and record the sequence of r hard decisions of 01 as z.

[0101] Step S520: record the bit sequence of SC decoding Re-encode to get codeword x1 .

[0102] x 1 Compare with z, that is, XOR the two to get the sequence d, find the index of the different position, that is, the position where the sequence d is 1 after XOR processing; take the absolute value of r corresponding to the position d=1 and add them together to get a measure l 0 At this time, the measure l 0 The corresponding predicted value sequence is

[0103] Step S530, compare the SC decoding result and the LSTM decoding result bit by bit, find the first different position, and flip the bit of this position, that is, get

[0104] Step S540: Re-decode to get x 2 , x 2 Compare with z, that is, XOR the two to get the sequence d, find the index of the different position, that is, the position where the sequence d is 1 after XOR processing; take the absolute value of r corresponding to the position d=1 and add them together to get a measure l 1 At this time, the measure l 1 The corresponding codeword is the predicted value sequence after flipping

[0105] Step S550, compare the SC decoding result and the LSTM decoding result bit by bit, find the next different position, and then perform bit flipping, re-encoding, and XOR processing in sequence to find the absolute value of r corresponding to the different positions and then accumulate them to obtain the measure l 2 , and so on, executing step S560 until all different positions are traversed, and each time a l is obtained i And the corresponding predicted value sequence Finally, take the smallest l j The corresponding code word flip result is used as the corrected prediction value sequence Assign to

[0106] Figure 5B The simulation results of a joint decoding method in the embodiment of the present disclosure are shown. As shown in FIG5 , the performance of the joint algorithm SC-LSTM algorithm and the performance of the bit error rate BER lower bound under low signal-to-noise ratio are almost completely overlapped, that is, the performance of the SC-LSTM algorithm almost reaches the lower bound of BER. The BER lower bound is the minimum BER of the input signal in theory. Figure 5BIt shows that under high signal-to-noise ratio, the performance curve of the SC-LSTM algorithm is significantly improved on the basis of the SC algorithm, and the SC-LSTM performance curve is close to the BER lower bound curve. This joint algorithm can improve the decoding performance of the traditional SC decoder and approach the error BER lower bound. Therefore, compared with the traditional decoding algorithm, the SC performance is significantly improved.

[0107] It should be noted that the above figures are only schematic illustrations of the processes included in the method according to an exemplary embodiment of the present invention, and are not intended to be limiting. It is easy to understand that the processes shown in the above figures do not indicate or limit the time sequence of these processes. In addition, it is also easy to understand that these processes can be performed synchronously or asynchronously, for example, in multiple modules.

[0108] Figure 6 FIG. 2 shows a schematic diagram of a joint decoding device in an embodiment of the present disclosure. Figure 6 As shown, the device 600 includes:

[0109] The first acquisition module 610 is used to acquire target coded information. The SC serial offset decoding module 620 is used to decode the target coded information by an SC decoder to obtain a first sequence. The LSTM long short-term neural network decoding module 630 is used to decode the target coded information by a pre-trained long short-term neural network LSTM decoder to obtain a second sequence. And the comparison module 640 compares the first sequence and the second sequence, and determines the decoding result of the target coded information based on the comparison result.

[0110] In some embodiments of the present disclosure, the comparison module 640 is specifically used to determine that the first sequence is the decoding result of the target coding information if the first decoding result is consistent with the second decoding result; if the first decoding result is inconsistent with the second decoding result, perform bit flipping on the first sequence to determine the decoding result of the target coding information.

[0111] In some embodiments of the present disclosure, the comparison module 640 is also used to perform a measurement calculation based on the first sequence and the result of bit flipping the first sequence to determine a corresponding measurement, wherein the more correct the sequence data is, the smaller the measurement is; and the decoding result is determined based on the measurement with the smallest value.

[0112] In some embodiments of the present disclosure, the comparison module 640 is also used to obtain a first measurement value of the first sequence based on the XOR operation result of the re-encoding result of the first sequence and the hard decision result of the target coding information; perform bit flipping on the first sequence to obtain a flipped sequence, so as to obtain a second measurement value corresponding to the flipped sequence based on the XOR operation result of the re-encoding result of the flipped sequence and the hard decision result of the target coding information.

[0113] In some embodiments of the present disclosure, the comparison module 640 is further configured to flip the bits in the first sequence that are inconsistent with the second sequence bit by bit, and obtain a flip sequence each time a bit is flipped.

[0114] In some embodiments of the present disclosure, an LSTM training module is used to obtain original information and encoded information, wherein the encoded information is obtained by encoding the original information; the encoded information is used as training data; and the original information is used as a training label to train the LSTM decoder until the output of the loss function converges.

[0115] It will be appreciated by those skilled in the art that various aspects of the present invention may be implemented as a system, method or program product. Therefore, various aspects of the present invention may be specifically implemented in the following forms, namely: a complete hardware implementation, a complete software implementation (including firmware, microcode, etc.), or a combination of hardware and software, which may be collectively referred to herein as a "circuit", "module" or "system".

[0116] Refer to the following Figure 7 An electronic device 700 according to this embodiment of the present invention will be described. Figure 7 The electronic device 700 shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present invention.

[0117] like Figure 7 As shown, the electronic device 700 is in the form of a general computing device. The components of the electronic device 700 may include but are not limited to: at least one processing unit 710, at least one storage unit 720, and a bus 730 connecting different system components (including the storage unit 720 and the processing unit 710).

[0118] The storage unit stores program codes, which can be executed by the processing unit 710, so that the processing unit 710 performs the steps according to various exemplary embodiments of the present invention described in the above “Exemplary Method” section of this specification. For example, the processing unit 710 can perform the following steps: Figure 2A In step S210 shown in the figure, target coding information is obtained; in step S220, a serial cancellation SC decoder is used to decode the target coding information to obtain a first sequence; in step S230, a pre-trained long short-term neural network LSTM decoder is used to decode the target coding information to obtain a second sequence; and in step S240, the first sequence and the second sequence are compared, and a decoding result of the target coding information is determined based on the comparison result.

[0119] The storage unit 720 may include a readable medium in the form of a volatile storage unit, such as a random access storage unit (RAM) 7201 and / or a cache storage unit 7202 , and may further include a read-only storage unit (ROM) 7203 .

[0120] The storage unit 720 may also include a program / utility 7204 having a set (at least one) of program modules 7205, such program modules 7205 including but not limited to: an operating system, one or more application programs, other program modules, and program data, each of which or some combination may include an implementation of a network environment.

[0121] Bus 730 may represent one or more of several types of bus structures, including a memory unit bus or memory unit controller, a peripheral bus, an accelerated graphics port, a processing unit, or a local bus using any of a variety of bus architectures.

[0122] The electronic device 700 may also communicate with one or more external devices (e.g., keyboards, pointing devices, Bluetooth devices, etc.), may also communicate with one or more devices that enable a user to interact with the electronic device 700, and / or may communicate with any device that enables the electronic device 700 to communicate with one or more other computing devices (e.g., routers, modems, etc.). Such communication may be performed via an input / output (I / O) interface 750. Furthermore, the electronic device 700 may also communicate with one or more networks (e.g., local area networks (LANs), wide area networks (WANs), and / or public networks, such as the Internet) via a network adapter 760. As shown, the network adapter 760 communicates with other modules of the electronic device 700 via a bus 730. It should be understood that, although not shown in the figure, other hardware and / or software modules may be used in conjunction with the electronic device 700, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems, etc.

[0123] In an exemplary embodiment of the present disclosure, a computer-readable storage medium is also provided, on which a program product capable of implementing the above method of the present specification is stored. In some possible implementations, various aspects of the present invention can also be implemented in the form of a program product, which includes a program code, and when the program product is run on a terminal device, the program code is used to enable the terminal device to execute the steps according to various exemplary embodiments of the present invention described in the above "Exemplary Method" section of the present specification.

[0124] The program product for implementing the above method according to an embodiment of the present invention may adopt a portable compact disk read-only memory (CD-ROM) and include program code, and may be run on a terminal device, such as a personal computer. However, the program product of the present invention is not limited thereto, and in this document, a readable storage medium may be any tangible medium containing or storing a program, which may be used by or in combination with an instruction execution system, apparatus, or device.

[0125] The program product may use any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. The readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples (non-exhaustive list) of readable storage media include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0126] Computer readable signal media may include data signals propagated in baseband or as part of a carrier wave, in which readable program code is carried. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. Readable signal media may also be any readable medium other than a readable storage medium, which may send, propagate, or transmit a program for use by or in conjunction with an instruction execution system, apparatus, or device.

[0127] The program code embodied on the readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wired, optical cable, RF, etc., or any suitable combination of the foregoing.

[0128] Program code for performing the operations of the present invention may be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java, C++, etc., and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user computing device, partially on the user device, as a separate software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server. In the case of a remote computing device, the remote computing device may be connected to the user computing device through any type of network, including a local area network (LAN) or a wide area network (WLAN), or may be connected to an external computing device (e.g., through the Internet using an Internet service provider).

[0129] It should be noted that, although several modules or units of the device for action execution are mentioned in the above detailed description, this division is not mandatory. In fact, according to the embodiments of the present disclosure, the features and functions of two or more modules or units described above can be embodied in one module or unit. On the contrary, the features and functions of one module or unit described above can be further divided into multiple modules or units to be embodied.

[0130] In addition, although the steps of the method in the present disclosure are described in a specific order in the drawings, this does not require or imply that the steps must be performed in this specific order, or that all the steps shown must be performed to achieve the desired results. Additionally or alternatively, some steps may be omitted, multiple steps may be combined into one step, and / or one step may be decomposed into multiple steps, etc.

[0131] Through the description of the above implementation, it is easy for those skilled in the art to understand that the example implementation described here can be implemented by software, or by software combined with necessary hardware. Therefore, the technical solution according to the implementation of the present disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, a USB flash drive, a mobile hard disk, etc.) or on a network, including several instructions to enable a computing device (which can be a personal computer, a server, a mobile terminal, or a network device, etc.) to execute the method according to the implementation of the present disclosure.

[0132] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any modification, use or adaptation of the present disclosure, which follows the general principles of the present disclosure and includes common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present disclosure are indicated by the appended claims.

Claims

1. A joint decoding method, characterized in that: include: Get target encoding information; The target coded information is decoded by a serial cancellation (SC) decoder to obtain a first sequence; The target encoded information is decoded by a pre-trained long short-term neural network (LSTM) decoder to obtain a second sequence; as well as comparing the first sequence and the second sequence, and determining a decoding result of the target coding information based on the comparison result, which includes: if the first sequence is consistent with the second sequence, determining the first sequence as the decoding result of the target coding information; If the first sequence is inconsistent with the second sequence, bit flipping is performed on the first sequence to determine the decoding result of the target coding information.

2. The joint decoding method according to claim 1, characterized in that: Performing bit flipping on the first sequence to determine the decoding result of the target coded information includes: Performing a measure calculation based on the first sequence and a result of performing bit flipping on the first sequence to determine a corresponding measure, wherein the more correct the sequence data is, the smaller the measure is; The decoding result is determined according to the measure with the smallest value.

3. The joint decoding method according to claim 2, characterized in that: Performing a measure calculation based on the first sequence and a result of performing bit flipping on the first sequence to determine a corresponding measure includes: Obtaining a first measurement value of the first sequence according to an XOR operation result of a re-encoding result of the first sequence and a hard decision result of the target coding information; The first sequence is bit-flipped to obtain a flip sequence, and a second measurement value corresponding to the flip sequence is obtained according to an XOR operation result of a re-encoding result of the flip sequence and a hard decision result of the target coding information.

4. The joint decoding method according to claim 3, characterized in that: Performing bit flipping on the first sequence to obtain a flipped sequence includes: The bits in the first sequence that are inconsistent with the second sequence are flipped bit by bit, and a flip sequence is obtained each time a bit is flipped.

5. The joint decoding method according to claim 1, characterized in that: The method further comprises: Acquire original information and coded information, wherein the coded information is obtained by encoding the original information; Using the encoded information as training data; and The original information is used as a training label to train the LSTM decoder until the output of the loss function converges.

6. The joint decoding method according to claim 2, wherein: The formula for calculating the measure is: Where l represents the inconsistent bit position r between the decoding result sequence v and the decoding result sequence z corresponding to the coded information r j The cumulative sum of the absolute values ​​of .

7. A joint decoding device, characterized in that: include: A first acquisition module, used to acquire target coding information; An SC serial offset decoding module, configured to decode the target coded information by an SC decoder to obtain a first sequence; An LSTM long short-term neural network decoding module is used to decode the target encoded information using a pre-trained long short-term neural network LSTM decoder to obtain a second sequence; as well as A comparison module, comparing the first sequence and the second sequence, and determining a decoding result of the target coding information based on the comparison result, comprising: if the first sequence is consistent with the second sequence, determining the first sequence as the decoding result of the target coding information; If the first sequence is inconsistent with the second sequence, bit flipping is performed on the first sequence to determine the decoding result of the target coding information.

8. An electronic device, characterized in that: include: processor; as well as A memory, configured to store executable instructions of the processor; The processor is configured to perform the joint decoding method according to any one of claims 1 to 6 by executing the executable instructions.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the joint decoding method according to any one of claims 1 to 6 is implemented.

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