A single - ended to differential noise suppression circuit and its image sensor

Abstract

The present invention provides a noise suppression circuit for converting a single-ended signal to a differential signal, which includes an image sensor provided with a pixel array, a bright pixel, and a dark pixel having the same size and circuit design as the bright pixel; an operational amplifier for differentially outputting the output voltages of the bright pixel and the dark pixel; a switched-capacitor circuit connected between the output terminals of the bright pixel, the output terminal of the dark pixel, and the operational amplifier, for subtracting the output of the bright pixel under illumination conditions from the output of the dark pixel under non-illumination conditions and inputting the result to the positive input terminal of the operational amplifier, and at the same time subtracting the output of the bright pixel under non-illumination conditions from the output of the dark pixel under illumination conditions and inputting the result to the negative input terminal of the operational amplifier. The present invention further provides an image sensor. By adjusting the capacitance value of the sampling capacitor, the present invention suppresses fixed pattern noise, realizes the change of the gain of the operational amplifier, realizes the function of converting a single-ended signal to a differential signal, and outputs a differential signal through the operational amplifier.

Description

Technical Field

[0001] The present invention relates to the technical field of signal processing circuits for image sensors, and particularly to a single-ended to differential noise suppression circuit and an image sensor. Background Art

[0002] The noise of an image sensor affects the signal-to-noise ratio of an image. Severe noise not only deteriorates the imaging quality but also determines the light detection ability of the image sensor. We define the image noise of an image sensor as all fluctuations that deteriorate the image or "signal". The image noise of an image sensor can be divided into fixed-pattern noise (FPN) that appears at fixed positions in the image and transient noise that varies with time.

[0003] For transient noise, which originates from the random fluctuations of the signal over time, there are three types in optical and electrical systems: thermal noise, shot noise, and flicker noise. Transient noise is fixed in space in a single sampling, while fixed-pattern noise is an inherent variation of the output signal in space and has a greater impact on image quality. The fixed-pattern noise of an image sensor is mainly divided into dark signal non-uniformity (DSNU) in the dark and photo response non-uniformity (PRNU) under illumination. In an image sensor, the main source of fixed-pattern noise is the leakage current in the dark state.

[0004] Traditional image sensors mainly use correlated double sampling (CDS) and differential delta sampling (DDS) to suppress the fixed-pattern noise in the image sensor. For the above two noise suppression schemes, they both require a reset signal to complete the signal sampling, and the circuit design is relatively complex; for random access pixel circuits such as logarithmic pixel circuits, since correlated double sampling cannot be implemented, the noise suppression function cannot be achieved. Summary of the Invention

[0005] Based on this, in order to suppress the fixed-pattern noise of an image sensor, especially a sensor with a random access pixel circuit design, the present invention provides a single-ended to differential noise suppression circuit. Through the design of a switched-capacitor circuit, while suppressing the fixed-pattern noise, the function of single-ended to differential conversion and the regulation of the operational amplifier gain are achieved.

[0006] The present invention adopts the following technical solutions to solve the problems existing in the prior art:

[0007] A single - ended to differential noise suppression circuit, including an image sensor provided with a pixel array, and,

[0008] A bright pixel, which is any pixel in the pixel array of the image sensor, and is used to sense incident light and output a current or voltage value that varies with the light intensity;

[0009] A dark pixel, whose size and circuit design are exactly the same as those of the bright pixel, and is used to output the current or dark voltage value under the current non - illuminated background;

[0010] An operational amplifier, which is used to differentially output the output voltages of the bright pixel and the dark pixel;

[0011] A switched - capacitor circuit, which is connected between the output terminal of the bright pixel, the output terminal of the dark pixel, and the operational amplifier, and is used to subtract the output of the bright pixel under the illumination condition from the output of the dark pixel under the non - illumination condition and input it to the positive input terminal of the operational amplifier, and at the same time subtract the output of the bright pixel under the illumination condition from the output of the dark pixel under the non - illumination condition and input it to the negative input terminal of the operational amplifier.

[0012] In the present invention, a dark pixel is set in any n columns or any n rows of the image sensor array, where the size and circuit design of the dark pixel are consistent with those of the bright pixels in the array, and its output terminal is connected to the switched - capacitor circuit to perform differential comparison with the bright pixels in the array, suppress the fixed - pattern noise, adjust the gain, realize the single - ended to differential function, and output differential signals at the same time, where n is a positive integer.

[0013] Further, the switched - capacitor circuit includes a sampling capacitor, an amplification capacitor, a switching circuit, and a two - phase non - overlapping clock signal generator for generating the timing of the switching circuit to control the conduction or disconnection of each switch in the switching circuit.

[0014] Further, the amplification capacitor is connected between the input and output terminals of the operational amplifier; there are 2 sampling capacitors. The first sampling capacitor is respectively connected to the output terminal of the bright pixel and the negative input terminal of the operational amplifier through the switching circuit, and is also connected to the output terminal of the dark pixel through the switching circuit. One end of the second sampling capacitor is connected to the output terminal of the dark pixel, and the other end is connected to the positive input terminal of the operational amplifier and the output terminal of the bright pixel through the switching circuit.

[0015] Further, the switch circuit includes switches S1, S2, S3, and S4. In the first stage, under the control of the two-phase non-overlapping clock signal generator, switches S1 and S4 are closed, and switches S2 and S3 are open. The bright pixel output voltage and the dark pixel output voltage charge the sampling container. In the second stage, under the control of the two-phase non-overlapping clock signal generator, switches S1 and S4 are open, and switches S2 and S3 are closed. The sampling capacitor discharges and charges the amplification capacitor.

[0016] Further, there are two switches S1. Among them, the first switch S1 is connected between the bright pixel output terminal and the first sampling capacitor, and the second switch S1 is connected between the bright pixel output terminal and the second sampling capacitor. There are two switches S2. Among them, the first switch S2 is connected between switch S4 and the inverting input terminal of the operational amplifier, and the second switch S2 is connected between the second switch S1 and the non-inverting input terminal of the operational amplifier. Switch S3 is connected between the first switch S1 and the dark pixel output terminal. Switch S4 is connected between the first sampling capacitor and the dark pixel output terminal.

[0017] Further, the switch circuit is a MOS complementary transistor switch circuit. When the control signal of the control terminal of the MOS complementary transistor switch circuit is at a low level, the switch is in the off state and cannot complete the signal transmission. When the control signal of the control terminal of the MOS complementary transistor switch circuit is at a high level, the switch is in the on state and can complete the signal transmission process from the input to the output terminal.

[0018] Further, the sampling capacitor further includes more than one set of adjustment capacitors. The adjustment capacitors are used to adjust the capacitance ratio between the sampling capacitor and the amplification capacitor to change the gain value. Each set of adjustment capacitors has two capacitors. One of them is connected in parallel with the first sampling capacitor through the switch circuit, and the other is connected in parallel with the second sampling capacitor through the switch circuit.

[0019] Further, there are three sets of adjustment capacitors.

[0020] Another object of the present invention is to provide an image sensor, in which the single-ended to differential noise suppression circuit described above is provided.

[0021] Compared with the prior art, the beneficial effects of the present invention are:

[0022] The present application proposes a noise suppression circuit for converting single-ended to differential-ended. First, a dark pixel that is exactly the same as the bright pixel in circuit design and structure is introduced. Then, through the differential of the switched capacitor circuit, the output of the bright pixel under the illumination condition is subtracted from the output of the dark pixel under the non-illuminated dark condition and input to the positive input terminal of the operational amplifier, and the output of the dark pixel under the non-illuminated dark condition is subtracted from the output of the bright pixel under the illumination condition and input to the negative input terminal of the operational amplifier, completing the function of converting single-ended to differential-ended and realizing the differential output of the signal. Further, the present application suppresses the fixed pattern noise by adjusting the capacitance value of the sampling capacitor, realizes the change of the gain of the operational amplifier, realizes the function of converting single-ended to differential-ended, and outputs a differential signal through the operational amplifier. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 The circuit principle block diagram of the present invention is shown;

[0024] Figure 2 The circuit schematic diagram of the present invention is shown;

[0025] Figure 3 The timing diagram of the switching circuit generated by the dual-phase non-overlapping clock signal generator of the present invention is shown. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0026] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings, but it is not a limitation on the protection scope of the present invention. Based on the description of the embodiments of the present application, other embodiments obtained by those of ordinary skill in the art without creative efforts all fall within the protection scope of the present invention. When the following description involves the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements.

[0027] Please refer to Figure 1 as shown Figure 1 The circuit principle block diagram of the present application is shown.

[0028] A noise suppression circuit for converting single-ended to differential-ended is provided in the image sensor of the present application. The noise suppression circuit for converting single-ended to differential-ended includes an image sensor provided with a pixel array, and further includes: a bright pixel V IN , which is any pixel in the pixel array of the image sensor, and is used to sense the incident light and output a current or voltage value that changes with the illumination intensity. A dark pixel V CM , whose size and circuit design are exactly the same as those of the bright pixel V IN , and is used to output the current or dark voltage value under the current non-illuminated background. An operational amplifier OPA, and the operational amplifier OPA is used to amplify the bright pixel V IN and the dark pixel V CMThe output voltage is output after differential output. A switched-capacitor circuit is connected between the bright pixel output terminal, the dark pixel output terminal, and the operational amplifier OPA, and is used to subtract the output of the bright pixel V under the illumination condition from the output of the dark pixel V under the non-illumination condition and input it to the positive input terminal of the operational amplifier OPA. At the same time, subtract the output of the dark pixel V under the non-illumination condition from the output of the bright pixel V under the illumination condition and input it to the negative input terminal of the operational amplifier OPA. IN The output of CM is subtracted from the output of the bright pixel V under the illumination condition and input to the positive input terminal of the operational amplifier OPA. At the same time, the output of the dark pixel V CM is subtracted from the output of the bright pixel V under the illumination condition and input to the negative input terminal of the operational amplifier OPA. IN

[0029] The operational amplifier OPA is a differential amplifier with dual-ended input and dual-ended output, and is used to output the output voltage of the bright pixel V IN and the dark pixel V CM after differential output.

[0030] The structure of the bright pixel described in the present invention can be any pixel structure of an existing complementary metal oxide semiconductor (CMOS) image sensor (CIS), including a passive pixel, an active pixel, or a random access active pixel circuit, and also includes any known pixel structure not listed in this embodiment. The size and circuit structure of the dark pixel are exactly the same as those of the bright pixel.

[0031] In the following description, the output of the bright pixel V IN represents the voltage value output by any pixel in the pixel array of the image sensor that changes with the illumination intensity under the illumination condition. The output of the dark pixel V CM represents the voltage value output by the additional pixel in the pixel array of the image sensor for collecting the non-illuminated background, that is, the output voltage of the dark pixel under the dark condition.

[0032] In this application, a dark pixel is set in any n columns or any n rows of the image sensor array. The size and circuit design of the dark pixel are the same as those of the bright pixels in the array, so as to output the current or dark voltage value under the current non-illuminated background and connect its output terminal to the switched-capacitor circuit to perform differential comparison with the bright pixels in the array, suppress the fixed pattern noise, adjust the gain, realize the function of single-ended to dual-ended conversion, and output differential signals at the same time. n is a positive integer.

[0033] Please refer to Figure 2 simultaneously. The switched-capacitor circuit includes a sampling capacitor, an amplification capacitor, a switching circuit, and a two-phase non-overlapping clock signal generator for generating the timing of the switching circuit to control the conduction or disconnection of each switch in the switching circuit.

[0034] There are 2 amplification capacitors C0, which are respectively connected between the input and output terminals of the operational amplifier. There are 2 sampling capacitors C1. Among them, the first sampling capacitor is respectively connected to the output terminal of the bright pixel V IN and the inverting input terminal of the operational amplifier OPA through the switching circuit, and is simultaneously connected to the output terminal of the dark pixel V CM through the switching circuit. One end of the second sampling capacitor is connected to the output terminal of the dark pixel V CM , and the other end is connected to the non-inverting input terminal of the operational amplifier OPA and the output terminal of the bright pixel V IN through the switching circuit.

[0035] The switching circuit includes switches S1, S2, S3, and S4. In the first stage, under the control of the two-phase non-overlapping clock signal generator, switches S1 and S4 are closed, and switches S2 and S3 are opened. The output voltage of the bright pixel V IN and the output voltage of the dark pixel V CM charge the sampling capacitor C1. In the second stage, under the control of the two-phase non-overlapping clock signal generator, switches S1 and S4 are opened, and switches S2 and S3 are closed. The sampling capacitor C1 discharges and charges the amplification capacitor C0. For the timing diagram of the switching circuit generated by the two-phase non-overlapping clock signal generator, please refer to Figure 3 as shown.

[0036] There are 2 switches S1. Among them, the first switch S1 is connected between the output terminal of the bright pixel V IN and the first sampling capacitor, and the second switch S1 is connected between the output terminal of the bright pixel V IN and the second sampling capacitor. There are 2 switches S2. Among them, the first switch S2 is connected between switch S4 and the inverting input terminal of the operational amplifier, and the second switch S2 is connected between the second switch S1 and the non-inverting input terminal of the operational amplifier. The switch S3 is connected between the first switch S1 and the output terminal of the dark pixel V CM ; the switch S4 is connected between the first sampling capacitor and the output terminal of the dark pixel V CM .

[0037] The switching circuit is a MOS complementary transistor switching circuit. When the control signal at the control terminal of the MOS complementary transistor switching circuit is at a low level, the switch is in the off state and cannot complete the signal transmission. When the control signal at the control terminal of the MOS complementary transistor switching circuit is at a high level, the switch is in the on state and can complete the signal transmission process from the input to the output terminal.

[0038] The sampling capacitor C1 further includes more than one set of adjusting capacitors, which are used to adjust the capacitance ratio between the sampling capacitor C1 and the amplifying capacitor C0, so as to change the gain value. Each set of adjusting capacitors has two capacitors. One capacitor in each set of adjusting capacitors is connected in parallel with the first sampling capacitor through the switching circuit, and the other capacitor is connected in parallel with the second sampling capacitor through the switching circuit.

[0039] As Figure 2 shown, in this embodiment, there are three sets of adjusting capacitors, namely capacitor C2, capacitor C3 and capacitor C4, which are connected in parallel with the sampling capacitor C1 through the switches in the switching circuit.

[0040] Specifically, under the timing control of the switching circuit generated by the Figure 3 biphase non-overlapping clock signal generator shown, the sampling capacitor composed of the parallel connection of the sampling capacitor C1, the adjusting capacitors C2, C3 and C4 completes the differential sampling of the bright pixel output under the illumination condition and the dark pixel output under the dark condition. Subsequently, the sampling signal representing the light intensity signal and eliminating the fixed pattern noise is transferred to the amplifying capacitor C0 and output through the output terminal of the operational amplifier OPA.

[0041] In the first stage, at this time, the control signals of switches S1 and S4 are at high level and the switches are turned on; the control signals of switches S2 and S3 are at low level and the switches are turned off. The voltage across the sampling capacitor C1 is the output voltage of the bright pixel V IN under the illumination condition and the output voltage of the dark pixel V CM under the dark condition. At this time, the charge quantity at the positive input terminal of the operational amplifier OPA is

[0042] Q = (V IM - V CM )C1

[0043] At this time, the charge quantity at the negative input terminal of the operational amplifier OPA is

[0044] Q = (V CM - V IN )C1

[0045] Through this stage, the function of differential of the output terminals of the bright and dark pixels is completed, and the differential signal is transferred to the input terminal of the operational amplifier.

[0046] In the second stage, at this time, the control signals of switches S1 and S4 are at low level and the switches are turned off; the control signals of switches S2 and S3 are at high level and the switches are turned on. At this time, the input charge is transferred to the amplifying capacitor C0. Due to the conservation of charge, the charge quantity at the positive output terminal of the operational amplifier OPA is

[0047] (V OP - VCM )C0 = (V CM -V IN )C1

[0048] At this time, the magnitude of the charge quantity at the inverting output terminal of the operational amplifier OPA is

[0049] (V ON -V CM )C0 = (V IN -V CM )C1

[0050] Through the operational amplifier, the output voltage of the bright pixel under the illumination condition and the output voltage of the dark pixel under the dark condition are differentially output. At this time, the magnitude of the output voltage gain is the ratio of twice the capacitance value of the sampling capacitor C1 to the capacitance value of the amplification capacitor C0, 2C1 / C0.

[0051] In this embodiment, by adjusting the on / off states of the switches S5, S6, and S7 through the switch circuit, the proportional coefficient of the sum of the capacitance values of the sampling capacitor C1 and the adjustment capacitors C2, C3, and C4 to the capacitance value of the amplification capacitor C0 can be adjusted, so as to realize the adjustment of the output voltage of the operational amplifier OPA, that is, the amplification multiple of the difference between the output voltage of the bright pixel under the illumination condition and the output voltage of the dark pixel under the dark condition, and realize that the output voltage gain changes with the on / off states of the switches S5, S6, and S7.

[0052] In particular, when signal reduction needs to be achieved, it can be realized by adjusting the proportional coefficient of the sum of the capacitance values of the sampling capacitor C1 and the adjustment capacitors C2, C3, and C4 to the capacitance value of the amplification capacitor C0 to be less than 1. In short, whether it is signal amplification or reduction, the variable gain amplifier circuit in the embodiment of the present application can be realized independently without a dedicated amplification or reduction circuit.

[0053] It should be noted that the present invention is not limited to the above embodiments. If various modifications or deformations of the present invention do not depart from the spirit and scope of the present invention, and if these modifications and deformations fall within the scope of the claims of the present invention and equivalent technical scope, then the present invention also intends to include these modifications and deformations.

Claims

1. A single - ended to differential noise suppression circuit, including an image sensor provided with a pixel array, characterized in that Further included are: Bright pixels, each of which is any pixel in the pixel array of the image sensor, and is used to sense incident light and output a current or voltage value that varies with the light intensity; Dark pixels, whose size and circuit design are exactly the same as those of the bright pixels, and are used to output the current or dark voltage value under the current non-light illumination background; An operational amplifier, which is used to differentially output the output voltages of the bright pixels and the dark pixels; A switched-capacitor circuit, which is connected between the output ends of the bright pixels, the output ends of the dark pixels, the input end and the output end of the operational amplifier, and is used to subtract the output of the bright pixels under the light condition from the output of the dark pixels under the non-light condition and input it into the positive input end of the operational amplifier, and at the same time subtract the output of the dark pixels under the non-light condition from the output of the bright pixels under the light condition and input it into the negative input end of the operational amplifier; The switched-capacitor circuit includes a two-phase non-overlapping clock signal generator. The switched-capacitor circuit is controlled by the two-phase non-overlapping clock signal generator to be in a first stage and a second stage. In the first stage, the switched-capacitor circuit stores the difference signal obtained from the output of the bright pixels and the output of the dark pixels in the form of charge. In the second stage, the operational amplifier differentially amplifies and outputs the difference signal according to the charge stored by the switched-capacitor circuit in the first stage.

2. The single-ended to differential noise suppression circuit according to claim 1, wherein: The switched-capacitor circuit further includes a sampling capacitor, an amplification capacitor and a switching circuit. The two-phase non-overlapping clock signal generator is used to generate a switching circuit timing to control the conduction or disconnection of each switch in the switching circuit.

3. The single-ended to differential noise suppression circuit according to claim 2, wherein: The amplification capacitor is connected between the input and output ends of the operational amplifier; there are 2 sampling capacitors. The first sampling capacitor is respectively connected to the output end of the bright pixel and the negative input end of the operational amplifier through the switching circuit, and is also connected to the output end of the dark pixel through the switching circuit. One end of the second sampling capacitor is connected to the output end of the dark pixel, and the other end is connected to the positive input end of the operational amplifier and the output end of the bright pixel through the switching circuit.

4. A single - ended to differential noise suppression circuit according to claim 3, characterized in that: The switching circuit includes switches S1, S2, S3, and S4; in the first stage, under the control of the two-phase non-overlapping clock signal generator, switches S1 and S4 are closed, and switches S2 and S3 are opened. The output voltage of the bright pixel and the output voltage of the dark pixel charge the sampling capacitor; in the second stage, under the control of the two-phase non-overlapping clock signal generator, switches S1 and S4 are opened, and switches S2 and S3 are closed. The sampling capacitor discharges and charges the amplification capacitor.

5. A single-ended to differential noise suppression circuit according to claim 4, characterized in that: There are two switches S1. Among them, the first switch S1 is connected between the bright pixel output terminal and the first sampling capacitor, and the second switch S1 is connected between the bright pixel output terminal and the second sampling capacitor; there are two switches S2. Among them, the first switch S2 is connected between the switch S4 and the inverting input terminal of the operational amplifier, and the second switch S2 is connected between the second switch S1 and the non-inverting input terminal of the operational amplifier; the switch S3 is connected between the first switch S1 and the dark pixel output terminal; the switch S4 is connected between the first sampling capacitor and the dark pixel output terminal.

6. A single-ended to differential noise suppression circuit according to claim 3, wherein: The switch circuit is a MOS complementary transistor switch circuit. When the control signal of the control terminal of the MOS complementary transistor switch circuit is at a low level, the switch is in an off state and cannot complete the signal transmission; when the control signal of the control terminal of the MOS complementary transistor switch circuit is at a high level, the switch is in an on state and can complete the signal transmission process from the input to the output terminal.

7. A single - ended to differential noise suppression circuit according to claim 3, characterized in that: The sampling capacitor further includes more than one set of adjustment capacitors. The adjustment capacitor is used to adjust the capacitance ratio between the sampling capacitor and the amplification capacitor to change the gain value; each set of adjustment capacitors has two. One of them is connected in parallel with the first sampling capacitor through the switch circuit, and the other is connected in parallel with the second sampling capacitor through the switch circuit.

8. A single-ended to differential noise suppression circuit according to claim 7, wherein: There are three sets of the adjustment capacitors.

9. An image sensor, characterized in that: The circuit according to claim 1 is provided in the image sensor.

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