Photoelectric device and method for manufacturing the same

Abstract

An optoelectronic device (20) includes a thin film structure (56) disposed on a semiconductor substrate (54) and patterned to define components of an integrated drive circuit configured to generate a drive signal. A back-end-of-line (BEOL) stack (42) of alternating metal layers (44, 46) and dielectric layers (50) is disposed above the thin film structure. The metal layer includes a modulator layer (48), the modulator layer (48) including a plasmon waveguide (36, 99, 105) and a plurality of electrodes (30, 32, 34, 96, 98, 106), the plurality of electrodes (30, 32, 34, 96, 98, 106) applying modulation to surface plasmon polaritons (SPPs) propagating in the plasmon waveguide in response to the drive signal. A plurality of interconnect layers are patterned to couple the thin film structure to the electrodes. A light input coupler (38, 82) is configured to couple light into the modulator layer, thereby modulating the light by the modulation of the SPPs, and a light output coupler (38, 82) is configured to couple the modulated light out of the modulator layer.

Description

Technical Field

[0001] The present invention relates generally to optical communications, and more particularly to apparatus and methods for high-speed modulation of optical signals. Background Art

[0002] High-speed optical communications require modulating light sources at very high frequencies. The fastest optical interconnects achieved to date are capable of operating at 100Gb / s per channel, with higher speeds in the planning stages.

[0003] Plasmon modulators have been proposed as a possible solution to the demand for higher modulation speeds. This type of modulator is based on the interaction between surface plasmon polaritons (SPPs) and an externally applied electric field. Surface plasmon polaritons are generated at the interface between dielectric materials and metals and can be directly excited by a light beam. Applying a rapidly changing electric field to the metal results in modulation of the corresponding SPPs, which in turn translates into modulation of the light beam at the end of the plasmon region. The term "plasmon modulator" as used in this specification and claims refers to a device that applies an electric field to modulate surface plasmon polaritons, which are then converted back into a light beam at the end of the plasmon state. The term "light" is used herein for any optical radiation in the visible, infrared and ultraviolet ranges.

[0004] Plasmon modulators based on the above principles have been experimentally demonstrated and described in patent literature, but are still far from commercial deployment. For example, PCT International Publication WO 2011 / 162719 describes a metal oxide semiconductor plasmon slot waveguide, which includes a silicon layer, a silicon oxide layer laterally disposed next to a first side wall of the silicon layer, a first metal layer laterally disposed next to the silicon oxide layer, and a second metal layer laterally disposed next to a second side wall of the silicon layer, wherein the second side wall is opposite to the first side wall. Plasmon modes can propagate along the slot waveguide, and the propagation characteristics can be adjusted by applying a voltage to the metal layer. A metal oxide semiconductor plasmon modulator includes a first metal oxide semiconductor plasmon slot waveguide and a second metal oxide semiconductor plasmon slot waveguide of this type. Summary of the invention

[0005] Embodiments of the invention described below provide improved apparatus and methods for high speed modulation of optical beams.

[0006] Therefore, according to an embodiment of the present invention, an optoelectronic device is provided, which includes a semiconductor substrate and a thin film structure, the thin film structure is disposed on the substrate and is patterned to define components of an integrated drive circuit, the integrated drive circuit is configured to generate a drive signal. A back-end line (BEOL) stack of alternating metal layers and dielectric layers is disposed above the thin film structure. The metal layer includes a modulator layer, the modulator layer includes a plasmon waveguide and is patterned to define a plurality of electrodes, the plurality of electrodes being configured to apply modulation to surface plasmon polaritons (SPPs) propagating in the plasmon waveguide in response to a drive signal applied to the electrode. A plurality of interconnect layers are patterned to define electrical traces, which are connected to the thin film structure on the substrate and the electrodes in the modulator layer through vias, so as to interconnect the components of the integrated drive circuit and apply the drive signal generated thereby to the electrode. The optical input coupler is configured to couple light into the modulator layer, thereby modulating the light by modulation of the SPP. The optical output coupler is configured to couple the modulated light out of the modulator layer.

[0007] In one embodiment, the plasmon waveguide is configured as a Mach-Zehnder interferometer having a first parallel leg and a second parallel leg, and the electrodes include at least a first electrode and a second electrode configured to apply modulation of the SPPs having different respective phases to the first parallel leg and the second parallel leg.

[0008] In another embodiment, the electrodes are patterned to define a ring modulator.

[0009] In some embodiments, at least one of the optical couplers is disposed in the plane of the modulator layer. Alternatively or additionally, at least one of the optical couplers is formed on the modulator layer and is configured to couple the light between the modulator layer and a propagation direction that is not parallel to the plane of the modulator layer.

[0010] In the disclosed embodiments, the modulator layer is the final outer layer of the BEOL stack.

[0011] In some embodiments, the device includes an electro-optic layer disposed above the modulator layer and within the plasmon waveguide. Additionally or alternatively, a transparent conductive oxide is disposed above the modulator layer and within the plasmon waveguide.

[0012] According to an embodiment of the present invention, a method for manufacturing an optoelectronic device is also provided. The method includes forming and patterning a thin film structure on a semiconductor substrate to define components of an integrated drive circuit, the integrated drive circuit being configured to generate a drive signal. A back-end-of-line (BEOL) stack of alternating metal layers and dielectric layers is deposited and patterned above the thin film structure. The metal layer includes a modulator layer, the modulator layer containing a plasmon waveguide and patterned to define a plurality of electrodes, the plurality of electrodes being configured to apply modulation to surface plasmon polaritons (SPPs) propagating in the plasmon waveguide in response to a drive signal applied to the electrode. A plurality of interconnect layers are patterned to define electrical traces, the electrical traces being connected to the thin film structure on the substrate and the electrodes in the modulator layer through vias, so as to interconnect the components of the integrated drive circuit and apply the drive signal generated thereby to the electrode. Light is coupled into the modulator layer, thereby modulating the light by modulation of the SPP, and the modulated light is coupled out of the modulator layer.

[0013] The present invention will be more fully understood from the following detailed description of embodiments of the present invention in conjunction with the accompanying drawings, in which: BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1A is a schematic top view of an integrated plasmon modulation device according to an embodiment of the present invention;

[0015] Figure 1B It is shown Figure 1A A schematic illustration of details of the device;

[0016] Figure 1C yes Figure 1A a schematic side view of the device;

[0017] Figure 2 is a schematic illustration of an integrated plasmon modulation device according to another embodiment of the present invention;

[0018] Figure 3 is a schematic diagram of an integrated plasmon modulation device according to another embodiment of the present invention;

[0019] Figure 4 is a schematic detailed view of a plasmon modulator according to yet another embodiment of the present invention;

[0020] Figure 5 is a schematic detailed view of a plasmon modulator according to yet another embodiment of the present invention; and

[0021] Figure 6 is an electrical schematic diagram of an integrated driving circuit for a plasmon modulation device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0022] Plasmon modulators are physically capable of modulating light at rates far exceeding 100 Gb / s. Furthermore, since surface plasmon polaritons (SPPs) exhibit increased light-matter interactions, plasmon devices can apply deep modulation to incident light beams over very short interaction lengths while requiring only moderate excitation voltages. However, in order to realize these advantages in practical devices, it is also necessary to efficiently generate the required high-speed electrical drive signals and apply them to the plasmon modulators over as short a link as possible while minimizing parasitic capacitance and power losses.

[0023] Embodiments of the invention described herein address this need by integrating a plasmon modulator into the back-end-of-line (BEOL) stack of the same integrated circuit (IC) device that generates the drive signal. As is well known in the art, IC manufacturing begins with the front-end-of-line (FEOL) step, where thin film structures are deposited on a semiconductor substrate, such as a silicon wafer, and patterned to define components of the IC, such as transistors, diodes, capacitors, and resistors. The BEOL stack is then formed by depositing alternating metal and dielectric layers over the thin film structures. The metal layers are patterned to define electrical traces that are connected to the thin film structures on the substrate through vias to interconnect the components of the IC and thereby form a functional device.

[0024] In this embodiment, one of the BEOL layers is used as a modulator layer. An optical input coupler couples light into the modulator layer. This layer contains a plasmon waveguide in which the metal is patterned to define electrodes that contact the waveguide. The remaining interconnect layers of the FEOL and BEOL stack form a high-speed integrated drive circuit that generates a drive signal for the modulator. Vias between the interconnect layer and the modulator layer supply this drive signal to the electrodes, thereby modulating the plasmons in the waveguide. This modulation is converted into optical modulation when the plasmons are converted back to light at the output of the plasmon modulator. An optical output coupler couples the modulated light out of the modulator layer.

[0025] Using BEOL layers as optical modulators differs from typical IC manufacturing practices, in which the active elements of the IC are in the FEOL layers and the BEOL provides only passive interconnects. However, BEOL processes are well suited for etching the electrical structure and plasmon waveguides of the modulator and can be adapted to receive and transmit the light beam to be modulated using optical coupling techniques known in the art. The three-dimensional integration of the modulator and its drive circuit provided by the present embodiment in the same IC chip enables high integration density between the drive circuit and the modulator and very short interconnects with low parasitic capacitance. Therefore, the modulator according to the present embodiment is capable of ultra-high speed modulation with high electrical efficiency and low heat dissipation.

[0026] Reference now Figures 1A to 1C , which schematically illustrates an integrated plasmon modulation device 20 according to an embodiment of the present invention. Figure 1A is a top view, and Figure 1B and Figure 1C 2 is a diagram and a side view, respectively, showing details of the internal structure of the device. The upper layer of the device 20 includes a plasmon modulator 26, which receives an input light beam via an input optical waveguide 22 and outputs a modulated light beam to an output optical waveguide 24. For example, waveguides 22 and 24 may include optical fibers. Alternatively, modulator 26 may receive and transmit light beams through free space.

[0027] The modulator 26 in this embodiment has the form of a Mach-Zehnder interferometer that includes a slot waveguide 36 for surface plasmon polaritons (SPPs) within a metallic modulator layer 48. The waveguide 36 splits into two parallel branches at a Y-junction at one end of the modulator 26 and then rejoins at another Y-junction at the other end. The slot of the waveguide 36 is defined by a common central electrode 30 and excitation electrodes 32 and 34 on opposite sides of the modulator. In a typical implementation, the slot is approximately 100nm to 200nm deep, 75nm to 100nm wide and 10μm to 25μm long; however, these dimensions are given by way of example only, and larger or smaller dimensions may be used alternatively. For example, electrode 30 may be grounded, while electrodes 32 and 34 are driven by signals having different respective phases (such as a drive signal S on electrode 32 and an inverted signal S on electrode 34). ) drive. The drive signal is typically in the range of a few volts peak to peak, but larger or smaller voltages may be used depending on the application requirements. Figure 1C As shown in FIG. 4 , electro-optic layer 52 is deposited over modulator layer 48 and fills the slots of waveguide 36. Layer 52 may include any suitable type of electro-optic material, such as a monolithic chromophore, such as DLD164, or a suitable ceramic, such as barium titanate (BaTiO3).

[0028] An optical coupler 38 parallel to the plane of the modulator layer 48 couples light into and out of the modulator 26. In the illustrated example, the coupler 38 comprises a tapered dielectric waveguide (e.g., a SiN waveguide) formed by deposition and etching in a dielectric layer 50 below the modulator 26. Alternatively, the coupler 38 may comprise other suitable optical materials (such as silicon) and may be formed in or above the plane of the modulator 26. The coupler 38 in this example tapers adiabatically so that light propagates into and out of the waveguide 36 in a single mode without significant reflection or energy transfer to higher order modes, thereby exhibiting low optical losses. Alternatively, other suitable types of couplers may be used. Although the modulator layer 48 is Figures 1A to 1C 2 is shown as a top metal layer in device 20, but the modulator layer can also be an inner layer within the IC device.

[0029] like Figure 1B and Figure 1C As shown in FIG, the device 20 includes a FEOL layer 40 covered by a BEOL stack 42 including a modulator layer 48. The FEOL layer 40 generally includes a semiconductor substrate 54, such as a silicon wafer substrate. A thin film structure 56 is formed on the substrate 54 by processes such as doping, thin film deposition and etching, covered with a dielectric layer 58, such as containing SiO2. The BEOL stack 42 includes a lower metal layer 44, followed by alternating dielectric layers 50 and metal interconnect layers 46. The lower metal layer 44 and the interconnect layer 46 are patterned to define electrical traces that are interconnected to the thin film structure 56 via vias 62 through the dielectric layer 50 and vias 60 through the dielectric layer 58.

[0030] The patterned metal layers 44, 46 and vias 60, 62 thus interconnect the components of the FEOL layer 40 to form an integrated driver circuit, and may also include associated logic circuits. Any suitable IC technology known in the art may be used for this purpose. For example, the driver circuit may be implemented using standard complementary metal oxide semiconductor (CMOS) technology. Alternatively, for higher speeds, the driver circuit may be implemented using BiCMOS technology, which combines CMOS transistors and bipolar junction transistors.

[0031] In any case, the drive signals generated by this drive circuit are applied between electrodes 30, 32, and 34 through vias 62, which connect modulator layer 48 to the next metal layer 46 below BEOL stack 42. (In an alternative embodiment not shown in the figure, the modulator layer may be located at an intermediate level, with interconnecting vias above and below, as previously described.) Layer 48 may comprise any suitable metal, and need not necessarily be one of the metals commonly used in IC technology for drive circuits.

[0032] Figure 2is a schematic illustration of an integrated plasmon modulation device 70 according to another embodiment of the present invention. As described above, device 70 is substantially similar to device 20, except that in device 70, electro-optic layer 72 is deposited only over the portion of the modulator layer that is actually needed, such as over the parallel legs of waveguide 36. Such an approach leaves the remainder of the upper surface of the device open to other features, such as optical couplers (not shown). Alternatively, the electro-optic material may be deposited only within the slots of the waveguide, particularly when the modulator layer is not an outer layer of the BEOL stack.

[0033] Figure 3 8 is a schematic illustration of an integrated plasmon modulation device 80 according to yet another embodiment of the present invention. Device 80 is also similar to device 20, with modulator 26 being the final outer layer of BEOL stack 42. However, instead of in-plane optical coupling as in device 20, device 80 includes an out-of-plane optical coupler 82, such as a grating coupler as is known in the art. Coupler 82 is formed on the modulator layer and couples light into and out of waveguide 36 from a propagation direction that is not parallel to the plane of the modulator layer. Light can be transmitted to and from coupler 82 through free space or through a waveguide, such as an appropriately positioned optical fiber.

[0034] Although the device 80 Figure 3 8 as including input and output couplers 82 of this kind, but in alternative embodiments the modulator device may include one in-plane coupler and one out-of-plane coupler.

[0035] Figure 4 is a schematic detailed view of a plasmon ring modulator 90 according to a further embodiment of the invention. The ring modulator 90 may be used, mutatis mutandis, in a plasmon modulation arrangement of the kind described above in place of the Mach-Zehnder modulator 26. Alternatively, other plasmon modulator configurations suitable for integration in a BEOL stack may also be used (not shown in the figure).

[0036] exist Figure 4In the example shown, it includes a dielectric waveguide 92 of, for example, SiN, deposited over or formed within a dielectric (typically SiO2) layer 94 in the BEOL stack. Alternatively, other types of waveguides, such as silicon waveguides, may be used. A disk electrode 96 and a surrounding ring electrode 98 are patterned in an overlying metal layer to define a ring modulator with a circular slot waveguide 99 between the electrodes. The slot is typically about 100nm to 200nm deep, 75nm to 100nm wide, 6μm in diameter, and filled with electro-optical material as in the previous embodiments. (Again, these dimensions are presented by way of example only, and larger or smaller dimensions may alternatively be used). Electrical contacts 100 and 102, typically formed as part of the BEOL metallization, apply a drive signal across the waveguide 99 between the electrodes, thereby modulating light passing through the waveguide 92. Although the contacts 100 are not formed in the BEOL metallization, the drive signal is applied across the waveguide 99 between the electrodes, thereby modulating light passing through the waveguide 92. Figure 4 As shown in FIG. 1 , the bridge extends over the ring electrode 98 , but this contact may alternatively be made from underneath the disk electrode 96 within the BEOL stack.

[0037] Figure 5 is a schematic detailed view of a plasmon slot modulator 103 according to a further embodiment of the invention. The slot modulator 103 may be used, mutatis mutandis, in a plasmon modulation device of the kind described above, in place of the Mach-Zehnder modulator 26 .

[0038] exist Figure 5 In the example shown, the slot 105 is etched through the metal layer of the BEOL stack, thereby defining an electrode 106 on one or both sides of the slot. The metal layer may include gold having a thickness (and therefore slot depth) of, for example, 200 nm, which is deposited over a dielectric layer 107 (such as SiO2). For example, the width of the slot is typically in the range of 300 nm. A thin dielectric layer 108, such as Al2O3, having a thickness of about 5 nm is deposited over the electrode 106. A transparent conductive oxide (TCO) layer 104 (such as indium tin oxide (ITO)) is then deposited over and within the slot 105.

[0039] Applying a voltage V to the electrode 106 causes charge 109 to accumulate in the slot 105, thereby changing the dielectric constant and, therefore, the absorption of plasmons in the TCO within the slot. Modulating the voltage results in a corresponding modulation of the absorption. The modulator 103 is thus capable of high frequency plasmon modulation by electroabsorption without the need for an interferometric structure of the kind used in the previous embodiments.

[0040] Figure 6is an electrical schematic diagram of an integrated drive circuit 110 for use in a plasmon modulation device according to an embodiment of the present invention. This type of drive circuit may be implemented in the FEOL layer 40 of the plasmon modulation device described above, with interconnections through the BEOL stack 42. The drive circuit 110 is suitably implemented using BiCMOS technology in order to achieve a drive bandwidth that fully exploits the available modulation bandwidth of the plasmon modulator 26.

[0041] The driver circuit 110 uses a power multiplexer (PMUX) method, in which a plurality of low-speed branches are combined by a plurality of multiplexing stages to form a high-speed signal. In other words, the driver circuit 110 receives a number of input data signals (four signals in the illustrated example) via corresponding buffer amplifiers 112. The clock divider 116 divides the input clock with the desired driving frequency f into component clocks with a frequency of f / 2, with a phase difference of 90 °. The separate clock divider 114 divides these clock signals into four input clocks with a frequency of f / 4 again, and the corresponding phases of the four input data channels are different. Two multiplexers 118 each combine a pair of input signals, and the multiplexer 120 combines these paired signals to generate a drive signal to the modulator 26 with a driving clock rate f, and the driving clock rate f is four times the input clock rate of each of the four data channels.

[0042] Alternatively, a fewer or greater number of data inputs and multiplexing stages may be used to generate drive signals at smaller or greater multiples of the input clock rate. Figure 6 The outputs of the two 4:1 multiplexers of the topology shown can be multiplexed together with different respective phases to multiplex eight data channels into a single output.

[0043] The final multiplexer 120 drives the plasmon modulator 26 directly without the need for additional buffers or driver amplifiers. Figure 6 The signal modulation format in the illustrated embodiment is non-return to zero (NRZ), but alternatively the drive circuit may be adapted for other modulation schemes, such as four-level pulse amplitude modulation (PAM4).

[0044] In alternative embodiments, other kinds of driver circuits may be used to drive the plasmon modulator according to the present embodiment, even if not at the maximum data rate supported by the modulator. For example, the plasmon modulator 26 may be integrated in the BEOL stack of a CMOS IC such as a CMOS switch circuit. In this case, the "driver circuit" of the modulator may be simply a SerDes (serializer / deserializer) at the output of the switch circuit.

[0045] In any of the above embodiments, due to the small size of the plasmon modulator, the modulator is seen by the driving circuit as a small lumped capacitive load, typically on the order of a few femtofarads. Because the modulator is tightly coupled to the FEOL layers of the IC, there are little or no parasitic capacitance or inductance losses in the circuit, and no 50 ohm terminations are required. Thus, the plasmon modulator can fully exploit the available data rate and drive power of the driving circuit, regardless of the IC technology - whether Figure 5 High speed BiCMOS, CMOS, or any other suitable IC type as shown.

[0046] It should be understood that the above embodiments are cited by way of example, and the present invention is not limited to what has been specifically shown and described above. On the contrary, the scope of the present invention includes the combination and sub-combination of the various features described above, as well as changes and modifications thereof that would occur to a person skilled in the art after reading the foregoing description and that are not disclosed in the prior art.

Claims

1. A photoelectric device comprising: Semiconductor substrate; a thin film structure disposed on the substrate and patterned to define components of an integrated drive circuit configured to generate a drive signal; A back-end line stack of alternating metal layers and dielectric layers disposed above the thin film structure, the metal layers comprising: a modulator layer, the modulator layer being a final outer layer of the back-end line stack, the modulator layer including a plasmon waveguide and being patterned to define a plurality of electrodes configured to apply modulation to surface plasmon polaritons propagating in the plasmon waveguide in response to the drive signal applied to the electrodes; and a plurality of interconnect layers patterned to define electrical traces connected through vias to the thin film structures on the substrate and to the electrodes in the modulator layer so as to interconnect the components of the integrated drive circuit and apply the drive signals generated thereby to the electrodes; a light input coupler configured to couple light into the modulator layer, thereby modulating the light by the modulation of the surface plasmon polaritons; and A light output coupler is configured to couple modulated light out of the modulator layer.

2. The apparatus of claim 1 , wherein the plasmon waveguide is configured as a Mach-Zehnder interferometer having a first parallel leg and a second parallel leg, and wherein the electrodes include at least a first electrode and a second electrode configured to apply the modulation of the surface plasmon polaritons having different respective phases to the first parallel leg and the second parallel leg.

3. The device of claim 1, wherein the electrodes are patterned to define a ring modulator.

4. The device according to any one of claims 1 to 3, wherein the light input coupler and / or the light output coupler are arranged in the plane of the modulator layer.

5. A device according to any one of claims 1 to 3, wherein the light input coupler and / or the light output coupler are formed on the modulator layer and are configured to couple the light between the modulator layer and a propagation direction that is not parallel to a plane of the modulator layer.

6. A device according to any one of claims 1 to 3, and comprising an electro-optic layer disposed above the modulator layer and within the plasmon waveguide.

7. A device according to any one of claims 1 to 3, and comprising a transparent conductive oxide disposed above the modulator layer and within the plasmon waveguide.

8. A method for manufacturing an optoelectronic device, comprising: forming and patterning a thin film structure on a semiconductor substrate to define components of an integrated drive circuit configured to generate a drive signal; A back-end line stack of alternating metal layers and dielectric layers is deposited and patterned over the thin film structure, the metal layers comprising: a modulator layer, the modulator layer being a final outer layer of the back-end line stack, the modulator layer including a plasmon waveguide and being patterned to define a plurality of electrodes configured to apply modulation to surface plasmon polaritons propagating in the plasmon waveguide in response to the drive signal applied to the electrodes; and a plurality of interconnect layers patterned to define electrical traces connected through vias to the thin film structures on the substrate and to the electrodes in the modulator layer so as to interconnect the components of the integrated drive circuit and apply the drive signals generated thereby to the electrodes; coupling light into the modulator layer, thereby modulating the light by the modulation of the surface plasmon polaritons; and The modulated light is coupled out of the modulator layer.

9. The method of claim 8, wherein the plasmon waveguide is configured as a Mach-Zehnder interferometer having a first parallel leg and a second parallel leg, and wherein the electrodes include at least a first electrode and a second electrode configured to apply the modulation of the surface plasmon polaritons having different respective phases to the first parallel leg and the second parallel leg.

10. The method of claim 8, wherein the electrodes are patterned to define a ring modulator.

11. The method of any one of claims 8 to 10, wherein coupling the light comprises placing an optical coupler in the plane of the modulator layer to couple the light into or out of the modulator layer.

12. The method of any one of claims 8 to 10, wherein coupling the light comprises placing an optical coupler on the modulator layer for coupling the light between the modulator layer and a propagation direction that is not parallel to a plane of the modulator layer.

13. The method of any one of claims 8 to 10, wherein depositing and patterning the back end line stack comprises forming the modulator layer in a final outer layer of the back end line stack.

14. A method according to any one of claims 8 to 10, and comprising depositing an electro-optic layer over the modulator layer and within the plasmon waveguide.

15. A method according to any one of claims 8 to 10, and comprising depositing a transparent conducting oxide over the modulator layer and within the plasmon waveguide.

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