Analog integrated circuit reliability test method based on improved HALT test

Abstract

The present invention relates to an analog integrated circuit reliability test method based on an improved HALT test, comprising the following steps: conducting electrical performance tests on analog integrated circuit samples at room temperature, minimum and maximum operating temperatures; sequentially stepping the ambient temperature from room temperature to the low-temperature operating limit temperature and the high-temperature operating limit temperature, and conducting online testing; finding the parameter with the largest variation as the sensitive parameter, and finding the temperature TA corresponding to the maximum variation of the sensitive parameter; conducting a temperature stress accumulation test on the analog integrated circuit sample at temperature TA; conducting a temperature cycling test between the minimum and maximum operating temperatures; and testing the sensitive parameters of the analog integrated circuit sample at room temperature, and comparing the results with previous test results. In the present invention, the traditional HALT test technology is improved, which can more accurately and efficiently stimulate potential defects of the analog integrated circuit, provide a basis for product design improvements, and improve the reliability level of the product.

Description

Technical Field

[0001] The invention belongs to the technical field of analog integrated circuit reliability testing, and relates to an analog integrated circuit reliability testing method based on an improved HALT test. Background Art

[0002] HALT (Highly Accelerated Life Testing) tests apply progressively more severe stress to the simulated integrated circuit samples in an incremental step-by-step manner while continuously monitoring the simulated integrated circuit samples. This allows for rapid identification of design and process defects in the simulated integrated circuit samples as failures, which can then be located and improved.

[0003] Traditional HALT testing is typically performed on modules, components, and systems, but research on HALT testing for analog integrated circuits is relatively limited. Furthermore, the stress applied in traditional HALT testing is typically monotonically increasing, with each stress level maintained for a short period of time until the product's destructive limit is reached. Due to the inherent process characteristics of analog integrated circuits, the stimulation of some defects requires a certain amount of accumulation time. The stress level with the highest defect stimulation efficiency may be lower than the product's destructive limit, and the product's failure mode has typically changed by the destructive limit. Therefore, the short-term, monotonically increasing stress application method of traditional HALT testing may not accurately and quickly stimulate potential defects in analog integrated circuits, resulting in ineffective testing. Summary of the Invention

[0004] In view of this, an object of the present invention is to provide an analog integrated circuit reliability test method based on an improved HALT test.

[0005] In order to achieve the above object, the present invention provides the following technical solutions:

[0006] An improved HALT test method for analog integrated circuit reliability testing includes the following steps:

[0007] S1. Conduct electrical performance tests on analog integrated circuit samples at room temperature, the minimum operating temperature TL0 specified in the specification, and the maximum operating temperature TH0 specified in the specification;

[0008] S2. Setting a low-temperature limit deviation temperature T0, and using the temperature (TL0-T0) as the low-temperature operating limit temperature TL1 of the analog integrated circuit sample, allowing the ambient temperature to step from room temperature toward TL1, and performing online testing on the electrical performance parameters of the analog integrated circuit sample after each temperature point in the stepping process stabilizes for a first preset time;

[0009] S3, setting a high temperature limit deviation temperature T1, taking the temperature (TH0 + T1) as the high temperature operating limit temperature TH1 of the analog integrated circuit sample, stepping the ambient temperature from room temperature toward TH1, and performing an online test on the electrical performance parameters of the analog integrated circuit sample after each temperature point in the stepping process stabilizes for a second preset time;

[0010] S4. Based on the test results of steps S2 and S3, the electrical performance parameters of the simulated integrated circuit sample are respectively plotted for online testing, the parameter with the largest change amplitude during the test is found as the sensitive parameter, and the temperature TA corresponding to the largest change amplitude of the sensitive parameter is found;

[0011] S5. performing a temperature stress accumulation test on the analog integrated circuit sample at temperature TA, and performing online testing on sensitive parameters of the analog integrated circuit sample during the test;

[0012] S6. Perform a temperature cycling test; cycle the ambient temperature between TL0 and TH0 at a preset temperature change rate for a predetermined number of times, and when the ambient temperature is TL0 or TH0, stay for a third preset time and perform an online test on sensitive parameters of the analog integrated circuit sample;

[0013] S7, testing the sensitive parameters of the analog integrated circuit sample at room temperature, and comparing the results with the test results of the sensitive parameters of the analog integrated circuit sample at room temperature in step S1;

[0014] S8. End the reliability test.

[0015] Furthermore, in the steps S2 and S3, after testing the electrical performance parameters of the simulated integrated circuit sample, it is also checked whether the test results exceed the specification requirements; if they exceed the specification requirements, the test is determined to have failed, the current step is terminated, and the next step is executed.

[0016] Furthermore, the step S2 specifically includes the following sub-steps:

[0017] S201, using room temperature as the current ambient temperature of the simulated integrated circuit sample;

[0018] S202, lowering the ambient temperature of the analog integrated circuit sample by a first step temperature based on the current ambient temperature;

[0019] S203, stabilizing the ambient temperature for a first preset time;

[0020] S204, performing online testing on the main electrical performance parameters of the analog integrated circuit sample;

[0021] S205, check whether the test result exceeds the specification requirements; if it exceeds the specification requirements, determine that the test has failed and execute step S3; otherwise, determine that the test has passed and execute step S206;

[0022] S206 , detecting whether the ambient temperature of the analog integrated circuit sample is the low temperature operating limit TL1 of the analog integrated circuit sample; if so, executing step S3 ; otherwise, returning to executing step S202 .

[0023] Furthermore, the first step temperature is 10° C. to 20° C.; and the first preset time is 1 hour to 2 hours.

[0024] Furthermore, the S3 step specifically includes the following sub-steps:

[0025] S301, taking room temperature as the current ambient temperature of the simulated integrated circuit sample;

[0026] S302, lowering the ambient temperature of the analog integrated circuit sample by a second step temperature based on the current ambient temperature;

[0027] S303, stabilizing the ambient temperature for a second preset time;

[0028] S304, performing online testing on the main electrical performance parameters of the analog integrated circuit sample and recording the test results;

[0029] S305, check whether the test result exceeds the specification requirements; if it exceeds the specification requirements, determine that the test has failed and execute step S4; otherwise, determine that the test has passed and execute step S306;

[0030] S306 , detecting whether the ambient temperature of the analog integrated circuit sample is the high temperature operating limit TH1 of the analog integrated circuit sample; if so, executing step S4 ; otherwise, returning to executing step S302 .

[0031] Furthermore, the second step temperature is 10° C. to 20° C.; and the second preset time is 1 hour to 2 hours.

[0032] Furthermore, the low temperature limit deviation temperature T0 is 15°C to 25°C; the high temperature limit deviation temperature T1 is 15°C to 25°C.

[0033] Furthermore, in the step S5, the duration of the temperature stress accumulation test on the analog integrated circuit sample at the temperature TA is 24 hours to 72 hours.

[0034] Furthermore, in the step S6, the preset temperature change rate is greater than or equal to 40K / min; the predetermined number of cyclic changes is greater than or equal to 10 times; and the third preset time is greater than or equal to 30 minutes.

[0035] Furthermore, in step S8, when not all tests in steps S2 to S7 are passed, design or process weaknesses of the analog integrated circuit are analyzed based on the test results of the above steps, and improvement plans are proposed.

[0036] The present invention improves upon the traditional HALT testing technique based on the inherent process characteristics of analog integrated circuits. First, because the failure mechanism of the analog integrated circuit samples remains unchanged, there is no need to determine the damage limit of the analog integrated circuit samples. Furthermore, compared to traditional HALT testing techniques, the present invention provides longer dwell times at each temperature point. Finally, the present invention adds a temperature stress accumulation test step. Through these measures, the present invention can more accurately and efficiently identify potential defects in analog integrated circuits, providing a basis for product design improvements and enhancing the reliability of the improved products. The present invention can be widely applied to reliability testing of analog integrated circuits. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention will be described in detail below with reference to the accompanying drawings, in which:

[0038] Figure 1 The figure is a brief flow chart of a preferred embodiment of the analog integrated circuit reliability test method based on the improved HALT test of the present invention.

[0039] Figure 2 It is a detailed flow chart of a preferred embodiment of the analog integrated circuit reliability test method based on the improved HALT test of the present invention.

[0040] Figure 3 FIG. 1 is a curve showing a change in the measured value of the maximum operating voltage of a simulated integrated circuit sample in a specific embodiment.

[0041] Figure 4 Schematic diagram of the change of ambient temperature in steps S3 and S4 in a specific embodiment. DETAILED DESCRIPTION

[0042] The following describes the implementation of the present invention through specific examples. The illustrations provided in the following embodiments are only used to schematically illustrate the basic concept of the present invention. The following embodiments and features in the embodiments may be combined with each other unless there is any conflict.

[0043] like Figure 1 and Figure 2 As shown, a preferred embodiment of the analog integrated circuit reliability test method based on the improved HALT test of the present invention includes the following steps:

[0044] S1. Perform initial sample inspection. Conduct electrical performance tests on analog integrated circuit samples at room temperature, the minimum operating temperature TL0 specified in the specification, and the maximum operating temperature TH0 specified in the specification; if the test passes, execute step S2; otherwise, replace the sample and perform initial sample inspection again. Normal temperature is generally selected to be 20℃~30℃, preferably 25℃. Assuming that the minimum operating temperature TL0 of the analog integrated circuit specified in the specification is -55℃ and the maximum operating temperature TH0 is 125℃, conduct electrical performance tests on analog integrated circuit samples at -55℃, 25℃ and 125℃ respectively; after the test, check whether the test results exceed the specification requirements; if they exceed the specification requirements, the test is judged to have failed, and if they do not exceed the specification requirements, the test is judged to have passed.

[0045] S2. Conduct a low-temperature stepping experiment. Set the low-temperature limit deviation temperature T0, which is 15°C to 25°C; preferably 20°C; use the temperature of (TL0-T0) as the low-temperature operating limit temperature TL1 of the analog integrated circuit sample. Assuming that the minimum operating temperature TL0 of the analog integrated circuit specified in the specification is -55°C, it can be concluded that TL1 = -75°C; start the ambient temperature from room temperature (25°C in this embodiment) and step toward TL1 (i.e. -75°C), and test the electrical performance parameters of the analog integrated circuit sample after each temperature point in the stepping process stabilizes for the first preset time. This step specifically includes the following sub-steps:

[0046] S201 , taking room temperature as the current ambient temperature of the simulated integrated circuit sample (ie, the starting temperature of the step).

[0047] S202: Lower the ambient temperature of the simulated integrated circuit sample by a first step temperature based on the current ambient temperature; the first step temperature is 10°C to 20°C, preferably 10°C. For example, during the first test, the ambient temperature is 15°C (i.e., 25°C - 10°C), during the second test, the ambient temperature is 5°C (i.e., 15°C - 10°C), and so on, decreasing in sequence.

[0048] S203: Allow the ambient temperature to stabilize for a first preset time; the first preset time is 1 to 2 hours, preferably 1 hour. By staying at each temperature point for a longer time to increase the time the stress level is maintained, potential defects in the simulated integrated circuit sample can be stimulated, thereby improving the accuracy of the test results.

[0049] S204. Use an online testing system to test the electrical performance parameters of the analog integrated circuit sample. During this step, only the main electrical performance parameters of the analog integrated circuit sample are generally tested. The main electrical performance parameters are determined according to the function and usage environment of the analog integrated circuit. The specifications corresponding to the tested analog integrated circuit record which electrical performance parameters of the analog integrated circuit are the main electrical performance parameters, which will not be repeated here.

[0050] S205. Check whether the test results exceed the specification requirements; if they do, the test is determined to have failed, the low-temperature stepping experiment is terminated, and step S3 is executed to start the high-temperature stepping experiment; otherwise, the test is determined to have passed, and step S206 is executed to determine whether the ambient temperature has stepped to TL1.

[0051] S206. Check whether the ambient temperature of the analog integrated circuit sample is the low-temperature operating limit TL1 of the analog integrated circuit sample. If so, it means that the low-temperature stepping experiment has been completed, and execute step S3 to perform a high-temperature stepping experiment; otherwise, return to execute step S202 and continue stepping to the next temperature for testing.

[0052] S3. Perform a high-temperature stepping experiment. Set the high-temperature limit deviation temperature T1, which is 15°C to 25°C; preferably 20°C; use the temperature (TH0+T1) as the high-temperature operating limit temperature TH1 of the analog integrated circuit sample. Assuming that the maximum operating temperature TH0 of the analog integrated circuit specified in the specification is 125°C, it can be obtained that TH1=145°C; start the ambient temperature from room temperature (i.e., 25°C) to TH1 (i.e., 145°C), and test the electrical performance parameters of the analog integrated circuit sample after each temperature point in the stepping process stabilizes for a second preset time; specifically, the following sub-steps are included:

[0053] S301 , taking room temperature as the current ambient temperature of the simulated integrated circuit sample (ie, the starting temperature of the step).

[0054] S302: Lower the ambient temperature of the analog integrated circuit sample by a second step temperature based on the current ambient temperature; the second step temperature is 10°C to 20°C, preferably 10°C. For example, during the first test, the ambient temperature is 35°C (i.e., 25°C + 10°C), and during the second test, the ambient temperature is 45°C (i.e., 35°C + 10°C), and so on, in a sequentially increasing manner.

[0055] S303: Allow the ambient temperature to stabilize for a second preset time; the second preset time is 1 to 2 hours, preferably 1 hour. By staying at each temperature point for a longer time to increase the time the stress level is maintained, potential defects in the simulated integrated circuit sample can be stimulated, thereby improving the accuracy of the test results.

[0056] S304, using an online testing system to test the electrical performance parameters of the analog integrated circuit sample; in this step, generally only the main electrical performance parameters of the analog integrated circuit sample are tested.

[0057] S305. Check whether the test result exceeds the specification requirements; if it exceeds the specification requirements, the test is determined to have failed, the high-temperature step experiment is ended, and step S4 is executed to find the sensitive parameter A; otherwise, the test is determined to have passed, and step S306 is executed to determine whether the ambient temperature has stepped to TH1.

[0058] S306. Check whether the ambient temperature of the analog integrated circuit sample is the high temperature working limit TH1 of the analog integrated circuit sample. If so, it means that the high temperature stepping experiment has been completed and execute step S4; otherwise, return to execute step S302 and continue stepping to the next temperature for testing.

[0059] By setting the low-temperature operating limit temperature TL1 and the high-temperature operating limit temperature TH1 to exceed the minimum operating temperature TL0 and the maximum operating temperature TH0 specified in the specification by a certain margin during the temperature stress step test, the performance indicators of the analog integrated circuit sample can be adjusted to have a margin relative to the specification requirements, thereby ensuring that the performance indicators of the analog integrated circuit can meet the specification requirements. Of course, in other embodiments, the order of steps S2 and S3 can be reversed, that is, step S3 can be performed first to perform the high-temperature step test, and then step S2 can be performed to perform the low-temperature step test, without significantly affecting the test results.

[0060] S4. Find the sensitive parameter A and the temperature TA corresponding to its maximum change. Based on the test results of steps S2 and S3, draw the change curves of the main electrical performance parameters of the online test of the simulated integrated circuit sample respectively, find the parameter with the largest change amplitude during the test as the sensitive parameter A, and find the temperature TA corresponding to the maximum change of the sensitive parameter A; specifically, calculate the ratio of the maximum deviation value of each main electrical performance parameter from the measured value at room temperature to the measured value at room temperature, and take the electrical performance parameter with the largest ratio as the sensitive parameter A. If, Figure 3 As shown in the figure, it is a measured value change curve of the maximum operating voltage (electrical performance parameter) of the simulated integrated circuit sample. Its normal temperature measurement value is 25V, and the deviation is the largest at 105℃, which is 23V (that is, the maximum deviation value is 2V). It can be calculated that the ratio of its maximum deviation value to the measured value at normal temperature is 2 / 25=0.08; assuming that the maximum deviation values ​​of other major electrical performance parameters of the sample are less than 0.08 from the measured values ​​at normal temperature, the maximum operating voltage is the sensitive parameter A of the sample, and the temperature TA corresponding to the maximum change of the sensitive parameter A is 105℃.

[0061] S5. Conduct temperature stress accumulation test. Figure 4As shown, a temperature stress accumulation test is performed on an analog integrated circuit sample at temperature TA for 24 to 72 hours, preferably 48 hours. During the test, the sensitive parameter A (in the above example, the maximum operating voltage) of the analog integrated circuit sample is tested online. The test results are checked to see if they exceed the specification requirements. If they do, the test is deemed to have failed; if they do, the test is deemed to have passed. This temperature stress accumulation test can effectively identify potential defects in the analog integrated circuit, resulting in more accurate test results.

[0062] S6. Conduct a temperature cycling test. The ambient temperature is cycled between TL0 and TH0 at a preset temperature change rate for a predetermined number of times. When the ambient temperature is TL0 or TH0, the temperature remains at that temperature for a third preset time, and the sensitive parameter A of the analog integrated circuit sample is tested. The test results are checked to see if they exceed the specification requirements. If they do, the test is deemed to have failed. If they do, the test is deemed to have passed. The preset temperature change rate is greater than or equal to 40 K / min, preferably 60 K / min. The predetermined number of cycles is greater than or equal to 10, preferably 20. The third preset time is greater than or equal to 30 minutes, preferably 30 minutes.

[0063] For example, the temperature can be changed from 125°C (i.e., TH0) to -55°C (i.e., TL0) at a temperature change rate of 60K / min. Of course, 25°C (i.e., room temperature) or other temperatures can also be used as the initial temperature of the change. When the temperature is -55°C, the temperature remains unchanged for 30 minutes and the sensitive parameter A of the analog integrated circuit sample is tested; check whether the test results exceed the specification requirements; if the specification requirements are still not exceeded after 30 minutes, the temperature is changed from -55°C (i.e., TL0) to 125°C (i.e., TH0) at a temperature change rate of 60K / min. When the temperature is 125°C, the temperature remains unchanged for 30 minutes and the sensitive parameter A of the analog integrated circuit sample is tested; check whether the test results exceed the specification requirements; if the specification requirements are still not exceeded after 30 minutes, the first cycle of testing is completed, and the temperature is changed from 125°C to -55°C at a temperature change rate of 60K / min for a second cycle of testing, until 20 cycles of testing are completed.

[0064] S7. Detect the effect of the temperature stress generated in the preceding steps on the analog integrated circuit sample. Test the sensitive parameter A of the analog integrated circuit sample at room temperature and compare it with the test result of the sensitive parameter A of the analog integrated circuit sample at room temperature in step S1. A threshold value may be pre-set. If the absolute value of the difference between the measured value of the sensitive parameter A of the analog integrated circuit sample in this step and the measured value of the sensitive parameter A in step S1 is greater than or equal to the set threshold value, it indicates that the structure of the sample has been significantly affected by the accumulated temperature stress after the temperature changes in the preceding steps, and the test is determined to have failed. Otherwise, the test is determined to have passed.

[0065] S8. End the reliability test. When the tests in steps S2 to S7 are not all passed, the design or process weaknesses of the analog integrated circuit can be analyzed based on the test results of the above steps. For example, based on the changes in the sensitive parameter A of the analog integrated circuit sample, the weaknesses of the product design or process can be analyzed, and improvement plans can be proposed and improved. After that, the improved product can be subjected to the reliability test again by repeating the above steps. Since the improvement of the product is mainly aimed at the sensitive parameter A determined during the test, the influence of temperature stress on the electrical performance parameter will be reduced when the product is tested again after the improvement, and it may no longer be selected as the sensitive parameter A. Therefore, another electrical performance parameter with a larger change will be determined as the sensitive parameter A. Then, improvements will be made based on the changes in the new sensitive parameter A until all the tests in the steps are passed, indicating that the main electrical performance parameters of the product can meet the requirements of the specification.

[0066] In this embodiment, the failure mechanism of the analog integrated circuit samples remains unchanged, eliminating the need to determine their damage limits. Furthermore, compared to traditional HALT testing techniques, this embodiment maintains a longer dwell time at each temperature point and incorporates a temperature stress accumulation test. These improvements enable more accurate and efficient identification of potential defects in analog integrated circuits, providing a basis for product design improvements and enhancing the reliability of these improved products.

[0067] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not limiting. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention can be modified or replaced by equivalents without departing from the purpose and scope of the technical solutions, which should all be included in the scope of the claims of the present invention.

Claims

1. A reliability test method for analog integrated circuits based on an improved HALT test, characterized in that: The following steps are involved: S1. Conduct electrical performance tests on analog integrated circuit samples at room temperature, the minimum operating temperature TL0 specified in the specification, and the maximum operating temperature TH0 specified in the specification; S2. Setting a low-temperature limit deviation temperature T0, and using the temperature (TL0-T0) as the low-temperature operating limit temperature TL1 of the analog integrated circuit sample, causing the ambient temperature to step from room temperature toward TL1, and performing an online test on the electrical performance parameters of the analog integrated circuit sample after each temperature point in the stepping process stabilizes for a first preset time; wherein the first preset time is 1 hour to 2 hours; S3, setting a high temperature limit deviation temperature T1, taking the temperature (TH0 + T1) as the high temperature operating limit temperature TH1 of the analog integrated circuit sample, stepping the ambient temperature from room temperature toward TH1, and performing an online test on the electrical performance parameters of the analog integrated circuit sample after each temperature point in the stepping process stabilizes for a second preset time; S4. Based on the test results of steps S2 and S3, the electrical performance parameters of the simulated integrated circuit sample are respectively plotted for online testing, the parameter with the largest change amplitude during the test is found as the sensitive parameter, and the temperature TA corresponding to the largest change amplitude of the sensitive parameter is found; S5. Performing a temperature stress accumulation test on the analog integrated circuit sample at temperature TA, and performing online testing on sensitive parameters of the analog integrated circuit sample during the test; wherein the duration of the temperature stress accumulation test on the analog integrated circuit sample at temperature TA is 24 hours to 72 hours; S6. Perform a temperature cycling test; cycle the ambient temperature between TL0 and TH0 at a preset temperature change rate for a predetermined number of times, and when the ambient temperature is TL0 or TH0, stay for a third preset time and perform an online test on sensitive parameters of the analog integrated circuit sample; S7, testing the sensitive parameters of the analog integrated circuit sample at room temperature, and comparing the results with the test results of the sensitive parameters of the analog integrated circuit sample at room temperature in step S1; S8. End the reliability test.

2. The improved HALT test-based analog integrated circuit reliability test method according to claim 1, characterized in that: In the steps S2 and S3, after testing the electrical performance parameters of the simulated integrated circuit sample, it is also checked whether the test results exceed the specification requirements; If the specification requirements are exceeded, the test is deemed to have failed, the current step is ended, and the next step is executed.

3. The improved HALT test-based analog integrated circuit reliability test method according to claim 1, characterized in that: The S2 step specifically includes the following sub-steps: S201, using room temperature as the current ambient temperature of the simulated integrated circuit sample; S202, lowering the ambient temperature of the analog integrated circuit sample by a first step temperature based on the current ambient temperature; S203, stabilizing the ambient temperature for a first preset time; S204, performing online testing on the main electrical performance parameters of the analog integrated circuit sample; S205. Check whether the test results exceed the specification requirements; If the specification requirements are exceeded, the test is deemed to have failed and step S3 is executed; Otherwise, the test is determined to be passed and step S206 is executed; S206 , detecting whether the ambient temperature of the analog integrated circuit sample is the low temperature operating limit TL1 of the analog integrated circuit sample; if so, executing step S3 ; otherwise, returning to executing step S202 .

4. The improved HALT test-based analog integrated circuit reliability test method according to claim 3, characterized in that: The first step temperature is 10°C to 20°C.

5. The improved HALT test-based analog integrated circuit reliability test method according to claim 1, wherein: The S3 step specifically includes the following sub-steps: S301, taking room temperature as the current ambient temperature of the simulated integrated circuit sample; S302, lowering the ambient temperature of the analog integrated circuit sample by a second step temperature based on the current ambient temperature; S303, stabilizing the ambient temperature for a second preset time; S304, performing online testing on the main electrical performance parameters of the analog integrated circuit sample and recording the test results; S305. Check whether the test results exceed the specification requirements; If the specification requirements are exceeded, the test is determined to have failed, and step S4 is executed; Otherwise, the test is determined to be passed and step S306 is executed; S306 , detecting whether the ambient temperature of the analog integrated circuit sample is the high temperature operating limit TH1 of the analog integrated circuit sample; if so, executing step S4 ; otherwise, returning to executing step S302 .

6. The improved HALT test-based analog integrated circuit reliability test method according to claim 5, characterized in that: The second step temperature is 10° C. to 20° C.; and the second preset time is 1 hour to 2 hours.

7. The improved HALT test-based analog integrated circuit reliability test method according to claim 1, characterized in that: The low temperature limit deviation temperature T0 is 15°C to 25°C; the high temperature limit deviation temperature T1 is 15°C to 25°C.

8. The improved HALT test-based analog integrated circuit reliability test method according to claim 1, characterized in that: In the step S6, the preset temperature change rate is greater than or equal to 40K / min; the predetermined number of cyclic changes is greater than or equal to 10 times; and the third preset time is greater than or equal to 30 minutes.

9. The improved HALT test-based analog integrated circuit reliability test method according to claim 1, wherein: In step S8, when all the tests in steps S2 to S7 are not passed, the design or process weaknesses of the analog integrated circuit are analyzed based on the test results of the above steps, and improvement plans are proposed.

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