Method, apparatus, device, and storage medium for using interruption resources

Abstract

An embodiment of the present invention provides a method, device, equipment and storage medium for using interrupt resources, which relates to the field of computer technology. The method includes: constructing a first correspondence between hardware interrupt resources and index values, and a second correspondence between GPIO pin identifiers and index values; each time the OS is started, loading the first and second correspondences; when the OS receives a user application, according to the target GPIO pin identifier carried in the application, finding the target index value from the second correspondence; and finding the hardware interrupt resource corresponding to the target index value from the first correspondence. In the present invention, since the definition of the index value is not restricted by whether the hardware interrupt resources are multiplexed and whether they are continuous in some mechanisms, the correspondence between the GPIO pin identifier and the hardware interrupt resource can be defined and transmitted by converting it into the first and second correspondences, so that the use of multiplexed and discrete hardware interrupt resources can be realized under different mechanisms.

Description

Technical Field

[0001] The present invention relates to the field of computer technologies, and particularly to a method for using interrupt resources, an apparatus for using interrupt resources, an electronic device, and a storage medium. Background Art

[0002] Currently, most computers are equipped with GPIO (General-purpose Input / Output) ports. Users (i.e., developers) can implement diversified functional designs through the GPIO ports. For example, the GPIO ports can be used as input ports for triggering interrupts, thereby triggering the OS (Operating System) to perform interrupt processing.

[0003] The GPIO controller is a control circuit that controls the input or output of the GPIO ports according to settings. There are multiple GPIO pins on the GPIO controller. Currently, computer manufacturers usually have different designs and usage methods for the GPIO controller. In practical applications, the use of the GPIO controller is very flexible, and there are often diversified customized uses for the GPIO interrupt resources, which brings inconvenience to the use of the GPIO interrupt resources.

[0004] In some specific scenarios, due to the limited number of pins of the interrupt controller, there may be a situation where multiple GPIO pins share one input pin of the interrupt controller. And in the case of pin sharing of the interrupt controller, it may be necessary to further achieve discrete sharing of the GPIO interrupt resources for the shared interrupt controller pin, that is, the GPIO pins sharing the same interrupt controller pin are not consecutively numbered GPIO pins.

[0005] However, in some interrupt resource usage mechanisms, it is impossible to transfer the shared and discrete GPIO interrupt resources to the OS, and only non-shared or shared and consecutive (that is, the GPIO pins sharing the same input pin of the interrupt controller are consecutively numbered GPIO pins) GPIO interrupt resources can be transferred. Therefore, it is impossible to customize the GPIO interrupt service for the case of shared and discrete GPIO interrupt resources. Summary of the Invention

[0006] In view of the above problems, embodiments of the present invention are proposed to provide a method for using interrupt resources that can overcome or at least partially solve the above problems, so as to customize the GPIO interrupt service for the case of shared and discrete GPIO interrupt resources in different architectures capable of transferring interrupt resources.

[0007] Correspondingly, an embodiment of the present invention further provides a device for using interruption resources, an electronic device, and a storage medium to ensure the implementation and application of the above method.

[0008] To solve the above problems, an embodiment of the present invention discloses a method for using interruption resources, including:

[0009] In the firmware or the kernel of the operating system, construct a first correspondence between each hardware interruption resource and the index value of the hardware interruption resource, and a second correspondence between the GPIO pin identifier and the index value;

[0010] After the construction is completed, when the operating system starts each time, load the first correspondence and the second correspondence;

[0011] When receiving a user application for obtaining the interruption resource corresponding to the target GPIO pin identifier, according to the target GPIO pin identifier carried in the user application, parse from the second correspondence to obtain the target index value corresponding to the target GPIO pin identifier;

[0012] Parse from the first correspondence to obtain the target hardware interruption resource corresponding to the target index value.

[0013] Optionally, the step of constructing a first correspondence between each hardware interruption resource and the index value of the hardware interruption resource, and a second correspondence between the GPIO pin identifier and the index value in the firmware or the kernel of the operating system includes:

[0014] In the firmware, through the Advanced Configuration and Power Management Interface Table, construct a first correspondence between each hardware interruption resource and the index value of the hardware interruption resource, and a second correspondence between the GPIO pin identifier and the index value in the device information of the GPIO controller, where each GPIO pin of the GPIO controller is electrically connected to the interruption controller;

[0015] The step of loading the first correspondence and the second correspondence includes:

[0016] Load the Advanced Configuration and Power Management Interface Table from the firmware to obtain the first correspondence and the second correspondence from the device information of the GPIO controller.

[0017] Optionally, the step of constructing a first correspondence between each hardware interruption resource and the index value of the hardware interruption resource, and a second correspondence between the GPIO pin identifier and the index value in the firmware or the kernel of the operating system includes:

[0018] In the firmware or the kernel of the operating system, through the device tree, a first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and a second correspondence between the GPIO pin identifier and the index value are constructed in the device information of the GPIO controller, wherein each GPIO pin of the GPIO controller is electrically connected to the interrupt controller;

[0019] The step of loading the first correspondence and the second correspondence includes:

[0020] Load the device tree from the firmware or the kernel to obtain the first correspondence and the second correspondence from the device information of the GPIO controller.

[0021] Optionally, the step of constructing the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and the second correspondence between the GPIO pin identifier and the index value includes:

[0022] Take each hardware interrupt resource as the first array element, and use the array subscript of the first array element to represent the index value of the hardware interrupt resource, and construct a first array in which the hardware interrupt resource and the index value are in one-to-one correspondence;

[0023] Use the array subscript of the second array element to represent each GPIO pin identifier, and take each of the index values as the second array element, and construct a second array in which the index value and the GPIO pin identifier are in one-to-one correspondence.

[0024] Optionally, the step of using the array subscript of the second array element to represent each GPIO pin identifier, and taking each of the index values as the second array element, and constructing a second array in which the index value and the GPIO pin identifier are in one-to-one correspondence includes:

[0025] For any one of the GPIO pin identifiers, when the GPIO pin corresponding to the GPIO pin identifier is not connected to any input pin in the interrupt controller, fill the second array element corresponding to the GPIO pin identifier represented as the array subscript of the second array element with an illegal value of the array subscript of the first array element.

[0026] Optionally, after the construction is completed, when the operating system starts each time, after loading the first correspondence and the second correspondence, it further includes:

[0027] Construct a mapping relationship between each of the hardware interrupt resources and software interrupt resources.

[0028] Optionally, after parsing the target hardware interrupt resource corresponding to the target index value from the first correspondence, the method further includes:

[0029] Performing an interrupt mapping on the target hardware interrupt resource according to the mapping relationship to obtain a target software interrupt resource corresponding to the target hardware interrupt resource;

[0030] Returning the target software interrupt resource to the development software that submits the user application, so that the user can customize an interrupt routine according to the target software interrupt resource.

[0031] Optionally, one hardware interrupt resource includes the pin number of an input pin on the interrupt controller to which the GPIO pin is connected.

[0032] An embodiment of the present invention further discloses a device for using interrupt resources, including:

[0033] A first construction module, configured to construct a first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and a second correspondence between the GPIO pin identifier and the index value in the firmware or the kernel of the operating system;

[0034] A loading module, configured to load the first correspondence and the second correspondence each time the operating system is started after the construction is completed;

[0035] A first parsing module, configured to, when receiving a user application for obtaining an interrupt resource corresponding to a target GPIO pin identifier, parse, according to the target GPIO pin identifier carried in the user application, a target index value corresponding to the target GPIO pin identifier from the second correspondence;

[0036] A second parsing module, configured to parse a target hardware interrupt resource corresponding to the target index value from the first correspondence.

[0037] Optionally, the first construction module includes:

[0038] A first construction sub-module, configured to construct, in the firmware, through an Advanced Configuration and Power Interface Table, a first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and a second correspondence between the GPIO pin identifier and the index value in the device information of the GPIO controller, where each GPIO pin of the GPIO controller is electrically connected to the interrupt controller;

[0039] The loading module includes:

[0040] The first loading sub-module is used to load the Advanced Configuration and Power Management Interface Table from the firmware to obtain the first correspondence and the second correspondence from the device information of the GPIO controller.

[0041] Optionally, the first building module includes:

[0042] The second building sub-module is used to build a first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and a second correspondence between the GPIO pin identifier and the index value in the device information of the GPIO controller through the device tree in the firmware or the kernel of the operating system, wherein each GPIO pin of the GPIO controller is electrically connected to the interrupt controller;

[0043] The loading module includes:

[0044] The second loading sub-module is used to load the device tree from the firmware or the kernel to obtain the first correspondence and the second correspondence from the device information of the GPIO controller.

[0045] Optionally, the first building module includes:

[0046] The third building sub-module is used to use each hardware interrupt resource as the first array element, and represent the index value of the hardware interrupt resource by the array subscript of the first array element, and build a first array in which the hardware interrupt resource and the index value are in one-to-one correspondence;

[0047] The fourth building sub-module is used to represent each GPIO pin identifier by the array subscript of the second array element, and use each of the index values as the second array element, and build a second array in which the index value and the GPIO pin identifier are in one-to-one correspondence.

[0048] Optionally, the fourth building sub-module is specifically used for:

[0049] For any one of the GPIO pin identifiers, when the GPIO pin corresponding to the GPIO pin identifier is not connected to any input pin in the interrupt controller, the second array element corresponding to the GPIO pin identifier when represented as the array subscript of the second array element is filled with an illegal value of the array subscript of the first array element.

[0050] Optionally, the device further includes:

[0051] The second building module is used to build the mapping relationship between each of the hardware interrupt resources and the software interrupt resources.

[0052] Optionally, the device further includes:

[0053] A mapping module, configured to perform interrupt mapping on the target hardware interrupt resource according to the mapping relationship to obtain a target software interrupt resource corresponding to the target hardware interrupt resource;

[0054] A return module, configured to return the target software interrupt resource to the development software that submits the user application, so that the user can customize an interrupt routine according to the target software interrupt resource.

[0055] Optionally, one of the hardware interrupt resources includes the pin number of an input pin on the interrupt controller to which the GPIO pin is connected.

[0056] An embodiment of the present invention also discloses an electronic device, including a memory and one or more programs, where the one or more programs are stored in the memory and are configured to be executed by one or more processors, and the programs include instructions for performing the following operations:

[0057] Build a first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and a second correspondence between the GPIO pin identifier and the index value in the firmware or the kernel of the operating system;

[0058] After the construction is completed, when the operating system starts each time, load the first correspondence and the second correspondence;

[0059] When receiving a user application for obtaining an interrupt resource corresponding to a target GPIO pin identifier, parse, according to the target GPIO pin identifier carried in the user application, a target index value corresponding to the target GPIO pin identifier from the second correspondence;

[0060] Parse, from the first correspondence, the target hardware interrupt resource corresponding to the target index value.

[0061] An embodiment of the present invention also discloses a readable storage medium, which, when the instructions in the storage medium are executed by a processor of an electronic device, enables the electronic device to execute the method for using an interrupt resource as described above.

[0062] The embodiments of the present invention have the following advantages:

[0063] In the embodiments of the present invention, the corresponding relationship between the GPIO pin identifier and the hardware interrupt resource can be indirectly constructed through the index value and recorded in the firmware or the kernel of the OS. When the user applies for the hardware interrupt resource of a certain GPIO pin, the OS reads and parses the first corresponding relationship between the hardware interrupt resource and the index value, and the second corresponding relationship between the GPIO pin identifier and the index value. Then, the OS can provide the user with the hardware interrupt resource of the applied GPIO pin according to these two corresponding relationships. In the embodiments of the present invention, since the definition of the index value is not restricted by whether the hardware interrupt resource is multiplexed and whether it is continuous in some mechanisms, the corresponding relationship between the GPIO pin identifier and the hardware interrupt resource can be defined and transmitted by converting it into the first corresponding relationship and the second corresponding relationship. It can not only realize the use of multiplexed and discrete hardware interrupt resources, but also realize the use of multiplexed and continuous hardware interrupt resources, as well as the use of non-multiplexed hardware interrupt resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] Figure 1 is a flowchart of the steps of a method for using an interrupt resource of the present invention;

[0065] Figure 2 is a schematic diagram of a hardware connection among a GPIO controller, GPIO pins, an interrupt controller, and a central processing unit in an electronic device of the present invention;

[0066] Figure 3 is a flowchart of using the hardware interrupt resource of a GPIO of the present invention;

[0067] Figure 4 is another flowchart of using the hardware interrupt resource of a GPIO of the present invention;

[0068] Figure 5 is a flowchart of the steps of another method for using an interrupt resource of the present invention;

[0069] Figure 6 is a block diagram of the structure of a device for using an interrupt resource of the present invention;

[0070] Figure 7 is a block diagram of the structure of an electronic device for using an interrupt resource shown according to an exemplary embodiment. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0071] To make the above objects, features, and advantages of the present invention more obvious and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0072] Currently, regarding the problem that GPIO interrupt resources are multiplexed and discrete, there is a lack of a unified method for using interrupt resources, which makes it impossible to provide a solution to this problem in some scenarios, and further causes the development software for developing interrupt functions based on interrupt resources to lack relevant interrupt functions.

[0073] For example, for the scenario of providing interrupt resources to the OS through the ACPI (Advanced Configuration and Power Management Interface) table (that is, passing interrupt resources to the OS through the ACPI mechanism), since the ACPI mechanism only supports the definition of non-multiplexed or multiplexed and continuous interrupt resources, it is impossible to pass multiplexed and discrete interrupt resources to the OS under the ACPI mechanism.

[0074] Currently, to solve the above problems, customized processes for solving the above problems are usually added for different usage scenarios. However, due to the differences in customization, separate adaptation is required for different scenarios, which will lead to a decrease in the compatibility of the development software and the need to maintain the development software processing processes in multiple scenarios, which is not conducive to the maintenance of the development software.

[0075] One of the core concepts of the embodiments of the present invention is to define the correspondence between GPIO pin identifiers and hardware interrupt resources and record it in the firmware or the kernel of the OS. When the user applies for the hardware interrupt resources of a certain GPIO pin, the OS reads and parses the correspondence between the GPIO pin identifier and the hardware interrupt resources, and then can provide the hardware interrupt resources of the applied GPIO pin according to this correspondence.

[0076] Among them, in order to enable the correspondence between GPIO pin identifiers and hardware interrupt resources to be defined and transmitted in different usage mechanisms (such as the device tree mechanism, the ACPI mechanism, etc.), the embodiments of the present invention convert the correspondence between GPIO pin identifiers and hardware interrupt resources into a first correspondence between hardware interrupt resources and index values, and a second correspondence between GPIO pin identifiers and index values, so as to indirectly define the correspondence between GPIO pin identifiers and hardware interrupt resources by means of index values. Since the index value is not restricted by the requirement that the identifiers of GPIO pins must be continuously numbered in the case of multiplexing, any GPIO pin can be corresponded to any hardware interrupt resource through the index value. In this way, not only can the transmission of GPIO interrupt resources in the case of multiplexed and discrete GPIO interrupt resources be realized under different usage mechanisms, but also the transmission of non-multiplexed GPIO interrupt resources and multiplexed and continuous GPIO interrupt resources can be realized.

[0077] Refer to Figure 1, showing a step flowchart of a method for using interrupt resources of the present invention, which may specifically include the following steps:

[0078] Step 101, in the firmware or the kernel of the operating system, construct a first correspondence between each hardware interrupt resource and its index value, and a second correspondence between the GPIO pin identifier and the index value.

[0079] Refer to Figure 2 , showing a schematic diagram of a hardware connection among a GPIO controller, GPIO pins, an interrupt controller, and a central processing unit (CPU) in an electronic device. Among them, the GPIO controller can control input or output of the GPIO pins. The GPIO pins can be used as pins for triggering interrupts and are electrically connected to the interrupt controller. The interrupt controller can output an interrupt signal to the central processing unit when receiving an interrupt signal through the GPIO pins, and the central processing unit can then process the interrupt.

[0080] Among them, a hardware interrupt resource includes the pin number of an input pin on the interrupt controller to which a GPIO pin is connected.

[0081] One input pin of the interrupt controller can be connected to one or more GPIO pins. When each input pin of the interrupt controller is only connected to one GPIO pin, the hardware interrupt resource of the GPIO is non-reused. When any input pin of the interrupt controller is connected to multiple GPIO pins, the hardware interrupt resource of the GPIO is reused.

[0082] Taking Figure 2 the shown GPIO controller including 6 GPIO pins as an example, the identifiers of the 6 GPIO pins are respectively 0 - 5. Among them, GPIO pins 0, 2, and 4 are all electrically connected to input pin 13 of the interrupt controller, and GPIO pins 1, 3, and 5 are all electrically connected to input pin 15 of the interrupt controller, that is, each hardware interrupt resource of the GPIO is reused.

[0083] Further, when the hardware interrupt resource of the GPIO is reused, if the identifiers of the GPIO pins connected to the reused input pin are continuously numbered, then the hardware interrupt resource of the GPIO is reused and continuous; if the identifiers of the GPIO pins connected to the reused input pin are discretely numbered (that is, non-continuous numbered), then the hardware interrupt resource of the GPIO is reused and discrete.

[0084] According to the actual connection between the GPIO pins and the interrupt controller in the electronic device, it can be determined which of the three situations the hardware interrupt resources of the GPIO are: non - multiplexed, multiplexed and continuous, or multiplexed and discrete. Furthermore, according to the situation of the hardware interrupt resources of the GPIO, in the code of the firmware or the kernel of the operating system, a first correspondence between each hardware interrupt resource and its index value, and a second correspondence between the GPIO pin identifier and the index value can be constructed.

[0085] Under the ACPI mechanism and similar mechanisms, directly defining the correspondence between the GPIO pin identifier and the hardware interrupt resources is restricted. In the case of multiplexed hardware interrupt resources, the GPIO pin identifiers corresponding to the same hardware interrupt resource must be consecutively numbered. While under the device tree mechanism and similar mechanisms, directly defining the correspondence between the GPIO pin identifier and the hardware interrupt resources is not restricted. In the case of multiplexed hardware interrupt resources, the GPIO pin identifiers corresponding to the same hardware interrupt resource can be discretely numbered.

[0086] Therefore, considering the restrictions of the ACPI mechanism and similar mechanisms on multiplexed hardware interrupt resources, in the embodiments of the present invention, a correspondence between the GPIO pin identifier and the hardware interrupt resources can be established by means of the index value. The definition and transmission of the index value are not restricted by whether the multiplexed hardware interrupt resources are continuous. Thus, the definition and transmission of the correspondence between the GPIO pin identifier and the hardware interrupt resources can be realized under both the ACPI mechanism and similar mechanisms, and the device tree mechanism and similar mechanisms.

[0087] In the embodiments of the present invention, optionally, the firmware can be BIOS (Basic Input Output System).

[0088] Step 102, after the construction is completed, each time the operating system starts, load the first correspondence and the second correspondence.

[0089] After the first correspondence and the second correspondence are constructed, the electronic device can load the first correspondence and the second correspondence every time it powers on subsequently. Specifically, each time the OS starts, it can load the first correspondence and the second correspondence from the firmware or the kernel of the OS for use when the user applies for interrupt resources.

[0090] Step 103, when receiving a user application for obtaining the interrupt resources corresponding to the target GPIO pin identifier, according to the target GPIO pin identifier carried in the user application, parse the target index value corresponding to the target GPIO pin identifier from the second correspondence.

[0091] During the operation of the OS, the user can apply for the interrupt resource corresponding to the target GPIO pin identifier, where the target GPIO pin identifier is also the identifier of any GPIO pin. When the OS receives this user application, it can obtain the target GPIO pin identifier carried in the user application, and then parse from the loaded second correspondence to obtain the target index value corresponding to the target GPIO pin identifier.

[0092] Step 104: Parse from the first correspondence to obtain the target hardware interrupt resource corresponding to the target index value.

[0093] After obtaining the target index value corresponding to the target GPIO pin identifier, the OS can further parse from the loaded first correspondence to obtain the target hardware interrupt resource corresponding to the target index value, and this target hardware interrupt resource is also the hardware interrupt resource corresponding to the target GPIO pin identifier.

[0094] In the embodiment of the present invention, the correspondence between the GPIO pin identifier and the hardware interrupt resource can be indirectly constructed through the index value and recorded in the firmware or the kernel of the OS. When the user applies for the hardware interrupt resource of a certain GPIO pin, the OS reads and parses the first correspondence between the hardware interrupt resource and the index value, and the second correspondence between the GPIO pin identifier and the index value. Then, the OS can provide the hardware interrupt resource of the applied GPIO pin to the user according to these two correspondences. In the embodiment of the present invention, since the definition of the index value is not restricted by whether the hardware interrupt resources are multiplexed and whether they are continuous in some mechanisms, the correspondence between the GPIO pin identifier and the hardware interrupt resource can be defined and transmitted by converting it into the first correspondence and the second correspondence. It can not only realize the use of multiplexed and discrete hardware interrupt resources, but also realize the use of multiplexed and continuous hardware interrupt resources, as well as the use of non-multiplexed hardware interrupt resources.

[0095] Furthermore, after providing the multiplexed and discrete, multiplexed and continuous, or non-multiplexed hardware interrupt resources to the development software, the user can customize the interrupt routine in the development software, that is, the development software can be compatible with different usage mechanisms of the interrupt resources, improving the compatibility of the development software, and there is no need to maintain the development software processing process in multiple scenarios, which is beneficial to the maintenance of the development software.

[0096] Refer to Figure 3 , which shows a flowchart of the use of the hardware interrupt resource of a GPIO. Among them, the first correspondence and the second correspondence can be defined in the firmware, and the kernel of the OS can read and parse them through the firmware parameter passing method, and then provide them to the development software for the user to develop and use.

[0097] Refer toFigure 4 , shows another flow chart for the use of GPIO hardware interrupt resources, wherein the first correspondence relationship and the second correspondence relationship can be defined in the kernel of the OS, the kernel of the OS can read and parse them, and then provide them to the development software for users to develop and use.

[0098] In actual applications, the first correspondence and the second correspondence may be defined in the firmware or in the kernel of the OS according to different interrupt resource usage mechanisms. For example, under the ACPI mechanism, the first correspondence and the second correspondence may be defined in the firmware, while under the device tree mechanism, the first correspondence and the second correspondence may be defined in the firmware or the kernel of the OS.

[0099] Firmware is a piece of initialization code that is fixed in an electronic device. It starts running as soon as the electronic device is powered on. It is used to perform necessary initialization to ensure that the kernel of the OS can start, thereby preparing for the operation of the OS. If the firmware cannot prepare the necessary hardware environment for the OS, it will not enter the startup of the operating system. Usually, the last step of the firmware operation is to transfer the OS from the hard disk partition to the memory and hand over the control of the electronic device to the kernel of the OS.

[0100] Reference Figure 3 In an optional implementation, step 101 specifically includes the following steps:

[0101] S11: In the firmware, through the advanced configuration and power management interface table, a first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and a second correspondence between the GPIO pin identifier and the index value are constructed in the device information of the GPIO controller, wherein each GPIO pin of the GPIO controller is electrically connected to the interrupt controller.

[0102] Accordingly, the step of loading the first correspondence relationship and the second correspondence relationship in step 102 specifically includes:

[0103] S21: Loading an advanced configuration and power management interface table from the firmware to obtain a first corresponding relationship and a second corresponding relationship from device information of the GPIO controller.

[0104] Among them, the ACPI table provides a data structure for recording device information, which can record device information of devices such as controllers and CPUs. In the firmware, an ACPI table can be constructed based on the information of each device, and a first correspondence and a second correspondence can be added to the device information of the GPIO controller, so that the first correspondence and the second correspondence can be used as custom attributes in the device information of the GPIO controller.

[0105] When the OS starts up each time, the firmware can pass the ACPI table to the OS by passing parameters, and then the OS can load the ACPI table defined in the firmware to obtain information about each device. When the OS loads the device information of the GPIO controller, it can obtain the first correspondence and the second correspondence.

[0106] Refer to Figure 3 and Figure 4 , in another alternative embodiment, step 101 specifically includes the following steps:

[0107] S12: In the firmware or the kernel of the operating system, through the device tree, construct a first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and a second correspondence between the GPIO pin identifier and the index value in the device information of the GPIO controller, where each GPIO pin of the GPIO controller is electrically connected to the interrupt controller.

[0108] Correspondingly, the steps of loading the first correspondence and the second correspondence in step 102 specifically include:

[0109] S22: Load the device tree from the firmware or the kernel to obtain the first correspondence and the second correspondence from the device information of the GPIO controller.

[0110] Among them, the device tree also provides a data structure for recording device information, which can record device information such as controllers and CPUs. A device tree can be constructed according to the device information in the firmware or the kernel of the OS, and the first correspondence and the second correspondence are added to the device information of the GPIO controller, so as to use the first correspondence and the second correspondence as custom attributes in the device information of the GPIO controller.

[0111] When the OS starts up each time, the firmware can be passed to the kernel of the OS or the kernel itself integrates the device tree by passing parameters, and then the kernel of the OS can obtain information about each device based on the device tree. When the kernel of the OS loads the device information of the GPIO controller, it can obtain the first correspondence and the second correspondence.

[0112] The embodiment of the present invention provides a general method for using GPIO interrupt resources. Whether through the device tree, the ACPI table or other methods, and whether the GPIO interrupt resources are multiplexed, non-multiplexed, discrete or continuous, this method can be used to define, parse and use the GPIO interrupt resources.

[0113] Further, the steps of constructing the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and the second correspondence between the GPIO pin identifier and the index value in step 101 may specifically include:

[0114] Take each hardware interrupt resource as the first array element, and use the array subscript of the first array element to represent the index value of the hardware interrupt resource, and construct a first array in which the hardware interrupt resource and the index value have a one-to-one correspondence;

[0115] Use the array subscript of the second array element to represent each GPIO pin identifier, and take each index value as the second array element, and construct a second array in which the index value and the GPIO pin identifier have a one-to-one correspondence.

[0116] In the embodiment of the present invention, the first array and the second array can be defined in the ACPI table or the device tree. The first array includes a plurality of first array elements, which are respectively non-repeating hardware interrupt resources. For any hardware interrupt resource, the array subscript corresponding to the hardware interrupt resource can be used as the index value of the hardware interrupt resource, so that the hardware interrupt resource can be indexed through the array subscripts of the first array. The second array includes a plurality of second array elements. The second array represents each GPIO pin identifier through the array subscript, and the second array element is the index value of the hardware interrupt resource corresponding to each GPIO pin identifier.

[0117] Take Figure 2 as an example, the first array A can be {13, 15}. Among them, the first first array element 13 is the hardware interrupt resource corresponding to GPIO pins 0, 2, and 4, and the second first array element 15 is the hardware interrupt resource corresponding to GPIO pins 1, 3, and 5. Among them, the array subscript of the first array element 13 is 0, and the array subscript of the first array element 15 is 1.

[0118] Correspondingly, the second array B can be {0, 1, 0, 1, 0, 1}. Among them, the array subscripts of the 6 second array elements are 0-5 in sequence, representing GPIO pins 0-5 respectively.

[0119] The first second array element 0 indicates that the index value of the hardware interrupt resource corresponding to GPIO pin 0 is 0. Furthermore, the first array element with an array subscript of 0 can be found from the first array A, which is 13, that is, it indicates that the hardware interrupt resource corresponding to GPIO pin 0 is 13.

[0120] The second second array element 1 indicates that the index value of the hardware interrupt resource corresponding to GPIO pin 1 is 1. Furthermore, the first array element with an array subscript of 1 can be found from the first array A, which is 15, that is, it indicates that the hardware interrupt resource corresponding to GPIO pin 1 is 15.

[0121] The 3rd second array element 0 indicates that the index value of the hardware interrupt resource corresponding to GPIO pin 2 is 0. Further, the 1st array element with an array subscript of 0 can be found from the first array A, which is 13. That is, it indicates that the hardware interrupt resource corresponding to GPIO pin 2 is 13.

[0122] The 4th second array element 1 indicates that the index value of the hardware interrupt resource corresponding to GPIO pin 3 is 1. Further, the 1st array element with an array subscript of 1 can be found from the first array A, which is 15. That is, it indicates that the hardware interrupt resource corresponding to GPIO pin 3 is 15.

[0123] The 5th second array element 0 indicates that the index value of the hardware interrupt resource corresponding to GPIO pin 4 is 0. Further, the 1st array element with an array subscript of 0 can be found from the first array A, which is 13. That is, it indicates that the hardware interrupt resource corresponding to GPIO pin 4 is 13.

[0124] The 6th second array element 1 indicates that the index value of the hardware interrupt resource corresponding to GPIO pin 5 is 1. Further, the 1st array element with an array subscript of 1 can be found from the first array A, which is 15. That is, it indicates that the hardware interrupt resource corresponding to GPIO pin 5 is 15.

[0125] The above search results are consistent with Figure 2 the connection relationship shown.

[0126] It should be noted that although the embodiments of the present application take the construction of the corresponding relationship in the form of an array structure as an example for illustrative purposes, the construction of the first corresponding relationship and the second corresponding relationship is not necessarily limited to the above examples, and can also be implemented in the form of an index linked list. The reason for taking the array structure as an example is that the properties of the array structure itself bring convenience to the construction of the corresponding relationship, because the properties of the array structure can achieve the construction of the corresponding relationship with less space occupied.

[0127] Further optionally, the step of constructing the second array in which the array subscripts of the second array elements represent the respective GPIO pin identifiers and the respective index values are used as the second array elements to establish a one-to-one correspondence between the index values and the GPIO pin identifiers may specifically include:

[0128] For any GPIO pin identifier, when the GPIO pin corresponding to the GPIO pin identifier is not connected to any input pin in the interrupt controller, the second array element corresponding to the GPIO pin identifier when represented as the array subscript of the second array element is filled with an illegal value of the array subscript of the first array element.

[0129] Among them, for any GPIO pin, when the GPIO pin is connected to an input pin in the interrupt controller, it indicates that the GPIO pin has corresponding hardware interrupt resources. Therefore, in the second array, the second array element corresponding to the identifier of the GPIO pin can be filled with a legal value of the array subscript of the first array element. When the GPIO pin is not connected to any input pin in the interrupt controller, it indicates that the GPIO pin has no corresponding hardware interrupt resources. Therefore, in the second array, the second array element corresponding to the identifier of the GPIO pin can be filled with an illegal value of the array subscript of the first array element.

[0130] Taking the above first array A{13, 15} as an example, in the first array A, the legal values of the array subscripts of the first array elements are 0 and 1, and the illegal values of the array subscripts of the first array elements can be negative values (such as -1, -2, etc.) or positive values exceeding the legal value range {0, 1} (such as 4, 8, etc.).

[0131] Taking the second array B as {0, 1, 0, 1, 0, 1} as an example, the second second array element is 1, which is a legal value. Then, the hardware interrupt resource corresponding to GPIO pin 1 can be found from the first array A as 13.

[0132] Taking the second array B as {0, -1, 0, 1, 0, 1} as an example, the second second array element is -1, which is an illegal value. Then, the hardware interrupt resource corresponding to GPIO pin 1 cannot be found from the first array A, indicating that GPIO pin 1 has no corresponding hardware interrupt resources.

[0133] Figure 5 The flowchart of the steps of another embodiment of the method for using interrupt resources according to the present invention is shown. Refer to Figure 5 Optionally, after loading the first correspondence and the second correspondence in step 102, the following steps may further be included:

[0134] Step 105: Construct the mapping relationship between each hardware interrupt resource and the software interrupt resource.

[0135] Among them, the mapping relationship between each hardware interrupt resource and the software interrupt resource can be constructed and dynamically maintained by relevant software.

[0136] Correspondingly, after step 104, the following steps may further be included:

[0137] Step 106: Perform interrupt mapping on the target hardware interrupt resource according to the mapping relationship to obtain the target software interrupt resource corresponding to the target hardware interrupt resource.

[0138] Step 107: Return the target software interrupt resource to the development software that submitted the user application, so that the user can customize the interrupt routine according to the target software interrupt resource.

[0139] Among them, the interrupt routine is also a set of interrupt function interfaces or interrupt services provided externally.

[0140] In practical applications, since the hardware interrupt resources are relatively low-level data, directly providing them to the users of the development software will increase the subsequent development difficulty and reduce the development efficiency. Therefore, the kernel can provide a mapping mechanism to map each hardware interrupt resource into a software interrupt resource available for the development software, achieving good isolation and cross-platform characteristics. The mapped software interrupt resources have mechanisms such as response priorities, which are beneficial for subsequent development. For users developing with the development software, they hardly come into contact with the underlying hardware interrupt resources, providing flexibility for the efficient use of the central processing unit resources.

[0141] In the embodiments of the present invention, step 101 can be performed after any power-on of the electronic device, and steps 102, 105, 103, 104, 106, and 107 can be performed after each subsequent power-on of the electronic device.

[0142] In the embodiments of the present invention, the corresponding relationship between the GPIO pin identifier and the hardware interrupt resource can be indirectly constructed through the index value and recorded in the firmware or the kernel of the OS. When the user applies for the hardware interrupt resource of a certain GPIO pin, the OS reads and parses the first corresponding relationship between the hardware interrupt resource and the index value, and the second corresponding relationship between the GPIO pin identifier and the index value. Then, the OS can provide the user with the hardware interrupt resource of the applied GPIO pin according to these two corresponding relationships. In the embodiments of the present invention, since the definition of the index value is not restricted by whether the hardware interrupt resources are multiplexed and whether they are continuous in some mechanisms, the corresponding relationship between the GPIO pin identifier and the hardware interrupt resource can be defined and transmitted by converting it into the first corresponding relationship and the second corresponding relationship, which can not only realize the use of multiplexed and discrete hardware interrupt resources, but also realize the use of multiplexed and continuous hardware interrupt resources, as well as the use of non-multiplexed hardware interrupt resources.

[0143] It should be noted that for the method embodiments, for the sake of simple description, they are all expressed as a series of action combinations. However, those skilled in the art should know that the embodiments of the present invention are not limited by the described action sequence, because according to the embodiments of the present invention, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily essential to the embodiments of the present invention.

[0144] Refer toFigure 6 , showing a structural block diagram of a device for using interruption resources according to the present invention. The device 300 may specifically include the following modules:

[0145] The first construction module 301 is configured to construct a first correspondence between each hardware interruption resource and an index value of the hardware interruption resource, and a second correspondence between a GPIO pin identifier and the index value in a firmware or a kernel of an operating system;

[0146] The loading module 302 is configured to load the first correspondence and the second correspondence each time the operating system is started after the construction is completed;

[0147] The first parsing module 303 is configured to, when receiving a user application for obtaining an interruption resource corresponding to a target GPIO pin identifier, parse, according to the target GPIO pin identifier carried in the user application, a target index value corresponding to the target GPIO pin identifier from the second correspondence;

[0148] The second parsing module 304 is configured to parse a target hardware interruption resource corresponding to the target index value from the first correspondence.

[0149] Optionally, the first construction module 301 includes:

[0150] The first construction sub-module is configured to construct, in the firmware, through an advanced configuration and power management interface table, a first correspondence between each hardware interruption resource and an index value of the hardware interruption resource, and a second correspondence between a GPIO pin identifier and the index value in device information of a GPIO controller, where each GPIO pin of the GPIO controller is electrically connected to an interruption controller;

[0151] The loading module 302 includes:

[0152] The first loading sub-module is configured to load the advanced configuration and power management interface table from the firmware to obtain the first correspondence and the second correspondence from the device information of the GPIO controller.

[0153] Optionally, the first construction module 301 includes:

[0154] The second construction sub-module is configured to construct, in the firmware or a kernel of an operating system, through a device tree, a first correspondence between each hardware interruption resource and an index value of the hardware interruption resource, and a second correspondence between a GPIO pin identifier and the index value in device information of a GPIO controller, where each GPIO pin of the GPIO controller is electrically connected to an interruption controller;

[0155] The loading module 302 includes:

[0156] A second loading sub-module, configured to load the device tree from the firmware or the kernel, so as to obtain the first correspondence and the second correspondence from the device information of the GPIO controller.

[0157] Optionally, the first building module 301 includes:

[0158] A third building sub-module, configured to use each hardware interrupt resource as a first array element, and represent the index value of the hardware interrupt resource by the array subscript of the first array element, so as to build a first array in which the hardware interrupt resource and the index value have a one-to-one correspondence;

[0159] A fourth building sub-module, configured to represent each GPIO pin identifier by the array subscript of a second array element, and use each of the index values as the second array element, so as to build a second array in which the index value and the GPIO pin identifier have a one-to-one correspondence.

[0160] Optionally, the fourth building sub-module is specifically configured to:

[0161] For any one of the GPIO pin identifiers, when the GPIO pin corresponding to the GPIO pin identifier is not connected to any input pin in the interrupt controller, fill the second array element corresponding to the GPIO pin identifier represented as the array subscript of the second array element with an illegal value of the array subscript of the first array element.

[0162] Optionally, the device 300 further includes:

[0163] A second building module, configured to build a mapping relation table between each of the hardware interrupt resources and software interrupt resources in the kernel of the operating system.

[0164] Optionally, the device 300 further includes:

[0165] A second loading module, configured to load the mapping relation table through the kernel;

[0166] The device 300 further includes:

[0167] A mapping module, configured to perform interrupt mapping on the target hardware interrupt resource according to the mapping relation table, so as to obtain a target software interrupt resource corresponding to the target hardware interrupt resource;

[0168] A return module, configured to return the target software interrupt resource to the development software that submits the user application, so that the user can customize an interrupt routine according to the target software interrupt resource.

[0169] Optionally, one of the hardware interrupt resources includes the pin number of an input pin on the interrupt controller to which the GPIO pin is connected.

[0170] In the embodiment of the present invention, the correspondence between the GPIO pin identifier and the hardware interrupt resource can be indirectly constructed through an index value and recorded in the firmware or the kernel of the OS. When a user applies for the hardware interrupt resource of a certain GPIO pin, the OS reads and parses the first correspondence between the hardware interrupt resource and the index value, and the second correspondence between the GPIO pin identifier and the index value. Then, the OS can provide the user with the hardware interrupt resource of the applied GPIO pin according to these two correspondences. In the embodiment of the present invention, since the definition of the index value is not restricted by whether the hardware interrupt resources are multiplexed and whether they are continuous in some mechanisms, the correspondence between the GPIO pin identifier and the hardware interrupt resource can be defined and transmitted by converting it into the first correspondence and the second correspondence. It can not only realize the use of multiplexed and discrete hardware interrupt resources, but also realize the use of multiplexed and continuous hardware interrupt resources, as well as the use of non-multiplexed hardware interrupt resources.

[0171] For the apparatus embodiment, since it is basically similar to the method embodiment, the description is relatively simple. For related parts, refer to the partial description of the method embodiment.

[0172] Figure 7 FIG. 400 is a block diagram of an electronic device 400 for boot display according to an exemplary embodiment. For example, the electronic device 400 may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0173] Referring to Figure 7 , the electronic device 400 may include one or more of the following components: a processing component 402, a memory 404, a power supply component 406, a multimedia component 408, an audio component 410, an input / output (I / O) interface 412, a sensor component 414, and a communication component 416.

[0174] The processing component 402 generally controls the overall operation of the electronic device 400, such as operations associated with display, telephone calls, data communication, camera operations, and recording operations. The processing element 402 may include one or more processors 420 to execute instructions to complete all or part of the steps of the above methods. In addition, the processing component 402 may include one or more modules to facilitate the interaction between the processing component 402 and other components. For example, the processing component 402 may include a multimedia module to facilitate the interaction between the multimedia component 408 and the processing component 402.

[0175] The memory 404 is configured to store various types of data to support the operation of the device 400. Examples of such data include instructions for any application or method operating on the electronic device 400, contact data, phone book data, messages, pictures, videos, and the like. The memory 404 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, a magnetic disk, or an optical disk.

[0176] The power supply component 406 provides power to various components of the electronic device 400. The power supply component 406 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the electronic device 400.

[0177] The multimedia component 408 includes a screen that provides an output interface between the electronic device 400 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen can be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors can not only sense the boundaries of the touch or swipe actions but also detect the duration and pressure associated with the touch or swipe operations. In some embodiments, the multimedia component 408 includes a front camera and / or a rear camera. When the electronic device 400 is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera can receive external multimedia data. Each of the front camera and the rear camera can be a fixed optical lens system or have a focal length and optical zoom capabilities.

[0178] The audio component 410 is configured to output and / or input audio signals. For example, the audio component 410 includes a microphone (MIC) that is configured to receive external audio signals when the electronic device 400 is in an operating mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signals can be further stored in the memory 404 or transmitted via the communication component 416. In some embodiments, the audio component 410 further includes a speaker for outputting audio signals.

[0179] The I / O interface 412 provides an interface between the processing component 402 and a peripheral interface module, and the peripheral interface module can be a keyboard, a click wheel, buttons, etc. These buttons can include, but are not limited to: a home button, a volume button, a power-on button, and a lock button.

[0180] The sensor assembly 414 includes one or more sensors for providing a status assessment of various aspects of the electronic device 400. For example, the sensor assembly 414 can detect the on / off state of the device 400, the relative positioning of components, such as the display and keypad of the electronic device 400. The sensor assembly 414 can also detect a change in the position of the electronic device 400 or a component of the electronic device 400, the presence or absence of user contact with the electronic device 400, the orientation or acceleration / deceleration of the electronic device 400, and the temperature change of the electronic device 400. The sensor assembly 414 can include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor assembly 414 can also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 414 can also include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0181] The communication component 416 is configured to facilitate communication between the electronic device 400 and other devices in a wired or wireless manner. The electronic device 400 can access a wireless network based on communication standards, such as WiFi, 2G, or 3G, or a combination thereof. In an exemplary embodiment, the communication component 416 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 416 further includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0182] In an exemplary embodiment, the electronic device 400 can be implemented by one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components for performing the above method.

[0183] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 404 including instructions, and the above instructions can be executed by a processor 420 of the electronic device 400 to complete the above method. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, and an optical data storage device, etc.

[0184] A readable storage medium, when the instructions in the storage medium are executed by a processor of an electronic device, enables the electronic device to execute a method for using interrupt resources, and the method includes:

[0185] In the firmware or the kernel of the operating system, establish a first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and a second correspondence between the GPIO pin identifier and the index value;

[0186] After the establishment is completed, when the operating system starts each time, load the first correspondence and the second correspondence;

[0187] When receiving a user application for obtaining the interrupt resource corresponding to the target GPIO pin identifier, according to the target GPIO pin identifier carried in the user application, parse from the second correspondence to obtain the target index value corresponding to the target GPIO pin identifier;

[0188] Parse from the first correspondence to obtain the target hardware interrupt resource corresponding to the target index value.

[0189] Each embodiment in this specification is described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same or similar parts among the embodiments can be referred to each other.

[0190] Those skilled in the art should understand that the embodiments of the present invention can be provided as methods, devices, or computer program products. Therefore, the embodiments of the present invention can take the form of all-hardware embodiments, all-software embodiments, or embodiments combining software and hardware aspects. Moreover, the embodiments of the present invention can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk memories, CD-ROMs, optical memories, etc.) containing computer-usable program codes.

[0191] The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowcharts and / or block diagrams, and the combination of processes and / or blocks in the flowcharts and / or block diagrams can be implemented by computer program instructions. These computer program instructions can be provided to the processors of general-purpose computers, special-purpose computers, embedded processors, or other programmable data processing terminal devices to generate a machine, so that the instructions executed by the processors of the computer or other programmable data processing terminal devices generate for implementing in the process Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks to specify the functions of the device.

[0192] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing terminal device to work in a predictive manner, such that the instructions stored in the computer-readable memory produce a manufacture including an instruction device that implements the functions specified in one process or a plurality of processes and / or one block or a plurality of blocks in the process Figure 1 one process or a plurality of processes and / or Figure 1 one block or a plurality of blocks.

[0193] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device, such that a series of operation steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable terminal device provide steps for implementing the functions specified in one process or a plurality of processes and / or Figure 1 one process or a plurality of processes and / or Figure 1 one block or a plurality of blocks.

[0194] Although the preferred embodiments of the embodiments of the present invention have been described, those skilled in the art can make additional changes and modifications once they learn the basic creative concept. Therefore, the appended claims are intended to be construed to include the preferred embodiments as well as all changes and modifications falling within the scope of the embodiments of the present invention.

[0195] Finally, it should also be noted that in this text, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, such that a process, method, article or terminal device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or terminal device. Without further limitation, an element defined by the statement "comprising one..." does not exclude the presence of additional identical elements in the process, method, article or terminal device comprising the element.

[0196] The above has introduced in detail a method and apparatus for using interruption resources, an electronic device, and a storage medium provided by the present invention. Specific examples are used in this text to elaborate on the principle and implementation manner of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of the present invention; at the same time, for those of ordinary skill in the art, according to the idea of the present invention, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation on the present invention.

Claims

1. A method for using an interrupt resource, characterized in that, Including: In the firmware or the kernel of the operating system, establish a first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and a second correspondence between the GPIO pin identifier and the index value; After the establishment is completed, when the operating system starts each time, load the first correspondence and the second correspondence; When receiving a user application for obtaining the interrupt resource corresponding to the target GPIO pin identifier, according to the target GPIO pin identifier carried in the user application, parse from the second correspondence to obtain the target index value corresponding to the target GPIO pin identifier; Parse from the first correspondence to obtain the target hardware interrupt resource corresponding to the target index value; Reuse of the hardware interrupt resources.

2. The method according to claim 1, wherein The step of establishing a first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and a second correspondence between the GPIO pin identifier and the index value in the firmware or the kernel of the operating system includes: In the firmware, through the Advanced Configuration and Power Management Interface Table, establish a first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and a second correspondence between the GPIO pin identifier and the index value in the device information of the GPIO controller, wherein each GPIO pin of the GPIO controller is electrically connected to the interrupt controller; The step of loading the first correspondence and the second correspondence includes: Load the Advanced Configuration and Power Management Interface Table from the firmware to obtain the first correspondence and the second correspondence from the device information of the GPIO controller.

3. The method according to claim 1, wherein The step of establishing a first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and a second correspondence between the GPIO pin identifier and the index value in the firmware or the kernel of the operating system includes: In the firmware or the kernel of the operating system, through the device tree, establish a first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and a second correspondence between the GPIO pin identifier and the index value in the device information of the GPIO controller, wherein each GPIO pin of the GPIO controller is electrically connected to the interrupt controller; The step of loading the first correspondence and the second correspondence includes: Load the device tree from the firmware or the kernel to obtain the first correspondence and the second correspondence from the device information of the GPIO controller.

4. The method according to any one of claims 1 to 3, characterized in that The step of establishing a first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and a second correspondence between the GPIO pin identifier and the index value includes: Take each hardware interrupt resource as the first array element, and use the array subscript of the first array element to represent the index value of the hardware interrupt resource, and establish a first array in which the hardware interrupt resource and the index value are in one-to-one correspondence; Each GPIO pin identifier is represented by the array subscript of the second array element, and each of the index values is used as the second array element to construct a second array in which the index value and the GPIO pin identifier have a one-to-one correspondence relationship.

5. The method according to claim 4, characterized in that The step of representing each GPIO pin identifier by the array subscript of the second array element, using each of the index values as the second array element, and constructing a second array in which the index value and the GPIO pin identifier have a one-to-one correspondence relationship includes: For any one of the GPIO pin identifiers, when the GPIO pin corresponding to the GPIO pin identifier is not connected to any input pin in the interrupt controller, the second array element corresponding to the GPIO pin identifier represented as the array subscript is filled with an illegal value of the array subscript of the first array element.

6. The method according to any one of claims 1-5, characterized in that, After the construction is completed, when the operating system starts each time, after loading the first correspondence relationship and the second correspondence relationship, it further includes: Constructing the mapping relationship between each of the hardware interrupt resources and the software interrupt resources.

7. The method according to claim 6, wherein After parsing out the target hardware interrupt resource corresponding to the target index value from the first correspondence relationship, it further includes: Performing interrupt mapping on the target hardware interrupt resource according to the mapping relationship to obtain the target software interrupt resource corresponding to the target hardware interrupt resource; Returning the target software interrupt resource to the development software that submits the user application, so that the user can customize the interrupt routine according to the target software interrupt resource.

8. The method according to any one of claims 1 to 7, characterized in that, One of the hardware interrupt resources includes the pin number of an input pin on the interrupt controller to which the GPIO pin is connected.

9. An apparatus for using an interrupt resource, characterized in that It includes: A first construction module, configured to construct a first correspondence relationship between each hardware interrupt resource and the index value of the hardware interrupt resource, and a second correspondence relationship between the GPIO pin identifier and the index value in the firmware or the kernel of the operating system; A loading module, configured to load the first correspondence relationship and the second correspondence relationship when the operating system starts each time after the construction is completed; A first parsing module, configured to, when receiving a user application for obtaining the interrupt resource corresponding to the target GPIO pin identifier, parse out the target index value corresponding to the target GPIO pin identifier from the second correspondence relationship according to the target GPIO pin identifier carried in the user application; A second parsing module, configured to parse out the target hardware interrupt resource corresponding to the target index value from the first correspondence relationship; The hardware interrupt resource multiplexing.

10. An electronic device, characterized in that, It includes a memory and one or more programs, where one or more programs are stored in the memory and are configured to be executed by one or more processors, and the programs include instructions for performing the following operations: In the firmware or the kernel of the operating system, construct a first correspondence relationship between each hardware interrupt resource and the index value of the hardware interrupt resource, and a second correspondence relationship between the GPIO pin identifier and the index value; After the construction is completed, each time the operating system is started, load the first corresponding relationship and the second corresponding relationship; When receiving a user application for obtaining the interrupt resource corresponding to the target GPIO pin identifier, according to the target GPIO pin identifier carried in the user application, parse from the second corresponding relationship to obtain the target index value corresponding to the target GPIO pin identifier; Parse from the first corresponding relationship to obtain the target hardware interrupt resource corresponding to the target index value; The hardware interrupt resources are multiplexed.

11. A readable storage medium, characterized in that, When the instructions in the storage medium are executed by the processor of the electronic device, the electronic device is enabled to execute the method for using the interrupt resource according to any one of claims 1-8.

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