Amplifier circuit and radio frequency chip

Abstract

The present application provides an amplifier circuit and a radio frequency chip, wherein the amplifier circuit may include: a low noise amplifier, a first feedback circuit, and a load impedance circuit; the first end of the load impedance circuit is coupled to the first output end of the low noise amplifier, and the second end of the load impedance circuit is coupled to the second output end of the low noise amplifier, wherein the load impedance circuit may include a plurality of resonance circuits in parallel, each resonance circuit covering a different frequency band; the first feedback circuit includes a first capacitor and a second capacitor; the first end of the first capacitor is coupled to the first output end, and the second end of the first capacitor is coupled to the first input end of the low noise amplifier; the first end of the second capacitor is coupled to the second output end, and the second end of the second capacitor is coupled to the second input end of the low noise amplifier. This is to improve the out-of-band suppression capability of the amplifier circuit, i.e., the anti-interference capability.

Description

Technical Field

[0001] The present application relates to the field of electronics, and in particular to an amplifier circuit and a radio frequency chip. Background Art

[0002] With the development of information technology, radio communication technology has penetrated into all aspects of people's daily life. Various radio communication standards have emerged one after another. Different standards and different applications often cover multiple frequency bands. In order to support different applications, the emergence of multifunctional miniaturized terminals has become inevitable. Therefore, the development of RF transceiver chips with wide-band configurable functions has become a trend.

[0003] The amplifier circuit is an important part of the RF receiver. The traditional amplifier circuit will amplify the out-of-band interference signal while receiving and amplifying the useful signal. In extreme cases, the strong interference signal in the adjacent working frequency band will cause the saturation of the low-noise amplifier, and the overall receiver performance will be seriously deteriorated. In order to ensure the normal operation of the receiver, in addition to the linearity of the amplifier circuit itself, how to improve the anti-interference performance becomes the key. It is urgent to design an amplifier circuit with high out-of-band suppression capability. Summary of the invention

[0004] The present application provides an amplifier circuit and a radio frequency chip to improve the out-of-band suppression capability, that is, the anti-interference capability, of the amplifier circuit.

[0005] In the first aspect, the present application provides an amplifier circuit, including: a low-noise amplifier, a first feedback circuit, and a load impedance circuit; the first end of the load impedance circuit is coupled to the first output end of the low-noise amplifier, and the second end of the load impedance circuit is coupled to the second output end of the low-noise amplifier, wherein the load impedance circuit includes a plurality of resonant circuits in parallel, and each resonant circuit covers a different frequency band; the first feedback circuit includes a first capacitor and a second capacitor; the first end of the first capacitor is coupled to the first output end, and the second end of the first capacitor is coupled to the first input end of the low-noise amplifier; the first end of the second capacitor is coupled to the second output end, and the second end of the second capacitor is coupled to the second input end of the low-noise amplifier.

[0006] In some possible embodiments, the low noise amplifier includes a first transistor and a second transistor; the first input terminal is coupled to the source of the first transistor, and the first output terminal is coupled to the drain of the first transistor; the second input terminal is coupled to the source of the second transistor, and the second output terminal is coupled to the drain of the second transistor; the gate of the first transistor is coupled to the second end of the first capacitor; and the gate of the second transistor is coupled to the second end of the second capacitor.

[0007] In some possible embodiments, the low noise amplifier also includes: a third transistor and a fourth transistor with a common gate, and a third capacitor and a fourth capacitor; the first output terminal is coupled to the drain of the third transistor, and the second output terminal is coupled to the drain of the fourth transistor; the drain of the first transistor is coupled to the source of the third transistor, and the drain of the second transistor is coupled to the source of the fourth transistor; the first end of the third capacitor is coupled to the source of the first transistor, the second end of the third capacitor is coupled to the gate of the second transistor, the first end of the fourth capacitor is coupled to the gate of the first transistor, and the second end of the fourth capacitor is coupled to the source of the second transistor.

[0008] In some possible implementations, the first transistor, the second transistor, the third transistor and the fourth transistor are NMOS transistors.

[0009] In some possible implementations, each resonant circuit includes: a first inductor and a feedback capacitor network connected in parallel, wherein the feedback capacitor network can be configured with different capacitance values ​​according to different control signals.

[0010] In some possible implementations, the feedback capacitor network includes: a voltage-controlled variable capacitor and a gate capacitor array connected in parallel; wherein the capacitance value of the voltage-controlled variable capacitor can be controlled by an input voltage; and the gate capacitor array includes: a gate circuit and N feedback capacitors, where N is an integer greater than or equal to 2; wherein the gate circuit is configured to receive a control signal and gate at least a portion of the N feedback capacitors according to the control signal.

[0011] In some possible implementations, the gating circuit includes: N switches, a first end of each switch connected to the first output end, a second end of each switch connected to the first end of each feedback capacitor, and a second end of each feedback capacitor connected to the second output end.

[0012] In some possible implementations, the capacitance value of each feedback capacitor is the same; or, the capacitance value of each feedback capacitor is different.

[0013] In a second aspect, the present application provides a radio frequency chip, comprising an amplifier circuit as in any one of the most possible implementations of the first aspect.

[0014] Compared with the prior art, the technical solution provided by this application has the following beneficial effects:

[0015] In the present application, the impedance of the load impedance circuit is fed back to the low noise amplifier through the first feedback circuit, so that the low noise amplifier has a certain out-of-band suppression capability, and further reduces the input noise contribution of the low noise amplifier, and simultaneously improves the input matching and noise performance; in addition, multiple resonant circuits are connected in parallel to cover multiple frequency bands, thereby achieving broadband characteristics. The gated capacitor array realizes coarse adjustment of the resonant frequency path, and the voltage-controlled variable capacitor realizes fine adjustment of the resonant frequency path. When the amplifier circuit operates at different frequency points, the appropriate load impedance can be selected by adjusting the resonant circuit and its internal feedback capacitor network, and the impedance characteristics are fed back to the input end of the low noise amplifier through the first feedback circuit, thereby improving the out-of-band suppression, that is, the anti-interference ability of the amplifier circuit.

[0016] It should be understood that the above general description and the following detailed description are only exemplary and explanatory and do not limit the scope of protection of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is a schematic diagram of an amplifier circuit in an embodiment of the present application;

[0018] Figure 2 A schematic diagram of a low noise amplifier in an embodiment of the present application;

[0019] Figure 3 is a schematic diagram of another low noise amplifier in an embodiment of the present application;

[0020] Figure 4 is a schematic diagram of a resonant circuit in an embodiment of the present application;

[0021] Figure 5 is a schematic diagram of a feedback capacitor network in an embodiment of the present application;

[0022] Figure 6 A schematic diagram of a gating circuit in an embodiment of the present application;

[0023] Figure 7 is a schematic diagram of an amplifier circuit in an embodiment of the present application;

[0024] Figure 8 A single-ended circuit diagram of an amplifier circuit in an embodiment of the present application;

[0025] Fig. 9 This is a simulation effect diagram of an amplifier circuit taking three groups of parallel resonant circuits as an example in an embodiment of the present application. DETAILED DESCRIPTION

[0026] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present invention. However, it should be clear to those skilled in the art that the present invention may be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present invention.

[0027] In order to illustrate the technical solution described in this application, a specific embodiment is provided below for illustration.

[0028] Radio communications is a communication method that uses radio waves to transmit information in space by modulating the electrical signals such as sound, text, data, and images to be transmitted on radio waves and transmitting them to the target receiving end through space and ground. The RF transceiver at the target receiving end receives the radio signal, selects the required signal from it, and then converts it into sound, image, code and other information. RF receivers are widely used in many fields such as vehicle monitoring, remote control, telemetry, small wireless networks, industrial data acquisition systems, small wireless data terminals, security and fire protection systems, wireless remote control systems, biological signal acquisition, hydrological and meteorological monitoring, data communication, digital audio, and digital image transmission.

[0029] The amplifier circuit is an important part of the RF receiver. While receiving and amplifying useful signals, traditional amplifier circuits will also amplify out-of-band interference signals. In extreme cases, strong interference signals in adjacent working frequency bands will cause the saturation of the low-noise amplifier, and the overall receiver performance will be seriously deteriorated.

[0030] To solve the above problems, an embodiment of the present application provides an amplifier circuit, which can be applied to an electronic device with a communication function. The electronic device may include a terminal device, which may also be referred to as a terminal, a user equipment (UE), a mobile station (MS), a mobile terminal (MT), etc. The terminal device may be a mobile phone, a smart TV, a wearable device, a tablet computer (Pad), a computer with a wireless transceiver function, a virtual reality (VR) terminal device, an augmented reality (AR) terminal device, a wireless terminal in industrial control, a wireless terminal in self-driving, a wireless terminal in remote medical surgery, a wireless terminal in smart grid, a wireless terminal in transportation safety, a wireless terminal in smart city, a wireless terminal in smart home, etc.

[0031] Figure 1 is a schematic diagram of an amplifier circuit in an embodiment of the present application, see Figure 1 As shown, the amplifier circuit may include: a low noise amplifier 11 , a first feedback circuit 12 and a load impedance circuit 13 .

[0032] In some possible embodiments, the low noise amplifier may include a first output terminal a1 and a second output terminal a2 and a first input terminal b1 and a second input terminal b2, wherein the first input terminal b1 and the second input terminal b2 are used to receive a signal to be amplified, and amplify the signal to be amplified and output it through the first output terminal a1 and the second output terminal a2. The first terminal 13a of the load impedance circuit 13 is coupled to the first output terminal a1 of the low noise amplifier 11, and the second terminal 13b of the load impedance circuit 13 is coupled to the second output terminal a2 of the low noise amplifier. The first feedback circuit 12 includes a first capacitor c1 and a second capacitor c2; the first terminal c1a of the first capacitor c1 is coupled to the first output terminal a1, and the second terminal c1b of the first capacitor c1 is coupled to the first input terminal b1 of the low noise amplifier 11; the first terminal c2a of the second capacitor c2 is coupled to the second output terminal a2, and the second terminal c2b of the second capacitor c2 is coupled to the second input terminal b2 of the low noise amplifier 11.

[0033] First, some possible implementations of the low noise amplifier are introduced.

[0034] In some possible implementations, the low noise amplifier may be Figure 2 The low noise amplifier implementation shown, Figure 2 is a schematic diagram of a low noise amplifier in an embodiment of the present application, see Figure 2 As shown, the above-mentioned low noise amplifier 11 may include: a first transistor M1 and a second transistor M2, the first input terminal b1 is coupled with the source of the first transistor M1, and the first output terminal a1 is coupled with the drain of the first transistor M1; the second input terminal b2 is coupled with the source of the second transistor M2, and the second output terminal a2 is coupled with the drain of the second transistor M2; the gate of the first transistor M1 is coupled with the second terminal c1b of the first capacitor c1; and the gate of the second transistor M2 is coupled with the second terminal c2b of the second capacitor c2.

[0035] It can be understood that when the transistor is in a biased state, the transistor M 1与 The gate and source of M2 are in the on state. At this time, the amplifier circuit is in the working state. The first feedback circuit 12 can feed back the impedance characteristics of the load impedance 13 to the input end of the low noise amplifier 11 through the gate of the transistor, which can improve the out-of-band suppression capability of the low noise amplifier 11, and further improve the anti-interference capability of the low noise amplifier 11. The signal to be amplified is input into the low noise amplifier 11 through the first input end and the second input end, and the low noise amplifier amplifies the RF input signal and outputs it through the differential output end. Among them, the transistor can be biased by providing an external bias voltage, or a self-stabilizing bias transistor can be used, which is not limited in the embodiment of the present application.

[0036] Optionally, the transistors M1 and M2 may be NMOS transistors or other field effect transistors with an amplification function.

[0037] In some possible implementations, the low noise amplifier may also be composed of Figure 3 The low noise amplifier implementation shown, Figure 3 is a schematic diagram of another low noise amplifier in the embodiment of the present application, see Figure 3 As shown, the low noise amplifier 11 may also include: a third transistor M3 and a fourth transistor M4 with a common gate, and a third capacitor c3 and a fourth capacitor c4; the first output terminal a1 is coupled with the drain of the third transistor M3, and the second output terminal a2 is coupled with the drain of the fourth transistor M4; the drain of the first transistor M1 is coupled with the source of the third transistor M3, and the drain of the second transistor M2 is coupled with the source of the fourth transistor M4; the first terminal c3a of the third capacitor c3 is coupled with the source of the first transistor M1, the second terminal c3b of the third capacitor c3 is coupled with the gate of the second transistor M2, the first terminal c4a of the fourth capacitor c4 is coupled with the gate of the first transistor M1, and the second terminal c4b of the fourth capacitor c4 is coupled with the source of the second transistor M2.

[0038] It is understandable that the above-mentioned transistors M3 and M4 can be NMOS tubes or other field effect tubes like transistors M1 and M2. When transistors M1, M2, M3 and M4 are all in a biased state, the amplifier circuit is in a working state. When the signal to be amplified is input into the low-noise amplifier 11 via the first input terminal b1 and the second input terminal b2, the low-noise amplifier 11 can greatly reduce the noise contribution other than the signal to be amplified under the joint action of capacitors c3 and c4. At the same time, the first feedback circuit 12 can feed back the impedance characteristics of the load impedance 13 to the input terminal of the low-noise amplifier 11 via the gate of the transistor, which can improve the out-of-band suppression capability of the low-noise amplifier 11 and further improve the anti-interference capability of the low-noise amplifier 11. After the signal to be amplified is amplified by the low-noise amplifier 11, it is output via the first output terminal a1 and the second output terminal a2. Among them, the bias can be provided for each of the above-mentioned transistors by providing an external bias voltage, or a self-stabilizing bias transistor can be used, which is not limited in the embodiment of the present application.

[0039] Furthermore, some possible implementations of the load impedance circuit 13 are introduced.

[0040] In one embodiment, the load impedance circuit 13 may include a plurality of resonance circuits 20 connected in parallel, and each resonance circuit 20 covers a different frequency band.

[0041] It is understandable that when the low noise amplifier 11 operates in different frequency bands, a suitable load impedance can be selected by selecting the resonant circuits 20 of different frequency bands in the load impedance circuit 13. The above-mentioned multiple resonant circuits 20 can have a fixed value for setting the resonant frequency, and each resonant circuit 20 can set a different resonant frequency to cover a different frequency band, or each resonant circuit can adjust the resonant frequency to cover a different frequency band.

[0042] In some possible implementations, Figure 4 This is a schematic diagram of a resonant circuit in an embodiment of the present application, see Figure 4 As shown, each of the above-mentioned resonant circuits 20 may include: a first inductor L1 and a feedback capacitor network 40 connected in parallel, wherein the feedback capacitor network 40 is configured to configure different capacitance values ​​according to the working values ​​of different frequency bands of the low noise amplifier, thereby adjusting the resonant frequency of the resonant circuit.

[0043] It is understandable that the feedback capacitor network 40 can be composed of multiple feedback capacitors, wherein the multiple feedback capacitors can be connected in parallel or in a series-parallel mixture. Of course, the feedback capacitors in the feedback capacitor network 40 can also be combined in any manner, which is not specifically limited in the present embodiment.

[0044] Optionally, the capacitance values ​​of the feedback capacitors in the feedback capacitor network 40 may be the same, or the capacitance values ​​of the feedback capacitors in the feedback capacitor network 40 may be different. In this way, the feedback capacitor network 40 configures the capacitance value of the feedback capacitor network by selecting different feedback capacitors.

[0045] Preferably, the capacitance value of each feedback capacitor may be different and may increase or decrease in a gradient, so as to further expand the bandwidth of the transimpedance amplifier and improve the detection performance of the transimpedance amplifier.

[0046] In some possible implementations, Figure 5 FIG. 1 is a schematic diagram of a feedback capacitor network in an embodiment of the present application, see Figure 5 As shown, the feedback capacitor network 40 includes: a voltage-controlled variable capacitor Cv and a gate capacitor array 50 connected in parallel; wherein the capacitance value of the voltage-controlled variable capacitor Cv can be controlled by an input voltage. The gate capacitor array 50 may include: a gate circuit 51 and N feedback capacitors 52 (which may be denoted as C1, C2, ..., C i …、C N , i is greater than or equal to 1 and less than or equal to N), and the value of N is an integer greater than or equal to 2.

[0047] In some possible implementations, the gating circuit 51 can be configured to: gating at least a portion of the N feedback capacitors according to the operating frequency band of the low noise amplifier 11. Exemplarily, the feedback capacitor network includes three feedback capacitors, such as C1, C2 and C3. If the gating circuit 51 selects C1, then the capacitance value of the feedback capacitor network 40 is the capacitance value of C1. If the gating circuit 51 selects C1 and C2 according to the control signal, then the capacitance value of the feedback capacitor network 40 is the equivalent capacitance value of C1 and C2, such as the sum of the capacitance values ​​of C1 and C2.

[0048] In the embodiments of the present application, the gating circuit may be implemented in the following ways. Figure 6 This is a schematic diagram of a gating circuit in an embodiment of the present application, see Figure 6 As shown, the gating circuit 51 may include K switches 61 (which may be denoted as K1, K2, ..., K i …、K N ), K is less than or equal to N. The first terminal K of each switch 61 i a is connected to the first output terminal a1, and the second terminal K of each switch 61 is connected to the first output terminal a1. i b is connected to the first end of each feedback capacitor 52, and the second end of each feedback capacitor 52 is connected to the second output end a2. Exemplarily, the switch 61 may be a single-pole single-throw switch.

[0049] The above amplifier circuit is described below with reference to a specific embodiment.

[0050] Figure 7 is a schematic diagram of an amplifier circuit in an embodiment of the present application, see Figure 7 As shown, the amplifier circuit may include: a low noise amplifier 11, a first feedback circuit 12 and a load impedance circuit 13. The first feedback circuit 12 may include a first capacitor c1 and a second capacitor c2; the first end c1a of the first capacitor c1 is coupled to the first output end a1, and the second end c1b of the first capacitor c1 is coupled to the first input end b1 of the low noise amplifier 11; the first end c2a of the second capacitor c2 is coupled to the second output end a2, and the second end c2b of the second capacitor c2 is coupled to the second input end b2 of the low noise amplifier 11. The low noise amplifier 11 may include: a first transistor M1 and a second transistor M2, a third transistor M3 and a fourth transistor M4 with a common gate, and a third capacitor c3 and a fourth capacitor c4. The first output terminal a1 is coupled to the drain of the third transistor M3, and the second output terminal a2 is coupled to the drain of the fourth transistor M4; the drain of the first transistor M1 is coupled to the source of the third transistor M3, and the drain of the second transistor M2 is coupled to the source of the fourth transistor M4; the first terminal c3a of the third capacitor c3 is coupled to the source of the first transistor M1, the second terminal c3b of the third capacitor c3 is coupled to the gate of the second transistor M2, the first terminal c4a of the fourth capacitor c4 is coupled to the gate of the first transistor M1, and the second terminal c4b of the fourth capacitor c4 is coupled to the source of the second transistor M2. The first terminal 13a of the load impedance circuit 13 is coupled to the first output terminal a1 of the low noise amplifier 11, and the second terminal 13b of the load impedance circuit 13 is coupled to the second output terminal a2 of the low noise amplifier. The load impedance circuit 13 can be composed of a plurality of parallel resonant circuits 20. As Figure 7 As shown, taking three groups of parallel resonant circuits 20 as an example, each resonant circuit 20 may include: a first inductor L1 and a feedback capacitor network 40 connected in parallel, the feedback capacitor network 40 includes: a voltage-controlled variable capacitor Cv, a feedback capacitor (such as C1, C2 and C3) connected in parallel, and a switch (such as K1, K2, and K3). Among them, C1, C2 and C3 are connected in parallel, K1 and C1 are connected in series, K2 and C2 are connected in series, and K3 and C3 are connected in series.

[0051] It can be understood that when the transistors M1, M2, M3 and M4 are in a bias state, the amplifier circuit is in a working state, and the signal to be amplified can be input through the first input terminal b1 and the second input terminal b2 of the low noise amplifier. iAt this time, the first feedback circuit 12 feeds back the impedance characteristics of the load impedance circuit 13 to the first input terminal b1 and the second input terminal b2 of the low noise amplifier through the first capacitor c1 and the second capacitor c2, so as to improve the out-of-band suppression capability of the low noise amplifier 11, thereby improving the anti-interference capability of the low noise amplifier 11. At the same time, the low noise amplifier 11 further reduces the noise contribution other than the signal to be amplified under the joint action of the third capacitor c3 and the fourth capacitor c4. After the signal to be amplified is amplified by the low noise amplifier 11, it is output through the first output terminal a1 and the second output terminal a2.

[0052] Figure 8 A single-ended circuit diagram of an amplifier circuit in an embodiment of the present application;

[0053] See also Figure 8 In the figure, the gain of the first feedback circuit is represented by A1, the common gain of the third capacitor and the fourth capacitor is represented by -A2, and the load impedance is represented by ZL. The input impedance of this structure amplifier circuit is Z in See the following formula:

[0054]

[0055] Where A1=c1,A2=c3 / (c3+Cgs). The second term in the above formula is related to the load impedance ZL and the gains A1 and A2. In the circuit design process, it can be increased by increasing g m1 The first feedback circuit gain A1 increases the proportion of the second term in the input impedance, thereby having a greater impact on the input impedance. The load impedance ZL is composed of a resonant circuit, which has excellent frequency selection characteristics and good out-of-band suppression capabilities. Increasing the impact of ZL on the input impedance can effectively improve the input impedance out-of-band suppression capability and suppress out-of-band interference.

[0056] Fig. 9 This is a simulation effect diagram of an amplifier circuit using three sets of parallel resonant circuits as an example in the embodiment of the present application, see Fig. 9 As shown, three sets of parallel resonant circuits are taken as an example, where each resonant circuit has four sets of parallel gate capacitor arrays. The three resonant circuits can achieve continuous coverage of the operating frequency range from 1GHz to 5GHz, and each resonant circuit has 16 adjustable states (the intermediate state is omitted in the simulation diagram). When the amplifier circuit has good out-of-band suppression capability, that is, anti-interference capability, wide-band coverage is achieved at the same time.

[0057] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application is described in detail with reference to the aforementioned embodiments, a person of ordinary skill in the art should understand that the technical solutions described in the aforementioned embodiments can still be modified, or some of the technical features can be replaced. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present application, and should be included in the protection scope of the present application.

Claims

1. An amplifier circuit, characterized in that: include: A low noise amplifier, a first feedback circuit, and a load impedance circuit; The first end of the load impedance circuit is coupled to the first output end of the low noise amplifier, and the second end of the load impedance circuit is coupled to the second output end of the low noise amplifier, wherein the load impedance circuit includes a plurality of resonance circuits connected in parallel, and each resonance circuit covers a different frequency band; The first feedback circuit includes a first capacitor and a second capacitor; the first end of the first capacitor is coupled to the first output end, and the second end of the first capacitor is coupled to the first input end of the low noise amplifier; the first end of the second capacitor is coupled to the second output end, and the second end of the second capacitor is coupled to the second input end of the low noise amplifier.

2. The circuit according to claim 1, characterized in that The low noise amplifier comprises a first transistor and a second transistor; The first input terminal is coupled to the source of the first transistor, and the first output terminal is coupled to the drain of the first transistor; the second input terminal is coupled to the source of the second transistor, and the second output terminal is coupled to the drain of the second transistor; the gate of the first transistor is coupled to the second end of the first capacitor; and the gate of the second transistor is coupled to the second end of the second capacitor.

3. The circuit according to claim 2, characterized in that The low noise amplifier further comprises: a third transistor and a fourth transistor with a common gate, and a third capacitor and a fourth capacitor; The first output terminal is coupled to the drain of the third transistor, and the second output terminal is coupled to the drain of the fourth transistor; the drain of the first transistor is coupled to the source of the third transistor, and the drain of the second transistor is coupled to the source of the fourth transistor; A first end of the third capacitor is coupled to the source of the first transistor, a second end of the third capacitor is coupled to the gate of the second transistor, a first end of the fourth capacitor is coupled to the gate of the first transistor, and a second end of the fourth capacitor is coupled to the source of the second transistor.

4. The circuit according to claim 3, characterized in that The first transistor, the second transistor, the third transistor and the fourth transistor are NMOS transistors.

5. The circuit according to claim 1, characterized in that Each resonant circuit includes: a first inductor and a feedback capacitor network connected in parallel, wherein the feedback capacitor network can be configured with different capacitance values ​​according to different control signals.

6. The circuit according to claim 5, characterized in that The feedback capacitor network includes: a voltage-controlled variable capacitor and a gate capacitor array connected in parallel; wherein the capacitance value of the voltage-controlled variable capacitor can be controlled by an input voltage; the gate capacitor array includes: a gate circuit and N feedback capacitors, where N is an integer greater than or equal to 2; wherein the gate circuit is configured to receive the control signal and gate at least a portion of the N feedback capacitors according to the control signal.

7. The circuit according to claim 6, characterized in that The gating circuit includes: N switches, wherein the first end of each switch is connected to the first output end, the second end of each switch is connected to the first end of each feedback capacitor, and the second end of each feedback capacitor is connected to the second output end.

8. The circuit according to claim 7, characterized in that The capacitance value of each feedback capacitor is the same; or, the capacitance value of each feedback capacitor is different.

9. A radio frequency chip, characterized in that: The invention comprises the amplifier circuit as claimed in any one of claims 1 to 8.

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