Solid-state power switch

Abstract

Embodiments of the present disclosure relate to a solid-state power switch. Systems, methods, techniques, and devices of the power switch are disclosed. One exemplary embodiment is a power switch that includes: a first semiconductor device and a second semiconductor device, coupled together in a first anti-series configuration between a first terminal and a second terminal; a third semiconductor device and a fourth semiconductor device, coupled together in a second anti-series configuration between the first terminal and the second terminal; and a controller configured to operate the power switch to simultaneously conduct a first portion of a load current from the first terminal to the second terminal by closing the first semiconductor device and the second semiconductor device and conduct a second portion of the load current from the first terminal to the second terminal by closing the third semiconductor device and the fourth semiconductor device.

Description

Technical Field

[0001] The present disclosure relates to the field of power, and more particularly to solid-state power switches. Background Art

[0002] The present disclosure generally relates to current interruption in power networks. Power switches can be incorporated into power networks to block the flow of current. Examples of power switches include circuit breakers, contactors, and disconnectors, to name just a few. Solid-state based power switches have many advantages compared to mechanical power switches, including faster protection speed and reduced arc flash energy hazards. Existing solid-state power switches have many deficiencies and drawbacks. There are still unmet needs, including extending device life, reducing power losses, reducing switch control complexity, reducing cost, and reducing manufacturing complexity. For example, using a power switch to disconnect and reconnect a load requires frequent current interruptions, which can stress the power switch. Given these and other drawbacks in the art, there is a great need for the devices, methods, systems, and technologies disclosed herein.

[0003] To clearly, concisely, and accurately describe the non-limiting exemplary embodiments of the present disclosure, the manner and process of making and using them, and to be able to practice, make, and use them, reference will now be made to certain exemplary embodiments, including those shown in the figures, and specific language will be used to describe them. However, it should be understood that no limitation to the scope of the present disclosure is thereby imposed, and the present disclosure includes and protects such changes, modifications, and additional applications of the exemplary embodiments that would occur to those skilled in the art and that benefit from the present disclosure. Summary of the Invention

[0004] Exemplary embodiments of the present disclosure include systems, methods, technologies, and devices for solid-state power switches. Additional embodiments, forms, objects, features, advantages, aspects, and benefits of the present disclosure will become apparent from the following description and the drawings. Brief Description of the Drawings

[0005] Figure 1-2 Shows an exemplary power switch;

[0006] Figure 3 Is a flowchart showing an exemplary process for power switch control;

[0007] Figure 4 Shows Figure 1 Multiple graphs of the electrical characteristics of the exemplary power switch in

[0008] Figure 5 Shows an exemplary measurement circuit; and

[0009] Figure 6 Shows another exemplary power switch. Detailed Description

[0010] Reference Figure 1 shows that the power switch 100 is configured as a four - quadrant switch, which is configured to selectively conduct a bidirectional load current I between the power switch terminals 101 and 103 load , and is configured to selectively block both positive and negative voltages applied to the two terminals 101 and 103. It should be understood that the switch 100 can be implemented in a variety of applications, including circuit breakers, contactors, or combinations thereof, also known as interruptors, to name just a few examples. It should also be understood that the switch 100 can be incorporated into a power system configured to conduct alternating current or direct current.

[0011] The switch 100 includes two pairs of semiconductor devices coupled between the terminals 101 and 103 in an opposite anti - series configuration. The first pair of semiconductor devices includes semiconductor devices 110 and 120 coupled in a drain - to - drain configuration. The semiconductor device 110 includes a semiconductor switch 113, and the semiconductor switch 113 includes a source terminal 113S coupled to the terminal 101 and a drain terminal 113D coupled to the semiconductor switch 123. The semiconductor device 110 also includes a diode 111, and the diode 111 includes an anode coupled to the source terminal 113S and a cathode coupled to the drain terminal 113D.

[0012] The semiconductor device 120 includes a semiconductor switch 123, and the semiconductor switch 123 includes a source terminal 123S coupled to the terminal 103 and a drain terminal 123D coupled to the drain terminal 113D of the semiconductor switch 113. The semiconductor device 120 also includes a diode, which includes an anode coupled to the source terminal 123S and a cathode coupled to the drain terminal 123D.

[0013] The second pair of semiconductor devices includes semiconductor devices 130 and 140 coupled in a source - to - source configuration. The semiconductor device 130 includes a semiconductor switch 133, and the semiconductor switch 133 includes a drain terminal 133D coupled to the terminal 101 and a source terminal 133S coupled to the semiconductor switch 143. The semiconductor device 130 also includes a diode 131, and the diode 131 includes an anode coupled to the source terminal 133S and a cathode coupled to the drain terminal 133D.

[0014] The semiconductor device 140 includes a semiconductor switch 143, and the semiconductor switch 143 includes a drain terminal 143D coupled to the terminal 103 and a source terminal 143S coupled to the source terminal 133S of the semiconductor switch 133. The semiconductor device 140 also includes a diode 141, and the diode 141 includes an anode coupled to the source terminal 143S and a cathode coupled to the drain terminal 143D.

[0015] In some embodiments, diodes 111, 121, 131, and 141 are the intrinsic body diodes of semiconductor switches of the same semiconductor device. In some embodiments, one or more of diodes 111, 121, 131, and 141 are external diodes coupled in an anti-parallel configuration with the semiconductor switches of the same semiconductor device.

[0016] In the illustrated embodiment, the semiconductor switch of power switch 100 is a silicon carbide (SiC) metal oxide semiconductor field effect transistor (MOSFET). In other embodiments, the semiconductor switch of power switch 100 may include an insulated gate bipolar transistor (IGBT), where a pair of semiconductor switches are coupled in an emitter-emitter configuration, and another pair of semiconductor switches are coupled in a collector-collector configuration. In other embodiments, the semiconductor switch of power switch 100 may include a gallium nitride (GaN) field effect transistor (FET), a high electron mobility transistor (HEMT), a SiC junction gate field effect transistor (JFET), a GaN JFET, or a bipolar junction transistor (BJT), to name just a few examples.

[0017] In the illustrated embodiment, power switch 100 is formed using two half-bridge modules 105, 107. Module 105 includes a housing 108 that encloses semiconductor switches 113 and 133 and diodes 111 and 131. Housing 108 includes at least three connection points, each configured to connect terminal 101, drain terminal 113D, and source terminal 133S to an external device, such as module 105. Module 107 includes a housing 109 that encloses semiconductor switches 123 and 143 and diodes 121 and 141. Housing 109 includes at least three connection points, each configured to couple an external device to terminal 101, drain terminal 113D, and source terminal 133S. In some embodiments, power switch 100 is formed using a full-bridge module.

[0018] In some embodiments, power switch 100 can be assembled using a standard half-bridge SiC module. Unlike the custom modules used in other power switches, the standard half-bridge SiC module is a low-cost high-volume module that can be readily obtained from many manufacturers.

[0019] Power switch 100 includes a controller 160 configured to measure load current I load and operate each semiconductor device of power switch 100. Controller 160 includes a measurement circuit 161, a processing device 163, a gate driver 165, and a memory 167.

[0020] Measurement circuit 161 includes being configured to be based on load current I loadA measuring device that generates an output signal based on the electrical characteristics. For example, the measuring device may include a current transformer or a current sensor configured to measure current, to name just a few examples. The measuring circuit 161 is configured to determine the current direction based on the output signal from the measuring device. For example, the measuring circuit may include a comparator configured to compare the output signal received from the measuring device with a reference voltage and then output a current direction signal.

[0021] The gate driver 165 is configured to output control signals to each semiconductor switch. Using the gate driver 165, the controller 160 is configured to output a control signal C to the semiconductor switch 113 113 and output a control signal C to the semiconductor switch 123 123 and output a control signal C to the semiconductor switch 133 133 and output a control signal C to the semiconductor switch 143 143 . Since switches 123 and 133 are always triggered simultaneously, the controller 160 can be configured to output a single control signal to these two switches. Similarly, since switches 113 and 143 are triggered simultaneously, the controller 160 can be configured to output a single control signal to these two switches.

[0022] The processing device 163 is configured to execute a set of instructions stored by the memory 167 to effectively execute an exemplary power switch control process, such as Figure 3 the process shown. In some embodiments, the processing device 163 and the memory 167 are part of a microcontroller, to name just one example. The processing device 163 uses an exemplary switch control process (e.g., Figure 3 the process shown in ) to derive each control signal. For example, each control signal may be based on the current direction signal generated by the measuring circuit 161 and may be generated in response to determining that a fault has occurred or determining that zero-current turn-off is required, to name just a few examples.

[0023] Collectively, the control signals can be configured to conduct or block current flow through a parallel channel that includes a first current channel formed by semiconductor devices 110 and 120 and a second current channel formed by semiconductor devices 130 and 140. When the power switch 100 is turned on, a portion of the load current I load simultaneously and continuously conducts from terminal 101 to terminal 103 through the two parallel channels. The portion of the load current I load conducted by each channel depends on the impedance of the channel. Ideally, the load current I load is shared equally by each channel. It should be understood that any or all of the foregoing features of the power switch 100 may also be present in other power switches disclosed herein.

[0024] ReferenceFigure 2 , which shows an exemplary power switch 200 configured to selectively conduct a load current I between terminals 201 and 203 load . The power switch 200 includes a plurality of pairs of semiconductor switches 210 coupled in a first anti-series configuration and includes pairs 211 and 213. Each of pairs 211 and 213 is coupled in a drain-drain configuration. The power switch 200 further includes a plurality of pairs of semiconductor switches 220 coupled in a second anti-series configuration opposite to the first anti-series configuration and includes pairs 221 and 223. Each of pairs 221 and 223 is coupled in a source-source configuration.

[0025] Since each switch pair of the power switch 200 has an equal impedance when switched on, the load current I load is evenly distributed among all switched-on switch pairs. As the number of parallel switch pairs increases, the current rating of the power switch 200 increases proportionally. Thus, the number of the plurality of pairs of semiconductor switches 210 and 220 is based on the desired current rating of the power switch 200. It is important to note that since the parallel switch pairs operate in unison, there is no need to add passive components (e.g., reactors or transformers) to prevent current from circulating between the parallel switch pairs.

[0026] Reference Figure 3 , the flowchart shows an exemplary power switch control process 300. The following description of process 300 is made with reference to Figure 1 the power switch 100 shown. However, it should be understood that this process 300 can be used in conjunction with other exemplary power switches (e.g., those described with reference to Figure 2 and 6 ). It should be further understood that many variations and modifications to process 300 are contemplated, including, for example, omission of one or more aspects of process 300, addition of additional conditions and operations, and / or reorganization or separation of operations and conditions into separate processes.

[0027] Process 300 begins at operation 301, where the controller 160 turns on the power switch 100 by closing all the semiconductor switches of the power switch 100 to effectively conduct the load current I between terminals 101 and 103 through the parallel current paths formed by the semiconductor switches load . The controller 160 can turn on the power switch 100 in response to receiving a turn-on command from a central control system, to name just one example.

[0028] Process 300 proceeds to operation 303, where the controller 160 measures the load current I load .

[0029] In certain embodiments, the controller 160 receives from a measuring device the one related to the load current Iload a voltage corresponding to the magnitude. In some embodiments, the controller 160 receives a load current I from another device load measurement, or measures the load current I using a different measurement circuit load . Process 300 proceeds to operation 305, in which the controller 160 determines whether a fault has occurred based on the load current measurement from operation 303. The fault can be a short circuit fault or a current overload, to name just a few examples. In some embodiments, the controller 160 determines that a fault has occurred by comparing the voltage corresponding to the magnitude of the load current I load with a reference voltage corresponding to a fault current threshold.

[0030] If the controller 160 determines that a fault has occurred, process 300 proceeds to operation 307, in which the controller 160 turns off the power switch 100. In some embodiments, the controller 160 turns off the power switch 100 by disconnecting all semiconductor switches of the power switch 100. In some embodiments, the controller 160 only turns off the semiconductor switches required to interrupt the load current I load . After turning off the power switch 100, process 300 proceeds to the end operation 309.

[0031] If the controller 160 determines that no fault has occurred, process 300 proceeds to operation 311, in which the controller 160 determines whether zero current turn-off is required in response to determining that no fault has occurred. Zero current turn-off can be used to minimize dissipated energy during frequent load connections and disconnections, thereby extending the life of the power switch 100. The controller 160 can determine that zero current turn-off is required based on a zero current turn-off command received from an external device, based on the operating mode of the load receiving the load current I load , or based on the received measurement of the load current I load , to name just a few examples.

[0032] If the controller 160 determines that zero current turn-off is not required, process 300 returns to operation 303 and continues to monitor the power switch 100 by cyclically performing operations 303, 305, and 311 until a fault occurs or zero current turn-off is required.

[0033] If the controller 160 determines that zero current turn-off is required, process 300 proceeds to operation 313, in which the controller 160 uses the measurement circuit 161 to determine the direction of the load current I load . If the controller 160 determines that the power switch 100 conducts the load current I in the positive direction (i.e., from terminal 101 to terminal 103) load, then process 300 proceeds to operation 315, where controller 160 turns off the semiconductor switches having corresponding diodes, and when current flows through power switch 100 in the positive direction, the diodes do not block the load current I load . For power switch 100, controller 160 turns off semiconductor switches 113 and 143 because the load current I load will continue to conduct through power switch 100 via diodes 111 and 141.

[0034] Process 300 proceeds to operation 317, where controller 160 measures the load current I using measurement circuit 161 load . Process 300 proceeds to operation 319, where the controller determines whether the load current I based on the measurement in operation 317 load has decreased to zero. If controller 160 determines that the load current I load has not decreased to zero, then process 300 returns to operation 317 and continues to monitor the load current I load until the load current I load decreases to zero. In response to determining that the load current I load has decreased to zero, controller 160 proceeds to operation 321, where the remaining closed semiconductor switches of power switch 100 are turned off under zero current conditions. For power switch 100, controller 160 turns off switches 123 and 133. Process 300 then proceeds to end operation 309.

[0035] If controller 160 determines that power switch 100 conducts the load current I in the negative direction (i.e., from terminal 103 to terminal 101) load , then process 300 proceeds to operation 323, where controller 160 turns off the semiconductor switches having corresponding diodes, and when current flows through power switch 100 in the negative direction, the diodes do not block the load current I load . For power switch 100, controller 160 turns off semiconductor switches 123 and 133 because the load current I load will continue to conduct through power switch 100 via diodes 121 and 131.

[0036] Process 300 proceeds to operation 325, where controller 160 measures the load current I using measurement circuit 161 load . Process 300 proceeds to operation 327, where the controller determines whether the load current I based on the measurement in operation 325 load has decreased to zero. If controller 160 determines that the load current I load has not decreased to zero, then process 300 returns to operation 325 and continues to monitor the load current I load until the load current I loadis reduced to zero. In response to determining that the load current I load has been reduced to zero, the controller 160 proceeds to operation 329, where the remaining closed semiconductor switches of the power switch 100 are turned off under zero current conditions. For the power switch 100, the controller 160 turns off switches 113 and 143. The process 300 then proceeds to the end operation 309.

[0037] Reference Figure 4 , multiple figures 400 illustrate the electrical characteristics of the power switch 100 during zero current turn-off. Figure 410 shows the gate voltage applied to the semiconductor switches of the power switch 100. Figure 420 shows the load current I conducted through the power switch 100 load and the voltage V received by terminal 101 source .

[0038] At time t l , the controller 160 turns off switches 113 and 143 in response to determining that the current direction is positive. At time t2, the load current I load is zero. Instead of the power switch 100 conducting current in the negative direction, conduction is blocked by the semiconductor devices 110 and 140, which results in voltage oscillations between terminals 101 and 103. At time t3, the controller 160 turns off the semiconductor switches 123 and 133 under zero current conditions.

[0039] Reference Figure 5 , the exemplary measurement circuit 500 of the exemplary controller is configured to measure the load current I conducted by the exemplary power switch 510 load . The circuit 500 includes a measuring device 501, which is configured to output a voltage V corresponding to the magnitude of the load current I load . The circuit 500 further includes a comparator 503, which is configured to receive the voltage V sense and a reference voltage V sense , and output a voltage V that can correspond to the load current direction ref . comp

[0040] Reference Figure 6 , the circuit diagram shows an exemplary power switch 600. It should be understood that Figure 1-2Any or all of the above features of power switches 100 and 200 may also be present in power switch 600. Power switch 600 includes semiconductor devices 610 and 620 coupled between power terminals 601 and 603 and coupled together at midpoint connection 605. Semiconductor devices 610 and 620 are arranged in an anti-series configuration. Power switch 600 further includes semiconductor devices 630 and 640 coupled between power terminals 601 and 603 and coupled together at midpoint connection 607. Semiconductor devices 630 and 640 are arranged in another anti-series configuration.

[0041] Power switch 600 includes a voltage clamping device 650 coupled between midpoint connections 605 and 607, including a first end coupled to midpoint connection 605 and a second end coupled to midpoint connection 607. Voltage clamping device 650 is configured to clamp the voltage and absorb energy during fault current interruption, thereby preventing damage to the semiconductor devices of power switch 600.

[0042] In the illustrated embodiment, voltage clamping device 650 is a metal oxide varistor (MOV), but in other embodiments, the MOV may alternatively be another device configured to suppress transient voltages. In certain embodiments, voltage clamping device 650 may be coupled between power terminals 601 and 603 instead of between midpoint connections 605 and 607, although for the illustrated configuration, the power switch inductance is lower. It should be understood that any or all of the foregoing features of power switch 600 may also be present in other power switches disclosed herein.

[0043] A further written description of multiple exemplary embodiments will now be provided. One embodiment is a power switch that includes: a first semiconductor device and a second semiconductor device coupled together in a first anti-series configuration between a first terminal and a second terminal; a third semiconductor device and a fourth semiconductor device coupled together in a second anti-series configuration between the first terminal and the second terminal; and a controller configured to operate the power switch to simultaneously conduct a first portion of a load current from the first terminal to the second terminal by closing the first semiconductor device and the second semiconductor device and conduct a second portion of the load current from the first terminal to the second terminal by closing the third semiconductor device and the fourth semiconductor device.

[0044] In certain forms of the power switch described above, the power switch includes a voltage clamping device. The voltage clamping device includes a first end coupled between a first semiconductor device and a second semiconductor device, and a second end coupled between a third semiconductor device and a fourth semiconductor device. In certain forms, the power switch includes a voltage clamping device coupled between a first terminal and a second terminal. In certain forms, the controller is configured to operate the power switch to prevent load current from conducting between the first terminal and the second terminal. In certain forms, the controller is configured to measure the load current while the controller conducts a first portion and a second portion simultaneously, and determine that no fault has occurred based on the load current measurement. In certain forms, the controller is configured to determine that zero current turn-off is required in response to determining that no fault has occurred. In certain forms, the first semiconductor device includes a first diode and the fourth semiconductor device includes a second diode, wherein the controller is configured to: determine the direction of the load current in response to determining that zero current turn-off is required, disconnect the first semiconductor device and the fourth semiconductor device such that the first diode conducts a first portion of the load current and the second diode conducts a second portion of the load current, determine that the load current has decreased to zero, and disconnect the second semiconductor device and the third semiconductor device in response to determining that the load current has decreased to zero. In certain forms, the power switch includes: a first power electronics module including a first housing configured to enclose the first semiconductor device and the third semiconductor device; and a second power electronics module including a second housing configured to enclose the second semiconductor device and the fourth semiconductor device. In certain forms, the first anti-series configuration is a drain-drain configuration, and the second anti-series configuration is a source-source configuration, and wherein the power switch includes a first plurality of semiconductor pairs arranged in the first anti-series configuration and a second plurality of semiconductor pairs arranged in the second anti-series configuration.

[0045] Another exemplary embodiment is a method that includes: operating a power switch that includes a first semiconductor device and a second semiconductor device coupled together in a first anti-series configuration between a first terminal and a second terminal, and a third semiconductor device and a fourth semiconductor device coupled together in a second anti-series configuration between the first terminal and the second terminal; receiving a load current at the first terminal; selectively conducting a first portion of the load current from the first terminal to the second terminal through the first semiconductor device and the second semiconductor device; and conducting a second portion of the load current from the first terminal to the second terminal through the third semiconductor device and the fourth semiconductor device, the second portion being conducted while the first portion is being conducted.

[0046] In certain forms of the above method, the method includes: coupling a voltage clamping device to a first midpoint connection between a first semiconductor device and a second semiconductor device, and coupling the voltage clamping device to a second midpoint connection between a third semiconductor device and a fourth semiconductor device. In certain forms, the method includes: coupling the voltage clamping device between a first terminal and a second terminal. In certain forms, the method includes: measuring a load current; and determining that no fault has occurred based on the load current measurement. In certain forms, the method includes determining a need for zero current turn-off in response to determining that no fault has occurred. In certain forms, the method includes: determining a direction of the load current in response to determining a need for zero current turn-off; disconnecting the first semiconductor device and the fourth semiconductor device; using a first diode of the first semiconductor device to conduct a first portion of the load current; using a second diode of the fourth semiconductor device to conduct a second portion of the load current; using the first semiconductor device and the fourth semiconductor device to block the load current; and disconnecting the second semiconductor device and the third semiconductor device in response to determining that the load current has decreased to zero. In certain forms, the first anti-series configuration is a drain-drain configuration, and the second anti-series configuration is a source-source configuration, and wherein the power switch includes a first plurality of semiconductor pairs arranged in the first anti-series configuration and a second plurality of semiconductor pairs arranged in the second anti-series configuration.

[0047] Another exemplary embodiment is a power switch that includes: a plurality of current channels coupled in parallel between a first power terminal and a second power terminal, the plurality of current channels including a first current channel that includes a first pair of semiconductor devices coupled together in a first anti-series configuration, the plurality of current channels including a second current channel that includes a second pair of semiconductor devices coupled together in a second anti-series configuration; and a controller configured to operate the power switch to simultaneously conduct a first portion of a load current from the first terminal to the second terminal by closing the first pair of semiconductor devices and conduct a second portion of the load current from the first terminal to the second terminal by closing the second pair of semiconductor devices.

[0048] In certain forms of the aforementioned power switch, the power switch includes a voltage clamping device that is coupled to the first midpoint connection of the first pair of semiconductor devices and coupled to the second midpoint connection of the second pair of semiconductor devices. In certain forms, the power switch includes a voltage clamping device coupled between a first power terminal and a second power terminal. In certain forms, the controller is configured to measure the load current and determine that no fault has occurred based on the load current measurement. In certain forms, the controller is configured to determine that zero current turn-off is required in response to determining that no fault has occurred. In certain forms, the first pair of semiconductor devices includes a first semiconductor device having a first diode, and the second pair of semiconductor devices includes a second semiconductor device having a second diode, wherein the controller is configured to: determine the direction of the load current in response to determining that zero current turn-off is required, turn off the first semiconductor device and the second semiconductor device such that the first diode conducts a first portion of the load current and the second diode conducts a second portion of the load current, determine that the load current has decreased to zero, and turn off the third semiconductor device of the first pair of semiconductor devices and the fourth semiconductor device of the second pair of semiconductor devices in response to determining that the load current has decreased to zero. In certain forms, the power switch includes: a first half-bridge module including a first housing that encloses the first semiconductor device of the first pair of semiconductor devices and the second semiconductor device of the second pair of semiconductor devices; and a second half-bridge module including a second housing that encloses the third semiconductor device of the first pair of semiconductor devices and the fourth semiconductor device of the second pair of semiconductor devices. In certain forms, the first anti-series configuration is a drain-drain configuration, and the second anti-series configuration is a source-source configuration, and wherein the plurality of current channels includes a first plurality of pairs of semiconductor devices arranged in the first anti-series configuration and a second plurality of pairs of semiconductor devices arranged in the second anti-series configuration.

[0049] Although the present disclosure has been described in detail in the drawings and the foregoing description, it is to be considered illustrative rather than restrictive in nature. It should be understood that only certain exemplary embodiments have been shown and described, and all variations and modifications falling within the spirit of the present disclosure are desired to be protected. It should be understood that although the use of words such as "preferred", "preferably", "preferred", or "more preferred" in the foregoing description indicates that the features so described may be more desirable, it may not be necessary, and embodiments lacking thereof may be contemplated as being within the scope of the present disclosure, which is defined by the appended claims. When reading the claims, it is intended that when words such as "a", "an", "at least one", or "at least a portion" are used, the claim is not intended to be limited to only one item unless there is a specific contrary indication in the claim. The term "of" may imply an association or connection with another item, as well as belonging to or being connected with another item, as informed by the context in which the item is used. The terms "coupled to", "coupled with", etc. include indirect connection and coupling, and also include but do not require direct coupling or connection unless expressly indicated to the contrary. When the language "at least a portion" and / or "a portion" is used, the item may include a portion and / or the whole item unless there is a specific contrary indication.

Claims

1. A power switch, comprising: A first semiconductor device and a second semiconductor device, coupled together in a first anti-series configuration between a first terminal and a second terminal; A third semiconductor device and a fourth semiconductor device, coupled together in a second anti-series configuration between the first terminal and the second terminal; A voltage clamping device, including a first end coupled between the first semiconductor device and the second semiconductor device and a second end coupled between the third semiconductor device and the fourth semiconductor device; And A controller, configured to operate the power switch to simultaneously conduct a first portion of a load current from the first terminal to the second terminal by closing the first semiconductor device and the second semiconductor device and conduct a second portion of the load current from the first terminal to the second terminal by closing the third semiconductor device and the fourth semiconductor device.

2. The power switch according to claim 1, wherein the voltage clamping device is coupled between the first terminal and the second terminal.

3. The power switch according to claim 1, wherein the controller is configured to operate the power switch to prevent the load current from conducting between the first terminal and the second terminal.

4. The power switch according to claim 1, wherein the controller is configured to measure the load current while the controller conducts both the first portion and the second portion, and determine that no fault has occurred based on the load current measurement.

5. The power switch according to claim 4, wherein the controller is configured to determine that zero current turn-off is required in response to determining that no such fault has occurred.

6. The power switch according to claim 5, wherein the first semiconductor device includes a first diode, and the fourth semiconductor device includes a second diode, and wherein the controller is configured to: determine the direction of the load current in response to determining that zero current turn-off is required, disconnect the first semiconductor device and the fourth semiconductor device such that the first diode conducts the first portion of the load current and the second diode conducts the second portion of the load current, determine that the load current has decreased to zero, and disconnect the second semiconductor device and the third semiconductor device in response to determining that the load current has decreased to zero.

7. The power switch according to claim 1, comprising: A first power electronics module, including a first housing configured to enclose the first semiconductor device and the third semiconductor device; And A second power electronics module, including a second housing configured to enclose the second semiconductor device and the fourth semiconductor device.

8. The power switch according to claim 1, wherein the first anti-series configuration is a drain-drain configuration, and the second anti-series configuration is a source-source configuration, and wherein the power switch includes a first plurality of semiconductor pairs arranged in the first anti-series configuration and a second plurality of semiconductor pairs arranged in the second anti-series configuration.

9. A method for controlling a power switch, comprising: Operating the power switch, the power switch including a first semiconductor device and a second semiconductor device coupled together in a first anti-series configuration between a first terminal and a second terminal; and the power switch including a third semiconductor device and a fourth semiconductor device coupled together in a second anti-series configuration between the first terminal and the second terminal; Coupling the voltage clamping device to a first midpoint connection between the first semiconductor device and the second semiconductor device, and coupling the voltage clamping device to a second midpoint connection between the third semiconductor device and the fourth semiconductor device; Receiving a load current at the first terminal, and; Selectively controlling the power switch to simultaneously conduct a first portion of the load current from the first terminal to the second terminal by closing the first semiconductor device and the second semiconductor device, and conduct a second portion of the load current from the first terminal to the second terminal by closing the third semiconductor device and the fourth semiconductor device.

10. The method according to claim 9, wherein the voltage clamping device is coupled between the first terminal and the second terminal.

11. The method according to claim 9, comprising: Measuring the load current; And Determining that no fault has occurred based on the load current measurement.

12. The method according to claim 11, comprising determining a need for zero-current turn-off in response to determining that no such fault has occurred.

13. The method according to claim 12, comprising: Determining the direction of the load current in response to determining that zero-current turn-off is required; Disconnecting the first semiconductor device and the fourth semiconductor device; Using a first diode of the first semiconductor device to conduct the first portion of the load current; Using a second diode of the fourth semiconductor device to conduct the second portion of the load current; Using the first semiconductor device and the fourth semiconductor device to block the load current; And Disconnecting the second semiconductor device and the third semiconductor device in response to determining that the load current has decreased to zero.

14. The method according to claim 9, wherein the first anti-series configuration is a drain-drain configuration and the second anti-series configuration is a source-source configuration, and wherein the power switch includes a first plurality of semiconductor pairs arranged in the first anti-series configuration and a second plurality of semiconductor pairs arranged in the second anti-series configuration.

15. A power switch, comprising: A plurality of current channels, coupled in parallel between a first power terminal and a second power terminal, the plurality of current channels including a first current channel, the first current channel including a first pair of semiconductor devices coupled together in a first anti-series configuration, the plurality of current channels including a second current channel, the second current channel including a second pair of semiconductor devices coupled together in a second anti-series configuration; A voltage clamping device, coupled to a first midpoint connection of the first pair of semiconductor devices and coupled to a second midpoint connection of the second pair of semiconductor devices; And A controller, configured to operate the power switch to simultaneously conduct a first portion of a load current from the first power terminal to the second power terminal by closing the first pair of semiconductor devices and conduct a second portion of the load current from the first power terminal to the second power terminal by closing the second pair of semiconductor devices.

16. The power switch according to claim 15, wherein the voltage clamping device is coupled between the first power terminal and the second power terminal.

17. The power switch according to claim 15, wherein the controller is configured to measure the load current and determine that no fault has occurred based on the load current measurement.

18. The power switch according to claim 17, wherein the controller is configured to determine a need for zero-current turn-off in response to determining that no such fault has occurred.

19. The power switch according to claim 18, wherein the first semiconductor device pair includes a first semiconductor device having a first diode, and the second semiconductor device pair includes a second semiconductor device having a second diode, wherein the controller is configured to: determine the direction of the load current in response to determining that zero-current turn-off is required, turn off the first semiconductor device and the second semiconductor device such that the first diode conducts the first portion of the load current and the second diode conducts the second portion of the load current, determine that the load current has decreased to zero, and turn off the third semiconductor device of the first semiconductor device pair and the fourth semiconductor device of the second semiconductor device pair in response to determining that the load current has decreased to zero.

20. The power switch according to claim 15, comprising: A first half-bridge module, including a first housing surrounding a first semiconductor device of the first pair of semiconductor devices and a second semiconductor device of the second pair of semiconductor devices; And A second half-bridge module, including a second housing surrounding a third semiconductor device of the first pair of semiconductor devices and a fourth semiconductor device of the second pair of semiconductor devices.

21. The power switch according to claim 15, wherein the first anti-series configuration is a drain-drain configuration, and the second anti-series configuration is a source-source configuration, and wherein the plurality of current channels include a first plurality of semiconductor device pairs arranged in the first anti-series configuration and a second plurality of semiconductor device pairs arranged in the second anti-series configuration.

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