Semiconductor device testing method, device, equipment and storage medium
By calculating the ratio of peak value and adjacent transconductance value of semiconductor devices, the problem of inaccurate calculation of threshold voltage of semiconductor devices in the prior art is solved, and a more accurate determination of maximum transconductance value and threshold voltage is achieved.
Patent Information
- Application Number
- CN202210047617.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-01-17
- Publication Date
- 2025-05-09
- Estimated Expiration
- 2042-01-17
AI Technical Summary
The maximum transconductance method used in the prior art for the calculation of threshold voltage of semiconductor devices is affected by device instability, resulting in inaccurate test results.
By obtaining the relationship curve between gate voltage and drain current, calculate the transconductance, and obtain the peak transconductance value and adjacent transconductance value based on the relationship curve between transconductance and gate voltage, determine whether the ratio is less than the preset value to determine whether the test is stopped.
This method can accurately determine the maximum transconductance value of the semiconductor device, thereby accurately determining its threshold voltage, avoiding the instability problem caused by drain current oscillation.
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Figure CN114414974B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of semiconductor technology, and in particular to a testing method, device, equipment and storage medium for a semiconductor device. Background Art
[0002] In the production process of semiconductor devices, measuring the parameters of semiconductor devices is a necessary process to discover possible problems in the semiconductor process. For example, after the semiconductor device is manufactured, the threshold voltage of the semiconductor device, such as the turn-on voltage of the semiconductor device, is measured to determine whether the working performance of the semiconductor device meets the standard. The switching voltage can be tested by the maximum transconductance method, but the maximum transconductance method provided in the prior art for calculating the threshold voltage of the semiconductor device is affected by the instability of the semiconductor device, resulting in inaccurate test results. Summary of the invention
[0003] The following is a summary of the subject matter of the detailed description of the present disclosure. This summary is not intended to limit the scope of the claims.
[0004] The present disclosure provides a testing method, device, equipment and storage medium for a semiconductor device.
[0005] According to a first aspect of an embodiment of the present disclosure, a method for testing a semiconductor device is provided, the method comprising:
[0006] Obtain the relationship curve between gate voltage and drain current;
[0007] Obtaining transconductance according to the relationship curve between the gate voltage and the drain current;
[0008] According to the transconductance and the gate voltage, obtaining a relationship curve between the transconductance and the gate voltage;
[0009] According to the relationship curve between the transconductance and the gate voltage, a peak transconductance value and an adjacent transconductance value are obtained, wherein the peak transconductance value is the transconductance value at the peak position of the relationship curve between the transconductance and the gate voltage, and the adjacent transconductance value is the transconductance value at a position adjacent to the peak position;
[0010] Determining whether a ratio of the adjacent transconductance value to the peak transconductance value is less than a preset value;
[0011] If yes, stop testing.
[0012] According to some embodiments of the present disclosure, the step of obtaining a curve of the relationship between gate voltage and drain current includes:
[0013] Applying a plurality of gate voltages to the semiconductor devices respectively to obtain a plurality of drain currents;
[0014] According to the corresponding relationship between the gate voltage and the drain current, a relationship curve between the gate voltage and the drain current is obtained.
[0015] According to some embodiments of the present disclosure, obtaining the transconductance according to the relationship curve between the gate voltage and the drain current includes:
[0016] Provide initial gate voltage and set voltage change value;
[0017] Obtaining a first gate voltage according to the initial gate voltage and the voltage change value to obtain a first drain current;
[0018] According to the first gate voltage and the voltage change value, a second gate voltage is obtained to obtain a second drain current; the first gate voltage is greater than the initial gate voltage, and the initial gate voltage is greater than the second gate voltage;
[0019] A difference between the first drain current and the second drain current and a difference between the first gate voltage and the second gate voltage are obtained to obtain a first transconductance value.
[0020] According to some embodiments of the present disclosure, the step of obtaining the transconductance according to the relationship curve between the gate voltage and the drain current includes:
[0021] obtaining a third gate voltage again according to the first gate voltage and the voltage change value to obtain a third drain current;
[0022] Obtaining the fourth gate voltage according to the third gate voltage and the voltage change value to obtain a fourth drain current, wherein the third gate voltage is greater than the first gate voltage, and the first gate voltage is greater than the fourth gate voltage;
[0023] A difference between the third drain current and the fourth drain current and a difference between the third gate voltage and the fourth gate voltage are obtained to obtain the second transconductance value.
[0024] According to some embodiments of the present disclosure, the fourth gate voltage is greater than the second gate voltage.
[0025] According to some embodiments of the present disclosure, the step of obtaining a curve of the relationship between transconductance and gate voltage includes:
[0026] Setting the initial gate voltage and the first gate voltage as abscissas;
[0027] The first transconductance value and the second transconductance value are set as ordinates to obtain a relationship curve between the transconductance and the gate voltage.
[0028] According to some embodiments of the present disclosure, the voltage change value is greater than 0.
[0029] According to some embodiments of the present disclosure, the testing method further includes:
[0030] When the test is stopped, the adjacent transconductance value is greater than the reference transconductance value.
[0031] According to some embodiments of the present disclosure, the testing method further includes:
[0032] A turn-on voltage of a gate of the semiconductor device is determined according to the peak transconductance value.
[0033] According to some embodiments of the present disclosure, determining a turn-on voltage of a gate of the semiconductor device according to the peak transconductance value includes:
[0034] The gate turn-on voltage is obtained according to the following formula:
[0035] Vt=Vg1-Id1 / G1-Vd / 2
[0036] Among them, Vt is the turn-on voltage of the gate; Vg1 is the gate voltage corresponding to the first transconductance value; Id1 is the drain current corresponding to the first transconductance value, G1 is the first transconductance value; Vd is the drain voltage corresponding to the first transconductance value.
[0037] According to some embodiments of the present disclosure, the testing method further includes: if the ratio of the adjacent transconductance value to the peak transconductance value is greater than or equal to the preset value, continuing to test the semiconductor device until the obtained ratio of the adjacent transconductance value to the peak transconductance value is less than the preset value.
[0038] A second aspect of the present disclosure provides a testing device for a semiconductor device, the testing device comprising:
[0039] A first acquisition module is configured to acquire a relationship curve between gate voltage and drain current;
[0040] A second acquisition module is configured to obtain transconductance according to the relationship curve between the gate voltage and the drain current;
[0041] A third acquisition module is configured to obtain a relationship curve between the transconductance and the gate voltage according to the transconductance and the gate voltage;
[0042] a fourth acquisition module, configured to obtain a peak transconductance value and an adjacent transconductance value according to the relationship curve between the transconductance and the gate voltage, wherein the peak transconductance value is a transconductance value at a peak position of the relationship curve between the transconductance and the gate voltage, and the adjacent transconductance value is a transconductance value at a position adjacent to the peak position;
[0043] The first determination module is configured to determine whether the ratio of the adjacent transconductance value to the peak transconductance value is less than a preset value; if so, stop the test.
[0044] A third aspect of the present disclosure provides a test device for a semiconductor device, the test device comprising:
[0045] processor;
[0046] a memory for storing processor-executable instructions;
[0047] The processor is configured to execute the semiconductor device testing method described in the present disclosure.
[0048] According to a fourth aspect of an embodiment of the present disclosure, a non-temporary computer-readable storage medium is provided. When instructions in the storage medium are executed by a processor of a memory testing device, the testing device is enabled to perform the semiconductor device testing method described in the present disclosure.
[0049] In the semiconductor device testing method, equipment and storage medium provided by the embodiments of the present disclosure, the maximum transconductance value can be accurately determined by the ratio of the obtained peak transconductance value to the adjacent transconductance value being less than a preset value, so that the threshold voltage of the semiconductor device can be accurately determined based on the maximum transconductance value.
[0050] Other aspects will be apparent upon reading and understanding the drawings and detailed description. BRIEF DESCRIPTION OF THE DRAWINGS
[0051] The accompanying drawings incorporated into the specification and constituting a part of the specification illustrate embodiments of the present disclosure and are used together with the description to explain the principles of the embodiments of the present disclosure. In these drawings, similar reference numerals are used to represent similar elements. The drawings described below are some embodiments of the present disclosure, rather than all embodiments. For those skilled in the art, other drawings can be obtained based on these drawings without paying creative work.
[0052] Figure 1 A flowchart showing a method for testing a semiconductor device provided by an exemplary embodiment of the present disclosure is shown;
[0053] Figure 2 A flow chart of the method for obtaining a curve of the relationship between the gate voltage and the drain current in step S101 is shown;
[0054] Figure 3 A schematic diagram showing a relationship curve between gate voltage and drain current according to an exemplary embodiment of the present disclosure is shown;
[0055] Figure 4A flow chart of a method for obtaining transconductance according to a curve of relationship between gate voltage and drain current in step S102 is shown;
[0056] Figure 5 The obtained relationship curve between gate voltage and drain current and the relationship curve between transconductance and gate voltage are shown as examples;
[0057] Figure 6 is a block diagram of a semiconductor device testing device according to an exemplary embodiment;
[0058] Figure 7 A test device for a semiconductor device is shown according to an exemplary embodiment. DETAILED DESCRIPTION
[0059] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions in the disclosed embodiments will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present disclosure. It should be noted that the embodiments in the present disclosure and the features in the embodiments can be arbitrarily combined with each other without conflict.
[0060] In an exemplary embodiment of the present disclosure, a test method for a semiconductor device is provided, which can accurately test the threshold voltage of a semiconductor device. In the test method for a semiconductor device, a relationship curve between transconductance and gate voltage is obtained according to a relationship curve between gate voltage and drain current, and a peak transconductance value and an adjacent transconductance value are obtained according to the relationship curve between transconductance and gate voltage. If the ratio of the adjacent transconductance value to the peak transconductance value is less than a preset value, then the threshold voltage can be determined according to the obtained peak transconductance value, that is, the test can be stopped. If the ratio of the adjacent transconductance value to the peak transconductance value is not less than the preset value, the test is continued until the ratio of the adjacent transconductance value to the peak transconductance value is less than the preset value, which can avoid the instability of the semiconductor device caused by the oscillation of the drain current during the test process, such as when the test is about to start or end, and the threshold voltage of the semiconductor device can be accurately determined.
[0061] When obtaining the relationship curve between the gate voltage and the drain current, the gate voltage can be adjusted to gradually increase from small to large, or to gradually decrease from large to small. In this embodiment, the adjustment method of gradually increasing the gate voltage from small to large is used as an example. Figure 1 As shown, Figure 1 A flowchart of a semiconductor device testing method provided by an exemplary embodiment of the present disclosure is shown, and the testing method includes:
[0062] Step S101, obtaining a relationship curve between gate voltage and drain current;
[0063] Step S102, obtaining transconductance according to a relationship curve between gate voltage and drain current;
[0064] Step S103, obtaining a relationship curve between transconductance and gate voltage according to the transconductance and the gate voltage;
[0065] Step S104, obtaining a peak transconductance value and an adjacent transconductance value according to a curve of relationship between transconductance and gate voltage, wherein the peak transconductance value is a transconductance value at a peak position of the curve of relationship between transconductance and gate voltage, and the adjacent transconductance value is a transconductance value at a position adjacent to the peak position;
[0066] Step S105, determining whether the ratio of the adjacent transconductance value to the peak transconductance value is less than a preset value;
[0067] Step S106: If yes, stop the test.
[0068] In the test method of the semiconductor device provided by the present disclosure, a gate voltage can be applied to the gate of the semiconductor device, and a drain current is obtained at the drain corresponding to form a relationship curve between the gate voltage and the drain current. According to the relationship curve between the gate voltage and the drain current, a transconductance is obtained. According to the transconductance and the gate voltage, a relationship curve between the transconductance and the gate voltage is obtained. According to the relationship curve between the transconductance and the gate voltage, a peak transconductance value and an adjacent transconductance value are obtained, the peak transconductance value is the transconductance value at the peak position of the relationship curve between the transconductance and the gate voltage, and the adjacent transconductance value is the transconductance value at the position adjacent to the peak position. In the test method of the semiconductor device provided by the exemplary embodiment of the present disclosure, the maximum transconductance value can be accurately determined by the ratio of the obtained peak transconductance value and the adjacent transconductance value being less than a preset value, so that the threshold voltage of the semiconductor device can be accurately determined according to the maximum transconductance value. When the ratio of the peak transconductance value and the adjacent transconductance value is less than the preset value, the instability of the semiconductor device caused by the oscillation of the drain current in the later stage of the test can be avoided, and the obtained peak transconductance value can be considered to be an accurate maximum transconductance value, which can be used to determine the threshold voltage of the semiconductor device.
[0069] In the semiconductor device testing method provided by the exemplary embodiment of the present disclosure, the semiconductor device is tested, multiple gate voltages are applied to the semiconductor device to obtain multiple drain currents, so as to determine the corresponding relationship between the gate voltage and the drain current, and form a relationship curve between the gate voltage and the drain current. Figure 2 As shown, Figure 2 The flowchart of the method for obtaining the relationship curve between the gate voltage and the drain current in step S101 is shown:
[0070] In step S1011, a plurality of gate voltages are applied to the semiconductor device respectively to obtain a plurality of drain currents;
[0071] In step S1012, a relationship curve between the gate voltage and the drain current is obtained according to the corresponding relationship between the gate voltage and the drain current.
[0072] In the test method of the semiconductor device provided in the exemplary embodiment of the present disclosure, in order to determine the threshold voltage of the semiconductor device by the maximum transconductance method, it is necessary to apply multiple gate voltages to the gate of the semiconductor device to obtain multiple corresponding drain currents, and then determine the corresponding relationship between the gate voltage and the drain current to obtain a relationship curve between the gate voltage and the drain current. So as to obtain a relationship curve between the transconductance and the gate voltage based on the curve relationship between the gate voltage and the drain current. As shown in Table 1, Table 1 lists the gate voltage, the corresponding drain current and the corresponding transconductance. The gate voltage starts from 0V, and the gate voltage is gradually increased with an equal voltage difference to obtain multiple gate voltages, and then obtain multiple corresponding drain currents, wherein the equal voltage difference is, for example, 0.1V.
[0073] Table 1. Gate voltage, corresponding drain current and corresponding transconductance
[0074] Vg(V) 0 0.1 0.2 0.3 0.4 Id(μA) 0.00000622 0.0000207 0.000140 0.00106 0.00819 △Id / △Vg 0.000669 0.00520 0.0403 0.302
[0075] Vg(V) 0.5 0.6 0.7 0.8 0.9 1.0 1.1 Id(μA) 0.0614 0.411 2.24 8.89 25.9 57.6 105.0 △Id / △Vg 2.01 10.89 42.4 118.3 243.55 395.5 537.0
[0076] Vg(V) 1.2 1.3 1.4 1.5 1.6 1.7 1.8 Id(μA) 165.0 236.0 315.0 400.0 489.1 580.2 674.0 △Id / △Vg 655.0 750.0 820.0 870.5 901.0 924.5 942.0
[0077] Vg(V) 1.9 2.0 2.1 2.2 2.3 2.4 2.5 Id(μA) 768.6 867.5 963.9 1065.4 1148.0 1250.0 1331.2 △Id / △Vg 967.5 976.6 989.4 920.6 923.1 916.2 915.0
[0078] Vg(V) 2.6 Id(μA) 1433.0 △Id / △Vg
[0079] like Figure 3 As shown, Figure 3 A schematic diagram of a relationship curve between gate voltage and drain current according to an exemplary embodiment of the present disclosure is shown. The corresponding relationship between gate voltage and drain current is expressed in an XY coordinate system to form a relationship curve between gate voltage and drain current, wherein the X-axis may represent the gate voltage Vg in V, and the Y-axis may represent the drain current Id corresponding to the gate voltage in μA. Figure 3 The left side indicates the value corresponding to the gate voltage. Curve 100 illustrates the relationship between the gate voltage and the drain current. Figure 3 The curve 100 shown is obtained by increasing the gate voltage by 0.1V as a voltage difference, and its initial voltage is 0V. The gate voltage gradually increases from 0V, and the increase method can be increased in a preset manner. Figure 3 In the process, the gate voltage is gradually increased with an equal voltage difference.
[0080] According to the relationship curve between transconductance and gate voltage, a peak transconductance value and an adjacent transconductance value are obtained. The peak transconductance value is the transconductance value at the peak position of the relationship curve between transconductance and gate voltage, and the adjacent transconductance value is the transconductance value at a position adjacent to the peak position. Figure 3 Also shown is a schematic diagram of a curve showing the relationship between transconductance and gate voltage according to an exemplary embodiment of the present disclosure. Figure 3 In FIG. 2 , curve 200 illustrates a curve of transconductance versus gate voltage, where the X-axis represents the gate voltage Vg in V, and the Y-axis represents the transconductance G=ΔId / ΔVg. Figure 3 The corresponding value of transconductance is indicated on the right.
[0081] According to the relationship curve between transconductance and gate voltage, a peak transconductance value and an adjacent transconductance value are obtained. The peak transconductance value is the transconductance value at the peak position of the relationship curve between transconductance and gate voltage, and the adjacent transconductance value is the transconductance value at a position adjacent to the peak position. Figure 3 In the curve of transconductance versus gate voltage, A is the position of the transconductance peak, that is, the transconductance obtained when the gate voltage is 2.1V is the transconductance peak, and its value is the peak transconductance value. As shown in Table 1, the transconductance value obtained when the gate voltage is 2.1V is 989.4. B is the position adjacent to the peak position, that is, the transconductance obtained when the gate voltage is 2.2V is the adjacent transconductance, and its value is the adjacent transconductance value. As shown in Table 1, the transconductance value obtained when the gate voltage is 2.2V is 920.6.
[0082] If the ratio of the adjacent transconductance value to the peak transconductance value is less than the preset value, the test of the semiconductor device can be stopped, and the threshold voltage of the semiconductor device can be determined according to the gate voltage corresponding to the peak transconductance value, the drain current and the drain voltage. Among them, the preset value can be determined according to historical data, for example, it can be between 0.95 and 0.98, such as 0.96 or 0.97. The ratio of the adjacent transconductance value 920.6 to the peak transconductance value 989.40 is approximately equal to 0.93, which is less than the preset value. It can be determined that the peak transconductance value obtained is the maximum transconductance value, and the test of the semiconductor device can be stopped.
[0083] like Figure 1 As shown in step S107 in , if the ratio of the adjacent transconductance value to the peak transconductance value is greater than or equal to the preset value, it is necessary to continue testing the semiconductor device until the ratio of the adjacent transconductance value to the peak transconductance value is less than the preset value.
[0084] In the semiconductor device testing method provided in the exemplary embodiment of the present disclosure, in order to determine the maximum transconductance value according to the state of the semiconductor device, adjacent transconductance values can be determined according to the adjustment direction of the applied gate voltage. For example, when the voltage application method is to apply the gate voltage to the gate in a manner of gradually increasing the gate voltage, that is, when the adjustment direction of the gate voltage is to gradually increase the gate voltage, the adjacent transconductance value is the transconductance value corresponding to the gate voltage obtained after the gate voltage corresponding to the peak transconductance value is increased by the voltage change value.
[0085] like Figure 3 As shown, Figure 3 The relationship curve 100 between the gate voltage and the drain current is obtained by gradually increasing the gate voltage as the voltage adjustment direction, and the relationship curve 200 between the transconductance and the gate voltage is obtained accordingly. The voltage change value between two adjacent gate voltages is the same. On the relationship curve 200 between the transconductance and the gate voltage, A is the position of the transconductance peak, the value at A is the peak transconductance value, and the gate voltage corresponding to A is 2.1V, and B is a position adjacent to the peak position, the value at B is the adjacent transconductance value, and the gate voltage corresponding to B is 2.2V.
[0086] When obtaining the transconductance value, the gate voltage is applied to the gate in a manner of gradually increasing the gate voltage, and corresponding transconductance values are obtained in sequence.
[0087] In an exemplary embodiment of the present disclosure, a method for testing a semiconductor device is provided, in which a gate voltage is applied to the gate in a manner of gradually increasing the gate voltage, and corresponding transconductance values are obtained in sequence. Figure 4 As shown, Figure 4 The flowchart of the method for obtaining the transconductance according to the relationship curve between the gate voltage and the drain current in step S102 is shown:
[0088] In step S1021, an initial gate voltage is provided and a voltage variation value is set;
[0089] In step S1022, a first gate voltage is obtained according to the initial gate voltage and the voltage change value to obtain a first drain current;
[0090] In step S1023, a second gate voltage is obtained according to the first gate voltage and the voltage change value to obtain a second drain current; the first gate voltage is greater than the initial gate voltage, and the initial gate voltage is greater than the second gate voltage;
[0091] In step S1024, a difference between the first drain current and the second drain current and a difference between the first gate voltage and the second gate voltage are obtained to obtain a first transconductance value.
[0092] Figure 4 In the semiconductor device testing method shown in the figure, an initial gate voltage is determined, and a voltage variation value between two adjacent gate voltages is set. According to the initial gate voltage and the voltage variation value, a first gate voltage is determined, and then a first drain current corresponding to the first gate voltage is obtained. Figure 4 The illustrated semiconductor device testing method obtains the gate voltage and the corresponding drain current by applying the gate voltage to the gate in a manner of gradually increasing the gate voltage, and the voltage change value is greater than 0. The first gate voltage is related to the initial gate voltage and the voltage change value, for example, the first gate voltage can be equal to the initial gate voltage plus N times the voltage change value, where N is greater than or equal to 1. The first gate voltage is greater than the initial gate voltage. For example, N can be 1.
[0093] According to the first gate voltage and the voltage change value, a second gate voltage is obtained to obtain a second drain current. The initial gate voltage is greater than the second gate voltage. The second gate voltage is related to the initial gate voltage and the voltage change value, and the second gate voltage is less than the initial gate voltage. Then, the second gate voltage can be equal to the initial gate voltage minus M times the voltage change value, where M is greater than or equal to 1. For example, M can be 2.
[0094] The first transconductance value is obtained according to the difference between the first drain current and the second drain current and the difference between the first gate voltage and the second gate voltage. For example, the ratio of the absolute values of the difference between the first drain current and the second drain current and the difference between the first gate voltage and the second gate voltage can be used as the first transconductance value.
[0095] Refer to Table 1 and Figure 3 , the gate voltage is applied in a manner of gradually increasing the gate voltage to apply the gate voltage to the gate, and the corresponding transconductance values are obtained in sequence. The initial gate voltage Vg0 is 0.1V. In order to calculate the transconductance corresponding to the initial gate voltage Vg0, the voltage change value is 0.1V, N is 1, the first gate voltage Vg1 is greater than the initial gate voltage Vg0, and the first gate voltage Vg1 used to calculate the transconductance value corresponding to the initial gate voltage Vg0 is determined to be the initial gate voltage Vg0 plus one times the voltage change value, 0.1V+0.1V=0.2V, that is, the first gate voltage Vg1 is 0.2V. The first drain current Id1 corresponding to the first gate voltage Vg1 is 0.000140μA.
[0096] The first gate voltage is 0.2V, the voltage change value is 0.1V, and M is 2. The second gate voltage Vg2 is less than the initial gate voltage, and is equal to the first gate voltage Vg1 minus twice the voltage change value, 0.2V-0.1V*2=0V, that is, the second gate voltage Vg2 is 0V. The second drain current Id2 corresponding to the second gate voltage Vg2 is 0.00000622μA.
[0097] The ratio of the absolute value of the difference between the first drain current Id1 and the second drain current Id2 and the absolute value of the difference between the first gate voltage Vg1 and the second gate voltage Vg2 is used as the first transconductance value G1.
[0098] G1=︱(Id1-Id2)︱ / ︱(Vg1-Vg2)︱
[0099] =︱(0.000140-0.00000622)︱ / ︱(0.2-0)︱
[0100] =0.000669
[0101] After calculating the first transconductance value, continue to calculate the second transconductance value, such as Figure 4 As shown:
[0102] In step S1025, a third gate voltage is obtained again according to the first gate voltage and the voltage change value to obtain a third drain current;
[0103] In step S1026, a fourth gate voltage is obtained according to the third gate voltage and the voltage change value to obtain a fourth drain current, the third gate voltage is greater than the first gate voltage, and the first gate voltage is greater than the fourth gate voltage;
[0104] In step S1027, a difference between the third drain current and the fourth drain current and a difference between the third gate voltage and the fourth gate voltage are obtained to obtain a second transconductance value.
[0105] After calculating the first transconductance value, the second transconductance value is calculated, and the third gate voltage is obtained according to the first gate voltage and the voltage change value to obtain the third drain current. The third gate voltage is greater than the first gate voltage, and the third gate voltage can be equal to the first gate voltage plus N times the voltage change value, where N is greater than or equal to 1.
[0106] According to the third gate voltage and the voltage change value, a fourth gate voltage is obtained to obtain a fourth drain current. The fourth gate voltage is less than the first gate voltage, and the fourth gate voltage can be equal to the first gate voltage minus M times the voltage change value, where M is greater than or equal to 1.
[0107] The second transconductance value is obtained according to the difference between the third drain current and the fourth drain current and the difference between the third gate voltage and the fourth gate voltage. For example, the ratio of the absolute values of the difference between the third drain current and the fourth drain current and the difference between the third gate voltage and the fourth gate voltage can be used as the second transconductance value.
[0108] Refer to Table 1 and Figure 2, the gate voltage application method is to apply the gate voltage to the gate in a manner of gradually increasing the gate voltage, and obtain the corresponding transconductance values in sequence. After the first transconductance value G1 corresponding to the initial gate voltage Vg0, the second transconductance value G2 is continued to be calculated, that is, the transconductance value corresponding to the next gate voltage is continued to be calculated. As shown in Table 2, the voltage change value is 0.1V, the next gate voltage is the first gate voltage Vg1, and the second transconductance value G2 corresponding to the first gate voltage Vg1 is calculated.
[0109] In order to calculate the transconductance corresponding to the first gate voltage Vg1, the voltage change value is 0.1V, N is 1, the third gate voltage Vg3 is greater than the first gate voltage Vg1, and the third gate voltage Vg3 used to calculate the transconductance value corresponding to the first gate voltage Vg1 is determined to be the first gate voltage Vg1 plus one times the voltage change value, 0.2V+0.1V=0.3V, that is, the third gate voltage Vg3 is 0.3V. The third drain current Id3 corresponding to the third gate voltage Vg3 is 0.00106μA.
[0110] The third gate voltage is 0.3V, the voltage change value is 0.1V, and M is 2. The fourth gate voltage Vg4 is less than the first gate voltage Vg1, and is equal to the third gate voltage Vg3 minus twice the voltage change value, 0.3V-0.1V*2=0.1V, that is, the fourth gate voltage Vg4 is 0.1V. The fourth drain current Id4 corresponding to the fourth gate voltage Vg4 is 0.0000207μA.
[0111] The ratio of the absolute value of the difference between the third drain current Id3 and the fourth drain current Id4 and the absolute value of the difference between the third gate voltage Vg3 and the fourth gate voltage Vg4 is used as the second transconductance value G2.
[0112] G2=︱(Id3-Id4)︱ / ︱(Vg3-Vg4)︱
[0113] =︱(0.00106-0.0000207)︱ / ︱(0.2-0)︱
[0114] =0.00520
[0115] The initial gate voltage and the first gate voltage are set as the horizontal coordinates, the first transconductance value and the second transconductance value are set as the vertical coordinates, and so on, to obtain a relationship curve between transconductance and gate voltage.
[0116] exist Figure 4 In the illustrated semiconductor device testing method, the voltage variation value is fixed, that is, the voltage difference between two adjacent gate voltages is the same. In other exemplary embodiments, the voltage variation value between each two adjacent gate voltages may be different, without limitation.
[0117] The transconductance value corresponding to the initial gate voltage is determined according to the first gate voltage and the second gate voltage, and the transconductance value corresponding to the first gate voltage is determined according to the third gate voltage and the fourth gate voltage. Because the fourth gate voltage is less than the first gate voltage, when calculating the transconductance value corresponding to the first gate voltage, the range of the gate voltage of the difference generated overlaps with the range of the gate voltage of the difference generated when calculating the transconductance value corresponding to the initial gate voltage. Referring to Table 1, the initial gate voltage is set to 0.1V, the voltage change value is 0.1V, the first gate voltage used to calculate the transconductance value corresponding to the initial gate voltage is 0.2V, the second gate voltage is 0V, and the corresponding voltage range is 0V~0.2V; the third gate voltage used to calculate the transconductance value corresponding to the first gate voltage 0.2V is 0.3V, the fourth gate voltage is 0.1V, and the corresponding voltage range is 0.1V~0.3V, and so on. As shown in Table 2, Table 2 shows the gate voltage corresponding to the transconductance value, and the voltage range used to calculate the corresponding transconductance value:
[0118] Table 2 Transconductance value corresponding to the gate voltage, and the voltage range used to calculate the corresponding transconductance value
[0119] Gate voltage(V) 0.1 0.2 0.3 0.4 0.5 0.6 Voltage range 0~0.2 0.1~0.3 0.2~0.4 0.3~0.5 0.4~0.6 0.5~0.7
[0120] Gate voltage(V) 0.8 0.9 1.0 1.1 1.2 1.3 Voltage range 0.7~0.9 0.8~1.0 0.9~1.1 1.0~1.2 1.1~1.3 1.2~1.4
[0121] Gate voltage(V) 1.4 1.5 1.6 1.7 1.8 1.9 Voltage range 1.3~1.5 1.4~1.6 1.5~1.7 1.6~1.8 1.7~1.9 1.8~2.0
[0122] Gate voltage(V) 2.0 2.1 2.2 2.3 2.4 2.5 Voltage range 1.9~2.1 2.0~2.2 2.1~2.3 2.2~2.4 2.3~2.5 2.4~2.6
[0123] It can be seen from Table 2 that there is overlap between each set of voltages used to calculate the transconductance value. The voltage range for calculating the first transconductance value G1 corresponding to the initial gate voltage Vg0 is 0 to 0.2, and the voltage range for calculating the first transconductance value G2 corresponding to the first gate voltage Vg1 is 0.1 to 0.3. The gate voltage range for calculating the overlap between the first transconductance value G1 and the second transconductance value G2 is 0.1 to 0.2. By analogy, there is overlap between each set of voltages used to calculate any adjacent transconductance values.
[0124] In order to further understand the semiconductor testing method provided by the exemplary embodiment of the present disclosure, there is overlap between each set of voltages used to calculate the transconductance value, such as Figure 5 As shown, Figure 5 The obtained curves of the relationship between the gate voltage and the drain current and the curves of the relationship between the transconductance and the gate voltage are shown as examples. Figure 5For the convenience of description and illustration, the relationship curve between gate voltage and drain current and the relationship curve between transconductance and gate voltage are given as examples. Curve 10 illustrates the relationship curve between gate voltage and drain current, with the X-axis representing gate voltage and the Y-axis representing drain current. Curve 20 illustrates the relationship curve between transconductance and gate voltage, with the X-axis representing gate voltage and the Y-axis representing transconductance. Vg1 represents the first gate voltage, Vg2 represents the second gate voltage, Vg3 represents the third gate voltage, and Vg4 represents the fourth gate voltage. The fourth gate voltage Vg4 is greater than the second gate voltage Vg2 and less than the first gate voltage Vg1, and the first gate voltage Vg1 is less than the third gate voltage Vg3. The first gate voltage Vg1 is equal to the initial gate voltage Vg0 plus the voltage change value. The second gate voltage Vg2 is equal to the first gate voltage Vg1 minus 2 times the voltage change value.
[0125] like Figure 5 In the exemplary embodiment shown in FIG. 1 , the first voltage difference range between the first gate voltage Vg1 and the second gate voltage Vg2 for calculating the first transconductance value corresponding to the initial gate voltage Vg0 is defined by the curve shown as reference numeral 13; and the second voltage difference range between the third gate voltage Vg3 and the fourth gate voltage Vg4 for calculating the second transconductance value corresponding to the first gate voltage Vg1 is defined by the curve shown as reference numeral 12. There is an overlapping area between the first voltage difference range and the second voltage difference range, that is, between the gate voltages Vg4 and Vg1.
[0126] Therefore, in the semiconductor device testing method provided by the exemplary embodiment of the present disclosure, the transconductance value is determined by alternately acquiring the voltage difference between the corresponding gate voltages, which ensures the stability of the gate voltage data acquisition and the accuracy of the transconductance value calculation. The influence of the instability of the semiconductor device caused by the oscillation of the drain current during the test of the semiconductor device on the transconductance value is reduced. The continuity between the transconductance values obtained in the semiconductor device testing method provided by the exemplary embodiment of the present disclosure is better, and the curve relationship between the transconductance and the gate voltage is more stable.
[0127] In the exemplary embodiment of the present disclosure, the fourth gate voltage may be greater than the second gate voltage, and the fourth gate voltage is greater than the second gate voltage, further ensuring that when calculating the transconductance value corresponding to the next gate voltage, the range of the gate voltage of the difference generated overlaps with the range of the gate voltage of the difference generated when calculating the transconductance value corresponding to the previous gate voltage, further ensuring the continuity between the transconductance values.
[0128] like Figure 5As shown, the first transconductance value G1 corresponding to the initial gate voltage is equal to the ratio of the absolute value of the difference between the first drain current Id1 and the second drain current Id2 and the absolute value of the difference between the first gate voltage Vg1 and the second gate voltage Vg2:
[0129] G1=︱(Id1-Id2)︱ / ︱(Vg1-Vg2)︱
[0130] The second transconductance value G2 corresponding to the first gate voltage Vg1 is equal to the ratio of the absolute value of the difference between the third drain current Id3 and the fourth drain current Id4 and the absolute value of the difference between the third gate voltage Vg3 and the fourth gate voltage Vg4:
[0131] G2=︱(Id3-Id4)︱ / ︱(Vg3-Vg4)︱
[0132] The third gate voltage is equal to the first gate voltage Vg1 plus the voltage change value. The fourth gate voltage Vg4 is equal to the third gate voltage Vg3 minus 2 times the voltage change value. At this time, Vg4 is equal to Vg0.
[0133] By analogy, a curve 20 showing the relationship between transconductance and gate voltage can be formed.
[0134] In the process of continuously obtaining transconductance values, the peak transconductance value and the adjacent transconductance values are determined, as shown in Table 1 and Figure 3 In the figure, when the gate voltage is 2.1V, the corresponding transconductance value is 989.4, and when the gate voltage is 2.2V, the corresponding transconductance value is 920.6, where 920.6 / 989.4≈0.93. The preset value can be determined based on historical data, for example, it can be between 0.95 and 0.98. The ratio of the adjacent transconductance value 920.6 to the peak transconductance value 989.40 is approximately equal to 0.93, which is less than the preset value. It can be determined that the peak transconductance value obtained is the maximum transconductance value, and the test of the semiconductor device can be stopped.
[0135] In order to facilitate the illustration of peak transconductance values and adjacent transconductance values, as shown in Figure 5 As shown, Figure 5 The peak transconductance value Gt and the adjacent transconductance value Gx are shown in FIG. If the ratio of the adjacent transconductance value Gx to the peak transconductance value Gt is less than a preset value, the peak transconductance value Gt can be considered as the maximum transconductance value, which can be used to determine the threshold voltage of the semiconductor device.
[0136] In an exemplary embodiment of the present disclosure, in order to avoid instability of the test caused by the oscillation of the drain current in the early stage of the test of the semiconductor device, the adjacent transconductance value may be greater than the reference transconductance value, and the reference transconductance value may be the minimum transconductance value that accurately characterizes the continuity of the transconductance value. The reference transconductance value may be set according to historical data.
[0137] As shown in Table 1 and Figure 3 In the exemplary embodiment shown, as the gate voltage continues to increase, the corresponding transconductance value also changes continuously. From the gate voltage of 0V to 1.1V, the drain current changes dramatically, the stability is poor, and its transconductance value is uncertain. After the gate voltage reaches 1.1V, the change of the drain current tends to be stable, and the drain current and the corresponding transconductance value change continuously. Therefore, the transconductance value corresponding to the gate voltage of 1.2V can be used as a reference transconductance value.
[0138] In an exemplary embodiment of the present disclosure, at the beginning of the test, the first transconductance value G1 corresponding to the initial gate voltage Vg0 is first obtained, and then the initial gate voltage Vg0 is increased by the voltage change value to obtain the first gate voltage Vg1, and the second transconductance value G2 corresponding to the first gate voltage Vg1 is obtained. By analogy, a curve relationship between transconductance and gate voltage is obtained. When obtaining the transconductance value, the peak transconductance value and the adjacent transconductance value are continuously determined, and it is determined whether the ratio of the adjacent transconductance value to the peak transconductance value is less than the preset value. However, since the first transconductance value G1 and the second transconductance value G2 are transconductance values obtained at the beginning of the test, there is uncertainty. If the ratio of the second transconductance value G2 to the first transconductance value G1 is less than the preset value, the first transconductance value cannot be determined as the peak transconductance value, so the reference transconductance value is set. Even when the ratio of the second transconductance value G2 to the first transconductance value G1 is less than the preset value, the first transconductance value G1 will be discarded, and the peak transconductance value and the adjacent transconductance value will continue to be obtained. Until the obtained peak transconductance value and the adjacent transconductance value, the ratio of the adjacent transconductance value to the peak transconductance value is less than the preset value, and the adjacent transconductance value is greater than the reference transconductance value, it can be determined that the obtained peak transconductance value is the maximum transconductance value.
[0139] In the exemplary embodiment of the present disclosure, the reference transconductance value is set so that the adjacent transconductance value is greater than the reference transconductance value, further ensuring the accuracy of the maximum transconductance value determination, so as to accurately determine the threshold voltage of the semiconductor device, for example, the gate turn-on voltage of the semiconductor device.
[0140] In an exemplary embodiment of the present disclosure, the purpose of testing a semiconductor device may be to determine a turn-on voltage of a gate of the semiconductor device. The turn-on voltage may be obtained according to the following formula:
[0141] Vt=Vgt-Idt / Gt-Vd / 2
[0142] Among them, Vt is the gate turn-on voltage; Vgt is the gate voltage corresponding to the maximum transconductance value; Idt is the drain current corresponding to the maximum transconductance value, Gt is the maximum transconductance value; Vd is the drain voltage corresponding to the maximum transconductance value.
[0143] In the semiconductor device testing method provided in the exemplary embodiment of the present disclosure, an exemplary description is given by taking the example of applying a gate voltage to a gate in a manner of gradually increasing the gate voltage and sequentially obtaining corresponding transconductance values.
[0144] In the test method of the semiconductor device provided by the exemplary embodiment of the present disclosure, the peak transconductance value and the adjacent transconductance value are obtained, and when the ratio of the adjacent transconductance value to the peak transconductance value is less than the preset value, the test of the semiconductor device is stopped. The instability of the semiconductor device caused by the oscillation of the drain current during the test of the semiconductor device, for example, in the later stage of the test, is fully considered, and the accuracy of the maximum transconductance value is improved, thereby improving the accuracy of the determination of the semiconductor threshold voltage. At the same time, when obtaining the transconductance value, the voltage range of the gate voltage used to calculate the adjacent transconductance value overlaps, further ensuring the continuity between the transconductance values, and the curve relationship between the transconductance and the gate voltage is more stable, further improving the accuracy of the maximum transconductance value. The test method of the semiconductor device provided by the exemplary embodiment of the present disclosure also fully considers the instability of the test caused by the oscillation of the drain current in the early stage of the test of the semiconductor device, and sets a minimum transconductance value that can be referenced, that is, a reference transconductance value, to further improve the accuracy of the determination of the maximum transconductance value.
[0145] In the above embodiment, an exemplary description is given by taking the method of applying a gate voltage to the gate in a manner of gradually increasing the gate voltage and obtaining corresponding transconductance values in sequence. The gate voltage may also be applied to the gate in a manner of gradually decreasing the gate voltage to obtain a plurality of gate voltages and a plurality of corresponding drain currents, and obtain a relationship curve between the gate voltage and the drain current. Then, the relationship curve between the gate voltage and the drain current is used to obtain the transconductance. According to the transconductance and the gate voltage, a relationship curve between the transconductance and the gate voltage is obtained. The relationship curve between the transconductance and the gate voltage is used to obtain the peak transconductance value and the adjacent transconductance value.
[0146] When the voltage application method is to apply the gate voltage to the gate in a manner of gradually reducing the gate voltage, that is, when the gate voltage is adjusted in a direction of gradually reducing the gate voltage, the adjacent transconductance value is the transconductance value corresponding to the gate voltage obtained by reducing the voltage change value by the gate voltage corresponding to the peak transconductance value. When the ratio of the adjacent transconductance value to the peak transconductance value is less than a preset value, the test of the semiconductor device can be stopped, and the threshold voltage of the semiconductor device can be determined based on the gate voltage corresponding to the peak transconductance value, the drain current, and the drain voltage.
[0147] Figure 6 is a block diagram of a semiconductor device testing device according to an exemplary embodiment, the device comprising a first acquisition module 201, a second acquisition module 202, a third acquisition module 203, a fourth acquisition module 204, and a first determination module 205;
[0148] A first acquisition module 201 is configured to acquire a relationship curve between gate voltage and drain current;
[0149] The second acquisition module 202 is configured to obtain the transconductance according to the relationship curve between the gate voltage and the drain current;
[0150] The third acquisition module 203 is configured to obtain a relationship curve between the transconductance and the gate voltage according to the transconductance and the gate voltage;
[0151] A fourth acquisition module 204 is configured to obtain a peak transconductance value and an adjacent transconductance value according to a curve of relationship between transconductance and gate voltage, wherein the peak transconductance value is a transconductance value at a peak position of the curve of relationship between transconductance and gate voltage, and the adjacent transconductance value is a transconductance value at a position adjacent to the peak position;
[0152] The first determination module 205 is configured to determine whether the ratio of the adjacent transconductance value to the peak transconductance value is less than a preset value; if so, stop the test.
[0153] The semiconductor device testing device provided in the exemplary embodiment of the present disclosure may be, for example, a processor, which includes a first acquisition module 201, a second acquisition module 202, a third acquisition module 203, a fourth acquisition module 204, and a first determination module 205, and executes corresponding functions to implement a semiconductor device testing method.
[0154] In an exemplary embodiment of the present disclosure, a semiconductor device testing device is also provided. The testing device includes a processor and a memory for storing processor executable instructions. The processor is configured to execute the semiconductor device testing method provided by the exemplary embodiment of the present disclosure.
[0155] Regarding the device in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.
[0156] Figure 7 4 is a block diagram of a test device for a semiconductor device, that is, a computer device 400, according to an exemplary embodiment. For example, the computer device 400 may be provided as a terminal device. Figure 7 The computer device 400 includes a processor 401, and the number of processors can be set to one or more as needed. The computer device 400 also includes a memory 402 for storing instructions that can be executed by the processor 401, such as application programs. The number of memories can be set to one or more as needed. The application programs stored therein can be one or more. The processor 401 is configured to execute instructions to execute the semiconductor device testing method provided by the exemplary embodiment of the present disclosure.
[0157] It will be appreciated by those skilled in the art that the embodiments of the present disclosure may be provided as methods, devices (equipment), or computer program products. Therefore, the present disclosure may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present disclosure may take the form of a computer program product implemented on one or more computer-usable storage media containing computer-usable program codes. Computer storage media include volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules or other data), including but not limited to RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassette, magnetic tape, disk storage or other magnetic storage device, or any other medium that can be used to store desired information and can be accessed by a computer, etc. In addition, it is well known to those skilled in the art that communication media generally contain computer-readable instructions, data structures, program modules or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.
[0158] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is provided, such as a memory 402 including instructions, and the instructions can be executed by a processor 401 of an apparatus 400 to perform the above method. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.
[0159] A non-transitory computer-readable storage medium, when instructions in the storage medium are executed by a processor of a memory testing device, enables the testing device to execute the semiconductor device testing method proposed in the exemplary embodiment of the present disclosure.
[0160] The present disclosure is described with reference to flowcharts and / or block diagrams of methods, apparatuses (devices) and computer program products according to embodiments of the present disclosure. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.
[0161] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.
[0162] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.
[0163] In the present disclosure, the terms "comprises", "comprising" or any other variations thereof are intended to cover non-exclusive inclusion, so that an article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such article or device. In the absence of more restrictions, an element defined by the sentence "comprising..." does not exclude the presence of additional identical elements in the article or device comprising the element.
[0164] Although the preferred embodiments of the present disclosure have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present disclosure.
[0165] Obviously, those skilled in the art can make various changes and modifications to the present disclosure without departing from the spirit and scope of the present disclosure. Thus, if these modifications and variations of the present disclosure fall within the scope of the claims of the present disclosure and their equivalents, the intent of the present disclosure also includes these modifications and variations.
Claims
1. A method for testing a semiconductor device, characterized in that: include: Obtain the relationship curve between gate voltage and drain current; Obtaining transconductance according to the relationship curve between the gate voltage and the drain current; According to the transconductance and the gate voltage, obtaining a relationship curve between the transconductance and the gate voltage; According to the relationship curve between the transconductance and the gate voltage, a peak transconductance value and an adjacent transconductance value are obtained, wherein the peak transconductance value is the transconductance value at the peak position of the relationship curve between the transconductance and the gate voltage, and the adjacent transconductance value is the transconductance value at a position adjacent to the peak position; Determining whether a ratio of the adjacent transconductance value to the peak transconductance value is less than a preset value; If yes, stop testing.
2. The method for testing a semiconductor device according to claim 1, wherein: The steps of obtaining a curve of the relationship between the gate voltage and the drain current include: Applying a plurality of gate voltages to the semiconductor devices respectively to obtain a plurality of drain currents; According to the corresponding relationship between the gate voltage and the drain current, a relationship curve between the gate voltage and the drain current is obtained.
3. The method for testing a semiconductor device according to claim 1, wherein: According to the relationship curve between the gate voltage and the drain current, obtaining the transconductance includes: Provide initial gate voltage and set voltage change value; Obtaining a first gate voltage according to the initial gate voltage and the voltage change value to obtain a first drain current; According to the first gate voltage and the voltage change value, a second gate voltage is obtained to obtain a second drain current; the first gate voltage is greater than the initial gate voltage, and the initial gate voltage is greater than the second gate voltage; A difference between the first drain current and the second drain current and a difference between the first gate voltage and the second gate voltage are obtained to obtain a first transconductance value.
4. The method for testing a semiconductor device according to claim 3, wherein: According to the relationship curve between the gate voltage and the drain current, obtaining the transconductance includes: obtaining a third gate voltage again according to the first gate voltage and the voltage change value to obtain a third drain current; Obtaining a fourth gate voltage according to the third gate voltage and the voltage change value to obtain a fourth drain current, wherein the third gate voltage is greater than the first gate voltage, and the first gate voltage is greater than the fourth gate voltage; A difference between the third drain current and the fourth drain current and a difference between the third gate voltage and the fourth gate voltage are obtained to obtain a second transconductance value.
5. The method for testing a semiconductor device according to claim 4, characterized in that: The fourth gate voltage is greater than the second gate voltage.
6. The method for testing a semiconductor device according to claim 4, characterized in that: The obtaining of the relationship curve between transconductance and gate voltage comprises: Setting the initial gate voltage and the first gate voltage as abscissas; The first transconductance value and the second transconductance value are set as ordinates to obtain a relationship curve between the transconductance and the gate voltage.
7. The method for testing a semiconductor device according to claim 3, wherein: The voltage change value is greater than 0.
8. The method for testing a semiconductor device according to claim 1, wherein: The test method also includes: When the test is stopped, the adjacent transconductance value is greater than the reference transconductance value.
9. The method for testing a semiconductor device according to claim 1, wherein: The test method also includes: A turn-on voltage of a gate of the semiconductor device is determined according to the peak transconductance value.
10. The method for testing a semiconductor device according to claim 9, wherein: Determining a turn-on voltage of a gate of the semiconductor device according to the peak transconductance value includes: The gate turn-on voltage is obtained according to the following formula: Vt=Vg1-Id1 / G1-Vd / 2 Among them, Vt is the turn-on voltage of the gate; Vg1 is the gate voltage corresponding to the first transconductance value; Id1 is the drain current corresponding to the first transconductance value, G1 is the first transconductance value; Vd is the drain voltage corresponding to the first transconductance value.
11. The method for testing a semiconductor device according to claim 1, wherein: The preset value is 0.95 to 0.
98.
12. The method for testing a semiconductor device according to claim 1, wherein: The test method also includes: If the ratio of the adjacent transconductance value to the peak transconductance value is greater than or equal to the preset value, the semiconductor device is continuously tested until the ratio of the adjacent transconductance value to the peak transconductance value is less than the preset value.
13. A semiconductor device testing device, characterized in that: include: A first acquisition module is configured to acquire a relationship curve between gate voltage and drain current; A second acquisition module is configured to obtain transconductance according to the relationship curve between the gate voltage and the drain current; A third acquisition module is configured to obtain a relationship curve between the transconductance and the gate voltage according to the transconductance and the gate voltage; a fourth acquisition module, configured to obtain a peak transconductance value and an adjacent transconductance value according to the relationship curve between the transconductance and the gate voltage, wherein the peak transconductance value is a transconductance value at a peak position of the relationship curve between the transconductance and the gate voltage, and the adjacent transconductance value is a transconductance value at a position adjacent to the peak position; The first determination module is configured to determine whether the ratio of the adjacent transconductance value to the peak transconductance value is less than a preset value; if so, stop the test.
14. A semiconductor device testing device, characterized in that: The test equipment includes: processor; a memory for storing processor-executable instructions; Wherein, the processor is configured to execute the testing method described in any one of claims 1-12.
15. A non-transitory computer-readable storage medium, characterized in that: When the instructions in the storage medium are executed by the processor of the memory testing device, the testing device is enabled to execute the testing method described in any one of claims 1-12.
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