An accurate calculation method of inverter loss considering output current ripple

Abstract

The application discloses an accurate calculation method of inverter loss considering output current ripple. The output current of the inverter is composed of low-frequency fundamental current and high-frequency ripple current. The method comprises the following steps: analyzing the working state of each bridge arm of the inverter and the corresponding commutation mode; calculating the conduction loss of each switch tube in each bridge arm of the inverter under the corresponding commutation mode; calculating the switching loss of each switch tube in each bridge arm of the inverter under the corresponding commutation mode; and adding the conduction loss and the switching loss of each switch tube in each bridge arm of the inverter to obtain the loss of the inverter. In the application, the high-frequency ripple current component contained in the output current will cause the two power devices of the bridge arm to be in a soft switching state near the zero point of the output current. The application considers the soft switching state of the power device caused by the high-frequency ripple current, and improves the accuracy of the inverter loss prediction.

Description

Technical Field

[0001] This invention relates to the field of new energy power generation technology, and in particular to a method for accurately calculating inverter losses considering output current ripple. Background Technology

[0002] Three-phase inverters are widely used in distributed generation systems such as photovoltaic power generation devices and wind power generation systems. Assessing their losses is crucial in inverter design. Traditional three-phase inverters are limited by the switching losses of their devices, and their switching frequency generally does not exceed 20kHz. In recent years, SiC-MOSFET devices have attracted attention due to their faster switching speed and lower switching losses, and their switching frequency can reach 100kHz. Therefore, it is necessary to propose a new loss assessment method for inverters with high switching frequencies.

[0003] Due to the influence of the output filter, the inverter's output current always includes both low-frequency fundamental current and high-frequency ripple current. When the actual circuit output current is close to zero, considering the presence of high-frequency ripple, two power devices on one bridge arm simultaneously enter a soft-switching state, a state not present in traditional average current loss analysis. Since SiC-MOSFETs operate at higher frequencies than IGBTs, the impact of high-frequency ripple on losses needs to be analyzed more thoroughly in loss calculations. Summary of the Invention

[0004] In view of this, the present invention proposes an accurate calculation method for inverter losses that takes into account output current ripple, considering the soft switching state of power devices caused by high-frequency ripple current, thereby improving the accuracy of inverter loss prediction.

[0005] This invention provides a method for accurately calculating inverter losses considering output current ripple. The method includes: analyzing the operating state and corresponding commutation mode of each bridge arm of the inverter based on the characteristic that the output current contains high-frequency ripple; calculating the conduction loss of each switch in each bridge arm of the inverter under the corresponding commutation mode; calculating the switching loss of each switch in each bridge arm of the inverter under the corresponding commutation mode; and summing the conduction loss and switching loss of each switch in each bridge arm of the inverter to obtain the inverter losses.

[0006] Furthermore, the inverter is a three-phase four-wire two-level inverter, each bridge arm of the inverter is connected to the grid using a single inductor, and the inverter uses SPWM modulation; each bridge arm of the inverter has three operating states:

[0007] Operating State 1: In this operating state, the inverter's output current is always greater than 0;

[0008] Operating State 2: In this operating state, the inverter's output current is always less than 0;

[0009] Operating State 3: In this operating state, the inverter's output current is less than 0 at the off time and greater than 0 at the on time.

[0010] Furthermore, each arm of the inverter has two commutation modes in operating state 1, operating state 2, and operating state 3, respectively:

[0011] The current is commutated from the upper switching transistor to the lower switching transistor;

[0012] Current is commutated from the lower switching transistor to the upper switching transistor;

[0013] The upper and lower switching transistors are SiC-MOSFETs.

[0014] Furthermore, when the current is commutated from the upper switching transistor to the lower switching transistor in operating state 1, operating state 2, or operating state 3, the inverter's operating state is as follows:

[0015] (1) First stage: Inverter output positive level

[0016] When the upper switch of the inverter bridge arm is turned on and the lower switch is turned off, the current flows into the grid through the upper switch. At this time, the output voltage of the inverter is Vdc / 2.

[0017] (2) Second stage: Dead zone

[0018] When the dead time is set, the upper switch is turned off and the lower switch is turned off. The current is commutated from the upper switch to the corresponding diode. At this time, the inverter's output voltage is -Vdc / 2.

[0019] (3) Third stage: Inverter output negative level

[0020] When the lower switch is turned on and the upper switch is turned off, current flows into the grid through the lower switch. At this time, the inverter's output voltage is -Vdc / 2.

[0021] Furthermore, when the current is switched from the lower switch to the upper switch in operating state 1, operating state 2, or operating state 3, the inverter's operating state is as follows:

[0022] (1) First stage: Inverter output negative level

[0023] When the lower switch is turned on and the upper switch is turned off, the current flows into the grid through the lower switch. At this time, the inverter's output voltage is -Vdc / 2.

[0024] (2) Second stage: Dead zone

[0025] When the dead time is set, the upper switch is turned off and the lower switch is turned off. The current is commutated from the lower switch to the corresponding diode. At this time, the inverter's output voltage is -Vdc / 2.

[0026] (3) Third stage: Inverter output positive level

[0027] When the upper switch is turned on and the lower switch is turned off, current flows into the grid through the upper switch. At this time, the inverter's output voltage is Vdc / 2.

[0028] Furthermore, the conduction loss of the switching transistor includes the channel conduction loss; the method for calculating the channel conduction loss is as follows:

[0029]

[0030] Furthermore, the conduction loss of the switching transistor includes the conduction loss of the body diode; the calculation method for the conduction loss of the body diode is as follows:

[0031]

[0032] Furthermore, the switching loss of the switching transistor includes the channel switching loss; the method for calculating the channel switching loss is as follows:

[0033]

[0034] Furthermore, the switching loss of the switching transistor includes the switching loss of the body diode; the calculation method for the switching loss of the body diode is as follows:

[0035]

[0036] The aforementioned method for calculating inverter losses first analyzes the commutation mode of each bridge arm of the inverter under its operating conditions. By accurately calculating the switching and conduction losses generated by the switching transistors in each bridge arm during this period, the total losses of the inverter's power devices are predicted using these losses. The loss calculation method provided by this invention considers the soft-switching state of the power devices caused by high-frequency ripple current, which improves the accuracy of inverter loss prediction. Attached Figure Description

[0037] For illustrative and not limiting purposes, the invention will now be described with reference to preferred embodiments thereof, particularly the accompanying drawings, in which:

[0038] Figure 1 This is a schematic diagram of the inverter and its output current;

[0039] Figure 2This is a flowchart of an embodiment of the present invention providing a method for accurately calculating inverter losses considering output current ripple;

[0040] Figure 3 This is a two-level topology diagram of an inverter;

[0041] Figure 4 This is a key waveform diagram of two-level topology hard-switching SPWM modulation considering high-frequency ripple;

[0042] Figure 5 This is a schematic diagram of the commutation process from the upper tube to the lower tube in working state 1.

[0043] Figure 6 This is a schematic diagram of the commutation process from the lower tube to the upper tube in working state 1.

[0044] Figure 7 This is a schematic diagram of the commutation process from the upper tube to the lower tube in working state 2.

[0045] Figure 8 This is a schematic diagram of the commutation process from the lower tube to the upper tube in working state 2.

[0046] Figure 9 This is a schematic diagram of the commutation process from the upper tube to the lower tube in working state 3.

[0047] Figure 10 This is a schematic diagram of the commutation process from the lower tube to the upper tube in working state 3.

[0048] Figure 11 This is a schematic diagram of switching losses when the high-frequency inductor ripple changes from 0% to 30%.

[0049] Figure 12 This is a schematic diagram of the total device loss when the high-frequency inductor ripple changes from 0% to 30%. Detailed Implementation

[0050] To better understand the above-mentioned objects, features, and advantages of the present invention, the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that, unless otherwise specified, the embodiments of the present invention and the features thereof can be combined with each other.

[0051] Numerous specific details are set forth in the following description to provide a thorough understanding of the invention. The described embodiments are merely some, not all, of the embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0052] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.

[0053] Figure 1 This is a schematic diagram of the inverter and its output current. The inverter is a three-phase, four-wire, two-level inverter, connected to the grid using a single inductor, and its modulation method is SPWM modulation. Figure 1 As shown, it includes switching transistors S1 to S6 and three inductors L. f Switches S1 and S2 form a bridge arm, with their intermediate node connected by an inductor L. f Connected to the power grid, switches S3 and S4 form another bridge arm, with their intermediate node connected to another inductor L. f Connected to the power grid, switches S5 and S6 form another bridge arm, with their intermediate node connected to another inductor L. f It is connected to the power grid. The output current of this inverter consists of a low-frequency fundamental current and a high-frequency ripple current. The switching transistors S1 to S6 are SiC-MOSFETs.

[0054] Figure 2 This is a flowchart illustrating a method for accurately calculating inverter losses considering output current ripple, provided by an embodiment of the present invention. Please refer to [link / reference]. Figure 2 The calculation method for inverter losses includes the following steps:

[0055] S100 analyzes the operating status of each bridge arm of the inverter and its corresponding commutation mode.

[0056] S101, analyze the operating status of each bridge arm of the inverter.

[0057] In this embodiment, the inverter's bridge arm includes three operating states, namely:

[0058] (1) Operating state 1: In this operating state, the output current of the inverter is always greater than 0.

[0059] (2) Operating state 2: In this operating state, the output current of the inverter is always less than 0.

[0060] (3) Operating state 3: In this operating state, the inverter's output current is less than 0 at the off time and greater than 0 at the on time.

[0061] This section explains the loss analysis using a three-phase four-wire two-level SiC inverter as an example. The topology of the two-level SiC inverter is as follows: Figure 3 As shown. Figure 3Only phase A of the three-phase half-bridge is shown. S1 and S2 are SiC-MOSFET high-frequency switches, and D1 and D2 are parasitic diodes of the SiC-MOSFET high-frequency switches. The inverter modulation method proposed in this embodiment is SPWM modulation.

[0062] Figure 4 The waveforms of a two-level hard-switching SPWM modulation topology are given. For ease of plotting, it is assumed that the SPWM carrier ratio is low. The analysis is based on phase A as an example. The grid voltage v... a and inverter output current i a Defined as:

[0063]

[0064] Among them, V a I is the amplitude of the grid voltage, ω is the grid angular frequency, and I is the voltage amplitude. a The magnitude of the output current. This refers to the phase shift between the output current and the grid voltage.

[0065] when When the converter operates in unity power factor inverter grid-connected state; when When the converter operates in unity power factor rectification mode, when At this time, the converter operates in a reactive power compensation state.

[0066] by Taking the inverter output current i as an example for analysis, a The inverter's output current can be analyzed in three states, considering both positive and negative conditions. The output current includes both low-frequency fundamental current and high-frequency ripple current. State 1 is defined as the output current being greater than 0 throughout the switching cycle. State 2 is defined as the output current being less than 0 throughout the switching cycle. When the output current is near 0 and its average value is less than the output current ripple, the current direction changes once during that switching cycle; this state is defined as operating state 3.

[0067] S102, analyze the commutation mode of each bridge arm of the inverter under each operating state.

[0068] Each arm of the inverter has two commutation modes in operating state 1, operating state 2, and operating state 3, respectively:

[0069] (1) The current is commutated from the upper switch to the lower switch.

[0070] (2) The current is commutated from the lower switch to the upper switch.

[0071] The following section takes a bridge arm composed of switching transistors S1 and S2 as an example to explain in detail the two commutation modes of the bridge arm under operating state 1, operating state 2 and operating state 3 respectively.

[0072] (1-1) Under operating state 1, the output current of this bridge arm is always greater than 0. When the inverter output voltage changes from positive to negative, the current commutates from the upper switch S1 to the lower switch S2 as follows: Figure 5 As shown. The inverter's operating state is specifically divided into three stages:

[0073] Phase 1: Inverter outputs a positive level

[0074] At this time, the upper switch S1 is turned on and the lower switch S2 is turned off. The current flows into the power grid through the upper switch S1, and the output voltage of the inverter is Vdc / 2.

[0075] Phase Two: Dead Zone

[0076] To prevent inverter bridge arm shoot-through, a dead time needs to be set. At this time, the upper switch S1 is turned off and the lower switch S2 is turned off. The current is commutated from the upper switch S1 to the diode D2. The upper switch S1 undergoes a hard turn-off. At this time, the inverter output voltage is -Vdc / 2.

[0077] Phase 3: Inverter outputs a negative level

[0078] At this time, the lower switch S2 is turned on and the upper switch S1 is turned off. The current flows into the power grid through the lower switch S2. Before the lower switch S2 is turned on, the voltage across its two ends has been clamped to 0 by the diode. Therefore, the lower switch S2 undergoes a soft turn-on. At this time, the inverter's output voltage is -Vdc / 2.

[0079] (1-2) In operating state 1, the output current of this bridge arm is always greater than 0. When the inverter's output voltage changes from negative to positive, the current is commutated from the lower switch S2 to the upper switch S1, such as... Figure 6 As shown. At this point, the inverter's operating state is specifically divided into three stages:

[0080] Phase 1: Inverter outputs a negative level

[0081] At this time, the lower switch S2 is turned on and the upper switch S1 is turned off. The current flows into the power grid through the lower switch S2, and the output voltage of the inverter is -Vdc / 2.

[0082] Phase Two: Dead Zone

[0083] To prevent bridge arm shoot-through, a dead time needs to be set. At this time, the upper switch S1 is off and the lower switch S2 is off. The current is commutated from the lower switch S2 to the diode D2. At this time, the inverter output voltage is -Vdc / 2.

[0084] Phase 3: Inverter outputs a positive level

[0085] At this time, the upper switch S1 is turned on and the lower switch S2 is turned off. The current flows into the grid through the upper switch S1. D2 experiences a hard turn-off and the upper switch S1 experiences a hard turn-on. At this time, the inverter's output voltage is Vdc / 2.

[0086] (2-1) In operating state 2, the current is commutated from the upper switch S1 to the lower switch S2, such as Figure 7 As shown. The inverter's operating state is specifically divided into three stages:

[0087] Phase 1: Inverter outputs a positive level

[0088] At this time, the upper switch S1 is turned on and the lower switch S2 is turned off. The current flows into the grid through the upper switch S1, and the output voltage of the inverter is Vdc / 2.

[0089] Phase Two: Dead Zone

[0090] To prevent the bridge arm from shoot-through, a dead time needs to be set. At this time, the upper switch S1 is off and the lower switch S2 is off. The current is commutated from the upper switch S1 to the diode D1. At this time, the inverter output voltage is -Vdc / 2.

[0091] Phase 3: Inverter outputs a negative level

[0092] At this time, the lower switch S2 is turned on and the upper switch S1 is turned off. The current flows into the grid through the lower switch S2. D1 experiences a hard turn-off and the lower switch S2 experiences a hard turn-on. At this time, the inverter's output voltage is -Vdc / 2.

[0093] (2-2) In operating state 2, the current is commutated from the lower switch S2 to the upper switch S1, such as... Figure 8 As shown. The inverter's operating state is specifically divided into three stages:

[0094] Phase 1: Inverter outputs a negative level

[0095] At this time, the lower switch S2 is turned on and the upper switch S1 is turned off. The current flows into the power grid through the lower switch S2, and the output voltage of the inverter is -Vdc / 2.

[0096] Phase Two: Dead Zone

[0097] To prevent bridge arm shoot-through, a dead time needs to be set. At this time, the upper switch S1 is turned off and the lower switch S2 is turned off. The current is commutated from the lower switch S2 to the diode D1. The lower switch S2 undergoes a hard turn-off. At this time, the inverter output voltage is -Vdc / 2.

[0098] Phase 3: Inverter outputs a positive level

[0099] At this time, the upper switch S1 is turned on and the lower switch S2 is turned off. The current flows into the power grid through the upper switch S1. Before the upper switch S1 is turned on, the voltage across its two ends has been clamped to 0 by the diode. Therefore, the upper switch S1 undergoes a soft turn-on. At this time, the inverter's output voltage is Vdc / 2.

[0100] (3-1) In operating state 3, the current is commutated from the upper switch S1 to the lower switch S2, such as Figure 9 As shown. The inverter's operating state is specifically divided into three stages:

[0101] Phase 1: Inverter outputs a positive level

[0102] At this time, the upper switch S1 is turned on and the lower switch S2 is turned off. The current flows into the grid through the upper switch S1, and the output voltage of the inverter is Vdc / 2.

[0103] Phase Two: Dead Zone

[0104] To prevent the bridge arm from shoot-through, a dead time needs to be set. At this time, the upper switch S1 is turned off and the lower switch S2 is turned off. The current is commutated from the upper switch S1 to the diode D2. The upper switch S1 undergoes a hard turn-off. At this time, the inverter output voltage is -Vdc / 2.

[0105] Phase 3: Inverter outputs a negative level

[0106] At this time, the lower switch S2 is turned on and the upper switch S1 is turned off. The current flows into the power grid through the lower switch S2. Before the lower switch S2 is turned on, the voltage across its two ends has been clamped to 0 by the diode. Therefore, the lower switch S2 undergoes a soft turn-on. At this time, the inverter's output voltage is -Vdc / 2.

[0107] (3-2) In operating state 3, the current is commutated from the lower switch S2 to the upper switch S1, such as... Figure 10 As shown. The inverter's operating state is specifically divided into three stages:

[0108] Phase 1: Inverter outputs a negative level

[0109] At this time, the lower switch S2 is turned on and the upper switch S1 is turned off. The current flows into the power grid through the lower switch S2, and the output voltage of the inverter is -Vdc / 2.

[0110] Phase Two: Dead Zone

[0111] To prevent bridge arm shoot-through, a dead time needs to be set. At this time, the upper switch S1 is turned off and the lower switch S2 is turned off. The current is commutated from the lower switch S2 to the diode D1. The lower switch S2 undergoes a hard turn-off. At this time, the inverter output voltage is -Vdc / 2.

[0112] Phase 3: Inverter outputs a positive level

[0113] At this time, S1 is turned on, the lower switch S2 is turned off, and the current flows into the grid through the upper switch S1. Before the upper switch S1 is turned on, the voltage across its terminals has been clamped to 0 by the diode. Therefore, the upper switch S1 undergoes a soft turn-on. At this time, the inverter's output voltage is Vdc / 2.

[0114] High-frequency ripple current will cause both switches of the bridge arm to be in a soft-switching state when the output current is near the zero crossing point, and the corresponding commutation state is operating state 3.

[0115] S200 calculates the conduction loss of each switch in each arm of the inverter under the corresponding commutation mode.

[0116] In this embodiment, the conduction loss of the switching transistor includes the conduction loss of the channel and the conduction loss of the body diode.

[0117] One power frequency cycle is divided into N time units, where N is defined as the ratio of the switching frequency to the power grid frequency. The instantaneous current of each switch includes the low-frequency fundamental current and the high-frequency ripple current, and its expression is as follows:

[0118]

[0119]

[0120] in,

[0121] In the formula, i x (n) represents the low-frequency fundamental current, i xpp (n) represents the high-frequency ripple current, T s The switching cycle is L, the filter inductance is I. x V is the effective value of the output current. dc V is the DC side voltage. s This is the grid voltage.

[0122] The inverter operating state in this embodiment is as follows: Figure 5-10As shown, it operates in a mode similar to synchronous rectification. That is, when current needs to flow through the power device in the reverse direction, the gate motor still drives the channel of the switching transistor to open, making it operate in the reverse resistance region to reduce its reverse conduction loss. Therefore, the current flows through the channel of the switching transistor regardless of whether it is forward or reverse, and only flows through the diode during the dead time. Due to the high switching frequency, the effective value of the current through the channel in each switching cycle remains essentially constant, so it can be directly substituted into the average current for calculation.

[0123] Among them, the conduction loss P of the channel MOS,cond The on-resistance R of the channel can be used. on To solve for the forward and reverse conduction losses of a pair of upper and lower switches in the bridge arm, the expression is as follows:

[0124]

[0125] Among them, R on For the on-resistance, i x (n) represents the low-frequency fundamental current, T s For the switching period, T d f0 is the dead time and f0 is the switching frequency.

[0126] On-resistance R on It is linearly related to temperature, and the relationship between the two is expressed as follows:

[0127] R on =R on,AT +K Ron (T j,T -T j,AT )

[0128] Among them, R on,AT K is the on-resistance at the initial junction temperature provided in the datasheet. Ron T represents the temperature correction factor. j,T T represents the junction temperature of the switching transistor. j,AT This indicates the initial junction temperature provided in the datasheet.

[0129] The conduction loss of the body diode can be solved by the on-state voltage drop, including the conduction loss of the body diodes of the upper and lower switches in the bridge arm. The body diode conducts only during the dead time, and the conduction loss P of the body diode is... diode,cond The calculation formula is:

[0130]

[0131] Where f0 is the switching frequency; V f i is the forward voltage drop of the body diode; x (n) represents the low-frequency fundamental current; T d This refers to the dead zone time.

[0132] The forward voltage drop of a body diode is linearly related to temperature, and the relationship is expressed as follows:

[0133] V f =V f,AT +K vf (T j,T -T j,AT )

[0134] Among them, V f,AT K represents the on-state voltage drop at the initial junction temperature provided in the datasheet. vf This represents the temperature correction factor.

[0135] S300 calculates the switching losses of each switch in each arm of the inverter under the corresponding commutation mode.

[0136] In this embodiment, the switching loss of the switching transistor includes the switching loss of the channel and the switching loss of the body diode.

[0137] In operating states 1 and 2, the two switching state changes (i.e., commutation from the upper transistor to the lower transistor and then back to the upper transistor) result in one turn-on loss and one turn-off loss, which can be recorded as one hard turn-on loss. In operating state 3, there are only two hard turn-off losses. Since the turn-on loss is generally several times that of the turn-off loss at the same current, the loss in operating state 3 will necessarily be lower than in the other two states. Conventional methods for evaluating losses based on average current do not consider operating state 3, therefore the calculated result will be greater than the loss calculation method proposed in this embodiment. Especially in inverters using wide-bandgap devices, where the operating frequency is higher, the error in loss calculation will be even greater.

[0138] The switching loss of a channel can be solved by summing the switching energies of all switches within one power frequency cycle. The switching loss P of the channel... MOS,sw The expression is as follows:

[0139]

[0140] In the formula, the soft-switching loss is approximately zero, E off E represents the hard-turn-off loss. on Indicates hard-turn-on loss, i x (n) represents the low-frequency fundamental current, and f0 represents the switching frequency.

[0141] Hard turn-off loss E off Hard turn-on loss E on The calculation formula is as follows:

[0142]

[0143]

[0144] Among them, E on,const E on,k k Eon E off,const E off,k k Eoff The fitting coefficients can be obtained by fitting the relevant curves from the datasheet. V dc V is the DC bus voltage of the actual circuit. dc0 This refers to the DC bus voltage used in the datasheet testing.

[0145] Among them, i x Considering the instantaneous current during the switching of the switching transistors, and taking into account the influence of high-frequency ripple, i is the current during commutation from the upper transistor to the lower transistor. x for:

[0146] i x =i x (n)+i xpp (n)

[0147] Down-pipe commutation to up-pipe i x The time was:

[0148] i x =i x (n)-i xpp (n)

[0149] In the formula, i x (n) represents the low-frequency fundamental current, i xpp (n) represents the high-frequency ripple current.

[0150] The switching loss of the body diode can be solved by accumulating all reverse recovery energies within one power frequency cycle.

[0151] Assuming the soft switching loss is 0, the switching loss energy distribution of the switching transistor is shown in Table 1.

[0152] Table 1 Switching energy distribution of two-level converter

[0153]

[0154] The expression for the switching loss of a body diode is:

[0155]

[0156] In the formula, f0 is the switching frequency, i x (n) represents the low-frequency fundamental current, i xpp (n) represents the high-frequency ripple current.

[0157] During the commutation process in operating states 1 and 2, a diode reverse recovery process occurs once in each state. In operating state 3, since the direction of the load current changes within the cycle, there is no diode reverse recovery process.

[0158] Among them, E rr (i x The expression for (n) is:

[0159]

[0160] In the formula, E off For hard-turn-off losses, E on For hard turn-on loss, E rr,const E rr,k k Err , where is the fitting coefficient, which can be obtained by fitting the relevant curve from the datasheet, i x This is the instantaneous current at the moment the switching transistor switches on.

[0161] S400 sums up the conduction loss and switching loss of each switch in each arm of the inverter to obtain the inverter's losses.

[0162] The inverter loss calculation method proposed in this embodiment first analyzes the commutation mode of each bridge arm of the inverter under its operating state. By accurately calculating the switching and conduction losses generated by the switching transistors in each bridge arm during this period, the total loss of the inverter power devices is predicted using these losses. The loss calculation method provided in this embodiment considers the soft-switching state of the power devices caused by high-frequency ripple current, which improves the accuracy of inverter loss prediction.

[0163] The following analysis details the inverter loss calculation method proposed in this embodiment. The method was experimentally verified on a high-power-density, high-efficiency 380V / 50kvar inverter. Loss calculations were performed with a DC side voltage of 750V, an AC side line voltage RMS of 380V, and an output current of capacitive reactive current. The accuracy of inverter loss prediction was compared after considering switching ripple when the switching frequency ranged from 20kHz to 80kHz.

[0164] Figure 11 This paper describes the change in switching loss of a single device when the inductor ripple varies from 0% to 30% at switching frequencies of 20kHz, 50kHz, and 80kHz. Figure 12 This represents the change in total losses of all components in the three-phase bridge arm of a three-phase four-wire inverter. In the positive coordinate system, 0% indicates the loss calculation result without considering the peak-to-peak value of the ripple, i.e., the loss is calculated based on the average value of the output current.

[0165] Let's analyze this using an output current ripple of 20% as an example. At a switching frequency of 20kHz, the switching loss of a single device, calculated based on the average current, is 5.3W, and the total loss is 561W. Considering the high-frequency ripple, the switching loss is 5.0W, and the total loss is 558W, which is not significantly different. When using wide-bandgap devices, the switching frequency is greatly increased.

[0166] When the switching frequency is 80kHz, the switching loss of a single device calculated using average current is 21.3W, and the total loss is 895W. Considering high-frequency ripple, the switching loss is 20.2W, and the total loss is 882W, showing a greater difference. This means that using the traditional average current calculation method will result in a 2.5% increase in power loss compared to the method used in this embodiment.

[0167] Meanwhile, from another perspective, when other conditions permit, the peak-to-peak value of the output high-frequency ripple can be appropriately increased to reduce the losses of power devices. For example, when the switching frequency is 80kHz, increasing the peak-to-peak value of the ripple from 10% to 30% can reduce the loss by 16W, or 1.8%. Assuming that the losses of other components remain basically unchanged, the system efficiency can be improved from 98.22% to 98.25%. The higher the system switching frequency, the more significant the efficiency improvement will be from increasing the peak-to-peak value of the ripple.

[0168] The inverter loss calculation method proposed in this embodiment was experimentally verified on a high power density and high efficiency 380V / 50kvar inverter. With a DC side voltage of 750V, an AC side line voltage of 380V, a switching frequency of 50kHz, and an output current of capacitive reactive current, loss calculation and experimental analysis were performed. The experimental results are shown in Table 2.

[0169] Table 2 Comparison of calculation results and experimental results of the proposed method and traditional method.

[0170] Average current calculation Calculation method in this article Experimental test results loss 638W 630W 625W efficiency 98.72％ 98.74％ 98.75％

[0171] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can occur depending on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A method for accurately calculating inverter losses considering output current ripple, characterized in that, include: Based on the characteristic that the output current contains high-frequency ripple, the operating status and corresponding commutation mode of each bridge arm of the inverter are analyzed. Calculate the conduction loss of each switch in each arm of the inverter under the corresponding commutation mode; the conduction loss of the switch includes the channel conduction loss; the method for calculating the channel conduction loss is as follows: ， in, For on-resistance, i x ( n () represents the low-frequency fundamental current. T s For the switching cycle, T d Dead time, f 0 represents the switching frequency; Calculate the switching losses of each switch in each arm of the inverter under the corresponding commutation mode; The inverter's losses are obtained by summing the conduction losses and switching losses of each switch in each bridge arm of the inverter.

2. The method for accurately calculating inverter losses considering output current ripple according to claim 1, characterized in that, The inverter is a three-phase four-wire two-level inverter. Each bridge arm of the inverter is connected to the power grid via a single inductor. The inverter uses SPWM modulation. Each bridge arm of the inverter has three operating states: Operating State 1: In this operating state, the inverter's output current is always greater than 0; Operating State 2: In this operating state, the inverter's output current is always less than 0; Operating State 3: In this operating state, the inverter's output current is less than 0 at the off time and greater than 0 at the on time.

3. The method for accurately calculating inverter losses considering output current ripple according to claim 1, characterized in that, Each arm of the inverter has two commutation modes in operating state 1, operating state 2, and operating state 3, respectively: The current is commutated from the upper switching transistor to the lower switching transistor; Current is commutated from the lower switching transistor to the upper switching transistor; The upper and lower switching transistors are SiC-MOSFETs.

4. The method for accurately calculating inverter losses considering output current ripple according to claim 1, characterized in that, When the current commutates from the upper switch to the lower switch in operating state 1, operating state 2, or operating state 3, the inverter's operating state is as follows: (1) First stage: Inverter output positive level When the upper switch of the inverter bridge arm is turned on and the lower switch is turned off, the current flows into the grid through the upper switch. At this time, the output voltage of the inverter is Vdc / 2. (2) Second stage: Dead zone When the dead time is set, the upper switch is turned off and the lower switch is turned off. The current is commutated from the upper switch to the corresponding diode. At this time, the output voltage of the inverter is -Vdc / 2. (3) Third stage: Inverter output negative level When the lower switch is turned on and the upper switch is turned off, current flows into the grid through the lower switch. At this time, the inverter's output voltage is -Vdc / 2.

5. The method for accurately calculating inverter losses considering output current ripple according to claim 1, characterized in that, When the current is switched from the lower switch to the upper switch in operating state 1, operating state 2, or operating state 3, the inverter's operating state is as follows: (1) First stage: Inverter output negative level When the lower switch is turned on and the upper switch is turned off, the current flows into the grid through the lower switch. At this time, the inverter's output voltage is -Vdc / 2. (2) Second stage: Dead zone When the dead time is set, the upper switch is turned off and the lower switch is turned off. The current is commutated from the lower switch to the corresponding diode. At this time, the inverter's output voltage is -Vdc / 2. (3) Third stage: Inverter output positive level When the upper switch is turned on and the lower switch is turned off, current flows into the grid through the upper switch. At this time, the inverter's output voltage is Vdc / 2.

6. The method for accurately calculating inverter losses considering output current ripple according to claim 1, characterized in that, The conduction loss of the switching transistor includes the conduction loss of the body diode; the calculation method for the conduction loss of the body diode is as follows: ， Where f0 is the switching frequency; Vf is the forward voltage drop of the body diode; ix(n) is the low-frequency fundamental current; and Td is the dead time.

7. The method for accurately calculating inverter losses considering output current ripple according to claim 1, characterized in that, The switching loss of the switching transistor includes the channel switching loss; the method for calculating the channel switching loss is as follows: ， In the formula, This indicates hard-shutdown losses. This represents the hard-turn-on loss, where ix(n) is the low-frequency fundamental current. This refers to the switching frequency.

8. The method for accurately calculating inverter losses considering output current ripple according to claim 1, characterized in that, The switching loss of the switching transistor includes the switching loss of the body diode; the calculation method for the switching loss of the body diode is as follows: ， In the formula, f 0 represents the switching frequency. i x ( n () represents the low-frequency fundamental current. i xpp ( n The inverter's output current consists of a low-frequency fundamental current and a high-frequency ripple current.

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