A RFLDMOS device and a manufacturing method thereof

Abstract

The present invention provides an RFLDMOS device and a manufacturing method thereof. The present invention provides a substrate, forms an epitaxial layer on the substrate, grows a thick gate oxide layer above the epitaxial layer, photolithographically opens a source region, a portion of a gate region near the source, and a portion of a drift region near the gate. The thick gate oxide layer in the photolithographically opened region is removed using a wet etching process, and undercuts are formed at both ends of the remaining thick gate oxide layer. A thin gate oxide layer is grown above the epitaxial layer. The thin gate oxide layer and the thick gate oxide layer together form a stepped gate oxide layer. A subsequent process is performed to form a stepped Faraday shield. The stepped Faraday shield of the present invention improves hot carrier performance while taking into account the breakdown voltage, reduces the Faraday shield's resistance to ground, and effectively improves the reliability and frequency characteristics of the device. A single-layer Faraday shield can achieve the same effect as a traditional two-layer or even three-layer Faraday shield, reduces the number of photolithographic layers of the Faraday shield, simplifies the process, and saves cost.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to an RFLDMOS device and a manufacturing method thereof. Background Art

[0002] RFLDMOS (Radio Frequency Laterally Diffused Metal Oxide Semiconductor) is a radio frequency power device featuring high gain, high linearity, high voltage resistance, and high output power. RFLDMOS devices are widely used in radio frequency base stations, wireless broadcast stations, radar, and other fields. Using power arrays and multi-chip synthesis, these devices can achieve output power exceeding 500W.

[0003] Faraday shields are often used in RFLDMOS devices. Figure 1 The figure shows a cross-sectional view of an RFLDMOS device with a Faraday shield. An epitaxial layer 12 is formed on a substrate 11. A source region 15 and a drain region 17 are located in the body region 14 and the drift region 13, respectively. A heavily doped region 16 is connected to the source region 15. A gate oxide layer 18 and a polysilicon gate 19 are formed on the surface of the epitaxial layer between the body region 14 and the drift region 13. Metal silicide 23 is formed on the surfaces of the source region 15, the drain region 17, and the polysilicon gate 19. A Faraday shield 20 is located above the polysilicon gate 19 and is separated from the polysilicon gate 19 by a dielectric layer 21. The Faraday shield 20 is connected to the source region 15 and a sinker channel 22 via metal contact lines. The sinker channel 22 is connected to the substrate 11. The Faraday shield 20 shifts the location of the strong electric field within the device from the gate edge to below the shield layer, reducing hot carrier injection into the gate during high-voltage applications, thereby improving device reliability. At the same time, the Faraday shield 20 can also significantly reduce the capacitance Cgd between the gate and the drain, ie, the Miller capacitance, and improve the frequency characteristics of the device.

[0004] In the prior art, in order to further improve the reliability and frequency characteristics of the device and optimize the device performance, such as Figure 2 As shown, the RFLDMOS device can also use a double-layer or even a triple-layer Faraday shield, but this will greatly increase the process complexity and cost. Summary of the Invention

[0005] In view of this, the present invention provides an RFLDMOS device and a manufacturing method thereof, so as to solve the problem in the prior art that the use of a multi-layer Faraday shield increases process complexity and cost, and achieves the purpose of achieving the effect of a multi-layer Faraday shield by using a single-layer Faraday shield.

[0006] The present invention provides a method for manufacturing an RFLDMOS device, comprising the following steps:

[0007] Step 1: providing a substrate, forming an epitaxial layer on the substrate, and growing a thick gate oxide layer above the epitaxial layer;

[0008] Step 2: Photolithography to open the source region forming area, the gate forming area close to the source, and the drift region forming area close to the gate;

[0009] Step 3: using a wet etching process to remove the thick gate oxide layer in the photolithography-opened area, and forming undercuts at both ends of the remaining thick gate oxide layer;

[0010] Step 4: growing a thin gate oxide layer on the epitaxial layer, wherein the thin gate oxide layer and the thick gate oxide layer together form a stepped gate oxide layer;

[0011] Step 5: depositing polysilicon and forming a gate in the gate forming area using a photolithography and etching process;

[0012] Step 6: forming a body region and a drift region in the epitaxial layer;

[0013] Step 7: forming gate sidewalls, forming a heavily doped region and a source region in the body region, and forming a drain region in the drift region;

[0014] Step eight, forming metal silicide on the source region, the drain region and the gate;

[0015] Step nine: depositing a dielectric layer, wherein the dielectric layer covers the body region, the drift region and the top of the gate;

[0016] Step 10: depositing a Faraday shield layer on the dielectric layer;

[0017] Step 11: Form a Faraday shield on a portion of the gate close to the drain region and a portion of the drift region close to the gate by using a photolithography and etching process.

[0018] Preferably, in step 1, the substrate is N-type, or the substrate is P-type.

[0019] Preferably, after the undercut is formed in step three, the shape of the thick gate oxide layer changes to two isosceles trapezoids spaced apart on the epitaxial layer.

[0020] Preferably, in step five, the upper left corner of the gate is stepped.

[0021] Preferably, the dielectric layer in step nine is a silicon oxide layer.

[0022] Preferably, the material of the Faraday shield layer in step 10 is tungsten silicon or titanium nitride.

[0023] Preferably, the Faraday shield in step 11 is a stepped type.

[0024] Preferably, the method further comprises: forming a sinker via, wherein the bottom of the sinker via is located at the substrate, and the sinker via passes through the body region and the epitaxial layer.

[0025] The present invention also provides an RFLDMOS device, comprising:

[0026] substrate;

[0027] an epitaxial layer located above the substrate; a drift region and a body region are provided in the epitaxial layer; a drain region is provided in the drift region, a heavily doped region and a source region are provided in the body region, and the heavily doped region is connected to the source region;

[0028] a stepped gate oxide layer located above the epitaxial layer;

[0029] A gate structure located on the surface of the epitaxial layer, the gate structure comprising the gate oxide layer, a gate and a gate sidewall;

[0030] a metal silicide located above the source region, the drain region, and the gate;

[0031] a dielectric layer covering the body region, the drift region and a top portion of the gate structure;

[0032] a Faraday shield covering the dielectric layer and located above a portion of the gate close to the drain region and above a portion of the drift region close to the gate; and

[0033] a sinker via, wherein the bottom of the sinker via is located in the substrate and passes through the body region and the epitaxial layer;

[0034] The gate oxide layer in the gate structure has a slope under the gate, and the thickness of the gate oxide layer on the drain region side is thicker than that on the source region side; and the Faraday shield is a stepped type.

[0035] The present invention improves the Faraday shield of the existing RFLDMOS device, transforming the existing step-shaped Faraday shield into a stepped Faraday shield, so that the RFLDMOS device with a single-layer Faraday shield can achieve the effect of the traditional RFLDMOS device with two or even three layers of Faraday shields, solving the problem of increased process complexity and cost due to the use of multi-layer Faraday shields in the prior art. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0037] Figure 1 Shown is a schematic structural diagram of a conventional RFLDMOS device having a Faraday shield;

[0038] Figure 2 Shown is a schematic structural diagram of a conventional RFLDMOS device having two layers of Faraday shields;

[0039] Figure 3 A flow chart showing a method for manufacturing an RFLDMOS device according to an embodiment of the present invention;

[0040] Figures 4-10 Shown is a schematic structural diagram of each step in a method for manufacturing an RFLDMOS device according to an embodiment of the present invention;

[0041] Figure 11 FIG. 1 is a schematic diagram showing an RFLDMOS device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0042] The present invention is described below based on the following embodiments, but the present invention is not limited to these embodiments. In the detailed description of the present invention below, certain specific details are described in detail. Those skilled in the art can fully understand the present invention without these details. To avoid obscuring the essence of the present invention, well-known methods, processes, procedures, components, and circuits are not described in detail.

[0043] Furthermore, persons of ordinary skill in the art will appreciate that the figures provided herein are for illustration purposes only and are not necessarily drawn to scale.

[0044] Unless the context clearly requires otherwise, words like “include”, “comprising” and the like throughout this application should be interpreted as including rather than exclusive or exhaustive; that is, as meaning “including but not limited to”.

[0045] In the description of the present invention, it should be understood that the terms "first", "second", etc. are used for descriptive purposes only and should not be understood to indicate or imply relative importance. In addition, in the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0046] The RFLDMOS device adopts a multi-layer Faraday shield structure to further even out the field strength distribution in the drift region, reduce the gate-drain edge electric field, and improve the device breakdown voltage. However, its manufacturing process is relatively complicated. Each additional layer of Faraday shield requires additional process steps such as photolithography, metal deposition, deposition of insulating dielectric materials, stripping, and cleaning. In addition, in order to ensure that the insulating dielectric materials deposited under each layer of Faraday shield have an appropriate thickness, tedious process debugging must be performed, which greatly increases the difficulty and cost of device manufacturing and reduces the device yield. Therefore, the present invention proposes an RFLDMOS device and a manufacturing method thereof. The technical solution of the present invention is further illustrated below with reference to the accompanying drawings and through specific embodiments.

[0047] Figure 3 The flowchart of the manufacturing method of the RFLDMOS device according to the embodiment of the present invention is shown. Figure 3 As shown, the following steps are included:

[0048] Step 1: providing a substrate 101 , forming an epitaxial layer 102 on the substrate 101 , and growing a thick gate oxide layer 103 on the epitaxial layer 102 .

[0049] In the embodiment of the present invention, the substrate 101 is N-type, or the substrate 101 is P-type. A P-type epitaxial layer is grown on a P-type substrate, or an N-type epitaxial layer is grown on an N-type substrate. Preferably, a furnace is used to grow the thick gate oxide layer 103.

[0050] Step 2, such as Figure 4 As shown, the source region forming area, the gate forming area close to the source, and the drift region forming area close to the gate are opened by photolithography.

[0051] The photoresist (PR) opens the source end and the portion near the source end for forming a polysilicon gate region, and the portion near the gate is used to form a drift region.

[0052] Step three, such as Figure 5 As shown, the thick gate oxide layer 103 in the photolithography-opened area is removed by a wet etching process, and undercuts are formed at both ends of the remaining thick gate oxide layer 103 .

[0053] In the embodiment of the present invention, wet etching is used to form an undercut between the photoresist PR and the thick gate oxide layer 103 (the undercut is shown in the dotted circle in the figure). After the undercut is formed, the shape of the thick gate oxide layer 103 becomes two isosceles trapezoids spaced apart on the epitaxial layer 102.

[0054] Step 4: Figure 6 As shown, a thin gate oxide layer 104 is grown on the epitaxial layer 102 , and the thin gate oxide layer 104 and the thick gate oxide layer 103 together form a stepped gate oxide layer 105 .

[0055] Then, a thin gate oxide layer 104 is grown. The thickness of the thin gate oxide layer 104 and the thick gate oxide layer 103 is not limited in the embodiment of the present invention and is subject to the thickness required in the actual process. After the above steps 1 to 4, a stepped gate oxide layer 105 is formed on the surface of the epitaxial layer.

[0056] Step five, such as Figure 7 As shown, polysilicon is deposited and a gate 106 is formed in the gate formation region using a photolithography and etching process.

[0057] In the embodiment of the present invention, the gate 106 is formed above the gate oxide layer 105 in the gate forming area at the slope, and the upper left corner of the gate is stepped. The specific formation process is not repeated here and is the same as the formation of the above-mentioned gate oxide layer 105.

[0058] Step six, such as Figure 8 As shown, a body region 107 and a drift region 108 are formed in the epitaxial layer 102 .

[0059] The body region 107 and the drift region 108 of the RFLDMOS device are formed in the epitaxial layer 102 by photolithography and ion implantation.

[0060] Step seven, such as Figure 8 As shown, gate spacers are fabricated, and a heavily doped region 109 and a source region 110 are formed in the body region 107 , and a drain region 111 is formed in the drift region 108 .

[0061] A heavily doped region and a source region of the RFLDMOS are formed in the body region through photolithography and ion implantation, and a drain region of the RFLDMOS is formed in the drift region. The drain region is located at one end of the drift region away from the body region.

[0062] Step eight, such as Figure 8 As shown, a metal silicide 112 is formed on the source region 110 , the drain region 111 and the gate 106 .

[0063] The source / drain regions and the gate region that need metal silicide are opened and metal silicide process is performed. Of course, metal silicide 112 also exists in other regions such as the top of the heavily doped region 109 in the body region 107 .

[0064] Step nine, such as Figure 9 As shown, a dielectric layer 113 is deposited, and the dielectric layer 113 covers the body region 107 , the drift region 108 and the top of the gate 106 .

[0065] In the embodiment of the present invention, the dielectric layer 113 is a silicon oxide layer. Due to the formation of the stepped gate oxide layer in step 4, the dielectric layer 113 subsequently covered is also stepped as shown in the figure.

[0066] Step 10: deposit a Faraday shield layer on the dielectric layer 113 .

[0067] In the embodiment of the present invention, the material of the Faraday shield layer is tungsten silicon or titanium nitride.

[0068] Step 11, such as Figure 10 As shown, a Faraday shield 114 is formed on a portion of the gate close to the drain region and a portion of the drift region close to the gate by using a photolithography and etching process.

[0069] In this embodiment of the present invention, due to the formation of the stepped gate oxide layer in step 4, the subsequent dielectric layer 113 and Faraday shield 114 are both stepped. Compared to the simple stepped Faraday shield structure of conventional RFLDMOS devices, the stepped structure of this embodiment of the present invention improves hot carrier performance while maintaining a balanced breakdown voltage, reduces the Faraday shield's resistance to ground, and effectively enhances the device's broadband performance and reliability at high frequencies.

[0070] The method for manufacturing a semiconductor device according to an embodiment of the present invention further includes: Step 12, forming a sinker via, wherein the bottom of the sinker via is located at the substrate, and the sinker via penetrates the body region and the epitaxial layer.

[0071] Figure 11 Shown is a schematic diagram of an RFLDMOS device according to an embodiment of the present invention. Figure 11 As shown, it includes a substrate 101, an epitaxial layer 102 located above the substrate, a drift region 108 and a body region 107 arranged in the epitaxial layer 102, a drain region 111 arranged in the drift region 108, a heavily doped region 109 and a source region 110 arranged in the body region 107, a stepped gate oxide layer 105 located above the epitaxial layer 102, and a gate structure located on the surface of the epitaxial layer, the gate structure including the gate oxide layer 105, the gate 106 and the gate sidewall, a metal silicide 112 located above the source region 110, the drain region 111 and the gate 106, a dielectric layer 113 covering the body region 107, the drift region 108 and the top of the gate structure, a Faraday shield 114 and a sinking through hole 115.

[0072] In this embodiment of the present invention, metal silicide 112 also exists on top of the heavily doped region 109 within the body region 107. A sinker via 115 has its bottom located in the substrate, penetrating the body region and the epitaxial layer. A Faraday shield 114 covers the dielectric layer 113 and is located above the portion of the gate near the drain region and above the portion of the drift region near the gate.

[0073] In the embodiment of the present invention, the gate oxide layer 105 in the gate structure has a slope below the gate, and the thickness of the gate oxide layer on the drain side is thicker than that on the source side. The Faraday shield 114 is stepped.

[0074] The RFLDMOS device of the embodiment of the present invention can further optimize the reliability and frequency of the device without further photolithography and etching to form a double-layer Faraday shield, thereby greatly reducing process complexity and cost.

[0075] It should be understood that many other layers may also be present, such as spacer elements and / or other suitable components, which are omitted from the illustration for simplicity.

[0076] The foregoing description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Those skilled in the art will readily appreciate that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention are intended to be within the scope of protection of the present invention.

Claims

1. A method for manufacturing an RFLDMOS device, characterized in that: The following steps are involved: Step 1: providing a substrate, forming an epitaxial layer on the substrate, and growing a thick gate oxide layer above the epitaxial layer; Step 2: Photolithography to open the source region forming area, the gate forming area close to the source, and the drift region forming area close to the gate; Step 3: using a wet etching process to remove the thick gate oxide layer in the source region, the gate region near the source, and the drift region near the gate, and forming undercuts at both ends of the remaining thick gate oxide layer; Step 4: growing a thin gate oxide layer on the epitaxial layer in the source region, the gate region near the source, and the drift region near the gate, wherein the thin gate oxide layer and the thick gate oxide layer together constitute a stepped gate oxide layer; Step 5: depositing polysilicon and forming a gate in the gate forming area using a photolithography and etching process; Step 6: forming a body region and a drift region in the epitaxial layer; Step 7: forming gate sidewalls, forming a heavily doped region and a source region in the body region, and forming a drain region in the drift region; Step eight, forming metal silicide on the source region, the drain region and the gate; Step nine: depositing a dielectric layer, wherein the dielectric layer covers the body region, the drift region and the top of the gate; Step 10: depositing a Faraday shield layer on the dielectric layer; Step 11: Form a Faraday shield over a portion of the gate close to the drain region and over a portion of the drift region forming area close to the gate by using a photolithography and etching process.

2. The method for manufacturing the RFLDMOS device according to claim 1, wherein: In step 1, the substrate is N-type, or the substrate is P-type.

3. The method for manufacturing the RFLDMOS device according to claim 1, wherein: After the undercut is formed in step three, the shape of the thick gate oxide layer changes to two isosceles trapezoids spaced apart on the epitaxial layer.

4. The method for manufacturing the RFLDMOS device according to claim 1, wherein: The upper left corner of the gate described in step 5 is stepped.

5. The method for manufacturing the RFLDMOS device according to claim 1, wherein: The dielectric layer in step nine is a silicon oxide layer.

6. The method for manufacturing the RFLDMOS device according to claim 1, wherein: The material of the Faraday shielding layer in step 10 is tungsten silicon or titanium nitride.

7. The method for manufacturing the RFLDMOS device according to claim 1, wherein: The Faraday shield described in step 11 is a stepped type.

8. The method for manufacturing the RFLDMOS device according to claim 1, wherein: The method further includes: forming a sinker via, wherein the bottom of the sinker via is located at the substrate, and the sinker via passes through the body region and the epitaxial layer.

9. An RFLDMOS device formed by the manufacturing method of the RFLDMOS device according to any one of claims 1 to 8, characterized in that: include: substrate; an epitaxial layer located above the substrate; A drift region and a body region are provided in the epitaxial layer; a drain region is provided in the drift region, a heavily doped region and a source region are provided in the body region, and the heavily doped region is connected to the source region; a stepped gate oxide layer located above the epitaxial layer; A gate structure located on the surface of the epitaxial layer, the gate structure comprising the gate oxide layer, a gate and a gate sidewall; a metal silicide located above the source region, the drain region, and the gate; a dielectric layer covering the body region, the drift region and a top portion of the gate structure; a Faraday shield covering the dielectric layer and located above a portion of the gate close to the drain region and above a portion of the drift region close to the gate; as well as a sinker via, wherein the bottom of the sinker via is located in the substrate and passes through the body region and the epitaxial layer; The gate oxide layer in the gate structure has a slope under the gate, and the thickness of the gate oxide layer on the drain region side is thicker than that on the source region side; and the Faraday shield is a stepped type.

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