Tft substrate and method for manufacturing the same

Abstract

The embodiment of the present application provides a TFT substrate and a manufacturing method thereof. The TFT substrate provided by the embodiment of the present application is provided with a functional layer including a gate, a first light shielding area, a second light shielding area, a source contact area and a drain contact area, and the source is electrically connected with the source contact area through a source contact hole on the gate insulating layer, and the drain is electrically connected with the drain contact area through a drain contact hole on the gate insulating layer, so that the side surface of the active layer is shielded by the source and the drain, and the back surface of the active layer is shielded by the functional layer, that is to say, the side surface and the back surface of the active layer are protected in all directions, and the light generated in the active layer due to the light irradiation from the side surface and the back surface to the active layer is avoided, so that the illumination stability of the TFT device is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the display field, and particularly relates to a TFT substrate and a manufacturing method thereof. BACKGROUND

[0002] The active matrix driven LCD display technology utilizes the bipolar polarization characteristics of liquid crystal, controls the arrangement direction of liquid crystal molecules by applying an electric field, and realizes the switching function of the light path direction of the backlight source. Thin film transistors (TFT) are generally used to control the electric field in each pixel. The commonly used semiconductor materials in TFT include amorphous silicon, oxide and polycrystalline silicon, etc. The oxide semiconductor has a unique advantage in high-level display technologies such as large size, high resolution and high refresh rate due to its high mobility and relatively simple process flow.

[0003] In the prior art, the oxide TFT structure widely used in LCD is a back channel etching (BCE) structure. However, the TFT using oxide semiconductor as the active layer is sensitive to light and is prone to generate photo-generated carriers under light irradiation, which is not conducive to the light stability of the TFT device. SUMMARY

[0004] Embodiments of the present application provide a TFT substrate and a manufacturing method thereof. The side surface and the back surface of the active layer in the TFT substrate are provided with light shielding protection structures, which can avoid the light irradiation from the side surface and the back surface to the active layer to generate photo-generated carriers in the active layer, and improve the light stability of the TFT device.

[0005] In a first aspect, embodiments of the present application provide a TFT substrate, comprising:

[0006] a substrate;

[0007] a functional layer arranged on one side of the substrate, the functional layer comprising a gate, a first light shielding area, a second light shielding area, a source contact area and a drain contact area, wherein the first light shielding area and the second light shielding area are respectively arranged on two sides of the gate, the source contact area is arranged on a side of the first light shielding area away from the gate, the drain contact area is arranged on a side of the second light shielding area away from the gate, the gate, the source contact area and the drain contact area are all conductive materials, and the first light shielding area and the second light shielding area are all insulating materials;

[0008] a gate insulating layer arranged on a side of the functional layer away from the substrate, the gate insulating layer being provided with a source contact hole and a drain contact hole;

[0009] an active layer arranged on a side of the gate insulating layer away from the functional layer;

[0010] A source-drain layer is disposed on the side of the active layer away from the gate insulating layer, and the source-drain layer includes a source and a drain. The source is electrically connected to the source contact region through the source contact hole, and the drain is electrically connected to the drain contact region through the drain contact hole.

[0011] In some embodiments, the material of the gate, the material of the source contact region, and the material of the drain contact region are all metal, and the material of the first light shielding region and the material of the second light shielding region are both metal oxides.

[0012] In some embodiments, the material of the gate, the material of the source contact region, and the material of the drain contact region are all a first metal, and the material of the first light shielding region and the material of the second light shielding region are both oxides of the first metal.

[0013] In some embodiments, the first metal includes one or more of molybdenum, aluminum, copper, and titanium.

[0014] In some embodiments, the TFT substrate further includes a protective layer covering the source, the drain, and the side of the active layer away from the gate insulating layer.

[0015] In some embodiments, the material of the active layer is an oxide semiconductor.

[0016] In some embodiments, the oxide semiconductor includes one or more of indium gallium zinc oxide, indium tin zinc oxide, indium gallium zinc tin oxide, Nd-doped indium oxide oxide, and Sc-doped indium oxide.

[0017] In a second aspect, embodiments of the present application provide a manufacturing method of a TFT substrate, including:

[0018] providing a substrate, depositing a metal layer on the substrate, and performing a patterning process on the metal layer to obtain a functional layer;

[0019] defining a gate, a first light shielding region, a second light shielding region, a source contact region, and a drain contact region on the functional layer, wherein the first light shielding region and the second light shielding region are respectively located on two sides of the gate, the source contact region is disposed on the side of the first light shielding region away from the gate, and the drain contact region is disposed on the side of the second light shielding region away from the gate; and performing an oxidation process on the first light shielding region and the second light shielding region to convert the material of the first light shielding region and the second light shielding region from a conductive metal material to a non-conductive metal oxide.

[0020] disposing a gate insulating layer on the side of the functional layer away from the substrate, and forming a source contact hole and a drain contact hole on the gate insulating layer;

[0021] A source-drain layer is arranged on a side of the active layer away from the gate insulating layer, the source-drain layer comprising a source and a drain, the source being electrically connected to the source contact region through the source contact hole, and the drain being electrically connected to the drain contact region through the drain contact hole.

[0022] A source-drain layer is arranged on a side of the active layer away from the gate insulating layer, the source-drain layer comprising a source and a drain, the source being electrically connected to the source contact region through the source contact hole, and the drain being electrically connected to the drain contact region through the drain contact hole.

[0023] In some embodiments, the method for manufacturing the TFT substrate further comprises: forming a protective layer on a side of the source, the drain and the active layer away from the gate insulating layer, the protective layer covering the source, the drain and the active layer.

[0024] The TFT substrate provided by the embodiments of the present application has the following advantages: the functional layer comprises a gate, a first light shielding region, a second light shielding region, a source contact region and a drain contact region, and the source is electrically connected to the source contact region through the source contact hole on the gate insulating layer, and the drain is electrically connected to the drain contact region through the drain contact hole on the gate insulating layer, so that the side surface of the active layer is shielded by the source and the drain, and the back surface of the active layer is shielded by the functional layer, that is, the side surface and the back surface of the active layer are protected from light in all directions, and the generation of photo-generated carriers in the active layer due to the irradiation of light from the side surface and the back surface is avoided, thereby improving the light stability of the TFT device. BRIEF DESCRIPTION OF DRAWINGS

[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed in the embodiment description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0026] Figure 1 The structure schematic diagram of the TFT substrate provided by the embodiments of the present application.

[0027] Figure 2 The flowchart of the manufacturing method of the TFT substrate provided by the embodiments of the present application.

[0028] Figure 3 The schematic diagram of step S100 of the manufacturing method of the TFT substrate provided by the embodiments of the present application.

[0029] Figure 4 The schematic diagram of step S200 of the manufacturing method of the TFT substrate provided by the embodiments of the present application.

[0030] Figure 5 The schematic diagram of step S300 of the manufacturing method of the TFT substrate provided by the embodiments of the present application.

[0031] Figure 6 A schematic diagram of step S400 of the method for manufacturing the TFT substrate provided in the embodiments of the present application.

[0032] Figure 7 A schematic diagram of step S500 of the method for manufacturing the TFT substrate provided in the embodiments of the present application. DETAILED DESCRIPTION

[0033] The technical solutions in the embodiments of the present application will be clearly and completely described in connection with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all the other embodiments obtained by a person skilled in the art without creative work fall within the protection scope of the present application.

[0034] Please refer to Figure 1 , Figure 1 A schematic diagram of the structure of the TFT substrate provided in the embodiments of the present application, the embodiments of the present application provide a TFT substrate 100, which comprises a substrate 10, a functional layer 20, a gate insulating layer 30, an active layer 40 and a source-drain layer 50.

[0035] The functional layer 20 is arranged on one side of the substrate 10, and the functional layer 20 comprises a gate 21, a first light shielding area 22, a second light shielding area 23, a source contact area 24 and a drain contact area 25. The first light shielding area 22 and the second light shielding area 23 are respectively arranged on two sides of the gate 21. The source contact area 24 is arranged on a side of the first light shielding area 22 away from the gate 21. The drain contact area 25 is arranged on a side of the second light shielding area 23 away from the gate 21. The gate 21, the source contact area 24 and the drain contact area 25 are all conductive materials, and the first light shielding area 22 and the second light shielding area 23 are both insulating materials.

[0036] The gate insulating layer 30 is arranged on a side of the functional layer 20 away from the substrate 10, and the gate insulating layer 30 is provided with a source contact hole 31 and a drain contact hole 32.

[0037] The active layer 40 is arranged on a side of the gate insulating layer 30 away from the functional layer 20.

[0038] The source-drain layer 50 is arranged on a side of the active layer 40 away from the gate insulating layer 30, and the source-drain layer 50 comprises a source 51 and a drain 52. The source 51 is electrically connected with the source contact area 24 through the source contact hole 31. The drain 52 is electrically connected with the drain contact area 25 through the drain contact hole 32.

[0039] It can be understood that the TFT substrate 100 provided by the embodiment of the present application, by setting the functional layer 20 to include the gate 21, the first light shielding area 22, the second light shielding area 23, the source contact area 24, and the drain contact area 25, and setting the source 51 to be electrically connected to the source contact area 24 through the source contact hole 31 on the gate insulating layer 30 and the drain 52 to be electrically connected to the drain contact area 25 through the drain contact hole 32 on the gate insulating layer 30, the side surface of the active layer 40 is shielded by the source 51 and the drain 52, and the back surface of the active layer 40 is shielded by the functional layer 20, that is, the side surface and the back surface of the active layer 40 are comprehensively shielded from light, so that the photo-generated carriers generated in the active layer 40 due to the irradiation of light from the side surface and the back surface are avoided, and the light stability of the TFT device is improved.

[0040] In the prior art, the oxide TFT with the BCE structure widely uses IGZO as the active layer 40. The IGZO mainly conducts electricity through the oxygen vacancies generated by the defect state. By giving a certain energy to the bond between the metal and oxygen (M-O), the oxygen (O) is released, so the TFT using IGZO as the active layer 40 is more sensitive to light, and photo-generated carriers are easily generated under light, which is not conducive to the light stability of the TFT device. By comprehensively shielding the side surface and the back surface of the active layer 40 from light, the light stability of the TFT device can be significantly improved.

[0041] Exemplarily, the material of the gate 21, the material of the source contact area 24, and the material of the drain contact area 25 are all metals, and the material of the first light shielding area 22 and the material of the second light shielding area 23 are both metal oxides.

[0042] Exemplarily, the material of the gate 21, the material of the source contact area 24, and the material of the drain contact area 25 are all first metals, and the material of the first light shielding area 22 and the material of the second light shielding area 23 are both oxides of the first metals. Exemplarily, the first metal includes one or more of molybdenum (Mo), aluminum (Al), copper (Cu), and titanium (Ti). In the embodiment of the present application, multiple means two or more than two, for example, three, four, five, etc.

[0043] Please refer to Figure 1 The TFT substrate 100 can further include a protective layer 60, and the protective layer 60 covers the source 51, the drain 52, and the side of the active layer 40 away from the gate insulating layer 30.

[0044] Exemplarily, the material of the protective layer 60 can include one or more of silicon oxide (SiOx) and silicon nitride (SiNx).

[0045] For example, the active layer 40 can be made of an oxide semiconductor, such as indium gallium zinc oxide (IGZO), indium tin zinc oxide (ITZO), indium gallium zinc tin oxide (IGZTO), Nd-doped indium oxide (NdInOx), Sc-doped indium oxide (ScInOx), etc.

[0046] Please combine Figure 1 The source electrode 51 and the drain electrode 52 are respectively connected to both sides of the active layer 40, that is, both the source electrode 51 and the drain electrode 52 are electrically connected to the active layer 40.

[0047] Exemplarily, the TFT substrate 100 may further include a planarization layer, a common electrode, an insulating layer, and a pixel electrode sequentially stacked on the protective layer 60. The protective layer 60, planarization layer, and insulating layer are provided with overlap holes, allowing the pixel electrode to be electrically connected to the source electrode 51 or the drain electrode 52 through the overlap holes. Exemplarily, the material of the planarization layer may include soluble polytetrafluoroethylene (PFA), the material of the common electrode and the pixel electrode may both be indium tin oxide (ITO), and the material of the insulating layer may be silicon nitride (SiN). x ).

[0048] Please see Figure 2 , Figure 2 This is a flowchart illustrating a method for fabricating a TFT substrate according to an embodiment of this application. This application provides a method for fabricating a TFT substrate, which can fabricate the TFT substrate 100 in any of the above embodiments. The method includes:

[0049] S100, please refer to Figure 3 A substrate 10 is provided, a metal layer is deposited on the substrate 10, and the metal layer is patterned to obtain a functional layer 20.

[0050] For example, the substrate 10 is a glass substrate.

[0051] For example, the material of the metal layer may include one or more of molybdenum (Mo), aluminum (Al), copper (Cu), and titanium (Ti).

[0052] S200, please refer to Figure 4 A gate 21, a first light-shielding region 22, a second light-shielding region 23, a source contact region 24, and a drain contact region 25 are defined on the functional layer 20. The first light-shielding region 22 and the second light-shielding region 23 are located on opposite sides of the gate 21, the source contact region 24 is located on the side of the first light-shielding region 22 away from the gate 21, and the drain contact region 25 is located on the side of the second light-shielding region 23 away from the gate 21. The first light-shielding region 22 and the second light-shielding region 23 are oxidized to change the material of the first light-shielding region 22 and the second light-shielding region 23 from a conductive metal material to a non-conductive metal oxide.

[0053] S300, please refer to Figure 5 A gate insulating layer 30 is disposed on the side of the functional layer 20 away from the substrate 10, and a source contact hole 31 and a drain contact hole 32 are formed on the gate insulating layer 30.

[0054] For example, the gate insulating layer 30 can be prepared by chemical vapor deposition (CVD), and the gate insulating layer 30 can be silicon oxide (SiO2). x ) layer or silicon nitride (SiN) x The layer can also be silicon dioxide (SiO2). x ) layer and silicon nitride (SiN) x ()Layered structure.

[0055] S400, please refer to Figure 6 An active layer 40 is disposed on the side of the gate insulating layer 30 away from the functional layer 20.

[0056] For example, the active layer 40 can be deposited using physical vapor deposition (PVD) and then annealed. For example, the material of the active layer 40 can be an oxide semiconductor, such as indium gallium zinc oxide (IGZO), indium tin zinc oxide (ITZO), indium gallium zinc tin oxide (IGZTO), or Nd-doped indium oxide (NdInO). x Indium oxide doped with Sc (ScInO) x )wait.

[0057] S500, please refer to Figure 7 A source-drain layer 50 is provided on the side of the active layer 40 away from the gate insulating layer 30. The source-drain layer 50 includes a source 51 and a drain 52. The source 51 is electrically connected to the source contact region 24 through the source contact hole 31, and the drain 52 is electrically connected to the drain contact region 25 through the drain contact hole 32.

[0058] For example, the material of the source / drain layer 50 may include one or more of molybdenum (Mo), aluminum (Al), copper (Cu), and titanium (Ti).

[0059] Following step S500, the method for fabricating a TFT substrate provided in this application embodiment may further include:

[0060] S600, please refer to Figure 1 A protective layer 60 is formed on the side of the source 51, drain 52 and active layer 40 away from the gate insulating layer 30, and the protective layer 60 covers the source 51, drain 52 and active layer 40.

[0061] For example, after S600, the method for manufacturing a TFT substrate provided in this application embodiment may further include:

[0062] S700, a planarization layer, a common electrode, and an insulating layer are sequentially stacked on the protective layer 60, and overlapping holes are provided on the protective layer 60, the planarization layer, and the insulating layer;

[0063] S800, a pixel electrode is provided on the side of the insulating layer away from the common electrode, so that the pixel electrode is electrically connected to the source electrode 51 or the drain electrode 52 through the overlap hole.

[0064] For example, the planarization layer may be made of soluble polytetrafluoroethylene (PFA), the common electrode and the pixel electrode may both be made of indium tin oxide (ITO), and the insulating layer may be made of silicon nitride (SiN). x ).

[0065] The TFT substrate and its fabrication method provided in the embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only for the purpose of helping to understand this application. Furthermore, those skilled in the art will recognize that, based on the ideas of this application, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A TFT substrate, characterized by, The application relates to a thin film transistor (TFT) substrate. The substrate comprises a functional layer, a gate, a first light shielding area, a second light shielding area, a source contact area and a drain contact area, wherein the first light shielding area and the second light shielding area are respectively located on two sides of the gate, the source contact area is arranged on a side of the first light shielding area away from the gate, the drain contact area is arranged on a side of the second light shielding area away from the gate, the gate, the source contact area and the drain contact area are all conductive materials, and the first light shielding area and the second light shielding area are all insulating materials. A gate insulating layer is arranged on a side of the functional layer away from the substrate, and a source contact hole and a drain contact hole are arranged on the gate insulating layer. An active layer is arranged on a side of the gate insulating layer away from the functional layer. A source-drain layer is arranged on a side of the active layer away from the gate insulating layer, and the source-drain layer comprises a source and a drain, the source is electrically connected with the source contact area through the source contact hole, the drain is electrically connected with the drain contact area through the drain contact hole, a part of the source covers a sidewall of one side of the active layer, and a part of the drain covers a sidewall of the other side of the active layer. The materials of the gate, the source contact area and the drain contact area are all metals, and the materials of the first light shielding area and the second light shielding area are all metal oxides. The materials of the gate, the source contact area and the drain contact area are all first metals, and the materials of the first light shielding area and the second light shielding area are all oxides of the first metals.

2. The TFT substrate according to claim 1, characterized by The first metal comprises one or more of molybdenum, aluminum, copper and titanium.

3. The TFT substrate according to claim 2, characterized by The TFT substrate further comprises a protective layer covering the source, the drain and a side of the active layer away from the gate insulating layer.

4. The TFT substrate according to claim 1, wherein The material of the active layer is an oxide semiconductor.

5. The TFT substrate according to claim 1, wherein The oxide semiconductor comprises one or more of indium gallium zinc oxide, indium tin zinc oxide, indium gallium zinc tin oxide, Nd-doped indium oxide and Sc-doped indium oxide.

6. The TFT substrate according to claim 5, wherein The application relates to a thin film transistor (TFT) substrate.

7. A method for manufacturing a TFT substrate, comprising the steps of: The substrate comprises a functional layer, a gate, a first light shielding area, a second light shielding area, a source contact area and a drain contact area, wherein the first light shielding area and the second light shielding area are respectively located on two sides of the gate, the source contact area is arranged on a side of the first light shielding area away from the gate, the drain contact area is arranged on a side of the second light shielding area away from the gate, the gate, the source contact area and the drain contact area are all conductive materials, and the first light shielding area and the second light shielding area are all insulating materials. A gate insulating layer is arranged on a side of the functional layer away from the substrate, and a source contact hole and a drain contact hole are arranged on the gate insulating layer. An active layer is arranged on a side of the gate insulating layer away from the functional layer. A source-drain layer is arranged on a side of the active layer away from the gate insulating layer, and the source-drain layer comprises a source and a drain, the source is electrically connected with the source contact area through the source contact hole, the drain is electrically connected with the drain contact area through the drain contact hole, a part of the source covers a sidewall of one side of the active layer, and a part of the drain covers a sidewall of the other side of the active layer. ​ A source-drain layer is arranged on a side of the active layer away from the gate insulating layer, and the source-drain layer comprises a source and a drain, the source is electrically connected with the source contact area through the source contact hole, and the drain is electrically connected with the drain contact area through the drain contact hole.

8. The method of manufacturing a TFT substrate according to claim 7, wherein The material of the metal layer comprises one or more of molybdenum, aluminum, copper and titanium.

9. The method of manufacturing a TFT substrate according to claim 7, wherein The manufacturing method further comprises: forming a protective layer on a side of the source, the drain and the active layer away from the gate insulating layer, and the protective layer covers the source, the drain and the active layer.

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