Message transmission method, device and equipment and computer readable storage medium

Abstract

The application discloses a message transmission method, device and equipment and a computer readable storage medium. The message transmission method is applied to a relay protection test device. The relay protection test device comprises a microprocessor and SV sending logic. The SV sending logic comprises data control logic and data sending logic. The method comprises the following steps: the SV sending logic reads a command issued by the microprocessor to obtain a command queue; a target port is acquired based on the command queue; a target message packaged by the microprocessor is carried to a sampling value message buffer corresponding to the target port in the data control logic through an AXI data bus; a message sending mode is acquired based on the command queue; and data sending logic corresponding to the target port transmits the target message to a preset Ethernet interface based on the sending mode. The command queue is written into a corresponding register through a control bus, and the SV sampling value message sending operation is automatically completed by the underlying logic. The time precision of message sending is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of microprocessors, in particular to a message transmission method, device, equipment and computer readable storage medium. BACKGROUND

[0002] With the continuous progress of science and technology, digital microcomputer technology has been rapidly developed. In the field of digital microcomputers, for example, in the existing digital microcomputer relay protection device, the transmission of messages is directly controlled by the microprocessor in the digital microcomputer relay protection device. However, due to the processing capacity and interrupt response speed of the microprocessor, and the microprocessor needs to participate in the packaging processing and sending control of the message at the same time, the number of channels or configuration blocks that can be used for transmitting messages is limited. Therefore, there is a large error in the time accuracy of message transmission. How to improve the time accuracy of message transmission has become a technical problem to be solved. SUMMARY

[0003] The main purpose of the present application is to provide a message transmission method, device, equipment and computer readable storage medium, which aims to solve the technical problem of how to improve the time accuracy of message transmission.

[0004] In addition, in order to achieve the above purpose, the present application also provides a message transmission method, which is applied to a relay protection test device, the relay protection test device comprising a microprocessor and an SV sending logic, the SV sending logic comprising a data control logic and a data sending logic, the message transmission method comprising the following steps:

[0005] The SV sending logic reads the command issued by the microprocessor to obtain a command queue;

[0006] Based on the command queue, a target port is obtained, and the target message packaged by the microprocessor is carried to the sampling value message buffer corresponding to the target port in the data control logic through the AXI data bus;

[0007] Based on the command queue, a message sending mode is obtained, and the data sending logic corresponding to the target port transmits the target message to a preset Ethernet interface based on the sending mode.

[0008] Optionally, before the step of reading the command issued by the microprocessor to obtain the command queue, the method comprises:

[0009] The commands issued by the preset control command bus are recombined according to a preset format to generate a control command string, and the control command string is written into a command queue register by a command writing control logic;

[0010] The command queue register is read based on corresponding command read control logic of the command write control logic, and the read command is taken as the command issued by the microprocessor.

[0011] Optionally, the data control logic is composed of a data receiving module, a packet port allocation module, a packet cache module, a port sending command list, an instruction control module and a command port allocation module, and the step of obtaining the target port based on the command queue comprises:

[0012] The control command, the packet length, the delay control and the port control command constituting the command queue are obtained, wherein the control command controls the instruction control module, and the port control command controls the packet port allocation module.

[0013] The command port allocation module determines the target port according to the port control command.

[0014] Optionally, the data receiving module carries data from the memory through an AXI data bus based on the instruction of the instruction control module, and converts the parallel bus format data into a data stream.

[0015] Optionally, the sending mode is an equal interval sending, and the step of delivering the target packet to a preset Ethernet interface by the data sending logic corresponding to the target port based on the sending mode comprises:

[0016] A global counter taking an Ethernet sending clock as a counting pulse is defined as a first global counter, wherein the first global counter is counted by the Ethernet sending clock and cleared by a synchronous sampling pulse.

[0017] Based on the first global counter, an equal interval pulse counting value for controlling the sending delay of the target packet is maintained.

[0018] Optionally, the sending mode is a playback sending, and the step of delivering the target packet to a preset Ethernet interface by the data sending logic corresponding to the target port based on the sending mode comprises:

[0019] A microsecond counter is defined as a second global counter, and the first packet is the last packet of the target packet.

[0020] Based on the sending delay and the sending time of the first packet, the delivery of the target packet is controlled.

[0021] In addition, to achieve the above-mentioned purpose, the application further provides a packet transmission device, which comprises:

[0022] A command queue obtaining module is configured to read the command issued by the microprocessor by the SV sending logic, and obtain a command queue.

[0023] a packet carrying module, configured to obtain a target port based on the command queue, and carry a target packet packaged by the microprocessor to a sample value packet buffer corresponding to the target port in the data control logic through an AXI data bus;

[0024] a packet transmission module, configured to obtain a packet transmission mode based on the command queue, and transmit the target packet to a preset Ethernet interface based on the transmission mode by data transmission logic corresponding to the target port.

[0025] In addition, to achieve the above object, the present application also provides a packet transmission device, which comprises a memory, a processor and a packet transmission program stored in the memory and executable on the processor, and the packet transmission program implements the steps of the packet transmission method when executed by the processor.

[0026] In addition, to achieve the above object, the present application also provides a computer readable storage medium, which stores a packet transmission program, and the packet transmission program implements the steps of the packet transmission method when executed by a processor.

[0027] The present application provides a packet transmission method, system, device, equipment and computer readable storage medium. In the present application, the packet transmission method is applied to a relay protection testing device, and the relay protection testing device comprises a microprocessor and SV (Sampled Value, analog value) transmission logic. First, the SV transmission logic comprises data control logic and data transmission logic. The SV transmission logic reads the command issued by the microprocessor to obtain a command queue. Then, a target port is obtained based on the command queue, and a target packet packaged by the microprocessor is carried to a sample value packet buffer corresponding to the target port in the data control logic through an AXI data bus. Finally, a packet transmission mode is obtained based on the command queue, and the target packet is transmitted to a preset Ethernet interface based on the transmission mode by data transmission logic corresponding to the target port. In the present application, the command queue is written into a corresponding register through a control bus, and then the command queue is read. The SV sample value packet transmission operation is automatically completed by the underlying logic. Thus, the microcontroller time is saved, and the time accuracy of packet transmission is improved. BRIEF DESCRIPTION OF DRAWINGS

[0028] Figure 1 A hardware structure schematic diagram of an embodiment of the packet transmission device provided by the present application is provided.

[0029] Figure 2 A flowchart of the first embodiment of the packet transmission method of the present application is provided.

[0030] Figure 3The figure is a functional structure diagram of a relay protection test device in the first embodiment of the message transmission method of the present application.

[0031] Figure 4 The figure is a functional structure diagram of SV sending logic in the first embodiment of the message transmission method of the present application.

[0032] Figure 5 The figure is a message composition structure diagram in the first embodiment of the message transmission method of the present application.

[0033] Figure 6 The figure is a flow diagram of the second embodiment of the message transmission method of the present application.

[0034] Figure 7 The figure is a diagram of an equal-interval sending control state machine in the second embodiment of the message transmission method of the present application.

[0035] Figure 8 The figure is a diagram of a playback mode state machine in the second embodiment of the message transmission method of the present application.

[0036] Figure 9 The figure is a functional module diagram of an embodiment of the message transmission device of the present application.

[0037] The implementation, functional features and advantages of the present application will be further described with reference to the accompanying drawings in conjunction with the embodiments. DETAILED DESCRIPTION

[0038] It should be understood that the specific embodiments described herein merely serve to explain the present application and do not limit the present application.

[0039] In the following description, the suffixes such as "module", "part", or "unit" used for an element are merely used to facilitate explanation of the present application, and have no specific meaning by itself. Thus, "module", "part", or "unit" can be mixedly used.

[0040] The message transmission terminal (also called terminal, device, or terminal device) of the embodiments of the present application can be a relay protection test device including a microprocessor and SV sending logic, and a portable terminal device having a code compiling function.

[0041] As Figure 1As shown, the terminal can include a processor 1001, such as a CPU (Central Processing Unit), a communication bus 1002, and a memory 1003. The communication bus 1002 is used to realize the connection communication between the components. The memory 1003 can be a high-speed RAM memory or a stable memory (non-volatile memory), such as a disk memory. The memory 1003 can also be a storage device independent of the aforementioned processor 1001.

[0042] Those skilled in the art can understand that Figure 1 The terminal structure shown in the figure does not constitute a limitation on the terminal, and can include more or fewer components than the figure, or combine certain components, or different component arrangements.

[0043] As Figure 1 As shown, the memory 1003 as a computer storage medium can include a packet transmission program.

[0044] In Figure 1 In the terminal shown, the processor 1001 can be used to call the packet transmission program stored in the memory 1003, and perform the following operations:

[0045] The SV sends logic reads the command queue of the command issued by the microprocessor;

[0046] Based on the command queue, the target port is obtained, and the target packet packaged by the microprocessor is carried to the sampling value packet cache corresponding to the target port in the data control logic through the AXI data bus;

[0047] Based on the command queue, the packet transmission mode is obtained, and the data transmission logic corresponding to the target port transmits the target packet to the preset Ethernet interface based on the transmission mode.

[0048] Further, the processor 1001 can be used to call the sample evaluation program stored in the memory 1003, and further perform the following operations:

[0049] According to a preset format, the command issued by the preset control command bus is recombined to generate a control command string, and the control command string is written into the command queue register by the command write control logic;

[0050] Based on the command read control logic corresponding to the command write control logic, the command queue register is read, and the command read is taken as the command issued by the microprocessor.

[0051] Further, the processor 1001 can be configured to invoke a sample evaluation program stored in the memory 1003, and further perform the following operations:

[0052] The control command, the message length, the delay control and the port control command constituting the command queue are obtained, wherein the control command controls the instruction control module, and the port control command controls the message port distribution module.

[0053] The command port distribution module determines the target port according to the port control command.

[0054] Further, the processor 1001 can be configured to invoke a sample evaluation program stored in the memory 1003, and further perform the following operations:

[0055] The data receiving module carries data from the memory through the AXI data bus based on the instruction of the instruction control module, and converts the parallel bus format data into a data stream.

[0056] Further, the processor 1001 can be configured to invoke a sample evaluation program stored in the memory 1003, and further perform the following operations:

[0057] A global counter taking the Ethernet transmission clock as a counting pulse is defined as a first global counter, wherein the first global counter is counted by the Ethernet transmission clock and cleared by a synchronous sampling pulse.

[0058] Based on the first global counter, an equal-interval pulse count value for controlling the transmission delay of the target message is maintained.

[0059] Further, the processor 1001 can be configured to invoke a sample evaluation program stored in the memory 1003, and further perform the following operations:

[0060] A microsecond counter is defined as a second global counter, and the first message is the last message of the target message.

[0061] Based on the transmission delay and the transmission time of the first message, the transmission of the target message is controlled.

[0062] Based on the above device hardware structure, an embodiment of the packet transmission method of the present application is proposed.

[0063] Reference Figure 2 In the first embodiment of the packet transmission method of the present application, the packet transmission method comprises:

[0064] In step S10, the SV transmission logic reads the command issued by the microprocessor to obtain a command queue.

[0065] It should be noted that the packet transmission method provided in the embodiment is applied to a relay protection test device, and the relay protection test device comprises a microprocessor and SV sending logic, and the SV sending logic comprises data control logic and data sending logic.

[0066] As shown in the left half of FIG. 1, Figure 3 The relay protection test device comprises a microprocessor, SV sending logic, GOOSE (Generic Object Oriented Substation Event) / PTP (Precision Time Protocol) sending logic, channel switching logic, an Ethernet MAC (Media Access Control Address), and an Ethernet PHY (Physical). The SV sampled value packet needs to be sent at a specific time interval. At present, the common method is to control the packet sending through the real-time unit of the microcontroller, but the precision of the time interval can only reach the order of 10 microseconds. The microprocessor itself has a limited number of network interfaces. At present, the common method is to use a programmable device to realize the expansion function of the Ethernet interface, but the packet packaging and sending management are still completed by the microprocessor. At the same time, the microprocessor not only participates in the packet packaging process, but also participates in the packet sending control. Therefore, the number of channels / configured blocks that can be sent simultaneously is limited, which leads to low time precision of the existing packet transmission. The packet transmission method disclosed in the present application is to solve the above technical problems. As shown in the right half of FIG. 1, Figure 4 As shown in the left half of FIG. 1, Figure 4 The left half of FIG. 1 is a functional module diagram of the data control logic in the embodiment, Figure 4 The right half of FIG. 1 is a functional module diagram of the data sending logic in the embodiment.

[0067] In step S20, the target port is obtained based on the command queue, and the microprocessor packaged target packet is carried to the sampled value packet buffer corresponding to the target port in the data control logic through the AXI data bus.

[0068] As shown in the left half of FIG. 1, Figure 4 The SV sending logic is divided into two parts, data control logic and data sending logic. The data control logic is shared by multiple ports, and each port exclusively occupies a data sending logic. The data sending logic is connected with the microprocessor through a sampled value sending command and an AXI (Advanced eXtensible Interface) data bus interface, Figure 4 The SOC (System on Chip) in FIG. 1 is the microprocessor in the embodiment, Figure 4The "sample value command" in the "sample value command port allocation" is a register interface, and the "sample value command port allocation" is a register interface allocation, which mainly realizes reading of the command issued by the microcontroller. The read command includes an operation command for carrying data in the microprocessor memory, a command for selecting a message channel, a command for delay control, and a port selection command. The AXI data bus interface is a data bus channel between the microcontroller and the data control interface, which can be understood as a high-speed computer bus. The data control logic mainly completes carrying of the data block (i.e., the target message in the embodiment) packaged by the microprocessor to the sample value message cache RAM (Random Access Memory) through the sample value sending command. The data control logic is composed of a DMA (Direct Memory Access) data receiving module, a sample value message port allocation, a sample value message cache, a port sending command list, a DMA instruction control module, and a sample value command port allocation. The port sending command list receives the command of the control command bus, and recombines the command of the control command bus into a control command string according to a specific format. The command is written into the command queue register by the command writing control logic, and the corresponding command reading control logic reads the command in the command queue register. Then, the read command controls the work of the other logic modules.

[0069] In step S30, a message sending mode is obtained based on the command queue. The data sending logic corresponding to the target port transmits the target message to a preset Ethernet interface based on the sending mode.

[0070] It should be noted that the command queue in the command queue register is as shown in Figure 5 The command queue is composed of a DMA control command, a message length, a delay control, a port control command (i.e., the port control in Figure 5 ), and a part. The DMA control command controls the DMA instruction control module in Figure 4 The port control command controls the sample value message port allocation in Figure 4 The sample value command port allocation allocates the current command to the data sending logic of the port corresponding to the port control command according to the port control command (as known from the above content, each port exclusively occupies one data sending logic). Figure 4The main function of the DMA data receiving module in the application is to carry data (target message) from the microprocessor memory through the AXI high-speed bus between the microcontroller and the data control logic, and convert the parallel bus format data into a data stream. The DMA data receiving module operates according to the instruction of the DMA instruction control module. The sample value message port distribution is distributed according to the current instruction port number in the port sending command list, and the received data stream is distributed to the sample value message buffer corresponding to the current instruction port. Similarly, the sample value command port distribution has a similar effect, but the sample value command port distribution is to distribute the sending command in the command queue, that is, to transfer the message length and delay control to the corresponding data sending logic. The advantage of the data control logic is that the microprocessor does not need to intervene in the specific details of the message sending, only needs to put the prepared message data into the specified memory space, and write the command queue into the corresponding register through the control bus, and then read the command queue by the port sending command list module. The bottom logic will automatically complete the SV sample value message sending operation. Thus, the microcontroller time is saved, and the efficiency of message sending is improved.

[0071] Further, in a possible embodiment, the step S10, the SV sending logic reads the command issued by the microprocessor to obtain the command queue, and the previous steps include:

[0072] Step a1, recombine the command issued by the preset control command bus according to the preset format to generate a control command string, and write the control command string into the command queue register by the command write control logic;

[0073] Step a2, based on the corresponding command reading control logic of the command write control logic, read the command queue register, and take the read command as the command issued by the microprocessor.

[0074] It should be noted that, Figure 4 The port sending command list in the application is the command received by the control command bus (that is, the command issued by the preset control command bus in the embodiment), and the command issued by the preset control command bus is recombined according to a specific format (that is, the preset format in the embodiment) to obtain a control command string, and then the control command string is written into the command queue register by the command write control. The corresponding command reading control reads the command in the command queue register, and then controls the work of the remaining functional modules in the data control logic through the read command. Figure 4

[0075] ​Further, in one possible embodiment, the data control logic is composed of a data receiving module, a packet port allocation module, a packet buffer module, a port sending command list, an instruction control module and a command port allocation module. The step S20 of obtaining the target port based on the command queue includes the following steps:

[0076] Obtaining the control command, the packet length, the delay control and the port control command constituting the command queue, wherein the control command controls the instruction control module, and the port control command controls the packet port allocation module.

[0077] The command port allocation module determines the target port according to the port control command.

[0078] The data receiving module carries data from the memory through the AXI data bus based on the instruction of the instruction control module, and converts the parallel bus format data into a data stream.

[0079] It should be noted that the command queue is composed of a DMA control command, a packet length, a delay control, a port control command (i.e. Figure 5 port control) and part of it. The DMA control command controls the DMA instruction control module in Figure 4 , the port control command controls the sampling value packet port allocation in Figure 4 , and the sampling value command port allocation (i.e. the command port allocation module in this embodiment) allocates the current command to the data sending logic of the port corresponding to the port control command according to the port control command (as can be known from the above, each port exclusively occupies one data sending logic). Figure 4 The main function of the DMA data receiving module in

[0080] In the embodiment, the packet transmission method is applied to a relay protection test device, the relay protection test device comprises a microprocessor and SV (Sampled Value, analog value) sending logic, first, the SV sending logic comprises data control logic and data sending logic, the SV sending logic reads a command issued by the microprocessor to obtain a command queue, then, a target port is obtained based on the command queue, a target packet packaged by the microprocessor is carried to a sampled value packet buffer corresponding to the target port in the data control logic through an AXI data bus, finally, a packet sending mode is obtained based on the command queue, and data sending logic corresponding to the target port transmits the target packet to a preset Ethernet interface based on the sending mode, the command queue is written into a corresponding register through a control bus, then the command queue is read, and the SV sampled value packet sending operation is automatically completed by the underlying logic, so that the microcontroller time is saved, and the time precision of packet sending is improved.

[0081] Further, with reference to Figure 3 In the second embodiment of the packet transmission method, the packet transmission method comprises:

[0082] The embodiment is a step of detailing step S30 in the first embodiment, the sending mode is equal-interval sending, and the embodiment is different from the above-mentioned embodiments of the application in that:

[0083] Step A1, defining a global counter taking an Ethernet sending clock as a counting pulse as a first global counter, wherein the first global counter is counted through the Ethernet sending clock and cleared through a synchronous sampling pulse;

[0084] Step A2, maintaining an equal-interval pulse count value for controlling a sending delay of the target packet based on the first global counter.

[0085] The data sending logic mainly transmits the packet in the sampled value packet buffer to a channel of the corresponding Ethernet sending control logic (i.e. Figure 4 Figure 4 ​The message sending mode is divided into equal interval sending control and playback mode sending control. The equal interval sending control and the playback mode sending control are switched through a message interface and a message sending gate according to a sending control instruction. The equal interval sending is mainly used for standard SV message sending, and the playback mode can be used for SV fault message playback. The message sending part includes two global counters. One is a global counter taking an Ethernet sending clock as a counting pulse. The counter is counted by the Ethernet sending clock and is cleared by a synchronous sampling pulse. The main purpose is to maintain an equal interval pulse count value, which is used for message sending delay control (tfrq_puls_cnt). The other global counter is a us (microsecond counter). The Ethernet message sending control time is in units of microseconds. The purpose of maintaining the counter is to control the playback mode message sending.

[0086] As shown in Figure 7 When the state machine starts running, when an equal interval pulse for controlling a sampling value is arrived (SYNC_PULS), it is firstly judged whether data is ready (DAT_RDY). If the data is ready, it is judged whether it is a current time slice (CUR_SLOT). If it is not, it returns to an idle mode and waits. If it is, it further performs a delay control operation. When the delay reaches, sending is started. The basis for the delay judgment is whether the delay setting is less than a current tfrq_puls_cnt value. The CUR_SLOT mentioned in the state machine is generated by frequency division of the SYNC_PULS, so that the CUR_SLOT changes from high to low or from low to high when the rising edge of the SYNC_PULS arrives. The variable is used as a global variable to judge whether the current sending data frame belongs to a SYNC_PULS period.

[0087] Further, in a feasible embodiment, the step S30, the data sending logic corresponding to the target port delivers the target message to a preset Ethernet interface based on the sending mode. The detailed steps include:

[0088] Step B1, defining a microsecond counter as a second global counter, and the first message is a last message of the target message;

[0089] Step B2, controlling the delivery of the target message based on the sending delay and the sending time of the first message.

[0090] As shown in Figure 8As shown, the message playback mode state machine is similar to the equal-interval sending state machine, except that no current time slice judgment (CUR_SLOT) is performed. In addition, the difference is in the delay control aspect, the message playback delay control is composed of the last message sending time (pkt_send_last) plus the sending delay (tx_delay), and the time comparison object is the global microsecond counter (curr_sys_cnt).

[0091] In the embodiment, the SV sampling value sending control is realized by hardware logic code. Since the timing accuracy of the hardware logic is much higher than the interrupt processing operation in the microcontroller, the consistency of SV equal-interval sending is greatly improved.

[0092] In addition, with reference to Figure 9 , the embodiment of the present application also provides a message transmission device, which comprises:

[0093] A command queue obtaining module is configured to read the commands issued by the microprocessor by the SV sending logic, and obtain a command queue.

[0094] A message carrying module is configured to obtain a target port based on the command queue, and carry the target message packaged by the microprocessor to a sampling value message buffer corresponding to the target port in the data control logic through an AXI data bus.

[0095] A message transmission module is configured to obtain a message sending mode based on the command queue, and transmit the target message to a preset Ethernet interface based on the sending mode by the data sending logic corresponding to the target port.

[0096] Optionally, the message transmission device further comprises:

[0097] A control command string generating module is configured to recombine the commands issued by a preset control command bus in a preset format, and generate a control command string, and write the control command string into a command queue register by a command writing control logic.

[0098] A command reading module is configured to read the command queue register by a command reading control logic corresponding to the command writing control logic, and take the read command as the command issued by the microprocessor.

[0099] Optionally, the data control logic is composed of a data receiving module, a message port allocation module, a message buffer module, a port sending command list, an instruction control module and a command port allocation module, and the message carrying module comprises:

[0100] The acquisition unit is used for acquiring control commands, message length, delay control and port control commands constituting the command queue, wherein the control commands control the instruction control module, and the port control commands control the message port distribution module.

[0101] The target port determination unit is used for determining a target port according to the port control commands by the command port distribution module.

[0102] The data stream conversion unit is used for carrying data from the memory through an AXI data bus and converting parallel bus format data into a data stream based on the instructions of the instruction control module.

[0103] Optionally, the sending mode is equal-interval sending, and the message transmission module comprises:

[0104] The first definition unit is used for defining a global counter taking an Ethernet sending clock as a counting pulse as a first global counter, wherein the first global counter is counted by the Ethernet sending clock and cleared by a synchronous sampling pulse.

[0105] The sending delay maintenance unit is used for maintaining an equal-interval pulse counting value for controlling the sending delay of the target message based on the first global counter.

[0106] Optionally, the sending mode is playback sending, and the message transmission module comprises:

[0107] The second definition unit is used for defining a microsecond counter as a second global counter, and the first message is a last message of the target message.

[0108] The message transmission control unit is used for controlling the transmission of the target message based on the sending delay and the sending time of the first message.

[0109] In addition, the embodiment of the present application further provides a computer readable storage medium, wherein the computer readable storage medium stores a message transmission program, and the message transmission program is executed by a processor to realize the operations in the message transmission method provided by the above embodiment.

[0110] The method executed by each program module can refer to each embodiment of the message transmission method of the present application, and will not be described here.

[0111] It should be noted that, in the present document, the terms such as first and second, etc. are used only to distinguish one entity / operation / element from another entity / operation / element, and do not necessarily require or imply any such actual relationship or order between such entities / operations / elements; the terms "comprising", "containing" or any other variant thereof are intended to cover a non-exclusive inclusion, such that a process, method, article or system including a list of elements does not necessarily include only those elements recited, but can include other elements not expressly listed or inherent to such process, method, article or system. Without more limitations, an element defined by the statement "comprising a" does not exclude the presence of additional identical elements in the process, method, article or system including the element.

[0112] For the device embodiment, since it is basically similar to the method embodiment, it is described more simply, and the relevant part can refer to the part of the description of the method embodiment. The above-described device embodiment is only illustrative, and the units described as separate components can or can not be physically separated. Part or all of the modules can be selected according to actual needs to achieve the purpose of the present application scheme. Those skilled in the art can understand and implement without creative labor.

[0113] The above-mentioned serial numbers of the embodiments of the present application are only for description, and do not represent the advantages and disadvantages of the embodiments.

[0114] Through the above description of the embodiments, those skilled in the art can clearly understand that the above-mentioned embodiment method can be realized by means of software and the necessary general hardware platform, of course, it can also be realized by hardware, but in many cases the former is a better embodiment. Based on such understanding, the technical solutions of the present application can be embodied in the form of a software product, which is stored in a storage medium (such as a ROM / RAM, a magnetic disk, an optical disk) as described above, and includes a plurality of instructions for making a terminal device (which can be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) execute the message transmission method described in each embodiment of the present application.

[0115] The above is only the preferred embodiment of the present application, and does not limit the patent scope of the present application, and any equivalent structure or equivalent flow transformation made by using the content of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A message transmission method, characterized in that, The message transmission method is applied to a relay protection testing device, which includes a microprocessor and SV transmission logic. The SV transmission logic includes data control logic and data transmission logic. The message transmission method includes the following steps: The SV sending logic reads the commands issued by the microprocessor to obtain a command queue; Based on the command queue, the target port is obtained, and the target message packaged by the microprocessor is transported via the AXI data bus to the sampled value message buffer corresponding to the target port in the data control logic. Based on the command queue, the message sending mode is obtained, and the data sending logic corresponding to the target port transmits the target message to the preset Ethernet interface based on the sending mode.

2. The message transmission method as described in claim 1, characterized in that, Before the step of the SV sending logic reading the commands issued by the microprocessor to obtain the command queue, the following steps are included: The commands issued by the preset control command bus are recombined according to the preset format to generate a control command string, and the command writing control logic writes the control command string into the command queue register. Based on the command read control logic corresponding to the command write control logic, the command queue register is read, and the read command is used as the command issued by the microprocessor.

3. The message transmission method as described in claim 1, characterized in that, The data control logic comprises a data receiving module, a message port allocation module, a message buffering module, a port sending command list, an instruction control module, and a command port allocation module. The step of obtaining the target port based on the command queue includes: The system acquires control commands, message lengths, delay control commands, and port control commands that constitute the command queue, wherein the control commands control the instruction control module, and the port control commands control the message port allocation module. The command port allocation module determines the target port based on the port control command.

4. The message transmission method as described in claim 3, characterized in that, The data receiving module, based on the instructions of the instruction control module, moves data from memory via the AXI data bus and converts the parallel bus format data into a data stream.

5. The message transmission method as described in claim 1, characterized in that, The sending mode is equal-interval sending, and the step of the data sending logic corresponding to the target port transmitting the target packet to the preset Ethernet interface based on the sending mode includes: A global counter with the Ethernet transmission clock as the counting pulse is defined as the first global counter, wherein the first global counter counts with the Ethernet transmission clock and is cleared by the synchronous sampling pulse; Based on the first global counter, maintain an evenly spaced pulse count value for controlling the transmission delay of the target message.

6. The message transmission method as described in claim 5, characterized in that, The sending mode is replay sending, and the step of the data sending logic corresponding to the target port transmitting the target packet to the preset Ethernet interface based on the sending mode includes: Define the microsecond counter as the second global counter, and the first message as the previous message of the target message; The transmission of the target message is controlled based on the transmission delay and the transmission time of the first message.

7. A message transmission device, characterized in that, The message transmission device includes: The command queue acquisition module is used by the SV sending logic to read the commands issued by the microprocessor and obtain the command queue. The message handling module is used to obtain the target port based on the command queue, and to transport the target message packaged by the microprocessor to the sampled value message buffer corresponding to the target port in the data control logic via the AXI data bus; The message transmission module is used to obtain the message sending mode based on the command queue, and the data sending logic corresponding to the target port transmits the target message to the preset Ethernet interface based on the sending mode.

8. A message transmission device, characterized in that, The message transmission device includes: a memory, a processor, and a message transmission program stored in the memory and executable on the processor, wherein when the message transmission program is executed by the processor, it implements the steps of the message transmission method as described in any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a message transmission program, which, when executed by a processor, implements the steps of the message transmission method as described in any one of claims 1 to 6.

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