Processing wafer and method for manufacturing chip-forming wafer

Abstract

A method for manufacturing a chip-forming wafer comprises: forming an epitaxial film (2) on a first main surface (1a) of a silicon carbide wafer (1) to provide a processing wafer (20) having one side (20a) and another side (20b) adjacent to the epitaxial film; irradiating a laser beam (L) into the processing wafer from the other side to form a degenerate layer (23) along the surface direction of the processing wafer; and separating the processing wafer into a chip-forming wafer (50) having the one side of the processing wafer and a recycled wafer (60) having the other side of the processing wafer with the degenerate layer as a boundary. The processing wafer has a bevel portion (21) at an outer edge portion of the processing wafer, and in the bevel portion, the area of the other side is larger than the area of the one side.

Description

Technical Field

[0001] The present disclosure relates to a processed wafer made of silicon carbide (hereinafter referred to as SiC) and a method of manufacturing a chip-forming wafer using the processed wafer. Background Art

[0002] JP2016-111143A describes a method for separating a SiC ingot having a first main surface and a second main surface into SiC wafers by irradiating the SiC ingot with a laser beam. Specifically, in this method, the laser beam is irradiated onto the second main surface along a normal direction of the SiC ingot to form a modified layer in the SiC ingot. The modified layer serves as a boundary for separating the SiC wafer from the SiC ingot. In this case, the second main surface consists of a C-plane. Summary of the Invention

[0003] For example, semiconductor chips are formed using the SiC wafer described above as follows. First, an epitaxial film is formed on the SiC wafer to form a process wafer, and semiconductor elements are formed on the process wafer. The process wafer is then thinned to a desired thickness to form a chip-forming wafer, and the chip-forming wafer is then divided into individual chips to form semiconductor chips.

[0004] In this case, when the processed wafer is thinned to form a chip forming wafer, the processed wafer is irradiated with a laser beam to form a modified layer, thereby separating the SiC wafer from the SiC ingot. The thinned portion of the processed wafer is separated using the modified layer as a boundary.

[0005] When forming semiconductor chips, it is conceivable to form a beveled portion on the outer edge of a processing wafer to facilitate semiconductor element formation or wafer handling. However, when a laser beam is irradiated onto the processing wafer to form a modified layer on the processing wafer having the beveled portion, the laser beam scatters because the laser beam and the beveled portion are not orthogonal to each other. In this case, the modified layer may not form properly within the processing wafer. Consequently, it can be difficult to separate the chip forming wafer from the processing wafer having the beveled portion.

[0006] In view of the above points, an object of the present disclosure is to provide a processing wafer having a bevel portion, in which a chip-forming wafer can be easily separated from the processing wafer, and a method for manufacturing the chip-forming wafer.

[0007] According to a first aspect of the present disclosure, a method for manufacturing a chip-forming wafer having semiconductor elements formed thereon comprises:

[0008] preparing a silicon carbide wafer made of silicon carbide having a first main surface and a second main surface opposite to the first main surface;

[0009] forming an epitaxial film made of silicon carbide on a first main surface of the silicon carbide wafer to provide a processed wafer having one side adjacent to the epitaxial film and another side;

[0010] irradiating a laser beam into the processing wafer from the other side of the processing wafer so as to form a modified layer along a surface direction of the processing wafer;

[0011] separating the processed wafer at the degenerated layer as a boundary into a chip formation wafer having one side of the processed wafer and a recycled wafer having the other side of the processed wafer; and

[0012] The recycled wafer is reused as a silicon carbide wafer.

[0013] The process wafer has a bevel portion at an outer edge portion of the process wafer, and an area of the other side is larger than an area of the one side in the bevel portion.

[0014] Therefore, when the laser beam is irradiated onto the processing wafer to form a degraded layer inside the processing wafer, it is easier to irradiate the laser beam to the immediate vicinity of the end of the processing wafer than when the area of the other side of the processing wafer is equal to or smaller than the area of one side. As a result, the degraded layer is more likely to form all the way to the end of the processing wafer, and the chip formation wafer is more easily separated from the processing wafer.

[0015] In addition, the processed wafer made of SiC has one side, the other side opposite to the one side, and a bevel portion formed at an outer edge portion of the processed wafer. The bevel portion is formed so that the other side has a larger area than the one side.

[0016] Therefore, when the laser beam is irradiated onto the processing wafer to form a degraded layer inside the processing wafer, it is easier to irradiate the laser beam to the immediate vicinity of the end of the processing wafer than when the area of the other side of the processing wafer is equal to or smaller than the area of one side. As a result, the degraded layer is more likely to form all the way to the end of the processing wafer, and the chip formation wafer is more easily separated from the processing wafer.

[0017] Reference numerals attached to components and the like indicate examples of correspondence between the components and the like and specific components and the like in the embodiment to be described below. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1A 1 is a cross-sectional view showing a manufacturing process of the semiconductor chip according to the first embodiment.

[0019] Figure 1B It shows Figure 1A A cross-sectional view of the subsequent semiconductor chip manufacturing process.

[0020] Figure 1C It shows Figure 1BA cross-sectional view of the subsequent semiconductor chip manufacturing process.

[0021] Figure 1D It shows Figure 1C A cross-sectional view of the subsequent semiconductor chip manufacturing process.

[0022] Figure 1E It shows Figure 1D A cross-sectional view of the subsequent semiconductor chip manufacturing process.

[0023] Figure 1F It shows Figure 1E A cross-sectional view of the subsequent semiconductor chip manufacturing process.

[0024] Figure 1G It shows Figure 1F A cross-sectional view of the subsequent semiconductor chip manufacturing process.

[0025] Figure 1H It shows Figure 1G A cross-sectional view of the subsequent semiconductor device manufacturing process.

[0026] Figure 1I It shows Figure 1H A cross-sectional view of the subsequent semiconductor chip manufacturing process.

[0027] Figure 1J It shows Figure 1I A cross-sectional view of the subsequent semiconductor chip manufacturing process.

[0028] Figure 1K is Figure 1F Figure 5. Cross-sectional view of a processed wafer having an epitaxial film of thickness formed on a recycled wafer during the process.

[0029] Figure 2 yes Figure 1A Plan view of the SiC wafer shown.

[0030] Figure 3 It shows Figure 1C A schematic cross-sectional view of a bevel portion of a processed wafer is shown.

[0031] Figure 4 is shown when irradiated with a laser beam Figure 1E Schematic diagram of the path of the laser beam when processing a wafer.

[0032] Figure 5 is shown when irradiated with a laser beam Figure 1E Schematic plan view of the deteriorated layer during wafer processing.

[0033] Figure 6 is shown when irradiated with a laser beam Figure 1ESchematic cross-sectional view of the deteriorated layer during wafer processing.

[0034] Figure 7 is shown when irradiated with a laser beam Figure 1E A schematic cross-sectional view showing the relationship between the deteriorated layer and the shape of the bevel portion when processing a wafer. DETAILED DESCRIPTION

[0035] Hereinafter, the embodiment will be described with reference to the accompanying drawings. In this embodiment, for the convenience of description, the same reference numerals are assigned to the parts that are the same as or equivalent to each other.

[0036] A method for manufacturing a semiconductor chip 100 according to an embodiment will be described with reference to the accompanying drawings.

[0037] First, if Figure 1A As shown, a silicon carbide (SiC) wafer 1 having a first main surface 1a and a second main surface 1b is prepared. The SiC wafer 1 has a bulk wafer shape. The thickness of the SiC wafer 1 is arbitrary, but is, for example, approximately 325 to 525 μm.

[0038] The SiC wafer 1 of this embodiment is a 6-inch hexagonal single crystal wafer. Figure 1A and 2 As shown, the SiC wafer 1 is generally disk-shaped. In the SiC wafer 1 of this embodiment, the area of the second main surface 1b is larger than the area of the first main surface 1a. The side surface 1c connecting the first main surface 1a and the second main surface 1b is a curved surface. In the SiC wafer 1, the Si plane is the first main surface 1a, and the C plane is the second main surface 1b. Figure 1E During the polishing process, the laser beam L is irradiated to the second main surface 1b. The second main surface 1b is a mirror surface formed by mirror processing, for example, polishing using a grinder or chemical mechanical polishing (CMP).

[0039] The SiC wafer 1 has a c-axis ( <0001> The first main surface 1a is provided with a first main surface 1a and a second main surface 1b. The first main surface 1a is provided with a first main surface 1b having a first main surface 1c and a second main surface 1d having a first main surface 1d. The first main surface 1a is provided with a first main surface 1c and a second main surface 1d having a first main surface 1c ...

[0040] like Figure 2 As shown, SiC wafer 1 is formed with orientation flat portion 13 indicating crystal orientation. Orientation flat portion 13 of this embodiment is formed parallel to deviation direction A extending from vertical line 12 to c-axis 10.

[0041] It is also possible to repeat the Figure 1F The SiC wafer 1 is prepared by using the recycled wafer 60 formed in the process. Therefore, a protective film made of an oxide film or the like may be formed on the second main surface 1 b of the SiC wafer 1 if necessary.

[0042] Next, if Figure 1B As shown, an epitaxial film 2 is formed on the first main surface 1a of the SiC wafer 1 to prepare a processing wafer 20 having a side 20a, a side 20b opposite to the side 20a, and a side surface 20c connecting the side 20a to the side 20b. Then, a chip formation region RA is formed on the side 20a of the processing wafer 20 to form a semiconductor element described later.

[0043] In this embodiment, epitaxial film 2 is an n-type epitaxial layer. This n-type epitaxial layer is used to form one-side component 22, such as a diffusion layer, which will be described later, and has a thickness of, for example, approximately 10 μm. Hereinafter, the surface of process wafer 20 adjacent to epitaxial film 2 is referred to as one side 20 a of process wafer 20. The surface of process wafer 20 made of SiC wafer 1 is referred to as the other side 20 b of process wafer 20. The surface of process wafer 20 connecting one side 20 a and the other side 20 b is referred to as side surface 20 c.

[0044] Furthermore, a processing wafer 20 having a bevel portion 21 formed on a side surface 20c as an outer edge portion is prepared. Specifically, as Figure 3 As shown, a horizontal virtual plane K is defined as passing through the center of the thickness between one side 20a and the other side 20b of the process wafer 20 along the surface direction of the process wafer 20. The bevel portion 21 is formed so that the upper portion adjacent to the one side 20a and the lower portion adjacent to the other side 20b are asymmetrical with respect to the horizontal virtual plane K. More specifically, the bevel portion 21 is formed so that the area of the other side 20b of the process wafer 20 is larger than the area of the one side 20a. For example, a first orthogonal virtual plane K1 is defined as being orthogonal to the horizontal virtual plane K and passing through the boundary between the one side 20a and the bevel portion 21. A second orthogonal virtual plane K2 is defined as being orthogonal to the horizontal virtual plane K and passing through the boundary between the other side 20b and the bevel portion 21. In this case, the bevel portion 21 is formed so that the second orthogonal virtual plane K2 is located between the outer edge of the process wafer 20 and the first orthogonal virtual plane K1. In other words, the slope portion 21 is formed so that the curvature of a first portion between the other side 20 b and the horizontal virtual plane K is greater than the curvature of a second portion between the one side 20 a and the horizontal virtual plane K. In the present embodiment, the slope portion 21 is formed to have a length d from the intersection of the horizontal virtual plane K and the side surface 20 c to the first orthogonal virtual plane K1, and the length d is 100 μm or more.

[0045] This type of processed wafer 20 is prepared, for example, by preparing a SiC wafer 1 in which the area of the first main surface 1a is larger than the area of the second main surface 1b, and the side surface 1c is curved. As a result, using this shaped SiC wafer 1 as a substrate, a processed wafer 20 is prepared in which the area of the other side 20b is larger than the area of the one side 20a. When the epitaxial film 2 is formed on the first main surface 1a of the SiC wafer 1, the shape of the epitaxial film 2 corresponds to the shape of the SiC wafer 1. Furthermore, after the epitaxial film 2 is formed on the first main surface 1a of the SiC wafer 1, for example, a shape adjustment process such as etching is performed to form the bevel portion 21, thereby preparing this type of processed wafer 20.

[0046] like Figure 1C As shown, conventional semiconductor manufacturing processes are performed to form one side component 22 of the semiconductor element in each chip formation region RA, such as the gate electrode 14, the diffusion layer, the surface electrode, the wiring pattern, and the passivation film (not shown). As the semiconductor element, elements with various structures are used. For example, power devices are used as semiconductor elements. Thereafter, if necessary, a surface protection film made of a resist or the like is formed on one side 20a of the processing wafer 20.

[0047] Then, if Figure 1D As shown, a holding member 30 is provided on one side 20a of the processing wafer 20. The holding member 30 is, for example, a dicing tape having a base material 31 and an adhesive 32. The base material 31 is made of a material that is not easily warped during the manufacturing process. The base material 31 is made of, for example, glass, a silicon substrate, ceramics, etc. The adhesive 32 is made of a material whose adhesive strength can be changed, for example, by temperature or light. In this case, the adhesive 32 is made of, for example, an ultraviolet curing resin, wax, a double-sided tape, etc. The adhesive 32 can be made of a forming material to be described later. Figure 1G The other side element part 25 shown in FIG. 1 is made of a material capable of maintaining adhesion.

[0048] Then, if Figure 1E As shown, a laser beam L is irradiated from the normal direction relative to the other side 20b of the processing wafer 20 to form a modified layer 23 along the surface of the processing wafer 20 at a predetermined depth H from the other side 20b of the processing wafer 20. In this embodiment, the predetermined depth H for forming the modified layer 23 is set based on the ease of handling of the chip forming wafer 50 described later, the withstand voltage of the semiconductor chip 100 described later, and other factors. The predetermined depth H is set to approximately 200 to 370 μm, resulting in a thickness of approximately 100 μm for the chip forming wafer 50. The depth refers to the length from the other side 20b to the one side 20a along the depth direction, which is the normal direction of the other side 20b.

[0049] Hereinafter, the steps for forming the metamorphic layer 23 will be described in detail. When forming the metamorphic layer 23, a laser light source, a reflector, a focusing lens, and a laser device are prepared. The laser light source oscillates the laser beam L. A reflector is provided to change the direction of the optical axis (i.e., the optical path) of the laser beam L. The focusing lens (of the focusing optical system) focuses the laser beam L. The laser device has a movable workbench. The processing wafer 20 is placed on the workbench, and the position of the workbench is adjusted so that by irradiating the laser beam L from the other side 20b of the processing wafer 20, the focal point of the laser beam becomes a predetermined depth H, and at the same time, the focal point of the laser beam L performs relative scanning along the surface direction of the processing wafer 20.

[0050] More specifically, when the altered layer 23 is formed, the following operations are performed. Figure 4 As shown, the deviation direction A is set to the Y direction, and the surface direction parallel to the side 20a of the processing wafer 20 is set to the X direction orthogonal to the Y direction. The laser beam L is scanned in the X direction. After that, the scanning of the laser beam is shifted in the Y direction and scanned again in the X direction. As a result, inside the processing wafer 20, as shown in FIG. Figure 5 and 6 As shown, SiC is separated into amorphous Si and amorphous C by irradiation with a laser beam L. A modified layer 23a is formed by efficient absorption of the laser beam L into the separated amorphous C. Furthermore, cracks 23b are formed that propagate from the modified layer 23a along the C-plane 11. As a result, a modified layer 23 having the modified layer 23a and the cracks 23b is formed within the processed wafer 20.

[0051] Notice, Figure 6 It is along Figure 4 Schematic cross-sectional view taken along line VI-VI in FIG. Furthermore, the amount of resolution W of the laser beam L shifted in the Y direction is set based on the width of the crack 23b formed by propagation in the c-plane direction. For example, in this embodiment, when the crack 23b formed on one side of the modified layer 23a has a width W1, the amount of resolution W in the Y direction is set to satisfy W1 ≤ W ≤ 2×W1.

[0052] In this embodiment, when forming altered layer 23, for example, the laser output was 2.0 W, the feed rate was 785 mm / s, and the processing time was approximately 15 minutes. However, these conditions are merely examples. The present inventors have confirmed that altered layer 23 can be suitably formed by adjusting the conditions when the laser output is higher or lower than 2.0 W.

[0053] The processing wafer 20 is formed to have the bevel portion 21. Therefore, when the laser beam L is irradiated from the other side 20b of the processing wafer 20 as described above, the altered layer 23 may not be properly formed in the bevel portion 21 due to scattering of the laser beam or the like.

[0054] Therefore, in this embodiment, the bevel portion 21 is formed so that the area of the other side 20b of the processed wafer 20 is larger than the area of the one side 20a. Compared to a case where the bevel portion 21 is formed so that the area of the other side 20b of the processed wafer 20 is equal to or smaller than the area of the one side 20a, the laser beam L can be easily irradiated to the immediate vicinity of the outer edge portion of the processed wafer 20. Therefore, the altered layer 23 can be easily formed up to the outer edge portion of the processed wafer 20.

[0055] In this embodiment, if Figure 7 As shown, the bevel portion 21 and the depth H are adjusted so that the altered layer 23 does not intersect the second orthogonal virtual plane K2. In other words, the bevel portion 21 and the depth H are adjusted so that the depth h from the boundary between the other side 20b and the bevel portion 21 to the side surface 20c is shorter than the depth H in the depth direction. In other words, the depth h from the boundary between the other side 20b and the bevel portion 21 to the side surface 20c is the length of the second orthogonal virtual plane K2 located inside the processed wafer 20. As a result, since the other side 20b is positioned facing the altered layer 23, the laser beam L can be sufficiently focused on the area where the altered layer 23 is formed.

[0056] Then, if Figure 1F As shown, the auxiliary member 40 is provided on the other side 20b of the processing wafer 20. For example, similar to the holding member 30, the auxiliary member 40 includes a base material 41 and an adhesive 42 whose adhesive strength can be changed. In this case, the base material of the auxiliary member 40 is made of, for example, glass, a silicon substrate, ceramics, etc. The adhesive 42 of the auxiliary member 40 is made of, for example, an ultraviolet curing resin, wax, a double-sided tape, etc. Then, the holding member 30 and the auxiliary member 40 are grasped, and a pulling force is applied in the thickness direction of the processing wafer 20, so that the wafer is divided into a chip forming wafer 50 and a recycling wafer 60 at the degenerate layer 23 serving as a boundary (i.e., the starting point of the branch).

[0057] Hereinafter, a chip forming wafer 50 has one side 50a and another side 50b, wherein one side element part 22 is formed on the one side 50a, and a recycling wafer 60 has one side 60a separated from the other side 50b. Figure 1F In the subsequent drawings, the altered layer 23 and the like remaining on the other side 50 b of the chip forming wafer 50 and on the one side 60 a of the recycled wafer 60 are omitted as appropriate.

[0058] Afterwards, if Figure 1G As shown, a conventional semiconductor manufacturing process is performed to form the other side element components 25 of the semiconductor element, such as the metal film 24 constituting the back electrode, on the other side 50 b of the chip forming wafer 50 .

[0059] Before the step of forming the other-side element part 25 , the other side 50 b of the chip forming wafer 50 may be flattened by chemical mechanical polishing (CMP), if necessary. Figure 1G The figure shows a view when the other side 50b of the chip forming wafer 50 is flattened. In addition, after forming the other side element part 25, if necessary, heat treatment such as laser annealing can be performed to form an ohmic contact between the metal film 24 and the other side 50b of the chip forming wafer 50.

[0060] Afterwards, if Figure 1H As shown, support member 70 is provided on the other side 50b of chip-forming wafer 50 so as to face metal film 24. Support member 70 is made of, for example, dicing tape. Similar to retaining member 30, support member 70 may include a base material 71 and an adhesive 72 with variable adhesive strength. When support member 70 is composed of base material 71 and adhesive 72, base material 71 may be made of, for example, glass, a silicon substrate, or ceramics, and adhesive 72 may be made of, for example, UV-curable resin, wax, or double-sided tape.

[0061] Then, if Figure 1I As shown, the adhesive force of the adhesive 32 of the holding member 30 is weakened, and the holding member 30 attached to the side 50a of the chip forming wafer 50 is separated. For example, when the adhesive 32 is made of ultraviolet curing resin, the holding member 30 is peeled off by ultraviolet irradiation.

[0062] Then, if Figure 1J As shown, each semiconductor chip 100 is manufactured by separating the chip forming wafer 50 into chip units by dicing saw, laser dicing, etc. At this time, in this embodiment, the dicing depth is adjusted so that the base material 71 of the support member 70 remains connected without being cut while the chip forming wafer 50 is divided into chip units.

[0063] Although the subsequent steps are not shown in the drawings, the support member 70 is expanded and the distance between the semiconductor chips 100 is widened at the dicing cut portion. After that, the adhesive force of the adhesive 72 is weakened by heat treatment or light irradiation, and the semiconductor chips 100 are picked up. As a result, the semiconductor chips 100 are manufactured.

[0064] In addition, Figure 1A In the following steps, Figure 1F The recycled wafer 60 manufactured in the process shown is used again as the SiC wafer 1. As a result, the SiC wafer 1 can be reused multiple times to form the semiconductor chip 100. In this case, it is preferable to perform a CMP method on the SiC wafer 1 using a polishing device, dry etching, etc. so that the side 60a of the recycled wafer 60 becomes a flat surface and the deteriorated layer 23 does not remain. In addition, when the thickness of the recycled wafer 60 (that is, the SiC wafer 1) becomes thinner, as shown in FIG. Figure 1K As shown, a thick epitaxial film 3 is provided to ensure the thickness of SiC wafer 1. Processing wafer 20 can be formed by forming epitaxial film 2 on SiC wafer 1. Thick epitaxial film 3 is composed of, for example, an n+-type epitaxial layer. When forming thick epitaxial film 3, a shape adjustment process for forming bevel portion 21 can be performed after forming thick epitaxial film 3 or after forming epitaxial film 2. When the shape adjustment process is performed after forming thick epitaxial film 3, bevel portion 21 is formed by epitaxial film 2 taking over the shape of thick epitaxial film 3 during its formation.

[0065] According to this embodiment, the bevel portion 21 is formed so that the area of the other side 20b of the processing wafer 20 is larger than the area of the one side 20a. Therefore, when the altered layer 23 is formed inside the processing wafer 20 by irradiation with the laser beam L, the laser beam L is more likely to be irradiated to the immediate vicinity of the outer edge portion of the processing wafer 20, compared to a case where the area of the other side 20b of the processing wafer 20 is equal to or smaller than the area of the one side 20a. Therefore, the altered layer 23 is more likely to be formed up to the outer edge portion of the processing wafer 20, and the chip formation wafer 50 is more likely to be separated from the processing wafer 20.

[0066] When the outer edge portion of the processing wafer 20 is irradiated with the laser beam L, edge trimming can be performed to remove the bevel portion 21 before irradiation with the laser beam L, so that the side surface 20c of the processing wafer 20 is orthogonal to the side 20a. However, this method reduces the area of the processing wafer 20. In this embodiment, the processing wafer 20 is separated into a chip formation wafer 50 and a recycled wafer 60 with the degenerated layer 23 as the boundary, and the separated recycled wafer 60 is reused as the SiC wafer 1. In this method of removing the bevel portion 21, the area of the SiC wafer 1 decreases each time the chip formation wafer 50 is formed. In this case, the number of semiconductor chips 100 to be manufactured gradually decreases.

[0067] In contrast, according to the present embodiment, since only the shape of the bevel portion 21 needs to be adjusted, it is possible to limit the reduction in area of the SiC wafer 1. Therefore, in the present embodiment, while suppressing the SiC wafer 1 from becoming smaller each time the semiconductor chip 100 is manufactured, the processed wafer 20 can be preferably separated into the wafer forming wafer 50 and the recycled wafer 60 (i.e., the SiC wafer 1).

[0068] (1) In the present embodiment, the inclined surface portion 21 is formed so that the curvature of a first portion between the other side 20 b and the horizontal virtual plane K is greater than the curvature of a second portion between the one side 20 a and the horizontal virtual plane K. Therefore, it is possible to easily manufacture a processed wafer 20 in which the area of the other side 20 b is larger than that of the one side 20 a.

[0069] (2) In the present embodiment, the bevel portion 21 and the depth H are adjusted so that the depth h from the boundary between the other side 20 b and the bevel portion 21 to the side surface 20 c is shorter than the depth H in the depth direction. Therefore, since the other side 20 b is located in the region facing the altered layer 23, the laser beam L can be sufficiently focused on the region where the altered layer 23 is formed. Therefore, the altered layer 23 can be formed up to the side surface 20 c of the processed wafer 20.

[0070] Although the present disclosure has been described in terms of embodiments, it should be understood that the present disclosure is not limited to these embodiments or structures. The present disclosure includes various modifications and variations within the scope of equivalents. In addition, various combinations and configurations and other combinations and configurations that only include one, more, or fewer elements are within the scope and spirit of the present disclosure.

[0071] Furthermore, in this embodiment, when forming Figure 1B In the step of forming epitaxial film 2, an epitaxial film may also be formed on second main surface 1b of SiC wafer 1. In this case, it is easy to leave a recycled wafer 60 having a thickness equal to or greater than a predetermined thickness, thereby increasing the number of times the recycled wafer can be reused.

Claims

1. A method for manufacturing a chip-forming wafer having semiconductor elements formed thereon, the method comprising: preparing a silicon carbide wafer (1) made of silicon carbide and having a first main surface (1a) and a second main surface (1b) opposite to the first main surface; forming an epitaxial film (2) made of silicon carbide on the first main surface of the silicon carbide wafer to provide a processing wafer (20) having one side (20a) adjacent to the epitaxial film and the other side (20b) made of the silicon carbide wafer; irradiating a laser beam (L) into the processing wafer from the other side of the processing wafer so as to form a modified layer (23) along a surface direction of the processing wafer; separating the processed wafer into a chip forming wafer (50) having the one side of the processed wafer and a recycled wafer (60) having the other side of the processed wafer with the deteriorated layer as a boundary; and The recycled wafer is reused as a silicon carbide wafer, wherein The processing wafer has a bevel portion (21) at an outer edge portion of the processing wafer, and In the inclined portion, the area of the other side is larger than the area of the one side, Wherein, when preparing the processed wafer, in the depth direction from the other side to the one side, the depth (h) from the boundary between the other side and the bevel portion to the side surface (20c) connecting the one side and the other side is less than the depth (H) from the other side to the metamorphic layer.

2. The method according to claim 1, wherein A virtual plane (K) is defined as passing through the center between the one side and the other side along the surface direction of the processed wafer, The slope portion has a first portion located between the virtual plane and the other side, and a second portion located between the virtual plane and the one side, and In preparing the process wafer, the slope portion is formed such that a curvature of the first portion is greater than a curvature of the second portion.

3. A processed wafer made of silicon carbide, comprising: One side (20a); another side (20b) opposite to the one side; and A slope portion (21) is formed on an outer edge portion of the silicon carbide, wherein In the inclined portion, the area of the other side is larger than the area of the one side, The processed wafer further includes a modified layer (23) at a position having a first depth (H) from the other side; and In the depth direction from the other side to the one side, a second depth (h) from the boundary between the other side and the slope portion to a side surface (20c) connecting the one side and the other side is smaller than a first depth (H) from the other side to the metamorphic layer.

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