Bonding substrate and bonding method
By forming internal and external heat dissipation structures in the substrate, the heat dissipation problem of three-dimensional stacked chips is solved, improving heat dissipation efficiency, reducing chip temperature and power consumption, and extending service life.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-01-21
- Publication Date
- 2026-03-10
AI Technical Summary
Existing 3D stacked chips have poor heat dissipation performance, resulting in increased chip temperature, increased wire resistance, increased power consumption, and reduced operating speed.
Internal heat dissipation and heat conduction structures are formed in the substrate, and external heat dissipation structures are formed after bonding. These structures improve the heat dissipation efficiency of the chip.
Without changing the existing chip stacking process, it significantly improves the heat dissipation efficiency of 3D stacked chips, reduces chip temperature, reduces power consumption, and extends service life.
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Figure CN114496948B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductors, and more particularly to a bonding substrate and bonding method. Background Technology
[0002] Three-dimensional stacked chips represent a recent trend in chip fabrication technology, offering advantages such as high bandwidth and computing power. However, this high-speed computation between two stacked chips results in three-dimensional stacked chips generating significantly more heat than conventional chips. Currently, existing three-dimensional stacked chips rely on the dielectric material for slow heat dissipation, lacking a dedicated heat dissipation structure. During operation, the heat generated by current flowing through the copper pillars is difficult to dissipate, leading to increased chip temperature, increased wire resistance, and consequently, increased power consumption and reduced operating speed, ultimately impacting chip performance.
[0003] Therefore, how to improve the heat dissipation capacity of the chip while meeting its functional requirements, thereby reducing the operating temperature of the three-dimensional stacked chip, is an urgent problem to be solved. Summary of the Invention
[0004] This invention provides a bonding substrate and bonding method to solve the technical problem of poor heat dissipation performance of existing three-dimensional stacked chips, thereby improving chip performance.
[0005] To address the aforementioned problems, the present invention provides a bonding substrate formed by bonding a first substrate and a second substrate, comprising: an internal heat dissipation structure, wherein the internal heat dissipation structure is a metal layer disposed around a metal pillar and embedded within at least one of the first substrate and the second substrate; and a thermally conductive structure connected to the internal heat dissipation structure and exposed on the surface of the bonded substrate.
[0006] Optionally, it may also include an external heat dissipation structure, which is a metal layer disposed on the surface of the bonding substrate and connected to the heat conduction structure.
[0007] Optionally, the internal heat dissipation structure is disposed in the first substrate and / or the second substrate.
[0008] Optionally, the thermally conductive structure is disposed in the first substrate and / or the second substrate.
[0009] To address the aforementioned problems, the present invention provides a bonding method for bonding a first substrate and a second substrate, comprising: a step of forming an internal heat dissipation structure in at least one of the first substrate and the second substrate before bonding; and a step of forming a thermally conductive structure in at least one of the first substrate and the second substrate after bonding.
[0010] Optionally, it further includes: forming an external heat dissipation structure on the surface of the bonding substrate, wherein the external heat dissipation structure is connected to the internal heat dissipation structure through the thermally conductive structure.
[0011] Optionally, the step of forming an internal heat dissipation structure in at least one of the first substrate and the second substrate further comprises: providing a first and / or a second wafer, the surface of the first and / or the second wafer including a first and / or a second seed layer and a first and / or a second passivation layer; forming a first and / or a second metal layer on the surface of the first and / or the second substrate; patterning the first and / or the second metal layer, removing the first and / or the second metal layer at the position directly opposite the first and / or the second seed layer to form a first and / or a second internal heat dissipation structure; forming a first and / or a second dielectric layer and a first and / or a second bonding layer on the first and / or the second internal heat dissipation structure; etching the first and / or the second bonding layer, the first and / or the second dielectric layer, and the first and / or the second passivation layer to form a first and / or a second groove, the first and / or the second groove exposing the first and / or the second seed layer; using the first and / or the second seed layer as electrodes, electroplating to form a first and / or a second metal pillar in the first and / or the second groove to form the first and / or the second substrate.
[0012] Optionally, the step of forming a thermally conductive structure in at least one of the first substrate and the second substrate further comprises: forming a hole on the surface of the bonding substrate to expose the internal heat dissipation structure; and filling the hole to form a thermally conductive structure.
[0013] Optionally, the step of forming a hole on the bonding substrate surface is to form the hole within the first substrate and / or the second substrate.
[0014] Optionally, the step of forming an external heat dissipation structure on the surface of the bonding substrate further comprises: forming a third metal layer on the surface of the bonding substrate, wherein the third metal layer is connected to the heat-conducting structure;
[0015] The third metal layer is etched to form an external heat dissipation structure, which is connected to the internal heat dissipation structure through the thermally conductive structure.
[0016] This invention can significantly improve the heat dissipation efficiency of three-dimensional stacked chips by adding internal heat dissipation structures, external heat dissipation structures, and thermal conductive structures without changing the existing chip stacking process. This solves the problems of increased chip power consumption and reduced operating speed caused by increased chip operating temperature and increased wire resistance, and extends the chip lifespan. Attached Figure Description
[0017] Appendix Figure 1 This is a schematic diagram of a bonding method in a specific embodiment of the present invention.
[0018] Appendix Figures 2A-2F This is a schematic diagram of the bonding method steps in a specific embodiment of the present invention.
[0019] Appendix Figure 3 This is a schematic diagram of a bonding substrate in a specific embodiment of the present invention.
[0020] Appendix Figure 4 This is a schematic diagram of a bonding method in a specific embodiment of the present invention.
[0021] Appendix Figures 5A-5E This is a schematic diagram of the bonding method steps in a specific embodiment of the present invention.
[0022] Appendix Figures 6A-6C This is a cross-sectional schematic diagram of the bonding substrate in a specific embodiment of the present invention. Detailed Implementation
[0023] The technical solutions of the specific embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described specific embodiments are only a part of the specific embodiments of the present invention, and not all of them. Based on the specific embodiments of the present invention, all other specific embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0024] To address the poor heat dissipation performance of existing three-dimensional stacked chips, this invention provides a bonding substrate and a bonding method. The bonding method provided by this invention is described below.
[0025] This invention provides a bonding method for bonding a first substrate and a second substrate, comprising: before bonding, forming an internal heat dissipation structure in at least one of the first substrate and the second substrate; and after bonding, forming a thermally conductive structure in at least one of the first substrate and the second substrate. Optionally, it further comprises: forming an external heat dissipation structure on the surface of the bonding substrate, the external heat dissipation structure being connected to the internal heat dissipation structure through the thermally conductive structure.
[0026] Appendix Figure 1This is a schematic diagram of a bonding method in a specific embodiment of the present invention. The step of forming an internal heat dissipation structure in at least one of a first substrate and a second substrate further comprises: step S10, providing a first and / or a second wafer, the surface of the first and / or the second wafer including a first and / or a second seed layer and a first and / or a second passivation layer; step S11, forming a first and / or a second metal layer on the surface of the first and / or the second wafer. Step S12: Pattern the first and / or second metal layer, remove the first and / or second metal layer directly opposite the first and / or second seed layer to form a first and / or second internal heat dissipation structure; Step S13: Form a first and / or second dielectric layer and a first and / or second bonding layer on the first and / or second internal heat dissipation structure; Step S14: Etch the first and / or second bonding layer, the first and / or second dielectric layer, and the first and / or second passivation layer to form a first and / or second groove, the first and / or second groove exposing the first and / or second seed layer; Step S15: Using the first and / or second seed layer as electrodes, electroplate a first and / or second metal pillar in the first and / or second groove to form a first and / or second substrate.
[0027] Step S10, refer to the appendix Figure 2A A first and / or second wafer 20 is provided, the surface of the first and / or second wafer 20 including a first and / or second seed layer 201 and a first and / or second passivation layer 202. The first and / or second seed layer 201 is used to form metal pillars for bonding in subsequent steps, and the first and / or second passivation layer 202 is used to protect the first and / or second wafer 20.
[0028] Step S11, refer to the appendix Figure 2B A first and / or second metal layer 203 is formed on the surface of the first and / or second wafer 20. In this specific embodiment, the first and / or second metal layer 203 is a metal mesh, and the material of the metal mesh is selected from at least one of aluminum, tungsten, and copper.
[0029] Step S12, refer to the appendix Figure 2C The first and / or second metal layers 203 are graphically visualized, and the first and / or second metal layers 203 directly opposite the first and / or second seed layers 201 are removed to form the first and / or second internal heat dissipation structures 204. The first and / or second internal heat dissipation structures 204 are used to absorb the heat generated during chip operation.
[0030] Step S13, refer to the appendix Figure 2DA first and / or second dielectric layer 205 and a first and / or second bonding layer 206 are formed on the first and / or second internal heat dissipation structure 204. In one specific embodiment of the present invention, the first and / or second dielectric layer 205 is made of TEOS SiO2; the first and / or second bonding layer 206 is made of NDC film and serves as the bonding interface in subsequent bonding steps.
[0031] Step S14, refer to the appendix Figure 2E The first and / or second bonding layer 206, the first and / or second dielectric layer 205, and the first and / or second passivation layer 202 are etched to form a first and / or second groove 207, which exposes the first and / or second seed layer 201 so as to form metal pillars for bonding in subsequent steps.
[0032] Step S15, refer to the appendix Figure 2F Using the first and / or second seed layer 201 as electrodes, first and / or second metal pillars 208 are electroplated within the first and / or second groove 207 to form the first and / or second substrate 21. In other embodiments of the present invention, the first and / or second metal pillars 208 may also be formed by physicochemical deposition.
[0033] In this specific embodiment, the first substrate 21 and the second substrate 31 are prepared using the above-described technical solution. A schematic diagram of the first substrate 21 is shown in the attached diagram. Figure 2F As shown, the substrate includes a first wafer 20 and a first passivation layer 202, a first dielectric layer 205, and a first bonding layer 206 on the surface of the first wafer 20. First metal pillars 208 are distributed on the surface of the first bonding layer 206. A first internal heat dissipation structure 204 is embedded within the first substrate 21 and surrounds the metal pillars 208. A schematic diagram of the second substrate 31 is shown in the attached figure. Figure 3 As shown, the substrate includes a second wafer 30 and a second passivation layer 302, a second dielectric layer 305, and a second bonding layer 306 on the surface of the second wafer 30. Second metal pillars 308 are distributed on the surface of the second bonding layer 306. A second internal heat dissipation structure 304 is embedded within the second substrate 31 and surrounds the metal pillars 308. In other specific embodiments of the present invention, the first substrate 21 or the second substrate 31 can also be prepared using the above method, and then bonded to a substrate without an internal heat dissipation structure in subsequent steps, and the corresponding thermally conductive structure and external heat dissipation structure can be prepared further.
[0034] Next, the first substrate 21 and the second substrate 31 are bonded together to form a thermally conductive structure and an external heat dissipation structure, as shown in the attached figure. Figure 4The diagram shows a bonding method in a specific embodiment of the present invention. The step of forming a thermally conductive structure in at least one of the first substrate and the second substrate further comprises: step S41, bonding the first substrate and the second substrate to form a bonded substrate; step S42, forming holes on the surface of the bonded substrate to expose the internal heat dissipation structure; and step S43, filling the holes 501 and 502 to form a thermally conductive structure.
[0035] Step S41, refer to the appendix Figure 5A The first substrate 21 and the second substrate 31 are bonded together to form a bonded substrate. The bonding interface of the bonded substrate is the first bonding layer 206 and the second bonding layer 306.
[0036] Step S42, refer to the appendix Figure 5B Holes 501 and 502 are formed on the surface of the bonding substrate to expose the internal heat dissipation structures 204 and 304. In a specific embodiment of the present invention, the step of forming holes on the surface of the bonding substrate is to form holes 501 and 502 in the first substrate 21 and / or the second substrate 21.
[0037] Step S43, refer to the appendix Figure 5C The holes 501 and 502 are filled to form thermally conductive structures 503 and 504. In this specific embodiment, the thermally conductive structures 503 and 504 are formed by a step-by-step etching and filling method: etching is performed along the edge of the bonded substrate to form dispersed first holes 501, the bottom of which exposes the second internal heat dissipation structure 304; a metal material is filled into the first holes 501 to form the second thermally conductive structure 503, which is connected to the second internal heat dissipation structure 304; etching is performed around the first holes 501 to form dispersed second holes 502, the bottom of which exposes the first internal heat dissipation structure 204; a metal material 504 is filled into the second holes 502 to form the first thermally conductive structure 504, which is connected to the first internal heat dissipation structure 204; the first thermally conductive structure 504 and the second thermally conductive structure 503 together constitute a thermally conductive structure. In one specific embodiment of the present invention, the thermally conductive structures 503 and 504 are made of metal materials, including tungsten or copper.
[0038] After forming the thermally conductive structure, an external heat dissipation structure is formed. The step of forming the external heat dissipation structure on the bonding substrate surface further comprises: step S44, forming a third metal layer on the bonding substrate surface, the third metal layer connecting to the thermally conductive structure; step S45, etching the third metal layer to form the external heat dissipation structure, the external heat dissipation structure being connected to the internal heat dissipation structure through the thermally conductive structure.
[0039] Step S44, refer to the appendix Figure 5DA third metal layer 505 is formed on the surface of the bonding substrate, and the third metal layer 505 connects the thermally conductive structures 503 and 504. In one specific embodiment of the present invention, the third metal layer 505 is a metal sheet, and the material of the metal sheet includes aluminum or tungsten. In other specific embodiments of the present invention, the third metal layer 505 may also be a metal mesh.
[0040] Step S45, refer to the appendix Figure 5E The third metal layer 505 is etched to form an external heat dissipation structure 506. The external heat dissipation structure 506 is connected to the internal heat dissipation structures 304 and 204 through the thermally conductive structures 503 and 504. In other embodiments of the present invention, the external heat dissipation structure 506 may also be a continuous metal sheet or metal mesh. Heat generated during chip operation is absorbed by the first internal heat dissipation structure 204, passes through the first thermally conductive structure 504, and is finally discharged from the chip by the first external heat dissipation structure 506.
[0041] This invention can significantly improve the heat dissipation efficiency of three-dimensional stacked chips by adding internal heat dissipation structures, external heat dissipation structures, and thermal conductive structures without changing the existing chip stacking process. This solves the problems of increased chip power consumption and reduced operating speed caused by increased chip operating temperature and increased wire resistance, and extends the chip lifespan.
[0042] Corresponding to the specific embodiments of the above methods, the present invention also provides a bonding substrate for use in three-dimensional stacked chips, as shown in the attached figure. Figure 5E As shown, the bonding substrate is formed by bonding a first substrate 21 and a second substrate 31, and includes: internal heat dissipation structures 204 and 304, wherein the internal heat dissipation structures 204 and 304 are metal layers disposed around metal pillars 208 and 308, and are embedded in at least one of the first substrate 21 and the second substrate 31; and thermally conductive structures 503 and 504, wherein the thermally conductive structures 503 and 504 are connected to the internal heat dissipation structures 304 and 204 and exposed on the surface of the bonded substrate.
[0043] In one specific embodiment of the present invention, the bonding substrate further includes an external heat dissipation structure 506, which is a metal layer disposed on the surface of the bonding substrate and connects the heat-conducting structures 503 and 504. In another specific embodiment of the present invention, the external heat dissipation structure 506 is a metal sheet, and the material used for the metal sheet includes aluminum or tungsten.
[0044] In one specific embodiment of the present invention, the internal heat dissipation structures 204 and 304 are disposed in the first substrate 21 and / or the second substrate 31. In another specific embodiment of the present invention, the internal heat dissipation structures 204 and 304 are metal meshes, and the material used for the metal meshes is selected from at least one of aluminum, tungsten, and copper.
[0045] In one specific embodiment of the present invention, the heat-conducting structures 503 and 504 are disposed in the first substrate 21 and / or the second substrate 31. In another specific embodiment of the present invention, the heat-conducting structures 503 and 504 are made of metallic materials, including tungsten or copper.
[0046] To further illustrate the structure of the bonding substrate in the specific embodiments of the present invention, please refer to the appendix. Figures 6A-6C The diagram shown is a cross-sectional view of the bonding substrate according to a specific embodiment of the present invention. Please refer to the attached diagram. Figure 6A As shown, a cross-sectional view of the bonding substrate along the positions AA' and BB' is shown in a specific embodiment of the present invention.
[0047] Appendix Figure 6B The diagram shown is a cross-sectional view along position AA', including: a first internal heat dissipation structure 204, a first dielectric layer 205, and a first metal pillar 208. The first internal heat dissipation structure 204 is a metal layer surrounding the first metal pillar 208 and is embedded in the first substrate 21.
[0048] Appendix Figure 6C The diagram shown is a cross-sectional view along the BB' position, including: a first thermally conductive structure 504, a first bonding layer 206, and a first metal pillar 208. The first thermally conductive structure 504 is connected to the first internal heat dissipation structure 204 and is used to conduct heat away from the first internal heat dissipation structure 204.
[0049] It should be noted that, in this document, relational terms such as "second" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "also includes a..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0050] The various specific embodiments in this specification are described in a related manner. For the same or similar parts between the various specific embodiments, please refer to each other. The focus of each specific embodiment is to describe the differences from other specific embodiments.
[0051] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.
Claims
1. A bonding method for bonding a first substrate and a second substrate to form a bonded substrate, the method comprising: Comprising: providing a first and a second wafer, the first and the second wafer surface comprising a first and a second seed layer, and a first and a second passivation layer; forming a first and a second metal layer on the first and the second wafer surface; patterning the first and the second metal layer, removing the first and the second metal layer at the position directly opposite to the first and the second seed layer, forming a first and a second internal heat spreading structure; forming a first and a second dielectric layer and a first and a second bonding layer on the first and the second internal heat spreading structure; etching the first and the second bonding layer, the first and the second dielectric layer, and the first and the second passivation layer, forming a first and a second recess, the first and the second recess exposing the first and the second seed layer; electroplating a first and a second metal pillar in the first and the second recess with the first and the second seed layer as electrodes, forming a first and a second substrate; and forming a hole in at least one of the first and the second substrate after bonding to expose the internal heat spreading structure, filling the hole to form a heat conducting structure, the heat conducting structure being located at the edge of the bonded substrate and exposed to the same surface of the bonded substrate; forming an external heat spreading structure on the surface of the bonded substrate, the external heat spreading structure being a metal layer disposed on the surface of the bonded substrate, the external heat spreading structure being connected to the internal heat spreading structure through the heat conducting structure.
2. The bonding method according to claim 1, wherein The step of forming an external heat spreading structure on the surface of the bonded substrate is further: forming a third metal layer on the surface of the bonded substrate, the third metal layer connecting the heat conducting structure; etching the third metal layer, forming an external heat spreading structure, the external heat spreading structure being connected to the internal heat spreading structure through the heat conducting structure.
Citation Information
Patent Citations
Semiconductor structure and forming method thereof
CN110571205A