ESD protection devices

Abstract

The present invention discloses an electrostatic protection device, comprising at least one triode, the triode comprising: a first well region doped with a first conductive type; a second drift region doped with a second conductive type; the first well region and the second drift region are in lateral contact and form a first contact surface; a first diffusion region heavily doped with a second conductive type is formed in a selected surface region of the first well region, and a first spacing is provided between the first diffusion region and the first contact surface; a second diffusion region heavily doped with a second conductive type is formed in a selected surface region of the second drift region, and a second spacing is provided between the second diffusion region and the first contact surface; a third diffusion region heavily doped with a first conductive type is formed in a selected surface region of the first well region on a side of the first diffusion region away from the first contact surface; and a third well region of a second conductive type is further formed at the bottom of the second diffusion region. The present invention can maintain and improve the breakdown voltage of the device while improving the electrostatic protection capability.

Description

Technical Field

[0001] The present invention relates to a semiconductor integrated circuit, and in particular to an electrostatic discharge (ESD) device. Background Art

[0002] like Figure 1 As shown, it is an application circuit diagram of an electrostatic protection device; the electrostatic protection device 102 is arranged between the input and output pads 101 and the ground. When static electricity appears in the input and output pads 101, the electrostatic protection device 102 is triggered and discharges the static electricity, thereby protecting the internal circuit 103.

[0003] like Figure 2A , which is a schematic diagram of the cross-sectional structure of an existing electrostatic protection device; Figure 2B yes Figure 2A A schematic diagram of the cross-sectional structure of a transistor in the prior art; the existing electrostatic protection device includes at least one transistor, and taking the transistor as a PNP as an example, the transistor includes:

[0004] A first well region 204 having N-type doping.

[0005] The second drift region 205 has P-type doping.

[0006] The first well region 204 and the second drift region 205 are in lateral contact with each other and form a first contact surface. Figure 2B In the embodiment, the first contact surface is shown as line AA.

[0007] A P-type heavily doped first diffusion region 206 a is formed in a selected region on the surface of the first well region 204 , and a first distance s101 is present between the first diffusion region 206 a and the first contact surface.

[0008] A P-type heavily doped second diffusion region 206b is formed in a selected region on the surface of the second drift region 205. A second spacing s102 exists between the second diffusion region 206b and the first contact surface. In the existing structure, the first spacing s101 and the second spacing s102 are usually set equal.

[0009] A third diffusion region 207 heavily doped with N type is formed in a selected region of the surface of the first well region 204 on a side of the first diffusion region 206 a away from the first contact surface.

[0010] The second drift region 205 and the second diffusion region 206 b together form a collector region.

[0011] The first well region 204 forms a base region, and the third diffusion region 207 is a lead-out region of the base region.

[0012] The first diffusion region 206a constitutes an emission region.

[0013] The first diffusion region 206a and the third diffusion region 207 are both connected to the emitter composed of the front metal layer. Figure 2A The emitter is represented by E; the electrode connected to the third diffusion region 207 is usually the base, Figure 2A The base is represented by B, but if Figure 2B As shown, the base and emitter are connected together.

[0014] The second diffusion region 206b is connected to the collector composed of the front metal layer, Figure 2A In the figure, the collector is represented by C.

[0015] The transistor is formed in the P-type epitaxial layer 203 .

[0016] The P-type epitaxial layer 203 is formed on a semiconductor substrate 201 , and an N-type buried layer 202 is formed between the top surface of the semiconductor substrate 201 and the bottom surface of the P-type epitaxial layer 203 . The P-type epitaxial layer 203 is isolated from the semiconductor substrate 201 by the N-type buried layer 202 .

[0017] The junction depth of the first well region 204 is equal to the thickness of the P-type epitaxial layer 203 .

[0018] The junction depth of the second drift region 205 is smaller than the thickness of the P-type epitaxial layer 203 , and the bottom surface of the second drift region 205 is located above the bottom surface of the P-type epitaxial layer 203 .

[0019] like Figure 2A As shown, the multiple transistors of the electrostatic protection device form a parallel structure.

[0020] The first well regions 204 and the second drift regions 205 are arranged alternately.

[0021] The first contact surfaces are formed on both sides of each second drift region 205 , a second diffusion region 206 b is formed in each second drift region 205 , and a second interval s102 exists between the second diffusion region 206 b and the first contact surfaces on both sides.

[0022] The third diffusion regions 207 are disposed in the first well regions 204 located at both sides.

[0023] All the first well regions 204 are connected together, and the third diffusion region 207 is not provided in the first well region 204 located in the middle area.

[0024] The width of the first well region 204 at both sides is greater than the width of the first well region 204 in the middle area.

[0025] Since the transistor is a PNP, the emitter is connected to the high voltage terminal Hi, and the collector is connected to the low voltage terminal Lo.

[0026] When the electrostatic protection device is used to protect a 24V high-voltage device, the first spacing s101 is usually set to 0.5 microns, and the second spacing s102 is also set to 0.5 microns.

[0027] like Figure 2B As shown, the size setting of the second spacing s102 of the triode of the existing electrostatic protection device is simultaneously restricted by two contradictory requirements:

[0028] If the breakdown voltage of the transistor needs to be increased, the second interval s102 needs to be increased.

[0029] If the on-resistance of the collector region needs to be reduced, the second spacing s102 needs to be reduced.

[0030] Therefore, the existing electrostatic protection devices cannot simultaneously improve the voltage resistance and ESD (electrostatic discharge) or electrostatic protection capabilities of the transistor. Summary of the invention

[0031] The technical problem to be solved by the present invention is to provide an electrostatic protection device which can improve the electrostatic protection capability under the condition of ensuring that the breakdown voltage of the device is maintained and improved.

[0032] In order to solve the above technical problems, the electrostatic protection device provided by the present invention comprises at least one transistor, and the transistor comprises:

[0033] A first well region having a first conductivity type doping.

[0034] A second drift region having a second conductivity type doping.

[0035] The first well region and the second drift region are in lateral contact with each other and form a first contact surface.

[0036] A first diffusion region heavily doped with a second conductivity type is formed in a selected region on the surface of the first well region, and a first distance exists between the first diffusion region and the first contact surface.

[0037] A second diffusion region heavily doped with a second conductivity type is formed in a selected region on the surface of the second drift region, and a second distance exists between the second diffusion region and the first contact surface.

[0038] A third diffusion region heavily doped with the first conductivity type is formed in a selected area of ​​a surface of the first well region at a side of the first diffusion region away from the first contact surface.

[0039] A third well region of the second conductivity type is also formed at the bottom of the second diffusion region.

[0040] The second drift region, the third well region and the second diffusion region together form a collector region.

[0041] The first well region forms a base region, and the third diffusion region is a lead-out region of the base region.

[0042] The first diffusion region constitutes an emission region.

[0043] The first diffusion region and the third diffusion region are both connected to an emitter consisting of a front metal layer.

[0044] The second diffusion region is connected to a collector consisting of a front side metal layer.

[0045] The area range of the second spacing is the effective voltage-resistant area of ​​the collector region. The structure of the third well region located at the bottom of the second diffusion region makes the effective voltage-resistant area of ​​the collector region determined by the second drift region. The breakdown voltage of the electrostatic protection device is guaranteed or improved by the second spacing. The larger the second spacing, the greater the breakdown voltage of the electrostatic protection device.

[0046] The third well region is used to reduce the effective resistance of the collector region and thereby improve the electrostatic protection capability.

[0047] A further improvement is that, in terms of layout structure, the layout structures of the second diffusion region and the third well region are identical and aligned.

[0048] A further improvement is that the second spacing is adjusted by setting the layout position of the second diffusion region.

[0049] A further improvement is that the triode is formed in the second conductivity type epitaxial layer.

[0050] A further improvement is that the second conductive type epitaxial layer is formed on a semiconductor substrate, a first conductive type buried layer is formed between the top surface of the semiconductor substrate and the bottom surface of the second conductive type epitaxial layer, and the second conductive type epitaxial layer is isolated from the semiconductor substrate by the first conductive type buried layer.

[0051] A further improvement is that the junction depth of the first well region is equal to the thickness of the second conductivity type epitaxial layer.

[0052] A further improvement is that the junction depth of the second drift region is smaller than the thickness of the second conductivity type epitaxial layer, and the bottom surface of the second drift region is located above the bottom surface of the second conductivity type epitaxial layer.

[0053] A further improvement is that the junction depth of the third well region is equal to the thickness of the second conductivity type epitaxial layer.

[0054] A further improvement is that the plurality of transistors of the electrostatic protection device form a parallel structure.

[0055] A further improvement is that, on the layout, the first well regions and the second drift regions are arranged alternately;

[0056] The first contact surfaces are formed on both sides of each second drift region, a second diffusion region and a third well region located at the bottom of the second diffusion region are formed in each second drift region, and the second diffusion region and the first contact surfaces on both sides have a second distance.

[0057] A further improvement is that the third diffusion region is arranged in the first well region located on both sides.

[0058] A further improvement is that all the first well regions are connected together, and the third diffusion region is not provided in the first well region located in the middle area.

[0059] A further improvement is that the width of the first well region located at both sides is greater than the width of the first well region in the middle area.

[0060] A further improvement is that the transistor is a PNP, the first conductivity type is an N type, and the second conductivity type is a P type.

[0061] A further improvement is that the electrostatic protection device is used to protect a 24V high-voltage device, the first spacing is 0.5 microns, and the second spacing is greater than 1 micron.

[0062] The present invention makes a special arrangement for the collector region structure of the transistor constituting the electrostatic protection device, and adds a third well region on the basis of the second drift region of the collector region. The third well region is arranged at the bottom of the lead-out region of the collector region, i.e., the second diffusion region. On the basis of introducing the third well region, combined with the spacing between the second diffusion region and the first well region constituting the base region, i.e., the second spacing, the adverse effect of the third well region on the effective withstand voltage area of ​​the collector region can be prevented, so that the breakdown voltage of the transistor is guaranteed and improved; at the same time, the effective resistance of the collector region is reduced by utilizing the third well region, thereby improving the electrostatic protection capability. BRIEF DESCRIPTION OF THE DRAWINGS

[0063] The present invention is further described in detail below with reference to the accompanying drawings and specific embodiments:

[0064] Figure 1 It is the application circuit diagram of the electrostatic protection device;

[0065] Figure 2AIt is a schematic diagram of the cross-sectional structure of an existing electrostatic protection device;

[0066] Figure 2B yes Figure 2A A schematic diagram of the cross-sectional structure of a triode;

[0067] Figure 3 It is a schematic diagram of the cross-sectional structure of a transistor of the electrostatic protection device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0068] like Figure 3 FIG. 1 is a schematic diagram of a cross-sectional structure of a transistor of an electrostatic protection device according to an embodiment of the present invention. The electrostatic protection device according to an embodiment of the present invention includes at least one transistor, and the transistor includes:

[0069] A first well region 304 having a first conductivity type doping.

[0070] A second drift region 305 having a second conductivity type doping.

[0071] The first well region 304 and the second drift region 305 are in lateral contact with each other and form a first contact surface, where the first contact surface is shown by line AA.

[0072] A first diffusion region 306 a heavily doped with the second conductivity type is formed in a selected region on the surface of the first well region 304 , and a first distance s101 is present between the first diffusion region 306 a and the first contact surface.

[0073] A second diffusion region 306 b heavily doped with the second conductivity type is formed in a selected region on the surface of the second drift region 305 , and a second distance s102 is provided between the second diffusion region 306 b and the first contact surface.

[0074] A third diffusion region 307 heavily doped with the first conductivity type is formed in a selected region of the surface of the first well region 304 on a side of the first diffusion region 306 a away from the first contact surface.

[0075] A third well region 308 of the second conductivity type is further formed at the bottom of the second diffusion region 306 b.

[0076] The second drift region 305 , the third well region 308 and the second diffusion region 306 b together form a collector region.

[0077] The first well region 304 forms a base region, and the third diffusion region 307 is a lead-out region of the base region.

[0078] The first diffusion region 306a constitutes an emission region.

[0079] The first diffusion region 306a and the third diffusion region 307 are both connected to the emitter composed of the front metal layer. Figure 3 The emitter is represented by E; the electrode connected to the third diffusion region 307 is usually the base, Figure 3 The middle base is represented by B, but Figure 3 In the circuit, the base and emitter are connected together.

[0080] The second diffusion region 306b is connected to the collector composed of the front metal layer, Figure 3 In the figure, the collector is represented by C.

[0081] The area range of the second spacing s102 is the effective voltage-resistant area of ​​the collector region. The structure of the third well region 308 located at the bottom of the second diffusion region 306b makes the effective voltage-resistant area of ​​the collector region determined by the second drift region 305. The breakdown voltage of the electrostatic protection device is guaranteed or improved by the second spacing s102. The larger the second spacing s102 is, the greater the breakdown voltage of the electrostatic protection device is.

[0082] The third well region 308 is used to reduce the effective resistance of the collector region and thereby improve the electrostatic protection capability.

[0083] In the embodiment of the present invention, in terms of layout structure, the second diffusion region 306 b and the third well region 308 have the same layout structure and are aligned.

[0084] The second spacing s102 is adjusted by setting the layout position of the second diffusion region 306b.

[0085] The transistor is formed in the second conductivity type epitaxial layer 303 .

[0086] The second conductive type epitaxial layer 303 is formed on a semiconductor substrate 301 , and a first conductive type buried layer 302 is formed between the top surface of the semiconductor substrate 301 and the bottom surface of the second conductive type epitaxial layer 303 , and the second conductive type epitaxial layer 303 is isolated from the semiconductor substrate 301 by the first conductive type buried layer 302 .

[0087] The junction depth of the first well region 304 is equal to the thickness of the second conductivity type epitaxial layer 303 .

[0088] The junction depth of the second drift region 305 is smaller than the thickness of the second conductive type epitaxial layer 303 , and the bottom surface of the second drift region 305 is located above the bottom surface of the second conductive type epitaxial layer 303 .

[0089] The junction depth of the third well region 308 is equal to the thickness of the second conductivity type epitaxial layer 303 .

[0090] In some embodiments, the plurality of transistors of the electrostatic protection device form a parallel structure. Figure 2A The existing structure shown is similar.

[0091] On the layout, the first well regions 304 and the second drift regions 305 are arranged alternately.

[0092] The first contact surfaces are formed on both sides of each second drift region 305, and a second diffusion region 306b and a third well region 308 located at the bottom of the second diffusion region 306b are formed in each second drift region 305. The second diffusion region 306b and the first contact surfaces on both sides have a second spacing s102.

[0093] The third diffusion regions 307 are disposed in the first well regions 304 located at both sides.

[0094] All the first well regions 304 are connected together, and the third diffusion region 307 is not provided in the first well region 304 located in the middle area.

[0095] The width of the first well region 304 at both sides is greater than the width of the first well region 304 in the middle area.

[0096] In the embodiment of the present invention, the transistor is a PNP, the first conductivity type is an N type, and the second conductivity type is a P type. At this time, the emitter is connected to the high voltage terminal Hi, and the collector is connected to the low voltage terminal Lo. In other embodiments, the transistor can also be an NPN, the first conductivity type is a P type, and the second conductivity type is an N type.

[0097] In a specific application, the following parameters can be used:

[0098] The electrostatic protection device is used to protect a 24V high-voltage device. The first spacing s101 is 0.5 micrometers, and the second spacing s102 is greater than 1 micrometer.

[0099] The embodiment of the present invention makes a special arrangement for the collector region structure of the transistor constituting the electrostatic protection device, and adds a third well region 308 on the basis of the second drift region 305 of the collector region. The third well region 308 is arranged at the bottom of the lead-out region of the collector region, i.e., the second diffusion region 306b. On the basis of introducing the third well region 308, combined with the spacing between the second diffusion region 306b and the first well region 304 constituting the base region, i.e., the second spacing s102, the adverse effect of the third well region 308 on the effective withstand voltage area of ​​the collector region can be prevented, so that the breakdown voltage of the transistor is guaranteed and improved; at the same time, the third well region 308 is used to reduce the effective resistance of the collector region, thereby improving the electrostatic protection capability.

[0100] The present invention has been described in detail above through specific embodiments, but these do not constitute limitations of the present invention. Without departing from the principle of the present invention, those skilled in the art may also make many variations and improvements, which should also be considered as the protection scope of the present invention.

Claims

1. An electrostatic protection device, characterized in that: The electrostatic protection device includes at least one transistor, and the transistor includes: A first well region having a first conductivity type doping; a second drift region having a second conductivity type doping; The first well region and the second drift region are in lateral contact with each other and form a first contact surface; A first diffusion region heavily doped with a second conductivity type is formed in a selected region on the surface of the first well region, and a first distance exists between the first diffusion region and the first contact surface; A second diffusion region heavily doped with a second conductivity type is formed in a selected region on the surface of the second drift region, and a second distance exists between the second diffusion region and the first contact surface; A third diffusion region heavily doped with the first conductivity type is formed in a selected area of ​​the surface of the first well region on a side of the first diffusion region away from the first contact surface; A third well region of the second conductivity type is also formed at the bottom of the second diffusion region; The second drift region, the third well region and the second diffusion region together form a collector region; The first well region forms a base region, and the third diffusion region is a lead-out region of the base region; The first diffusion region forms an emission region; The first diffusion region and the third diffusion region are both connected to an emitter consisting of a front metal layer; The second diffusion region is connected to a collector electrode composed of a front metal layer; The area of ​​the second spacing is the effective withstand voltage area of ​​the collector region. The structure in which the third well region is located at the bottom of the second diffusion region makes the effective withstand voltage area of ​​the collector region determined by the second drift region. The breakdown voltage of the electrostatic protection device is ensured or improved by the second spacing. The larger the second spacing, the larger the breakdown voltage of the electrostatic protection device. The third well region is used to reduce the effective resistance of the collector region and thereby improve the electrostatic protection capability; In terms of layout structure, the layout structures of the second diffusion region and the third well region are identical and aligned; The transistor is a PNP transistor, the first conductivity type is an N type, and the second conductivity type is a P type.

2. The electrostatic protection device according to claim 1, characterized in that: The second spacing is adjusted by setting the layout position of the second diffusion region.

3. The electrostatic protection device according to claim 1, characterized in that: The transistor is formed in the second conductivity type epitaxial layer.

4. The electrostatic protection device according to claim 3, characterized in that: The second conductive type epitaxial layer is formed on a semiconductor substrate, a first conductive type buried layer is formed between the top surface of the semiconductor substrate and the bottom surface of the second conductive type epitaxial layer, and the second conductive type epitaxial layer is isolated from the semiconductor substrate by the first conductive type buried layer.

5. The electrostatic protection device according to claim 4, characterized in that: The junction depth of the first well region is equal to the thickness of the second conductivity type epitaxial layer.

6. The electrostatic protection device according to claim 4, characterized in that: The junction depth of the second drift region is smaller than the thickness of the second conductive type epitaxial layer, and the bottom surface of the second drift region is located above the bottom surface of the second conductive type epitaxial layer.

7. The electrostatic protection device according to claim 4, characterized in that: The junction depth of the third well region is equal to the thickness of the second conductivity type epitaxial layer.

8. The electrostatic protection device according to claim 4, characterized in that: The plurality of transistors of the electrostatic protection device form a parallel structure.

9. The electrostatic protection device according to claim 8, characterized in that: On the layout, the first well regions and the second drift regions are arranged alternately; The first contact surfaces are formed on both sides of each second drift region, a second diffusion region and a third well region located at the bottom of the second diffusion region are formed in each second drift region, and the second diffusion region and the first contact surfaces on both sides have a second distance.

10. The electrostatic protection device according to claim 9, characterized in that: The third diffusion regions are arranged in the first well regions located at both sides.

11. The electrostatic protection device according to claim 10, characterized in that: The first well regions are all connected together, and the third diffusion region is not provided in the first well region located in the middle area.

12. The electrostatic protection device according to claim 11, characterized in that: The width of the first well regions at both sides is greater than the width of the first well region in the middle area.

13. The electrostatic protection device according to claim 1, characterized in that: The electrostatic protection device is used to protect a 24V high-voltage device. The first spacing is 0.5 micrometers, and the second spacing is greater than 1 micrometer.

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