Clamping circuit in a rectifier having more than two electrical potentials provided at the output side

By introducing clamping circuits and overall capacitor circuits into the rectifier circuit, the problem of poor common mode current attenuation is solved, and a more efficient and low-cost rectifier circuit design is achieved, reducing voltage load and improving the efficiency of the rectifier circuit.

CN114503412BActive Publication Date: 2025-07-18SIEMENS AG
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Patent Information

Application Number
CN202080066720.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-09-24
Filing Date
2020-08-06
Publication Date
2025-07-18
Estimated Expiration
2040-08-06

AI Technical Summary

Technical Problem

In existing rectifier circuits, the attenuation effect of common mode current is poor, resulting in reduced interference and efficiency, and the existing clamp circuit schemes have problems of high power loss and high cost.

Method used

A rectifier circuit is designed, including a clamp circuit and an integral capacitor circuit. The endpoint of the diode circuit of the clamp circuit is connected to one of the output terminals and the other output terminals to provide an intermediate potential. The integral capacitor circuit is connected to the reference potential directly or through a circuit network. The choke is arranged in the feeding conductor to reduce the common mode current.

Benefits of technology

Significantly reduce common mode voltage, reduce voltage load at motor insulation, improve efficiency of rectifier circuits, and reduce costs.

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Abstract

The invention relates to a rectifier (2) having at least three output terminals (3), the rectifier (2) being provided at the output terminals with a high potential (U+), a low potential (U−) and at least one intermediate potential (U0). The phase voltages (L1, L2, L3) of a supply network (6) can be fed to the rectifier (2) via supply lines (5). A choke (8) is arranged in the supply lines (5). The clamping circuit (13) has two diode circuits (14) connected in series. One of the terminals (15) of the series circuit is connected to an output terminal (3) at which the rectifier (2) provides one of the intermediate potentials (U0). The other terminal (15) is connected to another output terminal (3). The node (17) is connected to the reference potential (PE) via an overall capacitor circuit (16).
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Description

Technical Field

[0001] The present invention relates to a rectifier circuit,

[0002] - wherein the rectifier circuit includes a rectifier,

[0003] - wherein the rectifier has at least three output terminals, and the rectifier provides electric potentials at the output terminals respectively,

[0004] - wherein one of the provided electric potentials is a high electric potential, and the high electric potential is higher than all other provided electric potentials,

[0005] - wherein another provided electric potential is a low electric potential, and the low electric potential is lower than all other provided electric potentials,

[0006] - wherein, in addition to the high electric potential and the low electric potential, the provided electric potentials also include intermediate electric potentials, and the intermediate electric potentials are located between the high electric potential and the low electric potential,

[0007] - wherein the rectifier circuit has a plurality of feeder conductors, and the phase voltages of the power supply network can be respectively transmitted to the rectifier via the feeder conductors,

[0008] - wherein the rectifier circuit has chokes arranged in the feeder conductors. Background Art

[0009] Such rectifier circuits are generally known.

[0010] For example, the so-called Vienna rectifier is known. The Vienna rectifier is a bridge rectifier, and the rectifying elements of the rectifier are constructed as diodes. A high electric potential and a low electric potential are provided by means of the bridge rectifier. In addition, the phase voltages inside the Vienna rectifier are connected to the output terminals of the intermediate electric potential via corresponding bidirectionally switchable switching devices. The corresponding bidirectionally switchable switching devices can be constructed, for example, as a series circuit of two semiconductor switching elements, such as bipolar transistors or field effect transistors.

[0011] In addition, the so-called 3L rectifier (3L means three levels) is known. The 3L rectifier is a bridge rectifier, and the rectifying elements of the rectifier are constructed as switchable elements (mostly transistors). In addition, the phase voltages inside the 3L rectifier are connected to the output terminals of the intermediate electric potential via bidirectionally switchable switching devices.

[0012] In addition, multilevel rectifiers are also known, that is, rectifiers that provide more than three electric potentials on the output side.

[0013] A rectifier circuit usually feeds the intermediate circuit, and the load is fed from the intermediate circuit. For example, an alternating current with variable amplitude and variable frequency can be fed to an electric drive device via a frequency converter. When the load is operating, high-frequency interference can occur, for example, in the conductors from the rectifier circuit to the load, and this interference can in turn act on the rectifier circuit and the connected load. For example, the conductors from the rectifier circuit to the load form parasitic capacitances, which can resonate with the choke on the input side of the rectifier circuit. This can cause so-called common-mode currents, which are usually only inadequately attenuated by the losses in the choke. As a result, overvoltages can occur between the rectified voltage intermediate circuit and the reference potential (e.g., the ground potential). However, regardless of the type of interference, interference is generally disadvantageous and should be suppressed as much as possible or at least kept at a low level.

[0014] In the prior art, in order to enhance the attenuation of common-mode currents, passive damping is usually used. For this purpose, auxiliary windings are associated with the chokes on the input side of the rectifier circuit. The auxiliary windings are connected in series with each other and in series with a resistor. The auxiliary windings only attenuate common-mode oscillations. The disadvantage of this solution is on the one hand the relatively high power loss, which can lead to a reduction in efficiency and cause problems when discharging the generated heat. Another disadvantage is the relatively high cost.

[0015] In the prior art, in a 2L rectifier (i.e., a rectifier with exactly two output terminals, where the rectifier provides a high potential and a low potential at the output terminals), a so-called clamping circuit is also known. The clamping circuit has a series circuit consisting of two diode circuits, so that the series circuit has a node arranged between the two diode circuits and two end points. Each of the two end points is connected to one of the two output terminals of the rectifier. The node is connected to the reference potential via the overall capacitor circuit of the clamping circuit. The clamping circuit limits the jumps of the high potential and the low potential with respect to the reference potential to half of the potential difference between the high potential and the low potential.

[0016] DE102010008426 A1 relates to a circuit device, which consists of at least one three-stage pulse transformer with a discharge network. The discharge network is constructed from at least one coil, two capacitors, and a series circuit consisting of four diodes, which are polarized in the same direction, where the two external diodes are each directly connected to the input terminals of the negative pole of the input voltage. The electrical connection between the two internal diodes is connected on the one hand via the coil to the input interface of the central interface of the input voltage, and on the other hand to the central bridge branch of the pulse transformer. In one design, the two capacitors are each connected via one interface and the electrical connection between one of the internal diodes and one of the external diodes, and directly connected to the output interface via the other interface. Summary of the Invention

[0017] The object of the present invention is to further develop a rectifier circuit of the aforementioned type such that interference, in particular common-mode current, can be reduced and suppressed as much as possible with the lowest possible expense.

[0018] This object is achieved by a rectifier circuit having the features of the present invention. Advantageous designs of the rectifier circuit are the subject of the individual embodiments.

[0019] According to the present invention, a rectifier circuit of the aforementioned type is designed such that

[0020] - the rectifier circuit has at least one clamping circuit,

[0021] - the clamping circuit has a series circuit consisting of two diode circuits, so that the series circuit has a node arranged between the two diode circuits and two end points,

[0022] - one of the end points is connected to one of the output terminals, at which the rectifier provides one of the intermediate potentials,

[0023] - the other end point is connected to the other output terminal and

[0024] - the clamping circuit has an overall capacitor circuit, and the circuit node is connected to the reference potential via the overall capacitor.

[0025] Thus, the rectifier circuit is mainly supplemented by the clamping circuit, as the rectifier circuit is known as a 2L rectifier. However, the end points of the diode circuits of the clamping circuit are not connected to the output terminals of the high potential and the low potential, but to one of the output terminals and the other output terminal, at which the rectifier provides one of the intermediate potentials. The other output terminal can even be one of the two output terminals, at which the rectifier provides the high potential and the low potential. However, at least one of the two output terminals connected to each other via the clamping circuit is different from these two output terminals. Therefore, the potential difference bridged by the clamping circuit is smaller than the potential difference between the high potential and the low potential. The clamping circuit limits the jump of the potential (including the high potential and the low potential) provided by the rectifier circuit with respect to the reference potential to half of the potential difference between the two potentials of the two output terminals that are connected to each other via the diode circuit of the clamping circuit.

[0026] Furthermore, it is proposed that

[0027] - the overall capacitor circuit has at least one series circuit, which consists of two sub-capacitor circuits,

[0028] - one sub-capacitor circuit connects the node to a wire section of one of the feed wires.

[0029] - the other sub-capacitor circuit connects the same wire section to the reference potential and

[0030] - A choke arranged in the corresponding feed conductor is disposed between the rectifier and the conductor section.

[0031] Utilize the fact that a sub-capacitor circuit (which connects the conductor section to the reference potential) usually already exists for other reasons. In particular, the advantage brought by this design is that only one single connection to the reference potential is required inside the rectifier circuit. In other cases, there are two connections, which can usually cause problems again.

[0032] According to the design, it is feasible that the overall capacitor circuit is directly connected (i.e., without intermediate connecting components) to the node between the two diode circuits. However, it is preferably arranged that

[0033] - The clamping circuit has a circuit network,

[0034] - The circuit network is arranged between the node and the overall capacitor circuit and

[0035] - The circuit network has: a varistor with or without a series resistor, a zener diode with or without a series resistor, a damping resistor, or a series circuit of a resistor and a capacitor with or without a resistor bridging the capacitor.

[0036] Through this design, in particular, fine-tuning of the behavior of the clamping circuit and reduction of the current flowing through the clamping circuit can be achieved. Description of the Drawings

[0037] The above features, characteristics, and advantages of the present invention and the methods and means for implementing them will be more clearly explained below based on the description of the embodiments in conjunction with the drawings. Here, it is shown in the schematic diagrams:

[0038] Figure 1 The rectifier circuit and supplementary components are shown,

[0039] Figure 2 Feasible designs of the rectifier are shown,

[0040] Figure 3 Other feasible designs of the rectifier are shown,

[0041] Figure 4 Shown is Figure 1 modifications of the rectifier circuit and

[0042] Figure 5 Feasible designs of the circuit network are shown. Detailed Description of the Embodiment

[0043] According to Figure 1, the rectifier circuit 1 has a rectifier 2. The rectifier 2 has at least three output terminals 3. The output terminals 3 are usually connected to each other via support capacitors 3'. The rectifier 2 provides electric potentials U+, U0, U- at each output terminal 3 respectively. The provided electric potentials U+, U0, U- are DC voltage potentials. The electric potential U+ is the highest electric potential provided by the rectifier 2. Hereinafter it is referred to as the high electric potential U+. The electric potential U- is the lowest electric potential provided by the rectifier 2. Hereinafter it is referred to as the low electric potential U-. All other electric potentials U0 (here only the single electric potential U0) provided by the rectifier 2 are located between the high electric potential U+ and the low electric potential U-. These electric potentials are hereinafter all referred to as intermediate electric potentials U0.

[0044] The electric potentials U+, U0, U- are supplied to the load 4. The load 4 can be constructed, for example, as an electric motor 4' according to the view in Figure 1 , and each electric motor is fed via an inverter 4". However, the load 4 can also be constructed as something else. The load 4 is not the subject matter of the present invention.

[0045] The rectifier circuit 1 has a plurality of feed wires 5. The phase voltages L1, L2, L3 of the power supply network 6 are supplied to the rectifier 2 via the feed wires 5. Filter elements 7 are arranged in the feed wires 5 relative to the power supply network 6. The filter elements 7 can be constructed as chokes or include chokes. Therefore, the power supply network 6 and the filter elements 7 are not the subject matter of the present invention. In addition, chokes 8 are arranged in the feed wires 5. Therefore, the phase voltages L1, L2, L3 supplied to the rectifier 2 are supplied to the rectifier 2 via the corresponding chokes 8. The chokes 8 are components of the rectifier circuit 1.

[0046] For the internal design of the rectifier 2, different designs are feasible. The most common feasible design is described below, in which the rectifier 2 provides only a single intermediate electric potential U0 in addition to the high and low electric potentials U+, U-.

[0047] In this case, the rectifier 2 can have, for example, diodes 9 according to the view in Figure 2 . The phase voltages L1, L2, L3 supplied to the rectifier 2 are rectified by means of the diodes 9. The high and low electric potentials U+, U- are generated in this way and method. In addition, the rectifier 2 has a bidirectionally acting electric switching device. Usually, the electronic switching device has two series-connected electronic switches 10, such as IGBTs or FETs, according to the view in Figure 2 . If necessary, the electronic switches 10 can be connected in parallel with diodes 11. The diodes 11 can alternatively be independent components or inherent elements of the electronic switches 10. The intermediate electric potential U0 is provided by means of the electronic switching device according to the corresponding drive control.

[0048] Alternatively, the rectifier 2 can be according to Figure 3Instead of the view of , an electronic switch 12, such as an IGBT or FET, is provided in place of the diode 9 or parallel to the diode 9. The diode 9 (as long as the diode still exists) can alternatively also be an independent component or an inherent element of the electronic switch 12. With the aid of the electronic switch 12, a high potential and a low potential U+, U− are provided according to the corresponding drive control. In addition, similar to Figure 2 , there is an electronic switch device by means of which an intermediate potential U0 is provided.

[0049] Figure 2 and Figure 3 The circuit-technical configuration and the operation of the rectifier 2 of are generally known to those skilled in the art. Therefore, no detailed description thereof is required.

[0050] According to Figure 1 , the rectifier circuit 1 also has a plurality of clamping circuits 13. There is at least a single clamping circuit 13. However, there can also be a plurality of clamping circuits 13. In particular, according to Figure 1 's view, there can be one clamping circuit 13 for every two consecutively provided potentials U+, U0 or U0, U−. If there are a plurality of clamping circuits 13, the clamping circuits are generally constructed identically to each other. Therefore, only one of the clamping circuits 13 will be elaborated in detail below.

[0051] The clamping circuit 13 has a series circuit composed of two diode circuits 14. Each of the two diode circuits 14 of the clamping circuit 13 can be a single diode or a series circuit or a parallel circuit of diodes.

[0052] The ends 15 of the so-called series circuit are respectively connected to the output terminals 3 at which the rectifier 2 respectively provides one of the potentials U+, U0, U−. One of the output terminals 3 is the output terminal 3 at which the rectifier 2 provides the intermediate potential U0. The other output terminals 3 are the output terminals 3 at which the rectifier 2 provides the high potential U+ or the low potential U−. In accordance with Figure 1In the case of the design solution, in this design solution, the rectifier 2 provides a total of exactly three electric potentials U+, U0, U−, which is mandatory in this case. It is also possible that the rectifier 2 has more than three output terminals 3 and thus also provides more than three electric potentials U+, U0, U−. However, if the rectifier 2 has more than three output terminals 3 and thus also provides more than three electric potentials U+, U0, U−, two output terminals 3 can also be connected to each other via a series circuit of the diode circuit 14, and these two output terminals provide two different intermediate electric potentials U0. Preferably, two output terminals 3 provide directly adjacent electric potentials U+, U0, U−, and these two output terminals are connected to each other via a series circuit of the diode circuit 14. Preferably, the rectifier 2 does not provide an electric potential between two electric potentials U+, U0 or U0, U−, and the corresponding output terminals 3 of these electric potentials are connected to each other via a series circuit of the diode circuit 14.

[0053] The clamping circuit 11 also has an overall capacitor circuit 16. Via the overall capacitor circuit 16, the node 17 is connected to the reference potential PE, such as a ground wire or ground. The node 17 is arranged between two diode circuits 14 on its own.

[0054] It is feasible that the overall capacitor circuit 16 is directly connected to the reference potential PE. However, according to Figure 1 the view, the overall capacitor circuit 16 has a plurality of series circuits, and each of these series circuits is composed of two sub-capacitor circuits 18, 19 on its own. One sub-capacitor circuit 18 of such a series circuit connects the node 17 to a wire section of one of the feed wires 5. The other sub-capacitor circuit 19 of such a series circuit connects the same wire section to the reference potential PE. The wire section is selected such that the choke 8 of the corresponding feed wire 5 is arranged between the rectifier 2 and the so-called wire section.

[0055] Generally, the overall capacitor circuit 16 is constructed symmetrically such that for each phase voltage L1, L2, L3 there is such a series circuit, and each of these series circuits is composed of two sub-capacitor circuits 18, 19 on their part. However, this is not a mandatory requirement.

[0056] In the simplest case, the overall capacitor circuit 16 is directly connected to the node 17. However, according to Figure 4 the view in, alternatively, it is feasible that the clamping circuit 13 has a circuit network 20. The circuit network 20 is arranged between the node 17 and the overall capacitor circuit 16 in this case. Therefore, the circuit network 20 can be constructed in different ways and methods. Therefore, the circuit network 20 can, for example, according to Figure 5 the view in, alternatively have the following design solution:

[0057] - The circuit network can be configured as a varistor. A varistor (as is well known to those skilled in the art) is an electrical component, and the resistance of the varistor is related to the voltage applied across the component. In particular, the differential resistance of the varistor rapidly decreases above a specific threshold voltage. The threshold voltage is determined by the construction and design of the varistor, respectively.

[0058] - The circuit network can be configured as a varistor, which is a series resistor.

[0059] - The circuit network can be configured as a zener diode.

[0060] - The circuit network can be configured as a zener diode, which is a series resistor.

[0061] - The circuit network can be configured as a damping resistor.

[0062] - The circuit network can be configured as a series circuit of a resistor and a capacitor.

[0063] - The circuit network can be configured as a series circuit of a resistor and a capacitor, wherein the capacitor is additionally bridged by another resistor.

[0064] In summary, the present invention relates to the following facts:

[0065] The rectifier 2 has at least three output terminals 3, at which the rectifier 2 provides a high potential U+, a low potential U−, and at least one intermediate potential U0. The phase voltages L1, L2, L3 of the power supply network 6 can be supplied to the rectifier 2 via the supply conductors 5. An inductor 8 is arranged in the supply conductors 5. The clamping circuit 13 has two diode circuits 14 connected in series. One of the ends 15 of the series circuit is connected to an output terminal 3 at which the rectifier 2 provides one of the intermediate potentials U0. The other end 15 is connected to another output terminal 3. The node 17 is connected to the reference potential PE via the integral capacitor circuit 16.

[0066] The present invention has several advantages. Due to the application of the rectifier circuit 1, the excited common-mode voltage has been significantly reduced. The rectifier circuit provides, in addition to the high potential U+ and the low potential U−, also an intermediate potential U0. The potential jump can also be limited to half of the potential difference between two potentials U+, U0 or U0, U−, which are connected to each other via the clamping circuit 13, by means of the clamping circuit 13. Thereby, in particular, the voltage load at the insulation of the electric machine 4' can be significantly reduced again. The solution is robust and can be implemented at low cost. Most of the energy stored in the parasitic capacitance of the conductors between the rectifier circuit 1 and the load 4 returns to the intermediate circuit. Thereby, the efficiency of the overall circuit is improved, especially in such long conductors.

[0067] Even though the present invention has been illustrated and described in detail in terms of preferred embodiments, the present invention is not limited to the disclosed examples, and those skilled in the art can derive other variant solutions therefrom without departing from the scope of protection of the present invention.

Claims

1. A rectifier circuit, - Among them, The rectifier circuit has a rectifier (2), - wherein the rectifier (2) has at least three output terminals (3), and the rectifier (2) provides electric potentials (U+, U0, U-) at the output terminals respectively, - wherein one of the provided electric potentials (U+, U0, U-) is a high potential (U+), and the high potential is higher than all other provided electric potentials (U0, U-), - wherein another of the provided electric potentials (U+, U0, U-) is a low potential (U-), and the low potential is lower than all other provided electric potentials (U+, U0), - wherein, in addition to the high potential (U+) and the low potential (U-), the provided electric potentials (U+, U0, U-) also have an intermediate potential (U0), and the intermediate potential is located between the high potential and the low potential (U+, U-), - wherein the rectifier circuit has a plurality of feeding wires (5), and the phase voltages (L1, L2, L3) of a power supply network (6) can be respectively transmitted to the rectifier (2) via the feeding wires, - wherein the rectifier circuit has chokes (8) arranged in the feeding wires (5), characterized in that - the rectifier circuit has at least one clamping circuit (13), - the clamping circuit (13) has a series circuit composed of two diode circuits (14), such that the series circuit has a node (17) arranged between the two diode circuits (14) and two end points (15), - one of the end points (15) is connected to one of the output terminals (3), and the rectifier (2) provides one of the intermediate potentials (U0) at the output terminal, - the other end point (15) is connected to another output terminal (3), - the clamping circuit (13) has an overall capacitor circuit (16), and the node (17) is connected to a reference potential (PE) via the overall capacitor circuit, - the overall capacitor circuit (16) has at least one series circuit, and the series circuit is composed of two sub-capacitor circuits (18, 19), - one sub-capacitor circuit (18) connects the node (17) to a wire section of one of the feeding wires (5), - the other sub-capacitor circuit (19) connects the wire section to the reference potential (PE), and - the choke (8) arranged in the corresponding feeding wire (5) is arranged between the rectifier (2) and the wire section.

2. The rectifier circuit according to claim 1, characterized in that - the clamping circuit (13) has a circuit network (20), - the circuit network (20) is arranged between the node (17) and the overall capacitor circuit (16), and - the circuit network (20) has: a varistor with or without a series resistor, a zener diode with or without a series resistor, a damping resistor, or a series circuit of a resistor and a capacitor with or without a resistor bridging the capacitor.

Citation Information

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