A physical verification method for a standard unit library

Abstract

This application provides a physical verification method for a standard cell library, comprising: randomly selecting cell 1, cell 2, cell 3, cell 4, and cell 5 arranged by width; splicing each cell with itself and other cells left and right, and labeling them as standard cell 1, standard cell 2, standard cell 3, standard cell 4, and standard cell 5; splicing each cell with its left and right mirror images left and right, and then splicing them left and right again, and labeling them as mirror cell 1, mirror cell 2, mirror cell 3, mirror cell 4, and mirror cell 5; splicing each cell with its corresponding mirror image vertically, and labeling them as spliced ​​cell 1, spliced ​​cell 2, spliced ​​cell 3, spliced ​​cell 4, and spliced ​​cell 5; splicing standard cells 1 to 5 and spliced ​​cells 1 to 5 into a test layout; and performing design rule checks on the test layout.

Description

Technical Field

[0001] This application relates to the field of integrated circuit design, and more particularly to a physical verification method for a standard cell library. Background Technology

[0002] The standard cell library is a collection of basic logic cells developed based on mature and stable processes. Each standard cell library contains hundreds to thousands of cells, with a wide variety of cell types, including basic cells, combinational logic cells, sequential logic cells, and special cells. The standard cell library is the foundational database for automated design of Very Large Scale Integration (VLSI) circuits. Its database model is rich, including cell simulation libraries, cell symbols, cell layouts, logic function models, timing synthesis library models, cell netlists, and place and route libraries.

[0003] With the increasing integration density and operating speed of monolithic integrated circuits, designing and developing standard cell libraries that conform to process design rules, have correct logic functions, complete model data, and accurate electrical characteristics has become a necessary condition for VLSI chip design. After the standard cell library is developed, it must undergo thorough system testing and verification. Ensuring the integrity and accuracy of the standard cell library is crucial and is key to ensuring the success of chip design and tape-out.

[0004] With the rapid development of integrated circuit technology, especially as we move towards process nodes such as 40nm, 28nm, and 14nm FinFET, the design of standard cell libraries has become increasingly complex, and the layout design of individual cells has also become very complex. Therefore, the physical verification of cell libraries has become particularly important.

[0005] However, problems still exist in the physical verification of standard cell libraries. Therefore, it is necessary to develop more efficient and reliable technical solutions. Summary of the Invention

[0006] This application provides a physical verification method for a standard cell library, which can accurately present design rule verification errors of the standard cell library, comprehensively cover various situations, and is simple, fast, and avoids waste.

[0007] This application provides a physical verification method for a standard cell library, comprising: randomly selecting five test cells arranged by width as a standard cell library, and labeling them as Cell 1, Cell 2, Cell 3, Cell 4, and Cell 5 respectively; splicing each cell with itself and other cells left and right, and labeling the spliced ​​cells as Standard Cell 1, Standard Cell 2, Standard Cell 3, Standard Cell 4, and Standard Cell 5 respectively; splicing each cell with its left and right mirror images left and right, and then splicing them left and right again, and labeling the spliced ​​cells as Mirror Cell 1, Mirror Cell 2, Mirror Cell 3, Mirror Cell 4, and Mirror Cell 5 respectively; splicing each cell with its corresponding mirror image top and bottom, and labeling the spliced ​​cells as Spliced ​​Cell 1, Spliced ​​Cell 2, Spliced ​​Cell 3, Spliced ​​Cell 4, and Spliced ​​Cell 5 respectively; splicing the standard cells 1 to 5 and the spliced ​​cells 1 to 5 into a test layout; and performing design rule checks on the test layout.

[0008] In some embodiments of this application, the width order of the five test units is: Unit 1 > Unit 2 > Unit 3 > Unit 4 > Unit 5.

[0009] In some embodiments of this application, the width is the dimension in the left-right direction.

[0010] In some embodiments of this application, each unit is spliced ​​left and right with itself and other units respectively, and the spliced ​​units are labeled as standard unit one, standard unit two, standard unit three, standard unit four and standard unit five. This includes: splicing unit one left and right with units one to five respectively and labeling it as standard unit one; splicing unit two left and right with units two to five respectively and labeling it as standard unit two; splicing unit three left and right with units three to five respectively and labeling it as standard unit three; splicing unit four left and right with units four and five respectively and labeling it as standard unit four; splicing unit five left and right with units five and labeling it as standard unit five.

[0011] In some embodiments of this application, each unit is stitched left and right with its own left and right mirror images, and then stitched again. The stitched units are then labeled as mirror unit one, mirror unit two, mirror unit three, mirror unit four, and mirror unit five. This includes: stitching units one to five with their respective left and right mirror images, and then stitching again, and labeling them as mirror unit one; stitching units two to five with their respective left and right mirror images, and then stitching again, and labeling them as mirror unit two; stitching units three to five with their respective left and right mirror images, and then stitching again, and labeling them as mirror unit three; stitching units four and five with their respective left and right mirror images, and then stitching again, and labeling them as mirror unit four; and stitching unit five with its own left and right mirror images, and labeling it as mirror unit five.

[0012] In some embodiments of this application, each type of unit is spliced ​​vertically with its corresponding mirror unit, and the spliced ​​units are labeled as splicing unit one, splicing unit two, splicing unit three, splicing unit four, and splicing unit five. This includes: splicing several units one to the top and bottom sides of mirror unit one, where the total width of the several units one is greater than or equal to the width of mirror unit one; wherein, when the width of mirror unit one is smaller than the width of the several units one, the insufficient portion is filled with unit five, and the spliced ​​unit is labeled as splicing unit one; and splicing several units two to the top and bottom sides of mirror unit two, where the total width of the several units two is greater than or equal to the width of mirror unit two; wherein, when the width of mirror unit two is smaller than the width of the several units two, the insufficient portion is filled with unit five, and the spliced ​​unit... Marked as splicing unit two; several units three are spliced ​​on the top and bottom sides of mirror unit three, the total width of the several units three is greater than or equal to the width of mirror unit three, wherein when the width of mirror unit three is smaller than the width of the several units three, the insufficient part is filled with unit five, and the spliced ​​unit is marked as splicing unit three; several units four are spliced ​​on the top and bottom sides of mirror unit four, the total width of the several units four is greater than or equal to the width of mirror unit four, wherein when the width of mirror unit four is smaller than the width of the several units four, the insufficient part is filled with unit five, and the spliced ​​unit is marked as splicing unit four; several units five are spliced ​​on the top and bottom sides of mirror unit five, the total width of the several units five is equal to the width of mirror unit five, and the spliced ​​unit is marked as splicing unit five.

[0013] In some embodiments of this application, splicing the standard units one to five and the splicing units one to five into a test layout includes: arranging each of the standard units one to five in three rows vertically in the lower left corner of the layout; splicing each of the splicing units one to five to the right of the corresponding standard units one to five, and moving them one step to the right in sequence until the splicing is completed; and filling the gaps after the movement with unit five to complete the test layout.

[0014] In some embodiments of this application, the method for calculating the number of steps is: the width of the corresponding unit divided by the width of unit five.

[0015] In some embodiments of this application, when standard cells one to five are arranged in three rows vertically in the lower left corner of the layout, if the power supply types of adjacent standard cells are different, one of the standard cells needs to be mirrored vertically.

[0016] In some embodiments of this application, the test layout is rectangular.

[0017] The physical verification method for the standard cell library described in this application randomly selects five test cells according to their size, randomly splices the five test cells in all directions, and then performs physical verification. This method can accurately present design rule verification errors of the standard cell library, comprehensively cover various situations, is simple and fast, and avoids waste. Attached Figure Description

[0018] The following accompanying drawings describe in detail the exemplary embodiments disclosed in this application. The same reference numerals denote similar structures in several views of the drawings. Those skilled in the art will understand that these embodiments are non-limiting and exemplary, and the drawings are for illustrative purposes only and are not intended to limit the scope of this application. Other embodiments may similarly fulfill the inventive intent of this application. It should be understood that the drawings are not drawn to scale. Wherein:

[0019] Figure 1 This is a flowchart of the physical verification method for the standard cell library described in the embodiments of this application;

[0020] Figure 2 This is a schematic diagram of the test layout in the physical verification method of the standard cell library described in the embodiments of this application. Detailed Implementation

[0021] The following description provides specific application scenarios and requirements for this application, intended to enable those skilled in the art to make and use the content of this application. Various partial modifications to the disclosed embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments and applications without departing from the spirit and scope of this application. Therefore, this application is not limited to the embodiments shown, but rather to the widest scope consistent with the claims.

[0022] The technical solution of the present invention will be described in detail below with reference to the embodiments and accompanying drawings.

[0023] Verification after the standard cell design of a semiconductor integrated circuit is completed requires more than just design rule check (DRC), layout and circuit schematics. Figure 1 Verification of layout versus schematic test (LVS) and electrical rule check (ERC) also requires verification of the entire standard cell library. Some verification methods use Cadence's EDI and Synopsys' ICCAPR tool for physical verification of the entire cell library, but this method has several drawbacks: the design is relatively small; it cannot provide full coverage or consider all possible scenarios; and verifying at the process level wastes too many resources.

[0024] To address the aforementioned issues, this application provides a physical verification method for a standard cell library. Five test cells are randomly selected based on their size, and these five test cells are randomly assembled in all directions before physical verification is performed. This method can accurately reveal design rule verification errors in the standard cell library, comprehensively cover various situations, is simple and fast, and avoids waste.

[0025] Figure 1 This is a flowchart illustrating the physical verification method for the standard cell library described in an embodiment of this application. (Reference) Figure 1 As shown, embodiments of this application provide a physical verification method for a standard cell library, including:

[0026] Step S110: Randomly select five test cells arranged by width as a standard cell library, and label them as Cell 1, Cell 2, Cell 3, Cell 4 and Cell 5 respectively;

[0027] Step S120: Each type of unit is spliced ​​left and right with itself and other units respectively, and the spliced ​​units are labeled as Standard Unit 1, Standard Unit 2, Standard Unit 3, Standard Unit 4 and Standard Unit 5;

[0028] Step S130: Each type of unit is spliced ​​with its left and right mirror images, and then spliced ​​again. The spliced ​​units are labeled as mirror unit one, mirror unit two, mirror unit three, mirror unit four, and mirror unit five.

[0029] Step S140: Each type of unit is spliced ​​vertically with its corresponding mirror unit, and the spliced ​​units are labeled as splicing unit 1, splicing unit 2, splicing unit 3, splicing unit 4 and splicing unit 5.

[0030] Step S150: Assemble the standard units one to five and the splicing units one to five into a test layout;

[0031] Step S160: Perform a design rule check on the test layout.

[0032] The physical verification method for the standard cell library described in the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0033] refer to Figure 1 As shown, in step S110, five test units arranged by width are randomly selected as a standard unit library and labeled as Unit 1, Unit 2, Unit 3, Unit 4 and Unit 5 respectively.

[0034] Table 1

[0035]

[0036] Table 1 shows the names and structures of the five units to be tested.

[0037] Referring to Table 1, in some embodiments of this application, the width order of the five test units is: Unit 1 > Unit 2 > Unit 3 > Unit 4 > Unit 5. In some embodiments of this application, the width refers to the dimension in the left-right direction.

[0038] Among them, Unit 1, Unit 2, Unit 3, and Unit 4 are functional units, and Unit 5 can be a filling unit or a functional unit. The width of Unit 5 is the minimum basic unit width, that is, the widths of Unit 1, Unit 2, Unit 3, and Unit 4 are all integer multiples of the width of Unit 5.

[0039] In addition, it should be noted that Table 1 shows the size relationship between the five test units according to the size ratio. However, in the following text, different test units will be randomly spliced ​​together. For ease of display, the different test units need to be drawn to the same size (using the same cell shape to represent different test units, and only using different fill patterns to distinguish them). This is only used to illustrate how the different test units are spliced ​​together.

[0040] Table 2

[0041]

[0042] Table 2 shows the schematic structure of the five units to be tested.

[0043] Referring to Table 2, for simplicity, cells of the same size but different patterns are used to represent different test units. Tables A and B represent the left and right sides of each test unit. Later, the test units will be randomly assembled, and the assembly on different sides will be different; therefore, different symbols will be used to distinguish the left and right sides.

[0044] Continue to refer to Figure 1 As shown in step S120, each type of unit is spliced ​​left and right with itself and other units respectively, and the spliced ​​units are marked as standard unit one, standard unit two, standard unit three, standard unit four and standard unit five.

[0045] Table 3

[0046]

[0047] Table 3 shows schematic structures of different standard units.

[0048] Referring to Table 3, in some embodiments of this application, each unit is spliced ​​left and right with itself and other units respectively, and the spliced ​​units are labeled as standard unit one, standard unit two, standard unit three, standard unit four and standard unit five. The splicing includes: splicing unit one left and right with units one to five respectively and labeling it as standard unit one; splicing unit two left and right with units two to five respectively and labeling it as standard unit two; splicing unit three left and right with units three to five respectively and labeling it as standard unit three; splicing unit four left and right with units four and five respectively and labeling it as standard unit four; splicing unit five left and right with units five and labeling it as standard unit five.

[0049] The purpose of step S120 is to achieve left-right splicing between any two units (including identical units). Specifically, referring to Table 3, standard unit one includes splicing of unit one with unit one (including splicing on different sides, i.e., A to A, B to B, and A to B); splicing of unit one with unit two (including splicing on different sides, i.e., A to A, B to B, and A to B); splicing of unit one with unit three (including splicing on different sides, i.e., A to A, B to B, and A to B); splicing of unit one with unit four (including splicing on different sides, i.e., A to A, B to B, and A to B); and splicing of unit one with unit five (including splicing on different sides, i.e., A to A, B to B, and A to B).

[0050] Similarly, referring to Table 3, standard unit 2 includes the splicing of unit 2 and unit 2 (including splicing on different sides, i.e., A to A, B to B and A to B); the splicing of unit 2 and unit 3 (including splicing on different sides, i.e., A to A, B to B and A to B); the splicing of unit 2 and unit 4 (including splicing on different sides, i.e., A to A, B to B and A to B); and the splicing of unit 2 and unit 5 (including splicing on different sides, i.e., A to A, B to B and A to B).

[0051] Similarly, standard unit three includes the splicing of unit three and units three through five; standard unit four includes the splicing of unit four and unit four, as well as unit four and unit five; standard unit five implements the splicing of unit five and unit five.

[0052] As can be seen from the above, step S120 can achieve all left and right splicing between any two units.

[0053] In some embodiments of this application, the width order of the five standard units is: Standard Unit 1 > Standard Unit 2 > Standard Unit 3 > Standard Unit 4 > Standard Unit 5. In some embodiments of this application, the width refers to the dimension in the left-right direction.

[0054] Continue to refer to Figure 1 In step S130, each type of unit is spliced ​​with its left and right mirror images, and then spliced ​​again. The spliced ​​units are labeled as mirror unit one, mirror unit two, mirror unit three, mirror unit four, and mirror unit five.

[0055] Table 4

[0056]

[0057] Table 4 shows schematic structures of different mirror units.

[0058] Referring to Table 4, in some embodiments of this application, each unit is stitched left and right with its own left and right mirror images, and then stitched left and right again. The stitched units are labeled as mirror unit one, mirror unit two, mirror unit three, mirror unit four, and mirror unit five. This includes: stitching units one to five with their respective left and right mirror images, and then stitching them left and right again, and labeling them as mirror unit one; stitching units two to five with their respective left and right mirror images, and then stitching them left and right again, and labeling them as mirror unit two; stitching units three to five with their respective left and right mirror images, and then stitching them left and right again, and labeling them as mirror unit three; stitching units four and five with their respective left and right mirror images, and then stitching them left and right again, and labeling them as mirror unit four; and stitching unit five with its own left and right mirror images, and labeling it as mirror unit five.

[0059] The purpose of step S130 is to realize the mirror splicing of different units and the re-sponsoring after mirror splicing, in order to prepare for the next step of realizing the top and bottom splicing.

[0060] In some embodiments of this application, the width order of the five mirror units is: mirror unit 1 > mirror unit 2 > mirror unit 3 > mirror unit 4 > mirror unit 5. In some embodiments of this application, the width refers to the dimension in the left-right direction.

[0061] Continue to refer to Figure 1 As shown, in step S140, each type of unit is spliced ​​vertically with its corresponding mirror unit, and the spliced ​​units are labeled as splicing unit one, splicing unit two, splicing unit three, splicing unit four, and splicing unit five.

[0062] Table 5

[0063]

[0064] Table 5 shows schematic structures of different splicing units.

[0065] Referring to Table 5, in some embodiments of this application, each type of unit is spliced ​​vertically with its corresponding mirror unit. The spliced ​​units are labeled as splicing unit 1, splicing unit 2, splicing unit 3, splicing unit 4, and splicing unit 5. The splicing process includes: splicing several units 1 on the top and bottom sides of mirror unit 1, wherein the total width of the several units 1 is greater than or equal to the width of mirror unit 1, wherein when the width of mirror unit 1 is smaller than the width of the several units 1, the insufficient portion is filled with unit 5, and the spliced ​​unit is labeled as splicing unit 1; splicing several units 2 on the top and bottom sides of mirror unit 2, wherein the total width of the several units 2 is greater than or equal to the width of mirror unit 2, wherein when the width of mirror unit 2 is smaller than the width of the several units 2, the insufficient portion is filled with unit 5. The spliced ​​unit is labeled as splicing unit two; several units three are spliced ​​on the top and bottom sides of mirror unit three, the total width of the several units three is greater than or equal to the width of mirror unit three, wherein when the width of mirror unit three is smaller than the width of the several units three, the insufficient part is filled with unit five, and the spliced ​​unit is labeled as splicing unit three; several units four are spliced ​​on the top and bottom sides of mirror unit four, the total width of the several units four is greater than or equal to the width of mirror unit four, wherein when the width of mirror unit four is smaller than the width of the several units four, the insufficient part is filled with unit five, and the spliced ​​unit is labeled as splicing unit four; several units five are spliced ​​on the top and bottom sides of mirror unit five, the total width of the several units five is equal to the width of mirror unit five, and the spliced ​​unit is labeled as splicing unit five.

[0066] It should be noted that Table 5 only schematically shows how different splicing units are spliced ​​together. When the width of the mirror unit is smaller than that of the corresponding units, the insufficient part is filled with unit five. Unit five used as filler is omitted in Table 5.

[0067] In some embodiments of this application, the width order of the five splicing units is: splicing unit 1 > splicing unit 2 > splicing unit 3 > splicing unit 4 > splicing unit 5. In some embodiments of this application, the width refers to the dimension in the left-right direction.

[0068] The purpose of step S140 is to achieve the vertical splicing of each unit with any other unit, including vertical splicing on different sides (A and A, A and B, B and B). Specifically, similar to step S120 which achieves the horizontal splicing of any two units, as shown in Table 5, splicing unit one includes vertical splicing of unit one with unit one; vertical splicing of unit one with unit two; vertical splicing of unit one with unit three; vertical splicing of unit one with unit four; and vertical splicing of unit one with unit five.

[0069] Similarly, by analogy, splicing unit two includes unit two and the vertical splicing of unit two to unit five; splicing unit three includes unit three and the vertical splicing of unit three to unit five; splicing unit four includes unit four and the vertical splicing of unit four and unit five; splicing unit five realizes the vertical splicing of unit five and unit five.

[0070] Continue to refer to Figure 1 As shown, in step S150, the standard units one to five and the splicing units one to five are spliced ​​together to form a test layout.

[0071] Figure 2 This is a schematic diagram of the test layout in the physical verification method of the standard cell library described in the embodiments of this application.

[0072] refer to Figure 2 As shown, in some embodiments of this application, the standard units one to five and the splicing units one to five are spliced ​​together to form a test layout, including: arranging standard units one to five in three rows vertically in the lower left corner of the layout; splicing units one to five are spliced ​​to the right of their respective standard units one to five, and moving one step to the right in sequence until the splicing is completed; and filling the gaps after the movement with unit five to complete the test layout.

[0073] In some embodiments of this application, the method for calculating the number of steps is as follows: the width of the corresponding unit is divided by the width of unit five. For example, if the width of unit one is 12.04 micrometers and the width of unit five is 0.28 micrometers, then the splicing unit one moves to the right by 12.04 / 0.28 steps, which is 43 steps. The distance of each step can be equal to the minimum distance (the width of unit five) of 0.28 micrometers, or it can be an integer multiple of the width of unit five, i.e., an integer multiple of 0.28 micrometers.

[0074] In some embodiments of this application, when standard cells one to five are arranged in three rows vertically in the lower left corner of the layout, if the power supply types of adjacent standard cells are different, one of the standard cells needs to be mirrored vertically.

[0075] In some embodiments of this application, the test layout is rectangular. (See reference...) Figure 2 As shown, in order to make the entire layout into a rectangle, several units can be used to fill all the empty spaces, thus completing the layout into a rectangle and avoiding unnecessary errors.

[0076] In some embodiments of this application, care is taken to ensure that the boundaries of each unit are aligned in both the horizontal and vertical directions during the splicing process of the entire layout to avoid errors.

[0077] In some embodiments of this application, steps 110, 120, 130, 140, and 150 do not represent a specific order.

[0078] Figure 2 The layout shown ensures that all units are covered regardless of whether they are joined vertically, horizontally, or mirrored, guaranteeing comprehensive verification coverage.

[0079] Continue to refer to Figure 1 As shown, in step S160, a design rule check is performed on the test layout. Any suitable tool or software can be used to perform the design rule check on the test layout.

[0080] In some embodiments of this application, the standard cell library can be adjusted based on the inspection report generated after performing design rule checks.

[0081] The physical verification method for the standard cell library described in this application randomly selects five test cells according to their size, randomly splices the five test cells in all directions, and then performs physical verification. This method can accurately present design rule verification errors of the standard cell library, comprehensively cover various situations, is simple and fast, and avoids waste.

[0082] In summary, after reading this application, those skilled in the art will understand that the foregoing application content is presented by way of example only and is not restrictive. Although not explicitly stated herein, those skilled in the art will understand that this application is intended to encompass various reasonable changes, improvements, and modifications to the embodiments. These changes, improvements, and modifications are all within the spirit and scope of the exemplary embodiments of this application.

[0083] It should be understood that the term "and / or" as used in this embodiment includes any or all combinations of one or more of the associated listed items. It should be understood that when an element is referred to as "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or there may be an intermediate element.

[0084] It should be understood that the terms "comprising," "containing," "including," or "including" as used in this application document indicate the presence of the described features, wholes, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and / or groups thereof.

[0085] It should also be understood that although the terms first, second, third, etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. Therefore, without departing from the teachings of this application, a first element in some embodiments may be referred to as a second element in other embodiments. The same reference numerals or the same reference signs denote the same elements throughout the specification.

[0086] Furthermore, this application specification describes exemplary embodiments by referring to idealized exemplary cross-sectional views and / or plan views and / or perspective views. Therefore, differences from the illustrated shapes are foreseeable due to factors such as manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but should include deviations in shape caused, for example, by manufacturing processes. For instance, etched areas shown as rectangular typically have circular or curved features. Therefore, the regions shown in the figures are substantially schematic, and their shapes are not intended to illustrate the actual shape of the regions of the device, nor are they intended to limit the scope of the exemplary embodiments.

Claims

1. A physical verification method for a standard cell library, characterized in that, include: Five test units arranged by width were randomly selected as a standard unit library and labeled as Unit 1, Unit 2, Unit 3, Unit 4 and Unit 5 respectively. Each unit is then joined horizontally with itself and other units. The joined units are labeled as Standard Unit 1, Standard Unit 2, Standard Unit 3, Standard Unit 4, and Standard Unit 5. Unit 1 is joined horizontally with each of Units 1 through 5 and labeled as Standard Unit 1; Unit 2 is joined horizontally with each of Units 2 through 5 and labeled as Standard Unit 2; Unit 3 is joined horizontally with each of Units 3 through 5 and labeled as Standard Unit 3; Unit 4 is joined horizontally with each of Units 4 and 5 and labeled as Standard Unit 4; Unit 5 is joined horizontally with each other and labeled as Standard Unit 5. Each type of unit is then stitched together with its left and right mirror images, and then stitched together again. The stitched units are labeled as Mirror Unit 1, Mirror Unit 2, Mirror Unit 3, Mirror Unit 4, and Mirror Unit 5. Units 1 through 5 are then stitched together with their respective left and right mirror images, and then stitched together again, and labeled as Mirror Unit 1. Units 2 through 5 are then stitched together with their respective left and right mirror images, and then stitched together again, and labeled as Mirror Unit 2. Units 3 through 5 are then stitched together with their respective left and right mirror images, and then stitched together again, and labeled as Mirror Unit 3. Units 4 and 5 are then stitched together with their respective left and right mirror images, and then stitched together again, and labeled as Mirror Unit 4. Unit 5 is then stitched together with its left and right mirror images, and labeled as Mirror Unit 5. Each type of unit is spliced ​​vertically with its corresponding mirror unit. The spliced ​​units are labeled as splicing unit 1, splicing unit 2, splicing unit 3, splicing unit 4, and splicing unit 5. Several units of type 1 are spliced ​​to the top and bottom sides of mirror unit 1, with the total width of these units being greater than or equal to the width of mirror unit 1. If the width of mirror unit 1 is less than the width of the several units of type 1, the insufficient portion is filled with unit 5. The spliced ​​unit is labeled as splicing unit 1. Similarly, several units of type 2 are spliced ​​to the top and bottom sides of mirror unit 2, with the total width of these units being greater than or equal to the width of mirror unit 2. If the width of mirror unit 2 is less than the width of the several units of type 2, the insufficient portion is filled with unit 5. The spliced ​​unit is labeled as splicing unit 5.

2. Several units 3 are spliced ​​onto the top and bottom sides of a mirror unit 3, wherein the total width of the several units 3 is greater than or equal to the width of the mirror unit 3. Wherein, when the width of the mirror unit 3 is smaller than the width of the several units 3, the insufficient part is filled with unit 5. The spliced ​​unit is marked as spliced ​​unit 3. Several units 4 are spliced ​​onto the top and bottom sides of a mirror unit 4, wherein the total width of the several units 4 is greater than or equal to the width of the mirror unit 4. Wherein, when the width of the mirror unit 4 is smaller than the width of the several units 4, the insufficient part is filled with unit 5. The spliced ​​unit is marked as spliced ​​unit 4. Several units 5 are spliced ​​onto the top and bottom sides of a mirror unit 5, wherein the total width of the several units 5 is equal to the width of the mirror unit 5. The spliced ​​unit is marked as spliced ​​unit 5. The standard units one through five and the splicing units one through five are spliced ​​together to form a test layout; Perform a design rule check on the test layout.

2. The physical verification method for the standard cell library as described in claim 1, characterized in that, The width order of the five test units is: Unit 1 > Unit 2 > Unit 3 > Unit 4 > Unit 5.

3. The physical verification method for the standard cell library as described in claim 1, characterized in that, The width is the dimension in the left-right direction.

4. The physical verification method for the standard cell library as described in claim 1, characterized in that, The standard units one through five and the splicing units one through five are spliced ​​together to form a test layout, including: Arrange standard units one through five in three rows, one above the other, and then arrange them vertically in the lower left corner of the layout. Each of the splicing units 1 to 5 is spliced ​​to the right of its corresponding standard unit 1 to standard unit 5, and then moved one step to the right in turn until the splicing is completed. The test layout was completed in the void filling unit 5 after the movement.

5. The physical verification method for the standard cell library as described in claim 4, characterized in that, The method for calculating the number of steps is: the width of the corresponding unit divided by the width of unit five.

6. The physical verification method for the standard cell library as described in claim 4, characterized in that, When standard cells one through five are arranged in three rows vertically in the lower left corner of the layout, if adjacent standard cells have different power supply types, one of the standard cells needs to be mirrored vertically.

7. The physical verification method for the standard cell library as described in claim 1, characterized in that, The test layout is rectangular.

Images