Filter Fan-Out Package Structure and Its Manufacturing Method
Through the filter fan-out package structure and the method of first passivation layer and then plastic packaging, the problems of high cost, strict reliability, thick thickness and high LT wafer lobe rate in filter packaging are solved, and high yield reliability of ultra-thin packaging and multi-device RF modules are achieved.
Patent Information
- Application Number
- CN202111610946.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-12-27
- Publication Date
- 2025-07-29
- Estimated Expiration
- 2041-12-27
AI Technical Summary
The existing filter packaging technology has problems such as high cost, strict reliability requirements, thick thickness, susceptible to cavity size and high LT wafer lobe rate, and the deviation of the fanout package chip leads to difficulty in alignment of the lithography process.
The filter fan-out packaging structure is adopted. By setting the alignment structure and the barrier layer on the filter chip, combining the plastic sealing layer and the protective layer, the chip alignment bonding is achieved, and solder balls are installed on the metal connecting structure to avoid chip offset and lobes. The passivation layer first and then the plastic sealing method is used to reduce the impact of lithography offset.
It improves the yield and reliability of filter chip packaging, reduces production costs, realizes ultra-thin packaging and large cavity mold resistance, supports multi-device RF module packaging, and solves the problems of chip offset and LT wafer lobes.
Smart Images

Figure CN114513183B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of filter packaging, and in particular to a filter fan-out packaging structure and a manufacturing method thereof. Background Art
[0002] With the rapid development of the communication field, since filters play an important role in the communication field, new progress has been continuously made. As a frequency selection device, a filter can allow specific frequency components in a signal to pass through while greatly attenuating other frequency components. In the field of modern communication technology, hardly any branch is not affected by filtering technology. Source coding, channel coding, modulation, multiplexing, data compression, and adaptive channel equalization, etc., all widely use filters. Especially in applications such as digital communication, network communication, and image communication, it is almost impossible to proceed without filters.
[0003] Currently, the main packaging technologies for filters are still in the forms of wire-bonded ceramics, metals, plastic packaging, surface mounting, and flip-chip soldering, etc. The existing such filter packaging structures and packaging forms have the following disadvantages:
[0004] 1. The cost of the surface sealing cover is relatively high;
[0005] 2. The reliability of the product has strict requirements for the flatness of the substrate and the sealing cover, and it is easy to cause failure.
[0006] 3. The existing packaging thickness is relatively thick, which does not meet the requirements of the current miniaturization trend of radio frequency devices.
[0007] 4. The film packaging on the device surface is sensitive to the size of the first cavity, and it is easy to cause film collapse in a large cavity size, affecting the chip performance;
[0008] 5. Currently, for wafer-level packaging, due to the ultra-thin LT wafers, it is mainly concentrated on 4 / 6 inches, and there is a relatively high chip breakage rate, affecting the yield.
[0009] The fan-out packaging of SAW devices can effectively solve and improve the above problems, but one of the challenges faced by the fan-out packaging technology is chip offset, which brings difficulties to the subsequent lithography process alignment. Summary of the Invention
[0010] The purpose of the present invention is to overcome the deficiencies existing in the prior art. The fan-out packaging of SAW devices can well solve the chip breakage problem through wafer reconstruction, and the fan-out area can increase the size of the first cavity wall, effectively improving the mold pressing resistance of the first cavity; the fan-out packaging can support the packaging of multi-device radio frequency modules, and can achieve more I / Os and thinner packaging; the method of forming the passivation layer and RDL first can effectively solve the chip offset problem in fan-out packaging.
[0011] In order to achieve the above purposes, the technical solution of the present invention is as follows:
[0012] A filter fan-out package structure includes a filter chip and a molding layer. The filter chip includes a resonant region and a non-resonant region outside the resonant region. A first cavity is provided above the resonant region, and pads are provided on the non-resonant region. A surrounding layer and an alignment structure are provided above the filter chip. The position of the alignment structure corresponds to that of the pads. The molding layer covers the sides and the back of the filter chip and the surrounding layer and makes the surface of the molding layer flush with the surface of the surrounding layer. A protective layer is provided on the surfaces of the molding layer and the surrounding layer. A first through hole is provided in the alignment structure and the protective layer, and the first through hole is filled with metal to form a metal connection structure. A solder ball is provided on the metal connection structure.
[0013] In some embodiments, the alignment structure includes a second through hole provided in the surrounding layer, and the position of the second through hole corresponds to that of the pads of the filter chip.
[0014] In some embodiments, a third through hole is provided in the surrounding layer, and the side wall of the third through hole and the surfaces of the protective layer and the filter chip form the first cavity.
[0015] In some embodiments, the material of the protective layer is dry film, and the thickness range is 20 - 50um.
[0016] In some embodiments, the alignment structure further includes a spacer layer provided between the surrounding layer and the filter chip. The spacer layer has a fourth through hole exposing the pads and a fifth through hole exposing the resonant region of the filter chip. The side wall of the fifth through hole and the surfaces of the surrounding layer and the filter chip form the first cavity.
[0017] In some embodiments, a strengthening layer covering around the solder ball is provided above the protective layer.
[0018] In some embodiments, the strengthening layer includes dry film, glue or glass.
[0019] In some embodiments, the material of the protective layer is dry film, glass or glue, and the thickness range of the protective layer is 20 - 50um.
[0020] In some embodiments, the material of the surrounding layer is bondable photoresist or dry film, and the thickness range of the surrounding layer is 5 - 50um.
[0021] A manufacturing method of a filter fan-out package structure includes the following steps:
[0022] 1) Provide a carrier wafer and a filter chip. The filter chip includes a resonant region and a non-resonant region outside the resonant region. Pads are provided on the non-resonant region. The surface of the carrier wafer is covered with an adhesive layer. A surrounding layer is fabricated above the adhesive layer, and an alignment structure is fabricated at a position corresponding to the pads on the surrounding layer.
[0023] 2) Align and bond the filter chip onto the carrier wafer through the alignment structure to form a first cavity above the resonant region, and form a second cavity between the alignment structure and the pad;
[0024] 3) Mold and form a molding layer above the adhesive layer of the carrier wafer, and the molding layer covers the back and sides of the filter chip and the enclosure layer;
[0025] 4) Remove the adhesive layer and the carrier wafer, and form a first through hole exposing the pad at the position of the alignment structure corresponding to the second cavity;
[0026] 5) Fabricate a protective layer above the enclosure layer, deposit metal on the first through hole to form a metal connection structure, and fabricate solder balls above the metal connection structure.
[0027] In some embodiments, the alignment structure includes a second through hole provided in the enclosure layer, and the position of the second through hole corresponds to the pad of the filter chip. The step of fabricating the alignment structure at the position corresponding to the pad on the enclosure layer in step 1 specifically includes: performing patterning treatment at the position corresponding to the pad on the enclosure layer to form the second through hole.
[0028] In some embodiments, the second through hole becomes the second cavity after the filter chip and the carrier wafer are aligned, and becomes the first through hole after removing the adhesive layer and the carrier wafer. Step 1 further includes: performing patterning treatment at the position corresponding to the resonant region of the filter chip on the enclosure layer to form a third through hole, and the third through hole becomes the first cavity after the filter chip and the carrier wafer are aligned.
[0029] In some embodiments, the alignment structure further includes a first spacer layer disposed above the non-resonant region of the filter chip. Step 1 further includes: fabricating a first spacer layer above the filter chip, and performing patterning treatment on the first spacer layer to form a fourth through hole exposing the pad and a fifth through hole exposing the resonant region of the filter chip. The fourth through hole and the second through hole become the second cavity after the filter chip and the carrier wafer are aligned, and become the first through hole after removing the adhesive layer and the carrier wafer. The fifth through hole becomes the first cavity after the filter chip and the carrier wafer are aligned.
[0030] In some embodiments, the material of the first spacer layer is a bondable photoresist or dry film, and the thickness range of the first spacer layer is 5 - 50 um.
[0031] In some embodiments, alignment blocks are provided at the positions corresponding to the pads on the adhesive layer, an enclosure layer is provided around the alignment blocks, a second spacer layer is provided on the surfaces of the enclosure layer and the alignment blocks, and the alignment structure includes the alignment blocks and a sixth through hole formed in the second spacer layer. The positions of the alignment blocks and the sixth through hole correspond to the pads of the filter chip.
[0032] In some embodiments, for fabricating a surrounding layer above the adhesive layer and fabricating an alignment structure at a position corresponding to the pad in step 1, it specifically includes: fabricating alignment blocks on the adhesive layer, fabricating a surrounding layer around the alignment blocks, and making the surface of the surrounding layer flush with the surface of the alignment blocks; fabricating a second spacer layer on the surfaces of the surrounding layer and the alignment blocks, performing a patterning process on the second spacer layer to form a sixth through hole exposing the alignment blocks and a seventh through hole exposing the resonant region of the filter chip. The sixth through hole becomes a second cavity after the filter chip and the carrier wafer are aligned, and the seventh through hole becomes a first cavity after the filter chip and the carrier wafer are aligned.
[0033] In some embodiments, for forming a first through hole exposing the pad at the position of the alignment structure corresponding to the second cavity in step 4, it specifically includes: removing the alignment blocks, forming an eighth through hole communicating with the sixth through hole on the surrounding layer, and after removing the adhesive layer and the carrier wafer, the eighth through hole and the sixth through hole constitute the first through hole.
[0034] In some embodiments, the material of the second spacer layer is a bondable photoresist or a dry film, and the thickness range of the second spacer layer is 5 - 50 um.
[0035] In some embodiments, for fabricating a protective layer above the surrounding layer and depositing metal on the first through hole to form a metal connection structure in step 5, it specifically includes: attaching the protective layer above the surrounding layer, and etching a ninth through hole corresponding to the first through hole on the protective layer; filling metal inside the first through hole and the ninth through hole to form a metal connection structure.
[0036] In some embodiments, for fabricating a protective layer above the surrounding layer and depositing metal on the first through hole to form a metal connection structure in step 5, it specifically includes: depositing metal on the first through hole and extending it above the surrounding layer to form a metal connection structure; covering a protective layer around the metal connection structure.
[0037] In some embodiments, step 5 further includes: fabricating a strengthening layer covering around the solder balls above the protective layer.
[0038] Compared with the prior art, the beneficial effects of the present invention are as follows:
[0039] (1) The filter fan - out package structure provided by the present invention uses an alignment structure to solve the problem of aligning and attaching the filter chip to the carrier wafer. It can effectively solve the chip offset problem caused by the lack of alignment marks during chip mounting, avoid misalignment, and use fan - out packaging for edge protection to solve the problem of yield loss caused by mechanical cutting, which can effectively improve the yield and reliability of filter chip packaging.
[0040] (2) The manufacturing method of the filter fan - out package structure provided by the present invention first fabricates a passivation layer and then performs encapsulation, avoiding the lithography offset influence and yield loss caused by the offset of the encapsulated chip.
[0041] (3) The manufacturing method of the filter fan-out packaging structure provided by the present invention avoids using complex processes and equipment such as bonding and soldering, effectively reducing production costs.
[0042] (4) The filter fan-out packaging structure provided by the present invention can achieve ultra-thin packaging and solve the problem of substrate warping.
[0043] (5) The filter fan-out packaging structure provided by the present invention can effectively enhance the compression resistance performance and can be effectively applied to the field of large first cavity products.
[0044] (6) The present invention adopts the fan-out packaging method to reconstruct a larger size (8 / 12 inches) wafer for wafer-level chip flow, and can greatly improve the LT wafer dicing situation and reduce costs. BRIEF DESCRIPTION OF THE DRAWINGS
[0045] Figure 1a-1h It is a schematic process flow diagram of the manufacturing method of the filter fan-out packaging structure of Embodiment 1 of the present application;
[0046] Figure 2a-2e It is a schematic process flow diagram of the manufacturing method of the filter fan-out packaging structure of Embodiment 2 of the present application;
[0047] Figure 3a-3i It is a schematic process flow diagram of the manufacturing method of the filter fan-out packaging structure of Embodiment 3 of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0048] The following further explains the present invention in conjunction with the accompanying drawings and specific embodiments. The drawings of the present invention are only schematic for easier understanding of the present invention, and their specific proportions can be adjusted according to design requirements. The up-down relationship of the relative components and the definition of the front / back in the figures described in the text should be understood by those skilled in the art as referring to the relative positions of the components, so they can all be flipped to present the same components, and this should all fall within the scope disclosed in this specification.
[0049] Embodiment 1
[0050] Refer to Figure 1a-1h , an embodiment of the present application proposes a manufacturing method of a filter fan-out packaging structure, including the following steps:
[0051] (1) Refer to Figure 1a, a carrier wafer 101 is provided. The surface of the carrier wafer 101 is covered with an adhesive layer 201 having a thickness of about 100 um. The material of the adhesive layer 201 is a thermal foaming film. Above the adhesive layer 201, a surrounding layer 301 with a thickness of about 5 - 50 um is fabricated. The material of the surrounding layer 301 is a bondable photoresist or dry film. The surrounding layer 301 is patterned to form a second through-hole 302, and the patterning process includes a photolithography process. A alignment structure is formed by providing the second through-hole 302 on the surrounding layer 301. The position of the second through-hole 302 corresponds to the pads of the filter chip. When the filter chip is aligned and disposed on the carrier wafer 101, the second through-hole 302 is located between the pads of the filter chip and the adhesive layer 201 to form a second cavity. The second through-hole 302 becomes the second cavity after the filter chip and the carrier wafer 101 are aligned, and becomes the first through-hole after the adhesive layer 201 and the carrier wafer 101 are removed. Patterning is performed at the position on the surrounding layer corresponding to the resonant region of the filter chip to form a third through-hole, and the third through-hole becomes the first cavity after the filter chip and the carrier wafer are aligned.
[0052] (2) Reference Figure 1b , a filter chip 401 is provided. The filter chip 401 includes a resonant region 402 and a non-resonant region 403 outside the resonant region 402. Pads 403 are provided on the non-resonant region. The filter chip 401 is aligned and bonded to the carrier wafer 101 by means of the alignment structure. Since the alignment structure formed by the second through-hole 302 and the surrounding layer 301 around the second through-hole 302 form a certain height difference to form an obvious alignment region, it is beneficial for the filter chip 401 to achieve alignment during the bonding process, avoiding misalignment and the subsequent offset of the filter chip 401 caused by plastic encapsulation molding. Moreover, the filter chip 401 only needs to be aligned and bonded to the carrier wafer 101, avoiding the use of complex processes and equipment such as bonding and soldering, effectively reducing the production cost. The size of the second through-hole 302 is smaller than the pads of the filter chip, and about 1 / 2 of the area of the pads 403 of the filter chip 401 is exposed.
[0053] (3) Reference Figure 1c , a plastic encapsulation layer 501 is formed by plastic encapsulation above the adhesive layer 201 of the carrier wafer 101. The material of the plastic encapsulation layer 501 is plastic encapsulation material. The plastic encapsulation layer 501 covers the back and sides of the filter chip 401 and the surrounding layer 301. The plastic encapsulation layer 501 completes the plastic encapsulation molding of the filter chip 401 and can protect the surface of the filter chip 401 from external environmental pollution.
[0054] (4) Reference Figure 1d, the adhesive layer 201 and the carrier wafer 101 are removed. Since the material of the adhesive layer 201 is a thermal foaming film, the adhesive layer 201 is foamed by heating to remove the carrier wafer 101. After removal, the surface of the encapsulation layer 501 is flush with the surface of the enclosure layer 301. After removing the adhesive layer 201 and the carrier wafer 101, the second through-hole 302 becomes the first through-hole 304.
[0055] (5) Refer to Figure 1e and 1f , then the protective layer 601 is attached above the encapsulation layer 501 and the enclosure layer 301 to form a first cavity 303 above the resonant region 402. The height of the first cavity 303 is mainly determined by the thickness of the enclosure layer 301, and a ninth through-hole 602 corresponding to the first through-hole 304 is etched on the protective layer 601. Specifically, the material of the protective layer 601 is a dry film. The protective layer 601 is attached by roller laminating. The lamination temperature is 40 - 70°C, preferably 50°C, the pressure is 0.1 - 0.5 MPa, preferably 0.2 MPa, and the speed of the roller is 1 - 5 mm / s, preferably 3 mm / s. The ninth through-hole 602 is etched at the position corresponding to the first through-hole 304 on the protective layer 601 so that the ninth through-hole 602 communicates with the first through-hole 304 and exposes the pad 403. The width of the ninth through-hole 602 is 10 um larger than the single side of the first through-hole 304.
[0056] (6) Refer to Figure 1g and 1h , metal is deposited in the first through-hole 304 and the ninth through-hole 602 to form a metal connection structure 701, and the metal connection structure 701 can also extend on the protective layer 601 to form a redistribution layer (RDL layer). Solder balls 801 are fabricated above the metal connection structure 701. Therefore, the solder balls 801 can also be fabricated at any position on the redistribution layer to achieve fan-out packaging. A strengthening layer 901 with a thickness of about 10 - 50 um is fabricated above the protective layer 601. The material of the strengthening layer 901 includes dry film, photoresist or glass. The strengthening layer 901 covers around the solder balls 801 to play a role in resisting molding and increases the compressive strength above the device.
[0057] Corresponding to the manufacturing method of the above filter fan-out packaging structure, an embodiment of the present application also proposes a filter fan-out packaging structure manufactured by the above manufacturing method. Refer to Figure 1h, including a filter chip 401 and a plastic package layer 501. The filter chip 401 includes a resonant region 402 and a non-resonant region outside the resonant region 402. A first cavity 303 is provided above the resonant region 402, and pads 403 are provided on the non-resonant region. A fence layer 301 with a thickness of 5 - 50 um and an alignment structure are provided above the non-resonant region. The alignment structure is a second through hole 302 provided on the fence layer 301, and the position of the second through hole 302 corresponds to that of the pad 403. The plastic package layer 501 covers the side and back surfaces of the filter chip 401 and the fence layer 301 so that the surface of the plastic package layer 501 is flush with the surface of the fence layer 301. A protective layer 601 is provided on the surfaces of the plastic package layer 501 and the fence layer 301. The protective layer 601 is provided with a ninth through hole 602 at a position corresponding to the alignment structure. The second through hole 302 communicates with the ninth through hole 602 and conducts to the pad 403 of the filter chip 401. Metal is filled inside and below the ninth through hole 602 to form a metal connection structure 701. Specifically, metal is filled in the ninth through hole 602 and the second through hole 302 to form a metal connection structure 701, and solder balls 801 are provided on the metal connection structure 701. An enhancement layer 901 covering around the solder balls 801 is provided above the protective layer 601, and the thickness of the enhancement layer 901 is about 20 - 50 um.
[0058] Embodiment 2
[0059] Reference Figure 2a-2e , an embodiment of the present application provides a manufacturing method for a filter fan-out package structure, including the following steps:
[0060] (1) Referring to Figure 2a , a carrier wafer 111 is provided. The surface of the carrier wafer 111 is covered with an adhesive layer 211 with a thickness of about 100 um. The material of the adhesive layer 211 is a thermal foaming film. A fence layer 311 with a thickness of 25 - 50 um is fabricated above the adhesive layer 211. The material of the fence layer 311 is a bondable photoresist or dry film. The fence layer 311 is patterned to form a second through hole 312. The patterning process includes a lithography process. By providing the second through hole 312 on the fence layer 311 to form an alignment structure, the position of the second through hole 312 corresponds to the pad of the filter chip 411 where a first spacer layer 414 has been formed, such that when the filter chip is disposed in alignment on the carrier wafer 111, the second through hole 312 is located between the pad of the filter chip and the adhesive layer 211.
[0061] (2) Referring to Figure 2b, a filter chip 411 is provided. The filter chip 411 includes a resonant region 412 and a non-resonant region outside the resonant region 412. A pad 413 is provided on the non-resonant region. A first spacer layer 414 is fabricated above the filter chip 411, and the first spacer layer 414 is patterned to form a fourth via 415 exposing the pad 413 and a fifth via exposing the resonant region of the filter chip. The fourth via 415 and the second via 312 become a second cavity after the filter chip 411 and the carrier wafer 111 are aligned, and become a first via after the adhesive layer 211 and the carrier wafer 111 are removed. The fifth via becomes a first cavity 313 after the filter chip and the carrier wafer are aligned. The material of the first spacer layer 414 is a bondable photoresist or dry film, and the thickness range of the first spacer layer 414 is 5 - 50 um. The alignment structure is disposed on the non-resonant region of the filter chip 411. The alignment structure includes the first spacer layer 414 and the second via 312 on the enclosure layer 311. The filter chip 411 is aligned and bonded to the carrier wafer 111 through the alignment structure. Since a certain height difference is formed between the fourth via 415 and the first spacer layer 414 around it and between the second via 312 and the enclosure layer 311 around it to form an obvious alignment region, it is beneficial for the filter chip 411 to be aligned during the bonding process and form a first cavity 313 above the resonant region 412, avoiding misalignment and the offset of the filter chip 411 caused by subsequent encapsulation molding. Moreover, the filter chip 411 only needs to be aligned and bonded to the carrier wafer 111, avoiding the use of complex processes and equipment such as bonding and welding, effectively reducing the production cost. The size of the fourth via 415 is smaller than that of the pad 413 of the filter chip 411, and more than 1 / 2 of the area of the pad 413 of the filter chip 411 is exposed.
[0062] (3) Reference Figure 2c , an encapsulation layer 511 is formed by encapsulation above the adhesive layer 211 of the carrier wafer 111. The material of the encapsulation layer 511 is encapsulation material. The encapsulation layer 511 covers the back and side surfaces of the filter chip 411 and the enclosure layer 311. The encapsulation layer 511 completes the encapsulation molding of the filter chip 411 and can protect the surface of the filter chip 411 from external environmental pollution.
[0063] (4) Reference Figure 2d , the adhesive layer 211 and the carrier wafer 111 are removed. Since the material of the adhesive layer 211 is a thermal foaming film, the adhesive layer 211 is foamed by heating to remove the carrier wafer 111. After the adhesive layer 211 and the carrier wafer 111 are removed, the fourth via 415 and the second via 312 are exposed. The size of the second via 312 is 10 um larger than that of the fourth via 415 on each side.
[0064] (5) Reference Figure 2e, a protective layer 611 is fabricated on the plastic encapsulation layer 511 and the enclosure layer 311. The material of the protective layer 621 is dry film, glass or glue, and the thickness range of the protective layer 621 is 20 - 50um. A ninth through-hole 612 corresponding to the first through-hole is formed by photolithography on the protective layer 611. Metal is deposited in the ninth through-hole 612, the fourth through-hole 415 and the second through-hole 312 to form a metal connection structure 711. Moreover, the metal connection structure 711 can also extend on the protective layer 611 to form a redistribution layer (RDL layer), and solder balls 811 are fabricated above the metal connection structure 711. Therefore, the solder balls 811 can also be fabricated at any position on the redistribution layer to achieve fan-out packaging. The ninth through-hole 612 communicates with the fourth through-hole 415 and the second through-hole 312 and exposes the pad 413. The size of the ninth through-hole 612 is 15um larger than the size of the second through-hole 312 on each side.
[0065] In another embodiment, metal is deposited on the first through-hole and extends above the enclosure layer 311 to form a metal connection structure 711; a protective layer 611 is formed around the metal connection structure 711. The metal connection structure 711 can also extend on the enclosure layer 311 to form a redistribution layer (RDL layer). The protective layer 611 is bonded to the enclosure layer 311, and the protective layer 611 covers the periphery of the metal connection structure 711. After fabricating the protective layer 611, solder balls 811 are fabricated above the metal connection structure 711. Therefore, the solder balls 811 can also be fabricated at any position on the redistribution layer to achieve fan-out packaging. Since the enclosure layer 311 and the protective layer 611 are formed on the other side of the first cavity 313, it has sufficient resistance to molding. In another embodiment, a strengthening layer 911 with a thickness of about 10 - 50um can also be fabricated above the protective layer 611. The material of the strengthening layer 911 includes dry film, photoresist or glass. The strengthening layer 911 covers around the solder balls 811 to play a role in resisting molding and increases the compressive strength above the device. In the embodiments of the present application, the strengthening layer 911 can be set according to requirements.
[0066] Corresponding to the manufacturing method of the above filter fan-out packaging structure, the embodiments of the present application also propose a filter fan-out packaging structure manufactured by the above manufacturing method. Refer to Figure 2e, including a filter chip 411 and a plastic encapsulation layer 511. The filter chip 411 includes a resonant region 412 and a non-resonant region outside the resonant region 412. A first cavity 313 is provided above the resonant region 412. Bond pads 413 are provided on the non-resonant region. A surrounding layer 311 with a thickness of about 25 - 50 um and an alignment structure are provided above the non-resonant region. The alignment structure is a first spacer layer 414 provided between the surrounding layer 311 and the non-resonant region. The first spacer layer 414 has a fourth through-hole 415 exposing the bond pad 413. The surrounding layer is provided with a second through-hole 312 at a position corresponding to the third through-hole 415. The positions of the fourth through-hole 415 and the second through-hole 312 correspond to the bond pad 413. The plastic encapsulation layer 511 covers the side and back surfaces of the filter chip 411 and the surrounding layer 311 such that the surface of the plastic encapsulation layer 511 is flush with the surface of the surrounding layer 311. A protective layer 611 is provided on the surfaces of the plastic encapsulation layer 511 and the surrounding layer 311. The protective layer 611 is provided with a ninth through-hole 612 at a position corresponding to the fourth through-hole 415. The fourth through-hole 415, the second through-hole 312, and the ninth through-hole 612 are in communication. Metal is filled inside and below the first through-hole 612 to form a metal connection structure 711. Specifically, metal is filled in the first through-hole 612, the fourth through-hole 415, and the second through-hole 312 to form a metal connection structure 711. A solder ball 811 is provided on the metal connection structure 711.
[0067] Embodiment III
[0068] Reference Figure 3a-3i , an embodiment of the present application provides a manufacturing method for a filter fan-out packaging structure, including the following steps:
[0069] (1) Reference Figure 3a-3c, a carrier wafer 121 is provided. The surface of the carrier wafer 121 is covered with an adhesive layer 221 having a thickness of about 100 um. The material of the adhesive layer 221 is a thermal foaming film. Alignment blocks 322 are provided at positions corresponding to the pads on the adhesive layer 211. A surrounding layer 321 with a thickness of 25 - 50 um is fabricated around the alignment blocks 322 above the adhesive layer 221. The surrounding layer 321 is first fabricated on the adhesive layer 221 to cover the alignment blocks 322, and the surrounding layer 321 is planarized so that the surface of the surrounding layer 321 is flush with the surface of the alignment blocks 322. Specifically, the material of the surrounding layer 321 is photoresist, Molding material, or dry film, and the alignment blocks 322 can be copper blocks or other metals or compounds that can be etched. A second spacer layer 424 is fabricated on the surfaces of the surrounding layer 321 and the alignment blocks 322, and the second spacer layer 424 is patterned to form a sixth through-hole exposing the alignment blocks 322 and an eighth through-hole exposing the resonant region of the filter chip. Specifically, the material of the second spacer layer 424 is a bondable photoresist or dry film, and the thickness range of the second spacer layer 424 is 5 - 50 um. The alignment structure includes the alignment blocks 322 disposed inside the surrounding layer 321 and the sixth through-hole formed on the second spacer layer 424, and the positions of the alignment blocks 322 and the sixth through-hole correspond to the pads of the filter chip.
[0070] (2) Reference Figure 3d , a filter chip 421 is provided. The filter chip 421 includes a resonant region 422 and a non-resonant region outside the resonant region 422. Pads 423 are provided on the non-resonant region. The alignment structure is disposed on the non-resonant region of the filter chip 421. The filter chip 421 is aligned and bonded to the carrier wafer 121 through the alignment structure. After the filter chip 321 and the carrier wafer 121 are aligned, the sixth through-hole becomes a second cavity 425, and the eighth through-hole becomes a first cavity 323. Since a certain height difference is formed between the sixth through-hole and the surrounding second spacer layer 424 to form an obvious alignment region, it is beneficial for the filter chip 421 to be aligned during the bonding process and form a first cavity 323 above the resonant region 422, avoiding misalignment and the offset of the filter chip 421 caused by subsequent encapsulation molding. Moreover, the filter chip 421 only needs to be aligned and bonded to the carrier wafer 121, avoiding the use of complex processes and equipment such as bonding and welding, effectively reducing the production cost. The size of the sixth through-hole is smaller than the pads 423 of the filter chip 421, and more than 1 / 2 of the area of the pads 423 of the filter chip 421 can be exposed after removing the alignment blocks 322.
[0071] (3) Reference Figure 3e, a molding layer 521 is formed by molding above the adhesive layer 221 of the carrier wafer 121. The material of the molding layer 521 is molding compound. The molding layer 521 covers the back and sides of the filter chip 421 and the enclosure layer 321. The molding layer 521 enables the filter chip 421 to be molded, and can protect the surface of the filter chip 421 from external environmental pollution.
[0072] (4) Refer to Figure 3f , the adhesive layer 221 and the carrier wafer 121 are removed. Since the material of the adhesive layer 221 is a thermal foaming film, the adhesive layer 221 is heated to foam to remove the carrier wafer 121. And after removing the adhesive layer 211 and the carrier wafer 111, the alignment block 322 is exposed. The size of the alignment block 322 is 10um larger than the size of the second cavity 425 on one side.
[0073] (5) Refer to Figure 3g-3i , the alignment block 322 is removed. Since the material of the alignment block 322 is a material that is easily corroded or removed, such as copper, the copper is etched away to form an eighth via 324 communicating with the sixth via on the enclosure layer 321. After removing the adhesive layer and the carrier wafer, the eighth via 342 and the sixth via form a first via. Metal is deposited on the first via and extends above the enclosure layer 321 to form a metal connection structure 721; a protective layer 621 is formed around the metal connection structure 721. The metal connection structure 721 can also extend on the enclosure layer 321 to form a redistribution layer (RDL layer). The protective layer 621 is attached to the enclosure layer 321, and the protective layer 621 covers the periphery of the metal connection structure 721. After manufacturing the protective layer 621, solder balls 821 are manufactured above the metal connection structure 721. Therefore, the solder balls 821 can also be manufactured at any position on the redistribution layer to achieve fan-out packaging.
[0074] In another embodiment, a protective layer 621 is fabricated on the encapsulation layer 521 and the enclosure layer 321. The material of the protective layer 621 is dry film, glass or glue, and the thickness range of the protective layer 621 is 20 - 50 um. A ninth via 622 corresponding to the first via is formed by photolithography on the protective layer 621. Metal is deposited in the ninth via 622, the fourth via 425 and the second via 322 to form a metal connection structure 721. Moreover, the metal connection structure 721 can also extend on the protective layer 621 to form a redistribution layer (RDL layer), and solder balls 821 are fabricated above the metal connection structure 721. Therefore, the solder balls 821 can also be fabricated at any position on the redistribution layer to achieve fan-out packaging. The ninth via 622 communicates with the first via and exposes the pad 423. The size of the ninth via 622 is 15 um larger than the size of the seventh via 342 on each side. Since the enclosure layer 321 and the protective layer 621 are formed on the other side of the first cavity 323, it has sufficient resistance to molding. In another embodiment, a strengthening layer 921 with a thickness of about 10 - 50 um can also be fabricated above the protective layer 621. The material of the strengthening layer 921 includes dry film, photoresist or glass. The strengthening layer 921 covers around the solder balls 821 to play a role in resisting molding and increases the compressive strength above the device. In the embodiments of the present application, the strengthening layer 921 can be set according to requirements.
[0075] The structure of Embodiment 3 is the same as that of Embodiment 2, and will not be described in detail here.
[0076] The above embodiments are only used to further illustrate a filter fan-out packaging structure and its manufacturing method of the present invention. However, the present invention is not limited to the embodiments. Any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention all fall within the protection scope of the technical solution of the present invention.
Claims
1. A filter fan-out package structure, characterized in that: It includes a filter chip and a plastic package layer. The filter chip includes a resonant region and a non-resonant region outside the resonant region. A first cavity is provided above the resonant region, and pads are provided on the non-resonant region. A surrounding layer and an alignment structure are provided above the filter chip. The position of the alignment structure corresponds to that of the pads. The plastic package layer covers the side and back surfaces of the filter chip and the surrounding layer and makes the surface of the plastic package layer flush with the surface of the surrounding layer. A protective layer is provided on the surfaces of the plastic package layer and the surrounding layer. A first through hole is provided in the alignment structure and the protective layer, and the first through hole is filled with metal to form a metal connection structure. A solder ball is provided on the metal connection structure. The alignment structure includes a second through hole provided in the surrounding layer. The position of the second through hole corresponds to that of the pads of the filter chip. The alignment structure further includes a spacer layer provided between the surrounding layer and the filter chip. The spacer layer has a fourth through hole exposing the pads and a fifth through hole exposing the resonant region of the filter chip. The side wall of the fifth through hole and the surfaces of the surrounding layer and the filter chip form the first cavity.
2. The filter fan-out package structure according to claim 1, wherein: A third through hole is provided in the surrounding layer. The side wall of the third through hole and the surfaces of the protective layer and the filter chip form the first cavity.
3. The filter fan-out package structure according to claim 2, wherein: The material of the protective layer is dry film, and the thickness range is 20 - 50um.
4. The filter fan-out package structure according to claim 1, wherein: Above the protective layer, a strengthening layer covering the periphery of the solder ball is provided.
5. The filter fan-out package structure according to claim 4, wherein: The strengthening layer includes dry film, glue or glass.
6. The filter fan-out package structure according to claim 1, characterized in that: The material of the protective layer is dry film, glass or glue, and the thickness range of the protective layer is 20 - 50um.
7. The filter fan-out package structure according to claim 1, wherein: The material of the surrounding layer is bondable photoresist or dry film, and the thickness range of the surrounding layer is 5 - 50um.
8. A manufacturing method of a filter fan-out package structure as described in any one of claims 1-7, characterized in that: It includes the following steps: 1) Provide a carrier wafer and a filter chip. The filter chip includes a resonant region and a non-resonant region outside the resonant region. Pads are provided on the non-resonant region. The surface of the carrier wafer is covered with an adhesive layer. A surrounding layer is fabricated above the adhesive layer, and an alignment structure is fabricated at the position corresponding to the pads on the surrounding layer. 2) Align and bond the filter chip on the carrier wafer through the alignment structure to form a first cavity above the resonant region and form a second cavity between the alignment structure and the pads. 3) Perform plastic encapsulation above the adhesive layer of the carrier wafer to form a plastic package layer. The plastic package layer covers the back and side surfaces of the filter chip and the surrounding layer. 4) Remove the adhesive layer and the carrier wafer, and form a first through hole exposing the pads at the position of the alignment structure corresponding to the second cavity. 5) Fabricate a protective layer above the surrounding layer, deposit metal on the first through hole to form a metal connection structure, and fabricate a solder ball above the metal connection structure.
9. The manufacturing method of the filter fan-out package structure according to claim 8, characterized in that: The alignment structure includes a second through-hole provided in the enclosure layer, and the position of the second through-hole corresponds to the pad of the filter chip. The step of fabricating the alignment structure at the position corresponding to the pad on the enclosure layer in Step 1 specifically includes: performing patterning on the enclosure layer at the position corresponding to the pad to form the second through-hole.
10. The manufacturing method of the filter fan-out package structure according to claim 9, characterized in that: The second through-hole becomes the second cavity after the filter chip and the carrier wafer are aligned, and becomes the first through-hole after removing the adhesive layer and the carrier wafer. Step 1 further includes: performing patterning on the enclosure layer at the position corresponding to the resonant region of the filter chip to form a third through-hole, and the third through-hole becomes the first cavity after the filter chip and the carrier wafer are aligned.
11. The manufacturing method of the filter fan-out package structure according to claim 9, characterized in that: The alignment structure further includes a first spacer layer disposed above the non-resonant region of the filter chip. Step 1 further includes: fabricating a first spacer layer above the filter chip, and performing patterning on the first spacer layer to form a fourth through-hole exposing the pad and a fifth through-hole exposing the resonant region of the filter chip. The fourth through-hole and the second through-hole become the second cavity after the filter chip and the carrier wafer are aligned, and become the first through-hole after removing the adhesive layer and the carrier wafer. The fifth through-hole becomes the first cavity after the filter chip and the carrier wafer are aligned.
12. The manufacturing method of the filter fan-out package structure according to claim 11, wherein: The material of the first spacer layer is a bondable photoresist or a dry film, and the thickness range of the first spacer layer is 5 - 50 μm.
13. The manufacturing method of the filter fan-out package structure according to claim 8, characterized in that: Alignment blocks are provided at the positions corresponding to the pads on the adhesive layer. An enclosure layer is provided around the alignment blocks. A second spacer layer is provided on the surfaces of the enclosure layer and the alignment blocks. The alignment structure includes the alignment blocks and a sixth through-hole formed in the second spacer layer, and the positions of the alignment blocks and the sixth through-hole correspond to the pads of the filter chip.
14. The manufacturing method of the filter fan-out package structure according to claim 13, characterized in that: The step of fabricating the enclosure layer above the adhesive layer and fabricating the alignment structure at the position corresponding to the pad on the enclosure layer in Step 1 specifically includes: fabricating the alignment blocks on the adhesive layer, fabricating the enclosure layer around the alignment blocks, and making the surface of the enclosure layer flush with the surface of the alignment blocks; fabricating a second spacer layer on the surfaces of the enclosure layer and the alignment blocks, and performing patterning on the second spacer layer to form a sixth through-hole exposing the alignment blocks and a seventh through-hole exposing the resonant region of the filter chip. The sixth through-hole becomes the second cavity after the filter chip and the carrier wafer are aligned, and the seventh through-hole becomes the first cavity after the filter chip and the carrier wafer are aligned.
15. The manufacturing method of the filter fan-out package structure according to claim 13, characterized in that: The step of forming a first through-hole exposing the pad at the position of the alignment structure corresponding to the second cavity in Step 4 specifically includes: removing the alignment blocks, forming an eighth through-hole communicating with the sixth through-hole on the enclosure layer, and the eighth through-hole and the sixth through-hole constitute the first through-hole after removing the adhesive layer and the carrier wafer.
16. The manufacturing method of the filter fan-out package structure according to claim 13, wherein: The material of the second spacer layer is a bondable photoresist or a dry film, and the thickness range of the second spacer layer is 5 - 50 μm.
17. The manufacturing method of the filter fan-out package structure according to claim 8, wherein: In step 5, a protective layer is fabricated above the enclosure layer, and metal is deposited on the first through-hole to form a metal connection structure, which specifically includes: attaching the protective layer above the enclosure layer, and etching a ninth through-hole corresponding to the first through-hole on the protective layer; filling metal inside the first through-hole and the ninth through-hole to form the metal connection structure.
18. The manufacturing method of the filter fan-out package structure according to claim 8, wherein: In step 5, a protective layer is fabricated above the enclosure layer, and metal is deposited on the first through-hole to form a metal connection structure, which specifically includes: depositing metal on the first through-hole and extending it above the enclosure layer to form the metal connection structure; covering and forming the protective layer around the metal connection structure.
19. The manufacturing method of the filter fan-out package structure according to any one of claims 8-18, characterized in that: Step 5 further includes: fabricating a strengthening layer covering around the solder ball above the protective layer.
Citation Information
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