Pulse density modulation interface implementation method and device, electronic equipment and storage medium

Abstract

The application provides a pulse density modulation interface implementation method and device of an analog-to-digital converter, electronic equipment and a storage medium. The method comprises the following steps: designing a circuit architecture of an analog-to-digital converter, and setting working variable parameters for components in the circuit architecture; determining a transfer function of an output signal and a transfer function of noise based on the working variable parameters; in the case that an oversampling rate (OSR) is a first set value, a filter order is a second set value, and a quantization bit number is a third set value, calculating an optimal solution of the transfer function of the noise; determining a value corresponding to the working variable parameters of the components according to the optimal solution; and selecting corresponding components for the circuit architecture based on the value, and generating a pulse density modulation interface of an analog-to-digital converter. The application can accurately design a PDM interface, and improves the signal processing performance of the interface.

Description

Technical Field

[0001] This invention relates to analog-to-digital converters and their design, and more particularly to a method and apparatus for implementing a pulse density modulation (PDM) interface for an analog-to-digital converter (ADC), an electronic device, and a storage medium. Background Technology

[0002] Sigma-delta ADCs are widely used because they can achieve resolutions of up to 24 bits or more with a simple architecture, based on a high over-sampling ratio (OSR). They are widely adopted by many companies in fields such as audio processing and weak signal recognition.

[0003] Taking audio sensors as an example, the human ear's hearing range is between 20 and 20kHz, so the baseband f b Choosing a baseband frequency below 24kHz is suitable for data acquisition using a sigma-delta ADC. With market expansion and wider application, digital microphones (MICs) are becoming increasingly popular due to their superior transmission performance and good compatibility with backend digital processing modules such as codecs. However, current ADC PDM interfaces still have significant room for improvement in digital signal processing, and there are few relevant technical solutions for PDM interface design available for reference. Summary of the Invention

[0004] This invention provides a method and apparatus for implementing a pulse density modulation interface for an analog-to-digital converter, an electronic device, and a storage medium, so as to at least solve the above-mentioned technical problems existing in the prior art.

[0005] This invention provides a method for implementing a pulse density modulation interface for an analog-to-digital converter, comprising:

[0006] Design the circuit architecture of the analog-to-digital converter and set the operating variable parameters for the components in the circuit architecture;

[0007] The transfer function of the output signal and the transfer function of the noise are determined based on the aforementioned working variable parameters.

[0008] With the oversampling rate OSR set to a first set value, the filter order set to a second set value, and the quantization bit depth set to a third set value, calculate the optimal solution of the noise transfer function;

[0009] The values ​​of the operating variable parameters of the component are determined based on the optimal solution.

[0010] Based on the values, appropriate components are selected for the circuit architecture to generate the pulse density modulation interface for the analog-to-digital converter.

[0011] Optionally, the method further includes:

[0012] Based on the optimal solution, the zero-pole distribution and amplitude-frequency response curve of the transfer function of the output signal, as well as the zero-pole distribution and amplitude-frequency response curve of the transfer function of the noise, are determined.

[0013] Correspondingly, based on the value, the appropriate components are selected for the circuit architecture, including:

[0014] Based on the pole-zero distribution and amplitude-frequency response curve of the transfer function of the output signal, and the pole-zero distribution and amplitude-frequency response curve of the transfer function of the noise, the values ​​of the determined working variable parameters are corrected to obtain the corrected values.

[0015] The appropriate components are selected based on the correction value for the circuit architecture.

[0016] Optionally, the method further includes:

[0017] The simulation application is invoked, and the performance of the pulse density modulation interface of the generated analog-to-digital converter is tested based on the simulation application to obtain the performance test results;

[0018] When the performance test results are determined to meet the circuit design requirements, the pulse density modulation interface of the analog-to-digital converter is fabricated using the circuit architecture.

[0019] Optionally, the method further includes:

[0020] If the performance test results do not meet the circuit design requirements, the correction value or the value is adjusted to obtain an adjusted value; based on the adjusted value, the corresponding components are selected for the circuit architecture.

[0021] The simulation application is invoked, and the performance of the pulse density modulation interface of the regenerated analog-to-digital converter is tested based on the simulation application to obtain the performance test results.

[0022] Determine whether the performance test results meet the test requirements, and if the performance test results do not meet the design requirements, adjust the correction value, the selected value, or the adjustment value again until the performance test results meet the test requirements.

[0023] Optionally, the method further includes:

[0024] If the value of the operating variable parameter of the component is determined to be non-integer, the non-integer value is multiplied by the fourth set value and then rounded.

[0025] After the circuit architecture performs a multiplication operation based on the rounded values ​​of the working variable parameters, the number of bits of the fifth set value is truncated from the operation result; wherein the fifth set value is associated with the fourth set value.

[0026] Another aspect of the present invention provides a pulse density modulation interface implementation device for an analog-to-digital converter, comprising:

[0027] The configuration unit is used to design the circuit architecture of the analog-to-digital converter and set the operating variable parameters for the components in the circuit architecture.

[0028] The first determining unit is used to determine the transfer function of the output signal and the transfer function of the noise based on the working variable parameters;

[0029] The calculation unit is used to calculate the optimal solution of the transfer function of the noise when the OSR is a first set value, the filter order is a second set value, and the quantization bit depth is a third set value.

[0030] The second determining unit is used to determine the values ​​of the working variable parameters of the component based on the optimal solution.

[0031] The generation unit is used to select corresponding components based on the value in the circuit architecture and generate the pulse density modulation interface of the analog-to-digital converter.

[0032] Optionally, the device further includes:

[0033] The third determining unit is used to determine the zero-pole distribution and amplitude-frequency response curve of the transfer function of the output signal, and the zero-pole distribution and amplitude-frequency response curve of the transfer function of the noise, based on the optimal solution.

[0034] Correspondingly, the generation unit is further configured to:

[0035] Based on the pole-zero distribution and amplitude-frequency response curve of the transfer function of the output signal, and the pole-zero distribution and amplitude-frequency response curve of the transfer function of the noise, the values ​​of the determined working variable parameters are corrected to obtain corrected values; and corresponding components are selected for the circuit architecture based on the corrected values.

[0036] Optionally, the device further includes:

[0037] The simulation unit is used to call the simulation application, perform performance testing on the pulse density modulation interface of the generated analog-to-digital converter based on the simulation application, and obtain the performance test results.

[0038] The generation unit is also used to determine, when the performance test results meet the circuit design requirements, to fabricate the pulse density modulation interface of the analog-to-digital converter using the circuit architecture.

[0039] Optionally, the device further includes:

[0040] The adjustment unit is used to adjust the correction value or the value when it is determined that the performance test result does not meet the circuit design requirements, and obtain the adjustment value; the generation unit is also used to select the corresponding components for the circuit architecture according to the adjustment value; the simulation unit is also used to call the simulation application and perform performance testing on the pulse density modulation interface of the regenerated analog-to-digital converter based on the simulation application, and obtain the performance test result.

[0041] The adjustment unit is also used to determine whether the performance test result meets the test requirements, and to adjust the correction value or the value or the adjustment value again when the performance test result does not meet the design requirements, until the performance test result meets the test requirements.

[0042] Optionally, the device further includes:

[0043] The rounding unit is used to multiply the non-integer value by a fourth set value and round it when the value of the working variable parameter of the component is determined to be a non-integer value.

[0044] The processing unit is configured to, after the circuit architecture performs a multiplication operation based on the rounded value of the working variable parameter, truncate the number of bits of the fifth set value from the operation result; wherein the fifth set value is associated with the fourth set value.

[0045] Another aspect of the present invention provides an electronic device, including a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus; the memory is used to store computer programs; and the processor is used to implement the steps of the pulse density modulation interface implementation method of the analog-to-digital converter when executing the program stored in the memory.

[0046] In another aspect, the present invention provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the pulse density modulation interface implementation method for the analog-to-digital converter.

[0047] Before generating the pulse density modulation (PDM) interface for an analog-to-digital converter (ADC), this invention first determines the theoretical parameters based on the designed ADC circuit architecture. Then, based on these theoretical parameters, values ​​are assigned to the parameters of relevant components within the circuit architecture. Simulation is then used to perform signal processing on the assigned circuit, yielding simulation results. The simulation results are then used to determine if they meet the circuit design performance requirements. If not, the relevant component parameters are adjusted until the designed circuit meets the performance requirements. This method generates the PDM interface for the ADC, resulting in a higher-performance PDM interface and improving the performance of audio sensors and other devices using this interface. Attached Figure Description

[0048] Figure 1 A flowchart illustrating the pulse density modulation interface implementation method of an analog-to-digital converter according to an embodiment of the present invention is shown;

[0049] Figure 2 A schematic diagram of the sigma-delta ADC modulation circuit architecture according to an embodiment of the present invention is shown;

[0050] Figure 3 It shows Figure 2 The equivalent structure diagram of the circuit architecture shown;

[0051] Figure 4 A schematic diagram of the STF zero-pole distribution and amplitude-frequency response curves according to an embodiment of the present invention is shown;

[0052] Figure 5 A schematic diagram of the NTF zero-pole distribution and amplitude-frequency response curves according to an embodiment of the present invention is shown;

[0053] Figure 6 A schematic diagram of the final design of the sigma-delta ADC modulation circuit architecture according to an embodiment of the present invention is shown;

[0054] Figure 7 A performance simulation diagram of the sigma-delta ADC modulation circuit architecture according to an embodiment of the present invention is shown;

[0055] Figure 8 A schematic diagram of the composition structure of the pulse density modulation interface implementation device for the analog-to-digital converter according to an embodiment of the present invention is shown;

[0056] Figure 9 A structural diagram of an electronic device according to an embodiment of the present invention is shown. Detailed Implementation

[0057] To make the objectives, features, and advantages of this invention more apparent and understandable, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0058] Figure 1 A flowchart illustrating the pulse density modulation interface implementation method of the analog-to-digital converter according to an embodiment of the present invention is shown, as follows: Figure 1 As shown, the pulse density modulation interface implementation method of the analog-to-digital converter in this embodiment of the invention includes the following processing steps:

[0059] Step 101: Obtain the circuit architecture of the analog-to-digital converter and set the operating variable parameters for the components in the circuit architecture.

[0060] In this embodiment of the invention, the design and implementation of the PDM interface circuit for a sigma-delta ADC are primarily carried out. This embodiment pre-designs the theoretical circuit, and based on the signal processing flow and set signal processing parameters within the theoretical circuit, determines the operating parameters of the relevant components in the circuit structure.

[0061] Step 102: Determine the transfer function of the output signal and the transfer function of the noise based on the working variable parameters.

[0062] In this embodiment of the invention, the transfer function of the signal and the transfer function of the noise are calculated based on preset working variable parameters and the theoretical signal processing method.

[0063] Step 103: With OSR set to a first set value, filter order set to a second set value, and quantization bit depth set to a third set value, calculate the optimal solution of the noise transfer function.

[0064] In this embodiment of the invention, the OSR value is generally selected from 64, 128, 256, etc., that is, the first set value is selected from 64, 128, 256, etc. Those skilled in the art should understand that this is merely an example and not a limitation of the technical means. Once the above set values ​​are given, based on the aforementioned transfer function of the output signal and the transfer function of the noise, the specific values ​​of the operating parameters of the relevant components in the circuit architecture can be determined, thereby determining the selection of the relevant components in the circuit structure. These components mainly include filters, such as amplifiers.

[0065] The filter order can be selected as 2. That is, the second setting value is 2. Of course, other orders such as 3 or 4 can also be selected according to the performance requirements of the pulse density modulation interface of the analog-to-digital converter.

[0066] The quantization bit depth can be selected as 1, meaning the third setting value can be 1. This allows for the design of a second-order, 1-bit PDM interface.

[0067] Step 104: Determine the values ​​of the operating variable parameters of the component based on the optimal solution.

[0068] In this embodiment of the invention, the specific values ​​of the operating parameters of the relevant components in the circuit structure are calculated based on the optimal solution in order to determine the specific circuit structure.

[0069] In one embodiment of the present invention, based on the optimal solution, the pole-zero distribution and amplitude-frequency response curve of the transfer function of the output signal, and the pole-zero distribution and amplitude-frequency response curve of the transfer function of the noise are determined; correspondingly, the appropriate components are selected for the circuit architecture based on the values, including: correcting the values ​​of the determined working variable parameters according to the pole-zero distribution and amplitude-frequency response curve of the transfer function of the output signal, and the pole-zero distribution and amplitude-frequency response curve of the transfer function of the noise, to obtain corrected values; and selecting appropriate components for the circuit architecture according to the corrected values.

[0070] Step 105: Based on the value, select the corresponding components for the circuit architecture and generate the PDM interface for the ADC.

[0071] In this embodiment of the invention, the specific circuit to be designed is determined based on the specific values ​​of the operating parameters of the determined components, thereby determining the final PDM interface of the ADC.

[0072] Based on the foregoing processing steps, the pulse density modulation interface implementation method for the analog-to-digital converter in this embodiment of the invention further includes:

[0073] A simulation application is invoked, and the performance of the generated pulse density modulation interface of the analog-to-digital converter is tested based on the simulation application to obtain the performance test results. When it is determined that the performance test results meet the circuit design requirements, the pulse density modulation interface of the analog-to-digital converter is fabricated using the circuit architecture.

[0074] If the performance test results do not meet the circuit design requirements, the correction value or the value is adjusted to obtain an adjusted value; based on the adjusted value, the corresponding components are selected for the circuit architecture.

[0075] As one implementation method, the pulse density modulation interface implementation method of the analog-to-digital converter in this embodiment of the invention further includes: calling a simulation application, performing performance testing on the regenerated pulse density modulation interface of the analog-to-digital converter based on the simulation application, and obtaining performance test results; here, the simulation application can be a circuit design simulation application, such as Simulink. It is then determined whether the performance test results meet the test requirements, and if the performance test results do not meet the design requirements, the correction value, the selected value, or the adjustment value is adjusted again until the performance test results meet the test requirements.

[0076] If the value of the operating variable parameter of the component is determined to be non-integer, the non-integer value is multiplied by a fourth set value and rounded; after the circuit architecture performs a multiplication operation based on the rounded value of the operating variable parameter, the number of bits of the fifth set value is truncated from the operation result; wherein, the fifth set value is associated with the fourth set value.

[0077] The following specific examples further illustrate the essence of the technical solutions in the embodiments of the present invention.

[0078] In this embodiment of the invention, in the audio field, because the human hearing range is between 20 and 20 kHz, the baseband f b Generally, a frequency below 24kHz is chosen. This low baseband frequency is well-suited for data acquisition using a sigma-delta ADC, as the ADC's performance relies on a high OSR (Optical State Ratio). OSR is calculated as follows: Among them, f s This indicates the frequency of the transmitted signal. In the implementation of a sigma-delta ADC, with a fixed number of quantization bits, the quantization noise is also fixed. In this case, the larger the OSR value, the wider the frequency range over which the quantization noise is evenly distributed. Within a fixed baseband range, f... b The smaller the quantization noise, the better. Therefore, under the limited sampling clock rate, improving the OSR is beneficial to the performance of the ADC. In the current audio ADC baseband case, the OSR is generally selected as 64, 128, or 256, and the sampling rate is selected as 3.072 / 6.144 / 12.288MHz respectively.

[0079] Audio sensors on the market are currently categorized into analog MEMS and digital MEMS based on their output interfaces. The difference lies in whether the sensor's output interface type is analog (differential, single-ended) or digital (I2S, PDM, or TDM). With market expansion and application applicability, digital microphones have gained popularity due to their superior transmission performance and better compatibility with backend codecs and other digital processing modules. Low-end digital microphones often use the PDM interface. This interface suffers from some performance loss, as it converts audio PCM waveform data into a single-bit inverted signal. A low-pass filter is needed at the backend to remove high-frequency signals in order to recover the audio information.

[0080] Theoretically, there are two main ways to implement a PDM interface. One is to strictly follow the theory of pulse density modulation, using the number of 1s in an n-bit binary number to represent the corresponding pulse density. Different density lookup tables correspond to different data sizes. This encoding method is very inefficient, requiring 2^n bits to represent a data range. (n+1) Encoding can only be achieved with a certain bitstream, where n+1 is reserved to prevent the introduction of DC components during modulation, with each high pulse accompanied by a low pulse to cancel out the DC component. The second method uses sigma-delta modulation to achieve PDM encoding. This encoding method is very efficient, modulating the output data on the bitstream width corresponding to the OSR. Currently, the highest theoretical resolution achieved on the market can reach 24 bits. According to the SNR calculation formula SNR = 6.02N + 1.76, its signal-to-noise ratio is very high.

[0081] The embodiments of the present invention are illustrated using a PDM interface based on a second-order 1-bit sigma-delta modulation scheme as an example, and are not intended to limit the technical solution of the present invention.

[0082] This invention, based on a second-order 1-bit Sigma-Delta ADC architecture, derives the corresponding transfer function according to the circuit architecture. Then, using MATLAB, it calculates the coefficients of the quantization noise transfer function (NTF), and conversely, calculates the magnitude of each gain in the architecture. The architecture is then simulated in Simulink to obtain a PSD diagram, determining whether the designed circuit architecture meets the expected performance. Next, based on the architecture, the circuit code is designed using Verilog, and the circuit is synthesized. During circuit generation, the code is also re-translated into MATLAB code with analog delay timing and corresponding shaping and truncation processing, further verifying the consistency between the digital circuit implementation and the theoretical derivation. This completes the implementation of the PDM encoding circuit from architecture to circuit implementation. The details are as follows.

[0083] Figure 2A schematic diagram of the sigma-delta ADC modulation circuit architecture according to an embodiment of the present invention is shown, as follows: Figure 2 As shown, in the following second-order 1-bit sigma-delta ADC modulation circuit architecture, quantization is required to convert the analog signal into a digital level. In the quantization of a 1-bit signal, the quantizer outputs two levels: 1 and 0. n-bit quantization will produce 2... n During the conversion process, the full-scale analog signal is divided into 2... n The signal is divided into equal parts, with the bottom line of each part representing a threshold. The analog signal is compared to the nearest threshold; if it's greater, the level corresponding to the upper threshold is used; otherwise, the level corresponding to the lower threshold is used. This modulation method introduces quantization noise because the analog signal is continuous data with a uniform Gaussian probability distribution within the threshold intervals. The in-band quantization noise power N can be calculated using the Gaussian distribution of the signal within the threshold intervals. q The formula is as follows:

[0084]

[0085] In equation (1.1), Δ represents the threshold interval, also known as the quantization interval. The formula also shows that the larger the OSR value, the smaller the quantization noise power within the band. Throughout the entire path, without considering thermal noise and other circuit effects, the main noise source is quantization noise. Therefore, the implementation model of a sigma-delta ADC can be equivalent to... Figure 3 The structure shown.

[0086] Based on the architecture shown in the figure, the transfer function of the output signal Y(z) can be derived as follows:

[0087]

[0088] Therefore, the signal transfer function (STF) and noise transfer function (NTF) of this circuit architecture are as follows:

[0089]

[0090]

[0091] Ideally, the STF of a sigma-delta ADC should be equal to 1; therefore, this STF can be designed as a low-pass filter. The NTF can be calculated using the `synthesize` function in MATLAB. In this embodiment, taking an OSR of 64, a filter order of 2, and a quantization bit depth of 1 as an example, the optimal NTF result can be obtained as follows:

[0092]

[0093] Therefore, the following results can be drawn:

[0094]

[0095] Substituting this result into the STF formula and designing a low-pass filter with a passband gain of 1, we can obtain the recommended value:

[0096] a1a2=-0.2163(1.7)

[0097] At this point, the pole-zero distribution and amplitude-frequency response curve of SNF can be obtained, referring to... Figure 4 As shown.

[0098] The NTF zero-pole distribution and amplitude-frequency response curves were obtained, with reference to... Figure 5 As shown.

[0099] At this point, the STF and NTF of the ADC are designed, and then the following can be calculated according to Equations 1.6 and 1.7:

[0100]

[0101] In this embodiment of the invention, a1 is set to 0.5 for ease of implementation in digital circuits.

[0102] Based on the parameters of the above architecture, the architecture of a Simulink system can be implemented as follows: Figure 6 As shown.

[0103] right Figure 6 The circuit architecture shown can be simulated using Simulink to obtain... Figure 7 The simulation results are shown.

[0104] The simulation results show an SNDR of 70.9 dB and a resolution of 11.49 bits, which meets the expected performance in the current application scenario.

[0105] pass Figure 7 The simulation results shown can be used to implement the PDM interface of the digital circuit by combining the architecture diagram and parameters. However, some special handling is required during code implementation. Firstly, because the coefficients are decimals, while digital circuits currently process data as integers, the coefficients will be multiplied by 2 here. 16 Then, the lower 16 bits are truncated during the multiplication operation. Additionally, because the PDM interface input data is currently 16 bits, meaning the data range is -32768 to 32767, the DAC feedback should be 65536, i.e., 2... 16 The specific implementation of the code here will not be described in detail.

[0106] In the design of the feedback value of the digital DAC, the digital circuit is designed with a register configurable state to adapt to different input sizes and achieve maximum performance. Currently, the input bit width is fixed at 16 bits. When the data value is between -32768 and 32767, the feedback value is -65536 / 65536. If the bit width of the input value range is 15, the corresponding feedback value can be configured to reduce the bit width by 1 bit, which can improve performance.

[0107] In the circuit design process, due to the need for parameter truncation and related rounding operations, it is necessary to use MATLAB code to simulate the digital circuit and implement the code for performance simulation. The code implementation also requires truncation, rounding, and rounding operations to recreate the digital circuit code in the prototype. After the code is implemented, a sine wave input is simulated. With a sine wave input signal-to-noise ratio of 100dB, the output signal SNR = 68dB, which meets the expected performance.

[0108] Figure 8 A schematic diagram of the composition structure of the pulse density modulation interface implementation device for the analog-to-digital converter according to an embodiment of the present invention is shown, as follows: Figure 8 As shown, embodiments of the present invention Figure 8 A schematic diagram illustrating the structural composition of the pulse density modulation interface implementation device for an analog-to-digital converter according to an embodiment of the present invention includes:

[0109] Setting unit 80 is used to design the circuit architecture of the analog-to-digital converter and set the operating variable parameters for the components in the circuit architecture;

[0110] The first determining unit 81 is used to determine the transfer function of the output signal and the transfer function of the noise based on the working variable parameters;

[0111] The calculation unit 82 is used to calculate the optimal solution of the noise transfer function when the OSR is a first set value, the filter order is a second set value, and the quantization bit depth is a third set value.

[0112] The second determining unit 83 is used to determine the values ​​of the working variable parameters of the component according to the optimal solution;

[0113] The generation unit 84 is used to select the corresponding components based on the value of the circuit architecture and generate the pulse density modulation interface of the analog-to-digital converter.

[0114] As one implementation method, in Figure 8 Based on the pulse density modulation interface implementation device for the analog-to-digital converter shown, the pulse density modulation interface implementation device for the analog-to-digital converter in this embodiment of the invention further includes:

[0115] Third Determined Unit ( Figure 8(not shown in the image), used to determine the zero-pole distribution and amplitude-frequency response curve of the transfer function of the output signal, and the zero-pole distribution and amplitude-frequency response curve of the transfer function of the noise, based on the optimal solution;

[0116] Correspondingly, the generation unit 84 is further configured to:

[0117] Based on the pole-zero distribution and amplitude-frequency response curve of the transfer function of the output signal, and the pole-zero distribution and amplitude-frequency response curve of the transfer function of the noise, the values ​​of the determined working variable parameters are corrected to obtain corrected values; and corresponding components are selected for the circuit architecture based on the corrected values.

[0118] As one implementation method, in Figure 8 Based on the pulse density modulation interface implementation device for the analog-to-digital converter shown, the pulse density modulation interface implementation device for the analog-to-digital converter in this embodiment of the invention further includes:

[0119] Simulation unit ( Figure 8 (Not shown in the image), used to call the simulation application, and to perform performance testing on the pulse density modulation interface of the generated analog-to-digital converter based on the simulation application, and obtain the performance test results;

[0120] The generation unit 84 is also used to determine that when the performance test results meet the circuit design requirements, to fabricate the pulse density modulation interface of the analog-to-digital converter using the circuit architecture.

[0121] As one implementation method, in Figure 8 Based on the pulse density modulation interface implementation device for the analog-to-digital converter shown, the pulse density modulation interface implementation device for the analog-to-digital converter in this embodiment of the invention further includes:

[0122] Adjustment unit ( Figure 8 (Not shown in the image) is used to adjust the correction value or the value when it is determined that the performance test result does not meet the circuit design requirements, and obtain an adjusted value; the generation unit 84 is also used to select corresponding components for the circuit architecture according to the adjusted value; the simulation unit is also used to call a simulation application and perform performance testing on the pulse density modulation interface of the regenerated analog-to-digital converter based on the simulation application, and obtain performance test results;

[0123] The adjustment unit is also used to determine whether the performance test result meets the test requirements, and to adjust the correction value or the value or the adjustment value again when the performance test result does not meet the design requirements, until the performance test result meets the test requirements.

[0124] As one implementation method, in Figure 8Based on the pulse density modulation interface implementation device for the analog-to-digital converter shown, the pulse density modulation interface implementation device for the analog-to-digital converter in this embodiment of the invention further includes:

[0125] Rounding unit ( Figure 8 (not shown in the image), used to multiply the non-integer value by a fourth set value and round it down when the value of the working variable parameter of the component is determined to be a non-integer value;

[0126] Processing unit ( Figure 8 (not shown in the diagram), used to truncate the number of bits of the fifth set value from the result of the multiplication operation based on the rounded working variable parameter value of the circuit architecture; wherein the fifth set value is associated with the fourth set value.

[0127] In an exemplary embodiment, the setting unit 80, the first determining unit 81, the calculation unit 82, the second determining unit 83, the generation unit 84, etc., may be implemented by one or more central processing units (CPUs), graphics processing units (GPUs), baseband processors (BPs), application-specific integrated circuits (ASICs), digital signal processors (DSPs), programmable logic devices (PLDs), complex programmable logic devices (CPLDs), field-programmable gate arrays (FPGAs), general-purpose processors, controllers, microcontrollers (MCUs), microprocessors, or other electronic components to perform the steps of the pulse density modulation interface implementation method for the analog-to-digital converter in the foregoing embodiments.

[0128] In this embodiment of the disclosure, Figure 8 The specific manner in which each unit in the pulse density modulation interface implementation device of the analog-to-digital converter performs its operations has been described in detail in the embodiments of the method, and will not be elaborated here.

[0129] Below, for reference Figure 9 To describe the electronic device 11 according to an embodiment of this application.

[0130] like Figure 9As shown, the electronic device 11 includes one or more processors 111 and memory 112.

[0131] The processor 111 may be a central processing unit (CPU) or other form of processing unit with data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device 11 to perform desired functions.

[0132] The memory 112 may include one or more computer program products, which may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, random access memory (RAM) and / or cache memory. The non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program instructions may be stored on the computer-readable storage medium, and the processor 111 may execute the program instructions to implement the methods of the various embodiments of this application described above and / or other desired functions. Various contents such as input signals, signal components, and noise components may also be stored in the computer-readable storage medium.

[0133] In one example, the electronic device 11 may also include an input device 113 and an output device 114, which are interconnected via a bus system and / or other forms of connection mechanism (not shown).

[0134] The input device 113 may include, for example, a keyboard, a mouse, etc.

[0135] The output device 114 can output various information to the outside, including determined distance information, direction information, etc. The output device 114 may include, for example, a display, a speaker, a printer, and a communication network and its connected remote output devices, etc.

[0136] Of course, for the sake of simplicity, Figure 9 Only some of the components of the electronic device 11 relevant to this application are shown in this illustration; components such as buses, input / output interfaces, etc., are omitted. In addition, the electronic device 11 may include any other suitable components depending on the specific application.

[0137] In addition to the methods and apparatus described above, embodiments of this application may also be computer program products, which include computer program instructions that, when executed by a processor, cause the processor to perform the steps in the methods according to various embodiments of this application described in the "Exemplary Methods" section above.

[0138] The computer program product can be written in any combination of one or more programming languages ​​to perform the operations of the embodiments of this application. The programming languages ​​include object-oriented programming languages ​​such as Java and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on the user's computing device, partially on the user's computing device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0139] Furthermore, embodiments of this application may also be computer-readable storage media storing computer program instructions thereon, which, when executed by a processor, cause the processor to perform the steps in the methods according to various embodiments of this application described in the "Exemplary Methods" section above.

[0140] The computer-readable storage medium may be any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may, for example, include, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: electrical connections having one or more wires, portable disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0141] The basic principles of this application have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this application are merely examples and not limitations, and should not be considered as essential features of each embodiment of this application. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the application to the necessity of employing the aforementioned specific details for implementation.

[0142] The block diagrams of devices, apparatuses, devices, and systems involved in this application are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, devices, and systems can be connected, arranged, and configured in any manner. Words such as “comprising,” “including,” “having,” etc., are open-ended terms meaning “including but not limited to,” and are used interchangeably with them. The terms “or” and “and” as used herein refer to the terms “and / or,” and are used interchangeably with them unless the context clearly indicates otherwise. The term “such as” as used herein refers to the phrase “such as but not limited to,” and is used interchangeably with it.

[0143] It should also be noted that in the apparatus, equipment, and methods of this application, the components or steps can be disassembled and / or recombined. These disassemblies and / or recombinations should be considered as equivalent solutions of this application.

[0144] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use this application. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein can be applied to other aspects without departing from the scope of this application. Therefore, this application is not intended to be limited to the aspects shown herein, but rather to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0145] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this application to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations thereof.

Claims

1. A method for implementing a pulse density modulation interface for an analog-to-digital converter, characterized in that, The method includes: Design the circuit architecture of the analog-to-digital converter and set the operating variable parameters for the components in the circuit architecture; The transfer function of the output signal and the transfer function of the noise are determined based on the aforementioned working variable parameters. With the oversampling rate OSR set to a first set value, the filter order set to a second set value, and the quantization bit depth set to a third set value, calculate the optimal solution of the noise transfer function; The values ​​of the operating variable parameters of the component are determined based on the optimal solution. Based on the values, select the corresponding components for the circuit architecture and generate the pulse density modulation interface for the analog-to-digital converter; Based on the optimal solution, the zero-pole distribution and amplitude-frequency response curve of the transfer function of the output signal, as well as the zero-pole distribution and amplitude-frequency response curve of the transfer function of the noise, are determined. Correspondingly, based on the value, the appropriate components are selected for the circuit architecture, including: Based on the pole-zero distribution and amplitude-frequency response curve of the transfer function of the output signal, and the pole-zero distribution and amplitude-frequency response curve of the transfer function of the noise, the values ​​of the determined working variable parameters are corrected to obtain the corrected values. The appropriate components are selected based on the correction value for the circuit architecture.

2. The method according to claim 1, characterized in that, The method further includes: The simulation application is invoked, and the performance of the pulse density modulation interface of the generated analog-to-digital converter is tested based on the simulation application to obtain the performance test results; When the performance test results are determined to meet the circuit design requirements, the pulse density modulation interface of the analog-to-digital converter is fabricated using the circuit architecture.

3. The method according to claim 2, characterized in that, The method further includes: If the performance test results do not meet the circuit design requirements, the correction value or the value is adjusted to obtain an adjusted value; based on the adjusted value, the corresponding components are selected for the circuit architecture. The simulation application is invoked, and the performance of the pulse density modulation interface of the regenerated analog-to-digital converter is tested based on the simulation application to obtain the performance test results. Determine whether the performance test results meet the test requirements, and if the performance test results do not meet the design requirements, adjust the correction value, the selected value, or the adjustment value again until the performance test results meet the test requirements.

4. The method according to claim 3, characterized in that, The method further includes: If the value of the operating variable parameter of the component is determined to be non-integer, the non-integer value is multiplied by the fourth set value and then rounded. After the circuit architecture performs a multiplication operation based on the rounded values ​​of the working variable parameters, the result is truncated by a fifth set value of bits; wherein the fifth set value is associated with the fourth set value.

5. A pulse density modulation interface implementation device for an analog-to-digital converter, characterized in that, The device includes: The configuration unit is used to design the circuit architecture of the analog-to-digital converter and set the operating variable parameters for the components in the circuit architecture. The first determining unit is used to determine the transfer function of the output signal and the transfer function of the noise based on the working variable parameters; The calculation unit is used to calculate the optimal solution of the transfer function of the noise when the OSR is a first set value, the filter order is a second set value, and the quantization bit depth is a third set value. The second determining unit is used to determine the values ​​of the working variable parameters of the component based on the optimal solution. The generation unit is used to select corresponding components based on the value in the circuit architecture and generate the pulse density modulation interface of the analog-to-digital converter. The third determining unit is used to determine the zero-pole distribution and amplitude-frequency response curve of the transfer function of the output signal, and the zero-pole distribution and amplitude-frequency response curve of the transfer function of the noise, based on the optimal solution. Correspondingly, the generation unit is further configured to: Based on the pole-zero distribution and amplitude-frequency response curve of the transfer function of the output signal, and the pole-zero distribution and amplitude-frequency response curve of the transfer function of the noise, the values ​​of the determined working variable parameters are corrected to obtain corrected values; and corresponding components are selected for the circuit architecture based on the corrected values.

6. The apparatus according to claim 5, characterized in that, The device further includes: The simulation unit is used to call the simulation application, perform performance testing on the pulse density modulation interface of the generated analog-to-digital converter based on the simulation application, and obtain the performance test results. The generation unit is also used to determine, when the performance test results meet the circuit design requirements, to fabricate the pulse density modulation interface of the analog-to-digital converter using the circuit architecture.

7. The apparatus according to claim 6, characterized in that, The device further includes: The adjustment unit is used to adjust the correction value or the value when it is determined that the performance test result does not meet the circuit design requirements, and obtain the adjustment value; the generation unit is also used to select the corresponding components for the circuit architecture according to the adjustment value; the simulation unit is also used to call the simulation application and perform performance testing on the pulse density modulation interface of the regenerated analog-to-digital converter based on the simulation application, and obtain the performance test result. The adjustment unit is also used to determine whether the performance test result meets the test requirements, and to adjust the correction value or the value or the adjustment value again when the performance test result does not meet the design requirements, until the performance test result meets the test requirements.

8. The apparatus according to claim 7, characterized in that, The device further includes: The rounding unit is used to multiply the non-integer value by a fourth set value and round it when the value of the working variable parameter of the component is determined to be a non-integer value. The processing unit is configured to truncate a fifth set number of bits from the result of the multiplication operation performed by the circuit architecture based on the rounded value of the working variable parameter; wherein the fifth set value is associated with the fourth set value.

9. An electronic device, characterized in that, The device includes a processor, a communication interface, a memory, and a communication bus. The processor, the communication interface, and the memory communicate with each other through the communication bus. The memory is used to store computer programs. When the processor executes the program stored in the memory, it implements the steps of the pulse density modulation interface implementation method of the analog-to-digital converter according to any one of claims 1-4.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps of the pulse density modulation interface implementation method for the analog-to-digital converter according to any one of claims 1-4.

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