Substrate processing apparatus and substrate processing method
By introducing a combined design of carrier module, processing module and bypass conveying mechanism into the substrate processing device, the conveying path is optimized, the problem of low productivity in the prior art is solved, and more efficient substrate processing is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-11-18
- Publication Date
- 2026-03-06
AI Technical Summary
Existing substrate processing equipment has low productivity and cannot efficiently utilize transport paths and processing components.
The design employs a combination of a carrier module, first and second processing modules, a relay module, and a bypass conveying mechanism. By controlling the movement of the main conveying mechanism, forward and return paths are formed, and the bypass conveying mechanism is used to bypass the processing components when necessary, thereby improving conveying efficiency.
It improves the productivity of the substrate processing device, optimizes the utilization of the transport path, reduces processing time, and improves processing efficiency.
Smart Images

Figure CN114551285B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to a substrate processing apparatus and a substrate processing method. Background Technology
[0002] In the semiconductor device manufacturing process, semiconductor wafers (hereinafter referred to as wafers) are transported between various processing components to perform various processes such as liquid processing and heat processing. Patent Document 1 describes a coating and developing apparatus comprising processing modules S2 and S4. Each processing module S2 and S4 includes: multiple unit modules, each equipped with multiple processing components, and these unit modules are stacked on top of each other; and a main arm disposed in each unit module to transport the wafer between the processing components. Processing modules S2 and S4 are sandwiched between a carrier module and an exposure apparatus, and a module S3 for lifting and transporting the wafer is located between processing modules S2 and S4. Furthermore, in the unit modules below each processing module S2 and S4, multiple shuttle arms are provided as a transport mechanism different from the main arm, and these shuttle arms transport the wafer without passing through the processing components.
[0003] The wafers transported to module S3 via the shuttle arm of processing module S2 are assigned to the unit modules above processing modules S2 and S4, then return to module S3 and are transported to the exposure apparatus via the shuttle arm of processing module S4. Then, while one of the processing modules S2 or S4 is processing, the wafers are transported to the carrier module side by using the shuttle arm to bypass the processing components of modules not being processed.
[0004] Existing technical documents
[0005] Patent documents
[0006] Patent Document 1: Japanese Patent Application Publication No. 2008-258208 Summary of the Invention
[0007] The problem the invention aims to solve
[0008] This disclosure provides a technique that can improve the productivity of a substrate processing apparatus.
[0009] Solution for solving the problem
[0010] The substrate processing apparatus disclosed herein includes:
[0011] A carrier module, which serves as a carrier for storing the substrate;
[0012] The first processing module includes a first lower processing module and a first upper processing module that are stacked on top of each other and connect to the substrate between the carrier module. Each of the first lower processing module and the first upper processing module includes: multiple layers, each having processing components for processing the substrate and stacked on top of each other; and a main conveying mechanism that is used for each layer to convey the substrate.
[0013] The second processing module includes a second lower processing module and a second upper processing module that are adjacent to and stacked on top of the first lower processing module and the first upper processing module in the left-right direction, respectively. The second lower processing module and the second upper processing module each include the plurality of layers and the main conveying mechanism.
[0014] A relay module, which includes a lifting and conveying mechanism for transferring the substrate between the second lower processing module and the second upper processing module, is adjacent to the second processing module in the left-right direction on the side opposite to the side adjacent to the first processing module.
[0015] A control unit controls the operation of each main conveying mechanism to cause one of the upper processing module (including the first upper processing module and the second upper processing module) and the lower processing module (including the first lower processing module and the second lower processing module) to form a forward path for conveying the substrate from the carrier module toward the relay module, and to cause the other to form a return path for conveying the substrate from the relay module toward the carrier module; and
[0016] A bypass transport mechanism is provided in each of the first and second processing modules as a bypass transport path forming module, which is one of the upper and lower processing modules. The bypass transport mechanism operates in such a way as to form the forward path or the return path together with the main transport mechanism of the bypass transport path forming module. In the bypass transport path forming module, the bypass transport mechanism enables the substrate to be transported towards the downstream module using one of the main transport mechanisms of the first and second processing modules.
[0017] The effects of the invention
[0018] This disclosure can improve the productivity of substrate processing apparatus. Attached Figure Description
[0019] Figure 1 This is a cross-sectional top view of the substrate processing apparatus according to the first embodiment of this disclosure.
[0020] Figure 2 This is a longitudinal sectional front view of the substrate processing apparatus.
[0021] Figure 3 This is a longitudinal sectional front view of the substrate processing apparatus.
[0022] Figure 4 This is a left-side view of the substrate processing apparatus.
[0023] Figure 5 This is a longitudinal sectional side view of the substrate processing apparatus.
[0024] Figure 6 This is an explanatory diagram illustrating the operation of the conveying mechanism provided in the substrate processing apparatus.
[0025] Figure 7 This is an explanatory diagram illustrating the operation of the conveying mechanism provided in the substrate processing apparatus.
[0026] Figure 8 This is an explanatory diagram illustrating the operation of the conveying mechanism provided in the substrate processing apparatus.
[0027] Figure 9 This is a schematic diagram of the transport path of the substrate processing apparatus.
[0028] Figure 10 This is a cross-sectional top view of the coating and developing apparatus according to the second embodiment.
[0029] Figure 11 This is a longitudinal sectional front view of the coating and developing apparatus.
[0030] Figure 12 This is a cross-sectional top view of the coating and developing apparatus according to the third embodiment.
[0031] Figure 13 This is a longitudinal sectional front view of the coating and developing apparatus.
[0032] Figure 14 This is a longitudinal sectional right-side view of the coating and developing apparatus. Detailed Implementation
[0033] [First Embodiment]
[0034] Refer to each Figure 1 Cross-sectional top view, Figure 2 , Figure 3 The longitudinal sectional front view illustrates the substrate processing apparatus 1 of the first embodiment of this disclosure. Figure 2 , Figure 3Cross-sections of the apparatus at different locations are shown. In the substrate processing apparatus 1, the carrier module D1, the first processing module D2, the second processing module D3, and the interface module D4 are arranged in a straight line in the transverse direction in this order, with adjacent modules connected to each other. These modules (carrier module, first processing module, second processing module, and interface module) D1 to D4 are each divided by a housing, and a transport area for the wafer W, which serves as the substrate, is formed inside each housing.
[0035] In the following description, the arrangement of these modules D1 to D4 will be left-right, with the carrier module D1 side designated as the left and the interface module D4 as the right. Furthermore, regarding the front-back orientation of the device, the side closer to the carrier module D1 when viewed from the left side will be designated as the front, and the side further inward as the rear. The interface module D4, which serves as a relay module, is connected to the exposure machine 20 from the right. Moreover, due to this configuration, the interface module D4 is adjacent to the second processing module D3 on the side opposite to the side adjacent to the first processing module D2 in the left-right direction.
[0036] Before describing each module D1 to D4 in detail, a general structure of the substrate processing apparatus 1 will be described. For example, a wafer W is transported to the substrate processing apparatus 1 in a carrier C called a FOUP (Front Opening Unify Pod), and a resist film is formed on the surface of the wafer W. The substrate processing apparatus 1 includes processing units that perform various processes such as cleaning and developing processes as liquid processing, and heat treatment (PEB: Post Exposure Bake) of the wafer W before the developing process after exposure. In addition, the wafer W is handed over to the exposure machine 20 before PEB to expose the resist film.
[0037] The first processing module D2 and the second processing module D3 are each divided into two parts vertically. The lower and upper sides of the first processing module D2, thus divided in this way, are designated as the first lower processing module D21 and the first upper processing module D22, respectively. Similarly, the lower and upper sides of the second processing module D3, also divided in this way, are designated as the second lower processing module D31 and the second upper processing module D32, respectively. Therefore, the first lower processing module D21 and the first upper processing module D22 are stacked on top of each other, and the second lower processing module D31 and the second upper processing module D32 are stacked on top of each other. Consequently, the first lower processing module D21 and the first upper processing module D22 are adjacent to each other, and the second lower processing module D31 and the second upper processing module D32 are adjacent to each other.
[0038] These processing modules (D21, D22, D31, D32) each include the aforementioned processing components and a transport mechanism (main transport mechanism) capable of transferring to the processing components. Furthermore, the first upper processing module D22 and the second upper processing module D32 each have a transport mechanism different from the transport mechanism that transfers to the processing components. This different transport mechanism will be referred to hereafter as a shuttle. This shuttle is a bypass transport mechanism that transports the wafer W towards the downstream module without passing through the processing components. The first upper processing module D22 and the second upper processing module D32, equipped with this shuttle, are bypass transport path forming modules.
[0039] The first lower processing module D21 and the second lower processing module D31 form a forward path for transporting the wafer W from the carrier module D1 toward the interface module D4. Furthermore, the first upper processing module D22 and the second upper processing module D32 form a return path for transporting the wafer W, which has been exposed by the exposure machine 20, from the interface module D4 toward the carrier module D1, and are equipped with the same type of processing components capable of performing the same processing. On this return path, the wafer W is transported to a processing component for processing by the transport mechanism of one of the modules, the first upper processing module D22 and the second upper processing module D32, and is transported by a shuttle in the other module.
[0040] Sometimes, the first lower processing module D21 and the second lower processing module D31, which form the forward path, are collectively referred to as lower processing module G1, and the first upper processing module D22 and the second upper processing module D32, which form the return path, are collectively referred to as upper processing module G2. A shuttle is provided as described above, so that in upper processing module G2, the wafer W is transported along either of the two transport paths. Furthermore, a component refers to a part of the wafer W that is mounted, excluding the transport mechanism (including the shuttle). The component that processes the wafer W is referred to as a processing component as described above; this processing also includes obtaining images for inspection.
[0041] The following also refers to Figure 4 The side view illustrates the carrier module D1. A carrier transport mechanism (external transport mechanism), not shown, installed in the cleanroom where the substrate processing apparatus 1 is installed, feeds the carrier C into and out of the carrier module D1. The carrier module D1 is the module that feeds and sends the wafer W into and out of the carrier C.
[0042] The housing that constitutes the carrier module D1 is designated as 11. This housing 11 is square, with its lower side protruding to the left to form a support platform 12. Furthermore, two longitudinally separated portions of the left side of the housing 11, located above the support platform 12, protrude to the left to form support platforms 13 and 14, respectively. The lower support platform and the upper support platform are designated as 13 and 14, respectively.
[0043] Support platforms 12-14, for example, can each hold four carriers C spaced apart in the front-to-back direction, and are provided with stages for holding the carriers C in this manner. When viewed from the left, these stages are arranged in a 3×4 matrix, for example. Furthermore, the left end of support platform 12 protrudes to the left of support platforms 13 and 14, and the stages of support platform 12 are located on the right side of support platform 12 and below support platforms 13 and 14. The interior of support platform 12 is a storage area for bottles, which, as described above, store the processing liquid for liquid treatment in the first processing module D2 and the second processing module D3.
[0044] Using the carrier transfer mechanism 21 described later, the carrier C can be transferred between the various stages. Regarding each stage, the two stages on the front side of each of the support stages 12 and 13 are configured as movable stages 15 for loading and unloading the carrier C relative to the device. Therefore, when viewed from the left, the movable stages 15 are arranged in a 2×2 matrix. These movable stages 15 move between the loading position on the right side for loading and unloading the wafer W and the unloading position on the left side for transferring the carrier C to the carrier transfer mechanism 21. In this example, the movable stage 15 of the support stage 12 serves as a stage (loading member) for loading the carrier C to deliver unprocessed wafers W into the device, while the movable stage 15 of the support stage 13 serves as a stage (unloading member) for loading the carrier C to receive wafers W processed by the device. Their uses are thus differentiated. However, a mobile platform 15 can also be used as both a loading and unloading component.
[0045] Regarding the other platforms, the two platforms on the rear side of support platforms 12 and 13 and the two platforms on support platform 14 constitute temporary platform 16. Additionally, the other two platforms on support platform 14 constitute an infeed platform 17 and an outfeed platform 18. For example, the platform on the rear end side and the platform on the front end side of support platform 14 are the infeed platform 17 and the outfeed platform 18, respectively. These infeed platforms 17 and outfeed platforms 18 are platforms that hold the carrier C when the aforementioned external conveying mechanism feeds and outputs the carrier C relative to the substrate processing apparatus 1.
[0046] The carrier C is transferred in the following sequence: feeding platform 17 → moving platform 15 of support platform 12 → moving platform 15 of support platform 13 → delivery platform 18. When transferring the carrier C between the platforms in this way, if the platform to which the transfer is to be made is not available (occupied by other carrier C), the carrier C is placed on the temporary platform 16 and left to standby until the platform to which the transfer is to be made available.
[0047] A carrier transfer mechanism 21 is provided above the left side of the support platform 12. The carrier transfer mechanism 21 includes: a multi-joint arm 22, which is capable of holding the held part located on the upper part of the carrier C; and a moving mechanism 23, which is capable of moving the multi-joint arm 22 up and down and moving it back and forth. The carrier transfer mechanism 21 can transfer the carrier C between the platforms as described above.
[0048] A conveying port 24 for feeding and unloading wafer W is formed on the left side wall of the housing 11. The conveying ports 24 are arranged in a 2×2 matrix corresponding to the configuration of the movable stage 15. Each conveying port 24 is provided with a door 25. The door 25 can hold the cover of the carrier C on the movable stage 15 at the loading position, and can move while holding the cover to open and close the conveying port 24.
[0049] The aforementioned transport port 24 faces the transport area 31 of the wafer W formed within the housing 11. This transport area 31 is formed as a straight line with a relatively long front-to-back length when viewed from above. A transport mechanism 32 is provided on the front side of this transport area 31. The transport mechanism 32 includes a base that can move back and forth freely, move up and down freely, and rotate freely about a vertical axis, and a holding part for the wafer W that can move forward and backward on the base. The transport mechanism 32 can approach the carrier C on the movable stage 15 at the aforementioned loading position, the component stack T1 described later, and the pre-processing inspection component 41 described later, and perform the transfer of the wafer W.
[0050] The carrier module D1 is equipped with a pre-processing inspection component 41, which takes an image of the surface of the wafer W before processing by the substrate processing apparatus 1. The image data is sent to the control unit 10 (described later), which determines the presence or absence of abnormalities in the wafer W based on the image data. The pre-processing inspection component 41 is configured as a long and flat cuboid shape, with the right side located at the center of the front and rear of the transport area 31, and the left side protruding outward through the left side wall of the housing 11.
[0051] The pre-processing inspection assembly 41 includes: a stage 42 that can move freely left and right within the assembly; a semi-transparent mirror 43 disposed above the movement path of the stage 42; an illumination unit 44 that illuminates downwards by means of the semi-transparent mirror 43; and a camera 45 disposed to the left of the semi-transparent mirror 43 (see reference). Figure 3 The wafer W is transferred relative to the stage 42 located on the right side of the assembly using the transport mechanism 32. As the stage 42, which is transferred to the wafer W in this way, moves to the left and passes under the semi-transparent mirror 43, light is irradiated by the illumination unit 44, and the wafer W reflected on the semi-transparent mirror 43 is photographed by the camera 45 to obtain the image data described above.
[0052] Moreover, such as Figure 1 As shown, a transport mechanism 33 is provided in the transport area 31, located behind the pre-processing inspection assembly 41 when viewed from above. The transport mechanism 33 includes a base that can be raised and lowered and rotated about a vertical axis, and a holding part for the wafer W that can move forward and backward on the base. The transport mechanism 33 can transfer the wafer W relative to the assembly stack T1 and the shuttle TRS12 of the first upper processing module D22, which will be described later.
[0053] Next, the component stack T1 will be described. This component stack T1 is constructed by longitudinally overlapping the temperature adjustment component SCPL and the temporary wafer mounting junction component TRS. The component stack T1 is located at the center of the front and rear of the transport area 31. Therefore, when viewed from above, the component stack T1 is sandwiched between the transport mechanisms 32 and 33 in the front-rear direction, and is arranged overlapping with the pre-processing inspection component 41 on the right side of the pre-processing inspection component 41. Furthermore, regarding the aforementioned carrier stage, the two longitudinal rows of stages on the front side, including the movable stage 15, are positioned further forward than the component stack T1. Regarding the two longitudinal rows of stages on the rear side, one row is located to the left of the component stack T1, and the other row is located further rear than the component stack T1.
[0054] The transfer assembly TRS includes, for example, multiple pins arranged laterally, and the wafer W is transferred relative to these pins by the lifting action of the conveyor mechanism. The SCPL is, for example, a structure in which a refrigerant flow path is connected to a plate on which the wafer W is placed to cool the placed wafer W, and the wafer W is transferred relative to this plate by the lifting action of the conveyor mechanism. Furthermore, SCPLs are also provided in modules other than carrier module D1, and the SCPLs in modules other than D1 have, for example, the same structure as the SCPL in carrier module D1. Moreover, TRSs are also provided in modules other than D1. These TRSs, except for the TRS used in the shuttle for transferring the wafer W between the shuttle and the shuttle described later, all have the same structure as the TRS in carrier module D1. From now on, numbers will be added after SCPL and TRS to distinguish them from each other. Furthermore, multiple TRSs and SCPLs are provided, for example, stacked. That is, multiple TRSs and SCPLs with the same numbers are provided, but for ease of illustration, only one is shown. Furthermore, in this specification, a stack of components refers to components that are arranged in an overlapping manner when viewed from above, and the components can be separated from each other or in contact with each other.
[0055] A portion of the components constituting the component stack T1 is located below the pre-processing inspection component 41, and another portion is located above the pre-processing inspection component 41. For example, arranged from bottom to top in the order of TRS1, TRS2, SCPL1, TRS3, SCPL2, with the pre-processing inspection component 41 located between SCPL1 and TRS3 (see reference). Figure 3 Furthermore, for example, TRS1, TRS2, and SCPL1 are located at the height of the first lower processing module D21, and TRS3 and SCPL2 are located at the height of the first upper processing module D22. The conveying mechanism 33 can access each of these components constituting the component stack T1, and the conveying mechanism 32 can access TRS1 and TRS2.
[0056] TRS1 and TRS2 are used for the transfer of wafers W between transport mechanisms 32 and 33. SCPL1 is used for the transfer of wafers W between the first lower processing module D21 and the carrier module D1. Therefore, the transport mechanism 6A of the first lower processing module D21 (described later) can also access SCPL1. Additionally, TRS3 is used for the transfer of wafers W between the first upper processing module D22 and the carrier module D1. Therefore, the transport mechanism 6B of the first upper processing module D22 (described later) can also access TRS3. SCPL2 is a component used for temperature adjustment of the wafers W before they undergo development processing in the first upper processing module D22, and the transport mechanism 6B can access SCPL2.
[0057] Next, also refer to the side view as a longitudinal section. Figure 5The first processing module D2 is described below. The front side of the first processing module D2 is divided vertically into eight layers, each designated as E1 to E8 from bottom to top. The lower layers E1 to E4 are contained within the first lower processing module D21, and the upper layers E5 to E8 are contained within the first upper processing module D22. Each layer constitutes an area where liquid processing components can be installed.
[0058] First, the first upper processing module D22 will be explained. Developing units 51 are provided as liquid processing units in layers E5 to E8 respectively. The developing unit 51 includes a nozzle (not shown) and two cups 52 arranged side-by-side to hold the wafer W. A pump (not shown) supplies developing solution from the aforementioned cups to the surface of the wafer W for processing.
[0059] A wafer transport area 53 is provided behind layers E5 to E8. This transport area 53 extends from the left end to the right end of the upper processing module D22, forming a straight line when viewed from above. Therefore, the extension direction of the transport area 53 is orthogonal to the extension direction of the transport area 31 of the carrier module D1. Furthermore, the transport area 53 is formed from the height of layer E5 to the height of layer E8. That is to say, the transport area 53 is not divided into units for each layer E5 to E8.
[0060] Furthermore, behind the conveying area 53, the processing components are arranged in seven layers, for example, stacked longitudinally, with two stacked processing components arranged side by side. That is, the stacked processing components and the aforementioned cup 52 are respectively arranged along the extension direction of the conveying area 53.
[0061] The stack of the processing components arranged side-by-side described above is designated as the rear-side processing unit 50. The processing components constituting this rear-side processing unit 50 include multiple heating components 54 and multiple post-processing inspection components 57. The heating components 54 are components for performing the aforementioned PEB process, including a hot plate 55 for mounting and heating the wafer W and a cooling plate 56 for adjusting the temperature of the wafer W. The cooling plate 56 is movable between a front position where the wafer W is transferred using the lifting action of the transport mechanism 6B (described later) and a rear position overlapping with the hot plate 55. The wafer W is transferred between the hot plate 55 and the cooling plate 56 through the cooperation of the lifting action of a pin (not shown) on the hot plate 55 and this movement of the cooling plate 56.
[0062] The post-processing inspection component 57 has the same structure as the pre-processing inspection component 41, and is configured such that the moving direction of the wafer W during imaging is the front-to-back direction. The post-processing inspection component 57 obtains image data of the surface of the wafer W that has been processed by the substrate processing apparatus 1, and more specifically, the surface of the wafer W on which a resist pattern has been formed by development, and sends it to the control unit 10.
[0063] The transport area 53, which serves as the main transport path, is equipped with the aforementioned transport mechanism 6B, which is the main transport mechanism. The transport mechanism 6B includes a base 61 that can move freely left and right, move freely up and down, and rotate freely about a vertical axis, and a holding part 62 that can move freely forward and backward on the base 61. In addition, each of the transport mechanisms in the substrate processing apparatus 1, excluding the shuttle member, including the transport mechanism 6B, has two holding parts, which can move independently forward and backward on the base.
[0064] A moving mechanism 63 for moving the base 61 of the aforementioned conveying mechanism 6B left and right is provided below the rear-side processing unit 50, and a flat space 71A is formed between the moving mechanism 63 and the rear-side processing unit 50. The space 71A extends from the left end to the right end of the first upper processing module D22. Furthermore, a shuttle and its TRS12 and TRS14 are provided in this space 71A, and these components will be described in detail later. The aforementioned conveying mechanism 6B can perform wafer W transfer relative to each processing component in the first upper processing module D22, the TRS3 and SCPL2 of the aforementioned carrier module D1, and the TRS14 of the shuttle. That is, the conveying mechanism 6B is shared by each of the multiple layered liquid processing components stacked on top of each other.
[0065] Next, the first lower processing module D21 will be described. This first lower processing module D21 has a structure substantially the same as the first upper processing module D22 described above. The following description will focus on the differences between it and the first upper processing module D22. No processing components are provided in layer E1, but back-side cleaning components 47 are provided in layers E2 to E4 as liquid processing components. The back-side cleaning component 47 has the same structure as the developing component 51, except that it has nozzles for supplying cleaning solution to the back side of the wafer W instead of nozzles for supplying developing solution to the surface of the wafer W.
[0066] Furthermore, as a processing component constituting the rear-side processing unit 50, a peripheral exposure component 48 is included for removing unwanted resist film from the periphery of the wafer W during development. The main transport mechanism located in the transport area 53 is designated as transport mechanism 6A, and has the same structure as the transport mechanism 6B described above. This transport mechanism 6A connects the wafer W to each processing component of the first lower-side processing module D21, the SCPL1 of the aforementioned component stack T1, and the component stack T2 described later. Additionally, no shuttle or TRS for the shuttle is provided in the first lower-side processing module D21.
[0067] Next, the second processing module D3 will be described. This second processing module D3 has a structure largely the same as the first processing module D2. The following description will focus on the differences between it and the first processing module D2. First, the differences between the second upper processing module D32 and the first upper processing module D22 will be described. For example, at the left end of the transport area 53, there is an SCPL3 constituting the component stack T2 (see...). Figure 3 ). SCPL3 is a component for temperature adjustment of wafer W before development in the second upper processing module D32.
[0068] Furthermore, the main conveying mechanism in the second upper processing module D32 is designated as 6D. Between the moving mechanism 63 that moves the conveying mechanism 6D and the rear processing unit 50, a space 71B, identical to the space 71A in the first upper processing module D22, is also formed. Space 71B is located at the same height as space 71A and communicates with it. A shuttle and its TRS11 and TRS13 are installed in space 71B; these components will be described later. The aforementioned conveying mechanism 6D performs wafer W transfer relative to the processing components within the second upper processing module D32, the component stack T3 of the interface module D4 (described later), and the TRS11 for the shuttle.
[0069] The layout of the components in the second upper processing module D32 is supplemented. The rear processing unit 50 and the cup 52 of the developing assembly 51 are located to the right of the assembly stack T2, respectively, so that they can be transferred using the transport mechanism 6D. The layout of the liquid processing assembly and the rear processing unit 50 is common to the first lower processing module D21, the second lower processing module D31, the first upper processing module D22, and the second upper processing module D32. Therefore, in the aforementioned first lower processing module D21 and first upper processing module D22, the rear processing unit 50 and the cup 52 of the liquid processing assembly are located at a position away from the left end of the module.
[0070] Next, the second lower processing module D31 will be described. At the left end of the transport area 53, a TRS4 (see reference) is provided, which together with the aforementioned SCPL3 forms the component stack T2. Figure 3 In layers E1 and E2, no liquid treatment components are provided. In layers E3 and E4, post-exposure cleaning components 49 are provided to clean the surface of the wafer W after exposure using the exposure machine 20. This post-exposure cleaning component 49 has the same structure as the developing component 51, except that the processing liquid supplied to the wafer W is a cleaning solution instead of a developing solution. In addition, no processing other than cleaning is performed in the second lower processing module D31, and no rear processing unit 50 is provided behind the transport area 53.
[0071] The main conveying mechanism in the second lower processing module D31 is designated as conveying mechanism 6C. This conveying mechanism 6C performs wafer W transfer relative to the various processing components within the second lower processing module D31 and the component stack T3 of the interface module D4 (described later).
[0072] Next, the interface module D4 will be described. The interface module D4 has a component stack T3 at its central front and rear sections. This component stack T3 consists of TRS5 to TRS8 stacked on top of each other, and a temperature adjustment component ICPL. In addition, for example, a buffer component for temporarily suspending the wafer W is provided, but its description is omitted. The ICPL is the component that transports the wafer W before exposure using the exposure machine 20, and adjusts the temperature of the mounted wafer W in the same way as the SCPL. TRS5 to TRS7 are located at the height of the lower processing module G1, and TRS8 is located at the height of the upper processing module G2. Transport mechanisms 36 and 37 are provided in front of and behind the component stack T3, respectively.
[0073] The transport mechanism 36 is configured similarly to the transport mechanism 32 of the carrier module D1. The transport mechanism 36 transfers the wafer W between the exposure machine 20, TRS6, and the ICPL located below the component stack T3. The transport mechanism 37, which serves as a lifting transport mechanism, is configured similarly to the transport mechanism 33 of the carrier module D1. The transport mechanism 37 transfers the wafer W relative to the TRS13 used as a shuttle for each component constituting the component stack T3 and the second upper processing module D32.
[0074] Next, the shuttle components located in the first upper processing module D22 and the second upper processing module D32 will be described as 7A and 7B, respectively. The shuttle component 7A, serving as the first bypass transport mechanism, includes a moving mechanism 72A, a moving body 73A, and a support body 74A. The moving mechanism 72A is configured as a longitudinally elongated component extending left and right, and is arranged to be housed within the space 71A of the aforementioned first upper processing module D22. The moving body 73A is connected to the front side of the moving mechanism 72A and extends left and right. The support body 74A is connected to the front side of the moving body 73A and is formed into a slender rectangular parallelepiped. The wafer W is supported on this support body 74A and transported horizontally in a straight line along the left-right direction.
[0075] Under the action of the moving mechanism 72A, the movable body 73A can move freely left and right relative to the moving mechanism 72A. Furthermore, based on the movement of the movable body 73A relative to the moving mechanism 72A, the support body 74A moves left and right relative to the movable body 73A (see reference). Figures 6-8The movable body 73A moves between a right position where its right end is to the right of the right end of the movable mechanism 72A (on the interface module D4 side) and a left position where its left end is to the left of the left end of the movable mechanism 72A (on the carrier module D1 side). When the movable body 73A is in the aforementioned right position, the right end of the support body 74A is positioned to the right of the right end of the movable body 73A. Figure 6 (As shown in the diagram). The position of the support 74A in this state is designated as the right conveying position. When the moving body 73A is in the aforementioned left position, the left end of the support 74A is positioned to the left of the left end of the moving body 73A. Figure 8 (As shown in the diagram). The position of the support 74A in this state is set as the left conveying position.
[0076] The shuttle 7A transports the wafer W from the TRS11 located in the second upper processing module D32 toward the TRS12 located in the first upper processing module D22. The TRS11 includes: a support plate 75 constituting the main body of the mounting section, which is formed in a recessed manner that is open on the left side when viewed from above; three pins 76 protruding upwards from the support plate 75; and a lifting mechanism (not shown) that raises and lowers the support plate 75. The lifting mechanism may be, for example, an actuator such as a cylinder or motor, connected to the back (lower side) of each support plate 75, and located in a position that does not interfere with the movement tracks of the moving body 73A and the support body 74A. By raising and lowering the support plate 75, the pins 76 move between an upward position and a downward position, supporting the lower surface of the wafer W. The right end of the support 74A at the aforementioned right transport position, when viewed from above, is housed within the recess formed by the support plate 75. By raising and lowering the pin 76, the wafer W can be transferred between the support 74A and the TRS11. The TRS11 is positioned to the right of the component stack T2 (see reference 6D) so that the wafer W can also be transferred between it and the transport mechanism 6D. Figure 1 ).
[0077] The TRS12 has the same structure as the TRS11, except that the support plate 75 is formed with a recess that is open on the right side when viewed from above. Furthermore, the left end of the support body 74A at the aforementioned left transport position is housed within the recess formed by the support plate 75 when viewed from above, allowing the wafer W to be transferred between the support body 74A and the TRS12. The TRS12 is also provided at the left end of the first upper processing module D22, allowing the wafer W to be transferred between it and the transport mechanism 33 of the carrier module D1. As described above, the transport of the substrate (wafer W) supported on the support body 74 can be performed while multiple components arranged in the front-rear direction, such as the moving body 73A and the support body 74A, change their relative positions in the left-right direction. By transporting the substrate in this way, the TRS11 and TRS12, located in the left-right directions relative to the support body 74A, are less likely to interfere with the moving body 73A, and pins 76 can be arranged at three or more locations where the substrate can be easily supported.
[0078] The shuttle member 7B, serving as the second bypass conveying mechanism, is located at a different height than the shuttle member 7A, for example, below the shuttle member 7A. The shuttle member 7B is constructed similarly to the shuttle member 7A. The reference numerals for the moving mechanism, moving body, and support body, which are structural members of the shuttle member 7B, are replaced by B instead of A in the accompanying drawings to distinguish them from the structural members of the shuttle member 7A. Specifically, for example, the moving mechanism of the shuttle member 7B is designated as moving mechanism 72B. Furthermore, this moving mechanism 72B is housed within the space 71B of the second upper processing module D32.
[0079] The shuttle 7B transports the wafer W from TRS13, located in the second upper processing module D32, to TRS14, located in the first upper processing module D22. TRS13 has the same structure as TRS11 and is located at the right end of the second upper processing module D32, allowing for wafer W transfer with the interface module D4. TRS14 has the same structure as TRS12 and can transfer the wafer W with the transport mechanism 6B; for example, it is located at the right end of the first upper processing module D22.
[0080] As described above, the shuttle member 7B is located below the shuttle member 7A. Therefore, the height at which TRS13 and TRS14, which serve as the second bypass substrate mounting portion, are located is lower than the height at which TRS11 and TRS12, which serve as the first bypass substrate mounting portion, are located. In other words, as... Figure 2 As shown, the shuttle members 7A, TRS11 and TRS12 are positioned offset from the shuttle members 7B, TRS13 and TRS14 in the longitudinal (vertical) direction.
[0081] Furthermore, if the wafer W transport path using shuttle 7A (first bypass transport path) and the wafer W transport path using shuttle 7B (second bypass transport path) are respectively designated as 77A and 77B, then the front and rear positions of these transport paths 77A and 77B are the same. Corresponding to the positions of TRS11 to TRS14 mentioned above, transport path 77A protrudes towards the second upper processing module D32, and transport path 77B protrudes towards the first upper processing module D22. Due to this protrusion, the right side of transport path 77A and the left side of transport path 77B overlap when viewed from above. In addition, transport paths 77A and 77B can also be positioned, for example, where the hot plate 55 of the self-heating assembly 54 is offset from the standby position of the cooling plate 56 when viewed from above. By configuring the transport paths with the self-heating plate 55 more separately, the heat-induced effects on the transported wafer W can be suppressed more reliably.
[0082] Reference Figures 6-8 The following describes the transport of wafer W using shuttle 7A. The transport mechanism 6D of the second upper processing module D32 transfers the wafer W, processed by each processing component within the second upper processing module D32, to pin 76 at the rising position of TRS11. Pin 76 moves to the descending position, transferring the wafer W to support 74A at the aforementioned right transport position. Figure 6 The movable body 73A and the support body 74A move to the left respectively. In addition, the pin 76 of TRS11 returns to the raised position. Figure 7 ).
[0083] When the support 74A moves to the aforementioned left transport position, the pin 76 at the descending position of TRS12 moves to the ascending position to support the wafer W. Figure 8 When the support 74A moves toward the right transport position, the pin 76 returns to the lowered position. Then, the transport mechanism 33 of the carrier module D1 receives the wafer W. Thus, the shuttle 7A transports the wafer W toward the carrier module D1, which is the downstream module. Shuttles 7B, TRS13, and TRS14 also operate in the same manner as shuttles 7A, TRS11, and TRS12, respectively, transporting the wafer W from TRS13 to TRS14. In other words, shuttle 7B transports the wafer W toward the first upper processing module D22, which is the downstream module.
[0084] Additionally, the substrate processing apparatus 1 includes a control unit 10 (see reference 10). Figure 1The control unit 10 is a computer, including a program, memory, and CPU. The program is structured with steps to execute a series of actions within the substrate processing apparatus 1. Using this program, the control unit 10 outputs control signals to each part of the substrate processing apparatus 1, thereby controlling the operation of each part. Specifically, it controls the operations of the transport mechanisms 6A-6D, the shuttle members 7A and 7B, and each processing component. This enables the transport of wafer W, the processing of wafer W, and the determination of wafer W malfunctions, as described later. The program described above is stored, for example, on a storage medium such as an optical disc, hard disk, or DVD, and loaded into the control unit 10.
[0085] Next, refer to the outline indicating the transport path. Figure 9 This describes the processing and transport of wafer W in substrate processing apparatus 1. Figure 9 In the diagram, the transport mechanism used for transporting the wafer W between components is shown on or near the arrow indicating a portion of the transport of the wafer W. First, the transport mechanism 32 transports the wafer W from the carrier C placed on the movable stage 15 of the support platform 12. Then, the transport mechanism 32 transports the wafer W to the pre-processing inspection assembly 41 to obtain image data and determine the presence or absence of abnormalities.
[0086] Then, the wafer W is transported to TRS1 using the transport mechanism 32, and then to SCPL1 using the transport mechanism 33. Next, the wafer W is received into the first lower processing module D21 using the transport mechanism 6A, and is transported and processed in the order of back-side cleaning assembly 47 and peripheral exposure assembly 48. After that, the wafer W is transported to TRS4 of the second lower processing module D31.
[0087] Next, the wafer W is transported to TRS5 of interface module D4 using transport mechanism 6C, and then to ICPL using transport mechanism 37. Afterwards, the wafer W is transported to exposure machine 20 using transport mechanism 36, where the resist film on the surface of the wafer W is exposed according to a specified pattern. The exposed wafer W is then transported to TRS6 using transport mechanism 36, and then again into the lower processing module D31 and transported to the post-exposure cleaning assembly 49 using transport mechanism 6C. Finally, the wafer W is transported to TRS7 of interface module D4, and received by transport mechanism 37.
[0088] The subsequent transport path of wafer W is divided into a path processed in the first upper processing module D22 (designated as path 1) and a path processed in the second upper processing module D32 (designated as path 2), as described above. Regarding path 2, transport mechanism 37 transports wafer W to TRS8 of the component stack T3, and transport mechanism 6D receives wafer W into the second upper processing module D32. Then, wafer W is transported in the order of heating component 54 → SCPL3 → developing component 51 → post-processing inspection component 57, thereby obtaining image data after the resist pattern is formed, and determining the presence or absence of anomalies.
[0089] Then, the wafer W image Figures 6-8 As described, the wafer W is transported in the order of transport mechanism 6D → TRS11 → shuttle 7A → TRS12. Then, the transport mechanism 33 of carrier module D1 receives the wafer W and transports it to TRS2. Thus, using shuttle 7A and transport mechanisms 6D (6B and 6D of the first upper processing module D22 and the second upper processing module D32, which serve as bypass transport path forming modules) as the main transport mechanisms, the wafer W is transported towards the downstream module. Then, the transport mechanism 32 houses the wafer W on the carrier C on the movable stage 15 of the support platform 13.
[0090] Next, the first path described above will be explained. Wafer W is transported in the sequence of transport mechanism 37 → TRS13 → shuttle 7B → TRS14 → transport mechanism 6B, and is received into the first upper processing module D22. Then, using transport mechanism 6B, wafer W is transported in the sequence of heating assembly 54 → SCPL2 → developing assembly 51 → post-processing inspection assembly 57, and is processed in the same way as wafer W in the second path. Afterwards, wafer W is transported to TRS3 of carrier module D1. Thus, using shuttle 7B and transport mechanisms 6B and 6D (which are the main transport mechanisms of the first upper processing module D22 and the second upper processing module D32, which serve as bypass transport path forming modules), wafer W is transported towards the downstream module. Next, the wafer W is transported to TRS2 using the transport mechanism 33. Then, similarly to the wafer W in the second path, it is transported to the carrier C on the moving stage 15 of the support stage 13 using the transport mechanism 32.
[0091] As described above, the substrate processing apparatus 1 is configured and transported, so that the transport mechanism 6B of the first upper processing module D22 and the transport mechanism 6D of the second upper processing module D32 do not need to transport the wafer W, which is not processed in the modules respectively provided with transport mechanisms 6B and 6D, toward the carrier module D1. That is, the load on each of the transport mechanisms 6B and 6D is reduced, and more specifically, the number of transport steps required within the module is reduced. The first upper processing module D22 and the second upper processing module D32 are respectively provided with a number of components as described above, but by reducing the load in this way, the transport mechanisms 6B and 6D can quickly approach each component to receive the wafer W and transport the wafer W to the downstream component. That is, the substrate processing apparatus 1 can process the wafer W using a number of processing components and transport the wafer W quickly between components. Therefore, according to this substrate processing apparatus 1, productivity can be improved.
[0092] The transport path 77A of shuttle 7A protrudes towards the second upper processing module D32, and the transport path 77B of shuttle 7B protrudes towards the first upper processing module D22, so that the transport mechanisms 6B and 6D do not need to move across the left and right modules. Furthermore, since the transport paths 77A and 77B, which are arranged to cross the left and right modules, are staggered in height and do not intersect each other, the transport of shuttle 7A and shuttle 7B can be performed independently. More specifically, during transport using one of the shuttles 7A and 7B, it is not necessary to stop the transport using the other shuttle to avoid interference with that shuttle. Therefore, the productivity of the substrate processing apparatus 1 can be improved more reliably. In addition, since the transport paths 77A and 77B, which are staggered in height, overlap when viewed from above, it is possible to prevent the front-to-back width of the substrate processing apparatus 1 from increasing, thus reducing the footprint of the apparatus.
[0093] However, the height of the substrate processing apparatus 1 needs to be set in a way that does not interfere with the top of the cleanroom. On the other hand, liquid processing components such as the developing unit 51 have cups 52 for receiving wafers W, so their height is relatively large. However, in the substrate processing apparatus 1, as described above, the shuttle members 7A and 7B and the rear-side processing unit 50, which performs a type of processing different from liquid processing, are arranged in an overlapping manner. Therefore, within the limited height of the apparatus, a larger number of layers with liquid processing components can be provided, and the height of the transport area 53 can be sufficiently ensured in a way that wafers W can be transferred to each layer. Therefore, according to the substrate processing apparatus 1, the productivity of wafers W can be improved more reliably.
[0094] Furthermore, shuttle members 7A and 7B are positioned below the rear-side processing section 50 in the upper processing module G2, specifically at the height of the lower processing module G1. In other words, shuttle members 7A and 7B are provided on the module G1 side relative to the stack of processing components constituting the rear-side processing section 50. This module G1 is connected from below to the upper processing module G2 and the lower processing module G1, specifically to G2, which serves as a bypass transport path forming module. Assuming that shuttle members 7A and 7B are positioned relatively high in the upper processing module G2, and that TRS11 to TRS14 for the shuttle members are also positioned relatively high, it is assumed that the transport mechanisms 33 and 37, which transfer wafers W relative to TRS12 and TRS13 respectively, need to move to a position higher than the positions of the components constituting the stack of components T1 and T3. That is, by setting the shuttle members 7A and 7B at the height relative to the rear-side processing unit 50 on the lower-side processing module G1 side, as described above, the lifting and lowering of the conveying mechanisms 33 and 37 can be suppressed. Therefore, the configuration of the shuttle members 7A and 7B helps to improve productivity more reliably.
[0095] Additionally, regarding the TRS12 installed on the downstream side of the conveying passage 77A of the shuttle 7A, such as Figure 8 As shown, when the support 74A of shuttle 7A is in the left transport position for the wafer W, the support 74A is not located upstream of the pin 76 of TRS12 in the transport path 77A when viewed from above. With TRS12 and support 74A configured in this way, support 74A can proceed to TRS11 and receive subsequent wafers W without interference with the pin 76 of TRS12 when wafer W is supported by the pin 76. Shuttles 7B and TRS14 have the same structure as shuttles 7A and TRS12, respectively. Therefore, the support 74A of shuttle 7B can proceed to TRS13 without interference with the pin 76 of TRS14 when wafer W is supported by the pin 76. Thus, using shuttles 7A and 7B, wafer W can be transported continuously and rapidly, thereby improving productivity more reliably.
[0096] Furthermore, the supports 74A and 74B of the shuttle members 7A and 7B are not limited to the structure described above. For example, they can also be constructed as follows: the supports 74A and 74B are formed into relatively large circular plates, and slits formed from the right end toward the left end and from the left end toward the right end are provided on the circular plates in a manner that avoids interference with the pins 76 of the upstream and downstream TRS of the conveying path.
[0097] Furthermore, in shuttle 7A, the moving body 73A and the support body 74A slide left and right relative to the moving mechanism 72A, respectively. With this structure, these components can be housed within the first processing module D2. Therefore, after the first processing module D2 is assembled in the manufacturing plant, its width can be minimized during transport to the cleanroom where the device is installed. This simplifies the transport process and the transport equipment. Shuttle 7B has the same structure as shuttle 7A; therefore, the second processing module D3, like the first processing module D2, also simplifies the transport process and the transport equipment. Furthermore, transporting shuttles 7A and 7B by housing them within the first processing module D2 and the second processing module D3, respectively, facilitates rapid assembly and operation of the device at the transport destination.
[0098] However, in the substrate processing apparatus 1 of this first embodiment, the liquid processing components in the first lower processing module D21 and the second lower processing module D31 are not limited to liquid processing components for cleaning. For example, liquid processing components for pre-cleaning stages may also be provided. Hereinafter, a coating and developing apparatus as a variation of the substrate processing apparatus 1, which is equipped with liquid processing components other than cleaning components, will be specifically described.
[0099] In this coating and developing apparatus, an antireflective film forming assembly 81 is provided as the liquid treatment assembly of the first lower processing module D21, and a resist forming assembly 82 is provided as the liquid treatment assembly of the second lower processing module D31. The antireflective film forming assembly 81 and the resist forming assembly 82 have the same structure as the developing assembly 51, except that the processing liquids supplied to the wafer W are the coating liquid and resist liquid for forming the antireflective film, respectively. Furthermore, the wafer W is transported to the coating and developing apparatus without these antireflective films and resist films formed.
[0100] Furthermore, in this coating and developing apparatus, the rear-side processing section 50, which serves as the first lower-side processing module D21 and the second lower-side processing module D31, includes heating components 54. These heating components 54 are used to remove residual solvent in the formed film. Additionally, in the component stacks T1 to T3 of this coating and developing apparatus and the apparatuses described later, TRS and SCPL are configured at appropriate heights and in appropriate quantities so that wafers W can be appropriately transported between modules.
[0101] In this coating and developing apparatus, the wafer W is transported in the following order: SCPL of component stack T1 → antireflective film forming assembly 81 → heating assembly 54 of the first lower processing module D21. Furthermore, the wafer W is transported in the following order: SCPL of component stack T2 → resist forming assembly 82 → heating assembly 54 of the second lower processing module D31 → component stack T3 of interface module D4 → exposure machine 20. The exposed wafer W is transported along the same path as the substrate processing apparatus 1. Furthermore, regarding the backside cleaning assembly 47 and the post-exposure cleaning assembly 49, for example, they can be provided in the interface module D4 and transported using the transport mechanism 37, or the processing using these components can be omitted.
[0102] [Second Implementation]
[0103] Focusing on the differences between this coating and developing apparatus and the modified substrate processing apparatus 1 described above, refer to... Figure 10 Top view, Figure 11 The front view illustrates the coating and developing apparatus 8 as a substrate processing apparatus according to the second embodiment. The coating and developing apparatus 8 has a third processing module D5 adjacent to the second processing module D3 and the interface module D4. The third processing module D5 is configured substantially the same as the second processing module D3, and is divided into a third lower processing module D51 and a third upper processing module D52. Therefore, in this coating and developing apparatus 8, the lower processing module G1 is composed of D21, D31, and D51, and the upper processing module G2 is composed of D22, D32, and D52. Furthermore, the third processing module D5 includes a component laminate T4, which is configured similarly to the component laminate T2 by laminating SCPL and TRS.
[0104] The third lower processing module D51 is described below. A protective film forming assembly 83 is provided as a liquid treatment assembly in layers E2 to E4. This protective film forming assembly 83 is configured similarly to the resist forming assembly 82, except that it supplies the solution for forming the protective film. Furthermore, as components constituting the rear processing section 50, a heating assembly 54 for removing solvent from the protective film and a peripheral exposure assembly 48 are included. Moreover, the main transport mechanism of this third lower processing module D51 is a transport mechanism 6E.
[0105] The third upper processing module D52 is described below. A back-side cleaning assembly 47 is provided in layers E6 and E7, and a post-exposure cleaning assembly 49 is provided in layer E8. A rear-side processing section 50 is not provided. Furthermore, a TRS13 is located behind the transport area 53 of the third upper processing module D52, instead of being located in the second upper processing module D32. Additionally, the main transport mechanism of the third upper processing module D52 is a transport mechanism 6F.
[0106] A hydrophobication treatment component 84 is provided in the carrier module D1 of the coating and developing apparatus 8. This hydrophobication treatment component 84 supplies processing gas to the wafer W from the rear side of the transport mechanism 33 to perform hydrophobication treatment. The wafer W, which has obtained an image from the pre-processing inspection component 41 as described above, is transported by the transport mechanism 32 to the TRS, which is set independently of the aforementioned TRS1 to TRS3 in the component stack T1. The wafer is transported in the order of transport mechanism 33 → hydrophobication treatment component 84 → transport mechanism 33 → SCPL1 and then received into the first lower processing module D21.
[0107] Then, similar to the apparatus of the modified example of the first embodiment, the wafer W, with an anti-reflective film and a resist film formed, is processed in the first lower processing module D21 and the second lower processing module D31 and transported to the component stack T4. Then, using the transport mechanism 6E of the third lower processing module D51, it is transported to the component stack T3 in the order of protective film forming component 83 → heating component 54 → peripheral exposure component 48. Afterwards, the wafer W is transported between the TRS of the component stack T3 and then received into the third upper processing module D52 by the transport mechanism 6F and transported to the back-side cleaning component 47. Then, the wafer W is again received into the third upper processing module D52 via the component stack T3 and the exposure machine 20 and transported to the post-exposure cleaning component 49.
[0108] The subsequent path, similar to that of the substrate processing apparatus 1, is divided into a first path where processing takes place in the first upper processing module D22 and a second path where processing takes place in the second upper processing module D32. That is, as the first path, the wafer W is transported to the first upper processing module D22 via the transport mechanism 6F to the shuttle member TRS13; or, as the second path, the wafer W is transported to the second upper processing module D32 via the component stack T4. Thus, the number of processing modules connected on the left and right sides is not limited to two. Furthermore, the position of the shuttle member TRS can be appropriately set according to the structure of the processing module.
[0109] [Third Implementation]
[0110] Focusing on the differences between the coating and developing apparatus and the modified example of the first embodiment described above, refer to... Figure 12 Top view, Figure 13 Longitudinal section front view, Figure 14The longitudinal sectional side view illustrates the coating and developing apparatus 9 as a third embodiment. In the coating and developing apparatus 9, an anti-reflective film is not formed; instead, resist film forming components 82 are provided on layers E1 to E4 of the first lower processing module D21 and the second lower processing module D31. Therefore, the first lower processing module D21 and the second lower processing module D31 perform the same processing on the wafer W. Furthermore, shuttle members 7C and 7D are provided on the first lower processing module D21 and the second lower processing module D31, respectively.
[0111] Unlike shuttles 7A and 7B, shuttles 7C and 7D transport wafers W from the carrier module D1 side to the interface module D4 side. Specifically, shuttle 7C is used to transport and process wafers W to the second lower processing module D31 without using the transport mechanism 6A, and shuttle 7D is used to transport wafers W processed in the first lower processing module D21 toward the interface module D4 without using the transport mechanism 6C. Shuttles 7C and 7D, like shuttles 7A and 7B, are composed of a moving mechanism 72, a moving body 73, and a support body 74. The reference numerals for these structural components are indicated by following the numbers with the same English letters as those used to represent shuttles. For example, the reference numeral for the support body of shuttle 7C is 74C.
[0112] Above the rear processing sections 50 of the first lower processing module D21 and the second lower processing module D31, spaces 85A and 85B, corresponding to the aforementioned spaces 71A and 71B, are formed. A shuttle member 7C is installed in space 85A, and a shuttle member 7D is installed in space 85B. The TRS used for the shuttle member 7C is designated as TRS15 and TRS16, and the TRS used for the shuttle member 7D is designated as TRS17 and TRS18. TRS15 and TRS17 are TRS located upstream of the shuttle member's transport path and have the same structure as TRS12. Furthermore, TRS16 and TRS18 are TRS located downstream of the shuttle member's transport path and have the same structure as TRS11.
[0113] Regarding TRS15 and TRS16 used for shuttle 7C, TRS15 is located at the left end of the first lower processing module D21, and TRS16 is located on the right side of the second lower processing module D31 relative to the component stack T2. TRS17 and TRS18 used for shuttle 7D are located at the right end of the first lower processing module D21 and the right end of the second lower processing module D31, respectively. Similar to shuttles 7A and 7B, shuttles 7C and 7D are also located at different heights; for example, shuttle 7C is located above shuttle 7D. Therefore, TRS15 and TRS16 are also located above TRS17 and TRS18.
[0114] Furthermore, in the interface module D4 of the coating and developing apparatus 9, a transport mechanism 38 with the same structure as the transport mechanism 37 is provided on the right side of the component stack T3. A buffer assembly 86 is provided behind the transport mechanism 38 in a manner accessible to the transport mechanisms 37 and 38. A peripheral exposure assembly 48 is provided in front of the transport mechanism 38 in a manner accessible to the transport mechanism 38, and the components can be transported in the order of peripheral exposure assembly 48 → buffer assembly 86 → ICPL → exposure machine 20 via the component stack T3.
[0115] For the wafer W that has been processed in the hydrophobic treatment assembly 84 as described in the second embodiment and transported to the assembly stack T1 in SCPL1, it is received into the first lower processing module D21 by the transport mechanism 6A, or transported to the shuttle member TRS15 by the transport mechanism 33. The wafer W transported to the TRS15 is transferred in the order of shuttle member 7C → TRS16 → transport mechanism 6C and processed in the second lower processing module D31, and then transported to the assembly stack T3, i.e., the interface module D4. On the other hand, the wafer W that has been received in the first lower processing module D21 and processed is transported in the order of TRS17 → shuttle member 7D → TRS18, and is transported to the interface module D4 by the transport mechanism 37 for exposure. The exposed wafer W is transported back to the carrier module D1 by the first path and the second path using shuttle members 7A and 7B, respectively, in the same way as the substrate processing apparatus 1.
[0116] Thus, in the coating and developing apparatus 9, shuttle members 7C and 7D are provided for conveying from the carrier module D1 side to the interface module D4 side, and shuttle members 7A and 7B are provided for conveying from the interface module D4 side to the carrier module D1 side. This further improves productivity. By utilizing shuttle members 7C and 7D, the load on the conveying mechanisms 6A and 6C is reduced, thereby achieving higher productivity. Furthermore, shuttle members 7C and 7D are positioned on the upper processing module G2 side relative to the rear processing unit 50. Therefore, similar to the arrangement of shuttle members 7A and 7B described above, the lifting and lowering of the conveying mechanism 33 of the carrier module D1 and the conveying mechanism 37 of the interface module can be suppressed, thereby increasing productivity.
[0117] Furthermore, in the coating and developing apparatus 9, only shuttle members 7C and 7D may be provided, without shuttle members 7A and 7B. That is, the transport between modules D22 and D23 constituting the upper processing module G2 may be performed solely by transport mechanisms 6B and 6D. In other words, the substrate processing apparatus may also be structured to include only one of the shuttle members for the forward path from the carrier module D1 side to the interface module D4 side, and the shuttle members for the return path from the interface module D4 side to the carrier module D1 side. Alternatively, the upper processing module G2 may be designated as the forward path, and the lower processing module G1 as the return path, instead of designating the upper processing module G2 as the return path and the lower processing module G1 as the forward path.
[0118] A TRS is provided for the transfer of wafer W between the shuttle member and the transport mechanisms 6A-6D, which are the main transport mechanisms of the processing module. However, wafer W can also be transferred between the shuttle member and the transport mechanisms 6A-6D. However, the movement of the shuttle member is restricted before the shuttle member receives the wafer W, so it is preferable to provide the TRS as described above. In addition, the liquid processing assembly is located at the front, and the processing assembly constituting the rear-side processing unit 50 is located at the rear, but this arrangement can also be reversed. In addition, for example, in the substrate processing apparatus 1, it is also possible to arrange the TRS12 for the shuttle member 7A in the carrier module D1 and the TRS13 for the shuttle member 7B in the interface module D4. As long as the transport mechanisms 33 and 37 can move appropriately in accordance with such a arrangement of the TRS for the shuttle member. That is to say, the TRS for the shuttle member is not limited to the structure provided in the processing module.
[0119] The liquid processing performed in the apparatus is not limited to the examples described above, and may also include forming an insulating film by applying a liquid coating, or applying an adhesive for bonding wafers W together. Furthermore, it should be understood that the embodiments disclosed herein are illustrative in all respects and are not restrictive. The above embodiments may also be omitted, substituted, modified, and combined in various forms without departing from the scope and spirit of the appended claims.
Claims
1. A substrate processing apparatus, wherein the substrate processing apparatus comprises: a carrier module on which a carrier holding a substrate is placed; a first processing module including a first lower-side processing module and a first upper-side processing module which are adjacent to each other and which interpose the carrier module, the first lower-side processing module and the first upper-side processing module each including a plurality of stages each provided with a processing unit which processes the substrate and which are stacked on each other, and a main conveyance mechanism which is common to the stages and which conveys the substrate; a second processing module including a second lower-side processing module and a second upper-side processing module which are adjacent to each other and which interpose the first lower-side processing module and the first upper-side processing module in a left-right direction, the second lower-side processing module and the second upper-side processing module each including the plurality of stages and the main conveyance mechanism; a relay module including a lift conveyance mechanism which interposes the substrate between the second lower-side processing module and the second upper-side processing module, the relay module being adjacent to the second processing module on a side opposite to a side on which the first processing module is adjacent; a control section which controls the operation of each of the main conveyance mechanisms so that one of an upper-side processing module including the first upper-side processing module and the second upper-side processing module and a lower-side processing module including the first lower-side processing module and the second lower-side processing module forms an advancing path for conveying the substrate from the carrier module toward the relay module, and the other forms a returning path for conveying the substrate from the relay module toward the carrier module; and a bypass conveyance mechanism which operates in such a manner as to form the advancing path or the returning path together with the main conveyance mechanism of a bypass path formation module in each of the first processing module and the second processing module, the bypass conveyance mechanism enabling the substrate to be conveyed toward a module on a downstream side by one of the main conveyance mechanism of the first processing module and the main conveyance mechanism of the second processing module, the bypass conveyance mechanisms in the first processing module and the second processing module are provided as a first bypass conveyance mechanism and a second bypass conveyance mechanism, respectively, the first bypass conveyance mechanism and the second bypass conveyance mechanism convey the substrate in the left-right direction, respectively, a conveyance path of the first bypass conveyance mechanism, i.e., a first bypass conveyance path, for conveying the substrate protrudes toward a module of the second lower-side processing module and the second upper-side processing module which constitutes the bypass path formation module, a conveyance path of the second bypass conveyance mechanism, i.e., a second bypass conveyance path, for conveying the substrate protrudes toward a module of the first lower-side processing module and the first upper-side processing module which constitutes the bypass path formation module.
2. The substrate processing apparatus according to claim 1, wherein the first bypass conveyance path and the second bypass conveyance path are different in height from each other.
3. The substrate processing apparatus according to claim 2, wherein the first bypass conveyance passage overlaps the second bypass conveyance passage when viewed from above.
4. The substrate processing apparatus according to claim 2 or 3, wherein the substrate processing apparatus is provided with: first bypass substrate placement portions provided on the upstream side and the downstream side of the first bypass conveyance passage, respectively, and handing over the substrate between the first bypass conveyance mechanism; and second bypass substrate placement portions provided on the upstream side and the downstream side of the second bypass conveyance passage, respectively, and being different in height from the first bypass substrate placement portions, and handing over the substrate between the second bypass conveyance mechanism.
5. The substrate processing apparatus according to claim 4, wherein the first bypass substrate placement portions and the second bypass substrate placement portions include a placement portion main body that is raised and lowered, and a support portion that protrudes upward from the placement portion main body and supports the lower surface of the substrate.
6. The substrate processing apparatus according to claim 5, wherein with respect to one of the first bypass conveyance mechanism and the second bypass conveyance mechanism, the bypass conveyance passage of the one of the first bypass conveyance passage and the second bypass conveyance passage, and the bypass substrate placement portion of the first bypass substrate placement portions and the second bypass substrate placement portions that hands over the substrate with respect to the one of the bypass conveyance mechanism, the bypass conveyance mechanism is not positioned on the upstream side of the bypass conveyance passage with respect to the support portion when viewed from above at a position where the bypass conveyance mechanism hands over the substrate to the bypass substrate placement portion on the downstream side of the bypass conveyance passage.
7. The substrate processing apparatus according to any one of claims 1 to 3, wherein the first bypass conveyance mechanism or the second bypass conveyance mechanism includes a moving mechanism provided in the first processing module or the second processing module, respectively, a moving body that moves in the left-right direction with respect to the moving mechanism, and a support body that moves in the left-right direction with respect to the moving body and supports the substrate.
8. The substrate processing apparatus according to claim 7, wherein the moving body moves between a position protruding to the left side and a position protruding to the right side with respect to the moving mechanism, the support body moves between a position protruding to the left side and a position protruding to the right side with respect to the moving body.
9. The substrate processing apparatus according to any one of claims 1 to 3, wherein in each of the first lower processing module, the first upper processing module, the second lower processing module, and the second upper processing module, a main conveyance passage that conveys the substrate by the main conveyance mechanism is positioned on one side of the layers in the front-rear direction, in each of the modules that constitute the bypass conveyance passage formation module among the first lower processing module, the first upper processing module, the second lower processing module, and the second upper processing module, a bypass conveyance mechanism is provided on the one side of the main conveyance passage in the front-rear direction.
10. The substrate processing apparatus according to claim 9, wherein The liquid processing assembly that supplies a processing liquid to the substrate is provided as the processing assembly in the layer.
11. The substrate processing apparatus according to claim 10, wherein At least one of the modules that constitute the bypass conveyance passage formation module has a stack of a plurality of processing assemblies that perform a different kind of processing on the substrate than the liquid processing assembly on one side of the front and back of the main conveyance passage, The first bypass conveyance mechanism and the second bypass conveyance mechanism are provided on the side of the upper processing module and the lower processing module that is connected from above or below with the bypass conveyance passage formation module with respect to the stack of processing assemblies.
12. The substrate processing apparatus according to any one of claims 1 to 3, wherein The bypass conveyance mechanism is provided in each of the first lower processing module, the first upper processing module, the second lower processing module, and the second upper processing module, Each of the upper processing module and the lower processing module constitutes the bypass conveyance passage formation module.
13. A substrate processing method using a substrate processing apparatus, The substrate processing apparatus includes: A carrier module that supports a carrier that holds a substrate; A first processing module that includes a first lower processing module and a first upper processing module that are stacked with each other and that exchange the substrate between the carrier module, each of the first lower processing module and the first upper processing module including a plurality of layers each of which has a processing assembly that processes the substrate and which are stacked with each other, and a main conveyance mechanism that is common to each of the layers and that conveys the substrate; A second processing module that includes a second lower processing module and a second upper processing module that are adjacent to each other in a left-right direction and that are stacked with each other with respect to the first lower processing module and the first upper processing module, each of the second lower processing module and the second upper processing module including the plurality of layers and the main conveyance mechanism; and A relay module that includes a lift conveyance mechanism that exchanges the substrate between the second lower processing module and the second upper processing module, the relay module being adjacent to the second processing module on a side opposite to a side adjacent to the first processing module in the left-right direction, wherein The substrate processing method includes: Conveying the substrate by each of the main conveyance mechanisms so that one of an upper processing module that includes the first upper processing module and the second upper processing module and a lower processing module that includes the first lower processing module and the second lower processing module forms a forward path that conveys the substrate from the carrier module toward the relay module, and the other forms a return path that conveys the substrate from the relay module toward the carrier module; Conveying the substrate by a bypass conveyance mechanism provided in each of the first processing module and the second processing module that is the bypass conveyance passage formation module so as to form the forward path or the return path together with the main conveyance mechanism of the bypass conveyance passage formation module; and In the bypass conveyance passage formation module, the substrate is conveyed toward a module on a downstream side by one of a main conveyance mechanism of the first processing module and a main conveyance mechanism of the second processing module and the bypass conveyance mechanism, The bypass conveyance mechanisms in the first processing module and the second processing module are respectively provided as a first bypass conveyance mechanism and a second bypass conveyance mechanism, The first bypass conveyance mechanism and the second bypass conveyance mechanism respectively convey the substrate along the left-right direction, A conveyance passage of the first bypass conveyance mechanism, that is, a first bypass conveyance passage, in which the substrate is conveyed, protrudes toward a module of the second lower processing module and the second upper processing module that constitute the bypass conveyance passage formation module, A conveyance passage of the second bypass conveyance mechanism, that is, a second bypass conveyance passage, in which the substrate is conveyed, protrudes toward a module of the first lower processing module and the first upper processing module that constitute the bypass conveyance passage formation module.
Citation Information
Patent Citations
Coating and developing system and method thereof, and storage medium
JP2008258208A
Substrate processing apparatus
CN217544546U