A package architecture for a low electromagnetic interference power semiconductor module

Abstract

The application provides a packaging architecture of a low electromagnetic interference power semiconductor module, comprising a first power semiconductor module and a second power semiconductor module which are integrated on a lead frame and have the same structure, and both of them comprise a filter absorption chip and a power semiconductor chip; the power semiconductor chip is arranged on a first conductor layer of an insulating substrate on the lead frame, one end of the power semiconductor chip is electrically connected with a first electrode of the filter absorption chip through a bonding wire, and a second electrode of the filter absorption chip is grounded or electrically connected with the other end of the power semiconductor chip. By integrating the filter absorption chip and the power semiconductor chip on the lead frame, the filter absorption chip can be close to the power semiconductor chip, the common mode interference caused by the power semiconductor chip during switching can be filtered and / or absorbed, the volume of the power semiconductor module can be reduced, and the power density of the system can be improved.

Description

Technical Field

[0001] This invention belongs to the field of power semiconductors and relates to the packaging technology of power semiconductor modules, specifically a packaging architecture for a power semiconductor module with low electromagnetic interference. Background Technology

[0002] A power semiconductor module is an assembly formed by combining high-power electronic power devices according to specific functions and then encapsulating them into a single unit. Different functions can be achieved depending on the packaged components. In traditional power semiconductor module designs, parasitic capacitance to ground can cause common-mode interference when the power semiconductor devices are switching on, and these devices also generate transient voltages during switching. The outward conduction of common-mode interference and the instantaneous current changes and oscillations caused by transient voltages both contribute to interference emissions, thereby affecting the system's electromagnetic compatibility.

[0003] Currently, in order to address the impact of power semiconductor module switching on the electromagnetic compatibility of the system, filter components or high-frequency absorption circuits are usually added outside the power semiconductor module. However, it has been verified that the filtering and high-frequency absorption effects of the power semiconductor module with the above structure are not ideal, and the power density of the system is also reduced to a certain extent. Therefore, it is necessary to improve and optimize the existing power semiconductor module. Summary of the Invention

[0004] In order to improve the filtering effect and high-frequency absorption effect of power semiconductor modules while ensuring the power density, this invention discloses a packaging architecture for power semiconductor modules with low electromagnetic interference.

[0005] The technical solution to achieve the purpose of the invention is as follows:

[0006] In a first aspect, the present invention provides a packaging architecture for a low electromagnetic interference power semiconductor module, including a first power semiconductor module and a second power semiconductor module integrated on a lead frame and having the same structure. Both the first power semiconductor module and the second power semiconductor module include a filter absorption chip and a power semiconductor chip.

[0007] The lead frame is provided with an insulating substrate, and the power semiconductor chip is disposed on the first conductor layer of the insulating substrate. One end of the power semiconductor chip is electrically connected to the first electrode of the filter absorption chip via a bonding wire. The second electrode of the filter absorption chip is grounded or electrically connected to the other end of the power semiconductor chip. The filter absorption chip is used to filter out and / or absorb common-mode interference caused by the power semiconductor chip when the power semiconductor chip is switching on.

[0008] This invention integrates the filter absorption chip and the power semiconductor chip on the lead frame, which allows the filter absorption chip to be close to the power semiconductor chip, enabling the common-mode interference caused by the power semiconductor chip during switching to be filtered out and / or absorbed; at the same time, it can also reduce the size of the power semiconductor module and further improve the power density of the system.

[0009] In one embodiment of the present invention, the filter absorption chip is a common-mode filter capacitor, and the first electrode of the common-mode filter capacitor is connected to the first conductor layer via a bonding wire to realize the electrical connection between the common-mode filter capacitor and the power semiconductor chip.

[0010] In an improved embodiment of the common-mode filter capacitor described above, the second electrode of the common-mode filter capacitor is grounded via a lead frame.

[0011] In another improved embodiment of the common-mode filter capacitor, an insulating substrate is provided between the common-mode filter capacitor and the lead frame. The common-mode filter capacitor is disposed on the second conductor layer of the insulating substrate, and a grounding terminal is provided on the second conductor layer. The common-mode filter capacitor is grounded through the grounding terminal.

[0012] In another embodiment of the present invention, the filter absorption chip is a high-frequency absorption chip. The first electrode of the high-frequency absorption chip is electrically connected to the first electrode of the power semiconductor chip via a bonding wire. The second electrode of the power semiconductor chip is electrically connected to the second electrode of the high-frequency absorption chip. The high-frequency absorption chip is used to absorb the transient voltage generated by the power semiconductor chip when the power semiconductor chip is switched on.

[0013] In an improved embodiment of the high-frequency absorption chip described above, the high-frequency absorption chip includes an absorption capacitor and a damping resistor integrated and connected in series, wherein the absorption capacitor is electrically connected to the first electrode of the power semiconductor chip, and the damping resistor is electrically connected to the second electrode of the power semiconductor chip.

[0014] In another improved embodiment of the high-frequency absorption chip, the high-frequency absorption chip includes an absorption capacitor. The first electrode of the absorption capacitor is electrically connected to the first electrode of the power semiconductor chip via a terminal copper sheet. The second electrode of the absorption capacitor is electrically connected to a damping resistor disposed on the first conductor layer via a bonding wire, and the other end of the damping resistor is electrically connected to the second electrode of the power semiconductor chip.

[0015] Secondly, the present invention provides a packaging architecture for a low electromagnetic interference power semiconductor module, including an upper bridge arm power semiconductor chip, a lower bridge arm power semiconductor chip, and a filter absorption chip integrated on a lead frame.

[0016] The lead frame is provided with an insulating substrate. The upper bridge arm power semiconductor chip is disposed on the first conductor layer on the insulating substrate, and the lower bridge arm power semiconductor chip is disposed on the second conductor layer on the insulating substrate. The first conductor layer and the second conductor layer are respectively provided with power terminals and gate terminals.

[0017] The filter absorption chip is disposed on the first conductor layer or the second conductor layer, and one end electrode of the filter absorption chip is connected to the upper bridge arm power semiconductor chip via a bonding wire, and the other end electrode of the filter absorption chip is connected to the lower bridge arm power semiconductor chip via a bonding wire.

[0018] The filter absorption chip is used to absorb the transient voltage generated by the upper and lower bridge power semiconductor chips when they are switching on and off.

[0019] In one embodiment of the above-mentioned filter absorption chip, the filter absorption chip is a high-frequency absorption chip, and the high-frequency absorption chip includes an absorption capacitor and a damping resistor integrated and connected in series. The absorption capacitor is electrically connected to the upper bridge arm power semiconductor chip, and the damping resistor is electrically connected to the lower bridge arm power semiconductor chip via bonding wires.

[0020] In another embodiment of the above-mentioned filter absorption chip, the filter absorption chip is a high-frequency absorption chip, and the high-frequency absorption chip includes an absorption capacitor disposed on the first conductor layer. One end of the absorption capacitor is electrically connected to the upper bridge arm power semiconductor chip, and the other end is electrically connected to a damping resistor disposed on the second conductor layer via a bonding wire. The other end of the damping resistor is electrically connected to the lower bridge arm power semiconductor chip.

[0021] Compared with the prior art, the beneficial effects of the present invention are: by integrating the filter absorption chip and the power semiconductor chip on the lead frame, the present invention enables the filter absorption chip to be close to the power semiconductor chip, which can improve the filtering and / or absorption of common-mode interference caused by the power semiconductor chip when the power semiconductor chip is switching on and off; at the same time, it can also reduce the size of the power semiconductor module and further improve the power density of the system. Attached Figure Description

[0022] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are merely for the purpose of more clearly illustrating the technical solutions in the embodiments of the present invention or the prior art. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.

[0023] Figure 1 This is a schematic diagram of the packaging architecture of a low electromagnetic interference power semiconductor module according to the present invention.

[0024] Figure 2 This is a schematic diagram of the packaging architecture and circuit diagram of the power semiconductor module in Example 1;

[0025] Figure 3 This is a schematic diagram of the packaging architecture and circuit diagram of the power semiconductor module in Example 2;

[0026] Figure 4 This is a schematic diagram of the packaging architecture and circuit diagram of the power semiconductor module in Example 3;

[0027] Figure 5 This is a schematic diagram of the packaging architecture and circuit diagram of the power semiconductor module in Example 4;

[0028] Figure 6 This is a schematic diagram and circuit diagram of the packaging architecture of a low electromagnetic interference power semiconductor module according to another embodiment 5 of the present invention.

[0029] Figure 7 This is a schematic diagram of the packaging architecture and circuit diagram of the power semiconductor module in Example 6;

[0030] The components are as follows: 1. Lead frame; 2. First power semiconductor module; 3. Second power semiconductor module; 4. Filter absorption chip; 41. Absorption capacitor; 42. Damping resistor; 5. Power semiconductor chip; 6. Insulating substrate; 7. First conductor layer; 8. Bonding wire; 9. Power and gate terminals; 10. Second conductor layer; 11. Ground terminal; 12. Terminal copper sheet; 13. Upper bridge arm power semiconductor chip; 14. Lower bridge arm power semiconductor chip. Detailed Implementation

[0031] The present invention will be further described below with reference to specific embodiments, and the advantages and features of the present invention will become clearer as a result. However, these embodiments are merely exemplary and do not constitute any limitation on the scope of the present invention. Those skilled in the art should understand that modifications or substitutions can be made to the details and form of the technical solutions of the present invention without departing from the spirit and scope of the present invention, but all such modifications and substitutions fall within the protection scope of the present invention.

[0032] In the description of this embodiment, it should be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting the invention.

[0033] Furthermore, the terms "first," "second," "third," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0034] First, this specific embodiment provides a packaging architecture for a low electromagnetic interference power semiconductor module, see [link to relevant documentation]. Figure 1 As shown, the packaging architecture of the power semiconductor module includes a first power semiconductor module 2 and a second power semiconductor module 3 integrated on a lead frame 1 (the lead frame can also be called a base plate) and having the same structure. Both the first power semiconductor module 2 and the second power semiconductor module 3 include a filter absorption chip 4 and a power semiconductor chip 5.

[0035] The lead frame 1 is provided with an insulating substrate 6, and the power semiconductor chip 5 is disposed on the first conductor layer 7 of the insulating substrate 6. One end of the power semiconductor chip 5 is electrically connected to the first electrode of the filter absorption chip 4 via a bonding wire 8. The second electrode of the filter absorption chip 4 is grounded or electrically connected to the other end of the power semiconductor chip 5. The filter absorption chip 4 is used to filter out and / or absorb common-mode interference caused by the power semiconductor chip 5 when the power semiconductor chip 5 is switched on and off.

[0036] In this specific embodiment, by integrating the filter absorption chip 4 and the power semiconductor chip 5 on the lead frame 1, the filter absorption chip 4 can be placed as close as possible to the power semiconductor chip 5, which can filter out and / or absorb the common-mode interference caused by the power semiconductor chip 5 when the switch is working; at the same time, the size of the power semiconductor module can be reduced, and the power density of the system can be further improved.

[0037] The packaging architecture of the low electromagnetic interference power semiconductor module of this specific embodiment will be described in detail below through Examples 1 to 4.

[0038] Example 1:

[0039] The packaging architecture of the low electromagnetic interference power semiconductor module provided in this embodiment includes a first power semiconductor module 2 and a second power semiconductor module 3 with the same structure. Both the first power semiconductor module 2 and the second power semiconductor module 3 include a filter absorption chip 4 and a power semiconductor chip 5.

[0040] like Figure 2 As shown, the lead frame 1 is provided with an insulating substrate 6, and the insulating substrate 6 is provided with two separate first conductor layers 7, and two power semiconductor chips 5 are respectively disposed on one of the first conductor layers 7.

[0041] In this embodiment, as Figure 2 As shown, the filter absorption chip 4 is a common-mode filter capacitor. The first electrode (also known as the upper surface electrode) of the common-mode filter capacitor is connected to the first conductor layer 7 via the bonding wire 8 to realize the electrical connection between the common-mode filter capacitor and the power semiconductor chip 5.

[0042] like Figure 2 As shown, the common-mode filter capacitor is directly fixed to the lead frame 1 by means of welding, sintering, etc., and the second electrode (also known as the lower surface electrode) of the common-mode filter capacitor is grounded through the lead frame 1.

[0043] like Figure 2 As shown, the first conductor layer 7 is also provided with power and gate terminals 9, and the power semiconductor chip 5 is electrically connected to other components via the power and gate terminals 9.

[0044] In this embodiment, the lead frame 1 of the power semiconductor module can directly contact the system's heat sink and be connected to the system's chassis ground or protective ground.

[0045] In this embodiment, the common-mode filter capacitor is placed inside the power semiconductor module, which allows the common-mode filter capacitor to be as close as possible to the power semiconductor chip 5. This can solve the common-mode interference emission problem generated by the power semiconductor chip 5 during switching at the source when the switch is working. It can also reduce the size of the power semiconductor module and improve the system power density.

[0046] Example 2:

[0047] The packaging architecture of the low electromagnetic interference power semiconductor module provided in this embodiment includes a first power semiconductor module 2 and a second power semiconductor module 3 with the same structure. Both the first power semiconductor module 2 and the second power semiconductor module 3 include a filter absorption chip 4 and a power semiconductor chip 5.

[0048] like Figure 3 As shown, the lead frame 1 is provided with an insulating substrate 6, and the insulating substrate 6 is provided with four mutually separated conductor layers, including two first conductor layers 7 and two second conductor layers 10. The power semiconductor chip 5 is disposed on one of the first conductor layers 7.

[0049] In this embodiment, as Figure 3 As shown, the filter absorption chip 4 is a common-mode filter capacitor. The first electrode (also known as the upper surface electrode) of the common-mode filter capacitor is connected to the first conductor layer 7 via the bonding wire 8 to realize the electrical connection between the common-mode filter capacitor and the power semiconductor chip 5.

[0050] The difference between this embodiment and Embodiment 1 is that the common-mode filter capacitor is positioned differently, such as... Figure 3As shown, in this embodiment, an insulating substrate 6 is provided between the common-mode filter capacitor and the lead frame 1. The common-mode filter capacitor is disposed on the second conductor layer 10 of the insulating substrate 6. A grounding terminal 11 is provided on the second conductor layer 10, and the common-mode filter capacitor is grounded through the grounding terminal 11.

[0051] like Figure 3 As shown, the first conductor layer 7 is also provided with power and gate terminals 9, and the power semiconductor chip 5 is electrically connected to other components via the power and gate terminals 9.

[0052] In this embodiment, the lead frame 1 of the power semiconductor module can directly contact the system's heat sink and be connected to the system's chassis ground or protective ground.

[0053] In this embodiment, the common-mode filter capacitor is placed inside the power semiconductor module, which allows the common-mode filter capacitor to be as close as possible to the power semiconductor chip 5. This can solve the common-mode interference emission problem generated by the power semiconductor chip 5 during switching at the source when the switch is working. It can also reduce the size of the power semiconductor module and improve the system power density.

[0054] Example 3:

[0055] The packaging architecture of the low electromagnetic interference power semiconductor module provided in this embodiment includes a first power semiconductor module 2 and a second power semiconductor module 3 with the same structure. Both the first power semiconductor module 2 and the second power semiconductor module 3 include a filter absorption chip 4 and a power semiconductor chip 5.

[0056] like Figure 4 As shown, an insulating substrate 6 is provided on the lead frame 1, and two separate first conductor layers 7 are provided on the insulating substrate 6. The power semiconductor chip 5 is respectively disposed on one of the first conductor layers 7.

[0057] like Figure 4 As shown, the filter absorption chip 4 in this embodiment is a high-frequency absorption chip. The first electrode of the high-frequency absorption chip is electrically connected to the first electrode of the power semiconductor chip 5 via a bonding wire 8. The second electrode of the power semiconductor chip 5 is electrically connected to the second electrode of the high-frequency absorption chip. The high-frequency absorption chip is used to absorb the transient voltage generated by the power semiconductor chip 5 when the power semiconductor chip 5 is switched on and off.

[0058] In this embodiment, as Figure 4 As shown, the high-frequency absorption chip includes an absorption capacitor 41 and a damping resistor 42 integrated and connected in series. The absorption capacitor 41 is electrically connected to the first electrode of the power semiconductor chip 5, and the damping resistor 42 is electrically connected to the second electrode of the power semiconductor chip 5.

[0059] In this embodiment, the high-frequency absorption chip is placed inside the power semiconductor module, which allows the high-frequency absorption chip to be as close as possible to the power semiconductor chip 5. The high-frequency absorption chip is connected in parallel across the two ends of the power semiconductor chip 5, which can absorb the transient voltage generated by the power semiconductor chip 5 when the switch is working, thereby improving the high-frequency absorption effect, reducing the size of the power semiconductor module, and increasing the system power density.

[0060] Example 4:

[0061] The packaging architecture of the low electromagnetic interference power semiconductor module provided in this embodiment includes a first power semiconductor module 2 and a second power semiconductor module 3 with the same structure. Both the first power semiconductor module 2 and the second power semiconductor module 3 include a filter absorption chip 4 and a power semiconductor chip 5.

[0062] like Figure 5 As shown, an insulating substrate 6 is provided on the lead frame 1, and two separate first conductor layers 7 are provided on the insulating substrate 6. The power semiconductor chip 5 is respectively disposed on one of the first conductor layers 7.

[0063] like Figure 5 As shown, the filter absorption chip 4 in this embodiment is a high-frequency absorption chip. The first electrode of the high-frequency absorption chip is electrically connected to the first electrode of the power semiconductor chip 5 via a bonding wire 8. The second electrode of the power semiconductor chip 5 is electrically connected to the second electrode of the high-frequency absorption chip. The high-frequency absorption chip is used to absorb the transient voltage generated by the power semiconductor chip 5 when the power semiconductor chip 5 is switched on and off.

[0064] like Figure 5 As shown, the high-frequency absorption chip of this embodiment includes an absorption capacitor 41 and a damping resistor 42. The difference between the high-frequency absorption chip of this embodiment and that of embodiment 3 is that the absorption capacitor 41 and the damping resistor 42 of the high-frequency absorption chip of this embodiment adopt a separate design. That is, the absorption capacitor 41 is placed on the power semiconductor chip 5, and a terminal copper piece 12 is provided between the absorption capacitor 41 and the power semiconductor chip 5, so that the first electrode of the absorption capacitor 41 (i.e., the lower surface electrode of the absorption capacitor 41) is electrically connected to the first electrode of the power semiconductor chip 5 (i.e., the upper surface electrode of the power semiconductor chip 5) through the terminal copper piece 12; the second electrode of the absorption capacitor 41 (i.e., the upper surface electrode of the absorption capacitor 41) is electrically connected to the damping resistor 42 provided on the first conductor layer 7 through the bonding wire 8, and the other end of the damping resistor 42 is electrically connected to the second electrode of the power semiconductor chip 5.

[0065] In this embodiment, the high-frequency absorption chip is placed inside the power semiconductor module, which allows the high-frequency absorption chip to be as close as possible to the power semiconductor chip 5. The high-frequency absorption chip is connected in parallel across the two ends of the power semiconductor chip 5, which can absorb the transient voltage generated by the power semiconductor chip 5 when the switch is working, thereby improving the high-frequency absorption effect, reducing the size of the power semiconductor module, and increasing the system power density.

[0066] Secondly, this specific embodiment also provides another packaging architecture for a power semiconductor module with low electromagnetic interference, such as... Figure 6 As shown, the packaging architecture of the low electromagnetic interference power semiconductor module includes an upper bridge arm power semiconductor chip 13, a lower bridge arm power semiconductor chip 14, and a filter absorption chip 4 integrated on a lead frame 1.

[0067] like Figure 6 As shown, an insulating substrate 6 is provided on the lead frame 1, the upper bridge arm power semiconductor chip 13 is disposed on the first conductor layer 7 on the insulating substrate 6, and the lower bridge arm power semiconductor chip 14 is disposed on the second conductor layer 10 on the insulating substrate 6. Power and gate terminals 9 are respectively provided on the first conductor layer 7 and the second conductor layer 10.

[0068] like Figure 6 As shown, the filter absorption chip 4 is disposed on the first conductor layer 7 or the second conductor layer 10, and one end electrode of the filter absorption chip 4 is connected to the upper bridge arm power semiconductor chip 13 via a bonding wire 8, and the other end electrode of the filter absorption chip 4 is connected to the lower bridge arm power semiconductor chip 14 via a bonding wire 8.

[0069] The filter absorption chip 4 is used to absorb the transient voltage generated by the upper bridge arm power semiconductor chip 13 and the lower bridge arm power semiconductor chip 14 when the upper bridge arm power semiconductor chip 13 and the lower bridge arm power semiconductor chip 14 are switched on.

[0070] In this specific embodiment, by integrating the filter absorption chip 4 with the upper bridge arm power semiconductor chip 13 and the lower bridge arm power semiconductor chip 14 on the lead frame 1, the filter absorption chip 4 can be made as close as possible to the upper bridge arm power semiconductor chip 13 and the lower bridge arm power semiconductor chip 14, which can filter out and / or absorb the common-mode interference caused by the upper bridge arm power semiconductor chip 13 and the lower bridge arm power semiconductor chip 14 when the switch is working; at the same time, the size of the power semiconductor module can be reduced, further improving the power density of the system.

[0071] The packaging architecture of the low electromagnetic interference power semiconductor module of this specific embodiment will be described in detail below through Examples 5 and 6.

[0072] Example 5:

[0073] In the packaging architecture of the low electromagnetic interference power semiconductor module provided in this embodiment, such as Figure 6 As shown, the packaging architecture of the low electromagnetic interference power semiconductor module includes an upper bridge arm power semiconductor chip 13, a lower bridge arm power semiconductor chip 14, and a filter absorption chip 4 integrated on a lead frame 1.

[0074] like Figure 6 As shown, an insulating substrate 6 is provided on the lead frame 1, the upper bridge arm power semiconductor chip 13 is disposed on the first conductor layer 7 on the insulating substrate 6, and the lower bridge arm power semiconductor chip 14 is disposed on the second conductor layer 10 on the insulating substrate 6. Power and gate terminals 9 are respectively provided on the first conductor layer 7 and the second conductor layer 10.

[0075] like Figure 6 As shown, the filter absorption chip 4 is a high-frequency absorption chip, including an absorption capacitor 41 and a damping resistor 42 integrated and connected in series. The filter absorption chip 4 is disposed on the first conductor layer 7, and the absorption capacitor 41 is electrically connected to the upper bridge arm power semiconductor chip 13, and the damping resistor 42 is electrically connected to the lower bridge arm power semiconductor chip 14 via bonding wires.

[0076] By integrating the filter absorption chip 4 with the upper bridge arm power semiconductor chip 13 and the lower bridge arm power semiconductor chip 14 on the lead frame 1, the filter absorption chip 4 can be placed as close as possible to the upper bridge arm power semiconductor chip 13 and the lower bridge arm power semiconductor chip 14. This allows for the filtering and / or absorption of common-mode interference caused by the upper bridge arm power semiconductor chip 13 and the lower bridge arm power semiconductor chip 14 during switching operation. At the same time, it can also reduce the size of the power semiconductor module and further improve the power density of the system.

[0077] Example 6:

[0078] In the packaging architecture of the low electromagnetic interference power semiconductor module provided in this embodiment, such as Figure 7 As shown, the packaging architecture of the low electromagnetic interference power semiconductor module includes an upper bridge arm power semiconductor chip 13, a lower bridge arm power semiconductor chip 14, and a filter absorption chip 4 integrated on a lead frame 1.

[0079] like Figure 7 As shown, an insulating substrate 6 is provided on the lead frame 1, the upper bridge arm power semiconductor chip 13 is disposed on the first conductor layer 7 on the insulating substrate 6, and the lower bridge arm power semiconductor chip 14 is disposed on the second conductor layer 10 on the insulating substrate 6. Power and gate terminals 9 are respectively provided on the first conductor layer 7 and the second conductor layer 10.

[0080] The filter absorption chip 4 is a high-frequency absorption chip, including an absorption capacitor 41 and a damping resistor 42. The difference between this embodiment and embodiment 5 is that the absorption capacitor 41 and the damping resistor 42 are designed as separate components. Figure 7 As shown, the absorption capacitor 41 is disposed on the first conductor layer 7. One end of the absorption capacitor 41 is electrically connected to the upper bridge arm power semiconductor chip 13, and the other end is electrically connected to the damping resistor 42 disposed on the second conductor layer 10 via the bonding wire 8. The other end of the damping resistor 42 is electrically connected to the lower bridge arm power semiconductor chip 14.

[0081] By integrating the filter absorption chip 4 with the upper bridge arm power semiconductor chip 13 and the lower bridge arm power semiconductor chip 14 on the lead frame 1, the filter absorption chip 4 can be placed as close as possible to the upper bridge arm power semiconductor chip 13 and the lower bridge arm power semiconductor chip 14. This allows for the filtering and / or absorption of common-mode interference caused by the upper bridge arm power semiconductor chip 13 and the lower bridge arm power semiconductor chip 14 during switching operation. At the same time, it can also reduce the size of the power semiconductor module and further improve the power density of the system.

[0082] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

[0083] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A package architecture for a low electromagnetic interference power semiconductor module, characterized by: It includes a first power semiconductor module and a second power semiconductor module that are integrated on a lead frame and have the same structure. Both the first power semiconductor module and the second power semiconductor module include a filter absorption chip and a power semiconductor chip. An insulating substrate is provided on the lead frame, and the power semiconductor chip is disposed on the first conductor layer of the insulating substrate. One end of the power semiconductor chip is electrically connected to the first electrode of the filter absorption chip via a bonding wire. The second electrode of the filter absorption chip is grounded or electrically connected to the other end of the power semiconductor chip. The filter absorption chip is used to filter out and / or absorb common-mode interference caused by the power semiconductor chip when the power semiconductor chip is switched on. The filter absorption chip is a high-frequency absorption chip, which includes an absorption capacitor and a damping resistor integrated and connected in series. The absorption capacitor is electrically connected to the first electrode of the power semiconductor chip, and the damping resistor is electrically connected to the second electrode of the power semiconductor chip.

2. The packaging architecture of a power semiconductor module according to claim 1, characterized in that: The filter absorption chip is a common-mode filter capacitor, and the first electrode of the common-mode filter capacitor is connected to the first conductor layer via a bonding wire to achieve electrical connection between the common-mode filter capacitor and the power semiconductor chip.

3. The packaging architecture of a power semiconductor module according to claim 2, characterized in that: The second electrode of the common-mode filter capacitor is grounded via the lead frame.

4. The packaging architecture of the power semiconductor module according to claim 2, characterized in that: The common-mode filter capacitor is provided with an insulating substrate between it and the lead frame. The common-mode filter capacitor is disposed on the second conductor layer of the insulating substrate. A grounding terminal is provided on the second conductor layer. The common-mode filter capacitor is grounded through the grounding terminal.

5. The packaging architecture of the power semiconductor module according to claim 1, characterized in that: The filter absorption chip is a high-frequency absorption chip. The first electrode of the high-frequency absorption chip is electrically connected to the first electrode of the power semiconductor chip via a bonding wire. The second electrode of the power semiconductor chip is electrically connected to the second electrode of the high-frequency absorption chip. The high-frequency absorption chip is used to absorb the transient voltage generated by the power semiconductor chip when the power semiconductor chip is switched on.

6. The packaging architecture of the power semiconductor module according to claim 5, characterized in that: The high-frequency absorption chip includes an absorption capacitor. The first electrode of the absorption capacitor is electrically connected to the first electrode of the power semiconductor chip via a terminal copper sheet. The second electrode of the absorption capacitor is electrically connected to a damping resistor disposed on the first conductor layer via a bonding wire, and the other end of the damping resistor is electrically connected to the second electrode of the power semiconductor chip.

7. A packaging architecture for a low electromagnetic interference power semiconductor module, characterized in that: This includes the upper bridge arm power semiconductor chip, the lower bridge arm power semiconductor chip, and the filter absorption chip integrated on the lead frame; An insulating substrate is provided on the lead frame, the upper bridge arm power semiconductor chip is disposed on the first conductor layer on the insulating substrate, and the lower bridge arm power semiconductor chip is disposed on the second conductor layer on the insulating substrate. Power terminals and gate terminals are respectively provided on the first conductor layer and the second conductor layer. The filter absorption chip is disposed on the first conductor layer or the second conductor layer, and one end electrode of the filter absorption chip is connected to the upper bridge arm power semiconductor chip via a bonding wire, and the other end electrode of the filter absorption chip is connected to the lower bridge arm power semiconductor chip via a bonding wire. The filter absorption chip is used to absorb the transient voltage generated by the upper bridge arm power semiconductor chip and the lower bridge arm power semiconductor chip when the upper bridge arm power semiconductor chip and the lower bridge arm power semiconductor chip are switched on and off. The filter absorption chip is a high-frequency absorption chip, which includes an absorption capacitor and a damping resistor integrated and connected in series. The absorption capacitor is electrically connected to the upper bridge arm power semiconductor chip, and the damping resistor is electrically connected to the lower bridge arm power semiconductor chip via bonding wires.

8. The packaging architecture of the power semiconductor module according to claim 7, characterized in that: The filter absorption chip is a high-frequency absorption chip, and the high-frequency absorption chip includes an absorption capacitor disposed on the first conductor layer. One end of the absorption capacitor is electrically connected to the upper bridge arm power semiconductor chip, and the other end is electrically connected to a damping resistor disposed on the second conductor layer via a bonding wire. The other end of the damping resistor is electrically connected to the lower bridge arm power semiconductor chip.

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