Epitaxial wafer, epitaxial wafer growth method and high electron mobility transistor
By adopting low-concentration Fe-doped AlN/AlGaN superlattice and AlN/GaN superlattice structures on the Si substrate, the buffer layer leakage problem in the GaN thin film of the epitaxial growth of Si substrate is solved, and the high-resistance epitaxial layer crystal quality and device performance are improved.
Patent Information
- Application Number
- CN202210051646.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-01-17
- Publication Date
- 2025-08-12
- Estimated Expiration
- 2042-01-17
AI Technical Summary
In the prior art, when using Si substrate to epitaxially grow GaN films, leakage problems of the buffer layer lead to poor pinch-off characteristics and voltage resistance characteristics of the device, and high concentration doping affects the crystal quality of the epitaxial layer.
The AlN/AlGaN superlattice layer, AlGaN block layer and AlN/GaN superlattice layer structure with low concentration Fe doped is adopted, and the compressive stress is formed by combining the difference in the lattice constants of AlN and GaN to compensate for the tensile stress of the Si substrate and the AIN nucleation layer, reducing dislocation and crack density, achieving high resistance while ensuring crystal quality.
The crystal quality of the epitaxial layer is improved, the buffer layer is leaked, the pinch-off characteristics and voltage resistance characteristics are improved, and the production cost is reduced.
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Figure CN114551594B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and in particular to an epitaxial wafer, an epitaxial wafer growth method and a high electron mobility transistor. Background Art
[0002] As a third-generation semiconductor material, GaN-based materials have become the preferred material for manufacturing high-temperature, high-frequency, high-power, and radiation-resistant high electron mobility transistor (HEMT) structures due to their advantages such as large bandgap, large electron saturation drift velocity, good chemical stability, radiation resistance, high temperature resistance, and easy formation of heterojunctions. On the other hand, since GaN-based heterostructures have high carrier concentration and electron mobility, their on-resistance is small, and the advantage of large bandgap enables them to withstand very high operating voltages. Therefore, GaN-based high electron mobility transistors are also suitable for applications such as high-temperature, high-frequency, high-power devices, and low-loss switching devices.
[0003] Common substrates for growing GaN films in the aforementioned fields are sapphire (Al2O3), silicon carbide (SiC), and silicon (Si). Epitaxial growth of GaN films on sapphire and SiC substrates is already very mature, but they are relatively expensive, especially SiC, which greatly increases production costs. Furthermore, sapphire itself has poor heat dissipation, making large-scale epitaxial growth difficult. Therefore, Si substrates are typically used for epitaxial growth of GaN films. These substrates have good thermal conductivity and can achieve large-scale epitaxy, especially 6-inch, 8-inch, and 12-inch epitaxial wafers, which can reduce production costs and have great market competitiveness. However, impurities and oxides on the Si substrate surface decompose at high temperatures, and silicon or oxygen atoms, etc., diffuse into the buffer layer as the epitaxial layer grows, forming a high background carrier concentration. This causes leakage in the buffer layer, which can adversely affect the pinch-off and withstand voltage characteristics of the device.
[0004] In order to solve the above problems, the existing technology usually achieves high resistance and reduces leakage of the buffer layer by high-concentration Fe or C doping of the buffer layer. However, high-concentration doping affects the crystal quality of the epitaxial layer and is not conducive to improving device performance. Although low-concentration doping can improve the crystal quality of the epitaxial layer, it is difficult to achieve high resistance. Summary of the Invention
[0005] In view of this, an object of the present invention is to provide an epitaxial wafer, an epitaxial wafer growth method and a high electron mobility transistor, so as to achieve high resistance of the epitaxial layer and improve the crystal quality of the epitaxial layer.
[0006] The embodiment of the present invention is implemented as follows: an epitaxial wafer includes a Si substrate, an AlN nucleation layer, a high-resistance buffer layer, a channel layer, an AlN insertion layer, an AlGaN barrier layer, and a GaN cap layer stacked in sequence; the high-resistance buffer layer includes an AlN / AlGaN superlattice layer, an AlGaN bulk layer, an AlN / GaN superlattice layer, and a GaN bulk layer stacked in sequence; the AlN / AlGaN superlattice layer is disposed on a side close to the AlN nucleation layer;
[0007] The AlGaN sublayer in the AlN / AlGaN superlattice layer and the GaN sublayer in the AlN / GaN superlattice layer are both doped with low concentrations of Fe, and the doping concentration of the GaN sublayer is higher than that of the AlGaN sublayer.
[0008] Furthermore, in the epitaxial wafer, the Al composition of AlGaN in the AlN / AlGaN superlattice layer is 0.50-0.80, and the doping concentration of the AlGaN sublayer is 5*10 16 cm -3 -5*10 18 cm -3 The doping concentration of the GaN sublayer in the AlN / GaN superlattice layer is 5*10 16 cm -3 -5*10 18 cm -3 .
[0009] Furthermore, the epitaxial wafer, wherein the AlGaN AlGaN bulk layer Al composition is 0.20 ~ 0.50, the AlGaN bulk layer and the GaN bulk layer are doped with high concentration of Fe, the doping concentration is 5*10 19 cm -3 -5*10 20 cm -3 .
[0010] Furthermore, in the above-mentioned epitaxial wafer, the doping concentration of the GaN bulk layer is higher than the doping concentration of the AlGaN bulk layer.
[0011] Furthermore, in the above-mentioned epitaxial wafer, the thickness of the AlN / AlGaN superlattice layer is 100-500 nm, the thickness of the AlN sublayer in a single period of the AlN / AlGaN superlattice layer is 1.0-3.0 nm, the thickness of a single AlGaN sublayer is 5.0-10.0 nm, the thickness of the AlGaN bulk layer is 0.5-1.5 μm, the thickness of the AlN / GaN superlattice layer is 0.5-1.5 μm, the thickness of the AlN sublayer in a single period of the AlN / GaN superlattice layer is 1.0-3.0 nm, the thickness of a single GaN sublayer is 10.0-30.0 nm, and the thickness of the GaN bulk layer is 0.5-1.5 μm.
[0012] Another object of the present invention is to provide an epitaxial wafer growth method for growing the above-mentioned epitaxial wafer, the method comprising:
[0013] Providing a Si substrate, and pre-laying an Al layer on the Si substrate;
[0014] An AlN nucleation layer, an AlN / AlGaN superlattice layer, an AlGaN layer, an AlN / GaN superlattice layer, a GaN layer, a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer and a GaN cap layer are sequentially grown on the pre-laid Al layer.
[0015] Furthermore, the above-mentioned epitaxial wafer growth method, wherein the step of providing a Si substrate and, before the step of pre-laying an Al layer on the Si substrate, further comprises:
[0016] The Si substrate is deoxidized by high-temperature treatment for 5 to 10 minutes in a chamber temperature of 1000 to 1200° C., a chamber pressure of 50 to 150 mbar, and a H 2 atmosphere.
[0017] Furthermore, in the above-mentioned epitaxial wafer growth method, wherein the Si substrate is provided, and in the step of pre-laying an Al layer on the Si substrate, the growth temperature of the pre-laid Al layer is 1000-1100°C, the pressure is 40-70 mbar, the flow rate of the Al source is 50-200 sccm, and the thickness is 1-5 nm.
[0018] Furthermore, in the above-mentioned epitaxial wafer growth method, in the step of sequentially growing an AlN nucleation layer, an AlN / AlGaN superlattice layer, an AlGaN layer, an AlN / GaN superlattice layer, a GaN layer, a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer and a GaN cap layer on the pre-laid Al layer, the growth temperature of the AlN / AlGaN superlattice layer is 1050°C-1200°C, and the pressure is 40-70 mbar, the growth temperature of the AlGaN bulk layer is 1050°C-1150°C, and the pressure is 40-70 mbar, the growth temperature of the AlN / GaN superlattice layer is 1050°C-1150°C, and the pressure is 40-70 mbar, and the growth temperature of the GaN layer is 1050°C-1150°C, and the pressure is 50-100 mbar.
[0019] Another object of the present invention is to provide a high electron mobility transistor, comprising the above-mentioned epitaxial wafer.
[0020] Compared with the prior art, the present invention provides a buffer layer composed of an AlN / AlGaN superlattice layer, an AlGaN bulk layer, an AlN / GaN superlattice layer and a GaN bulk layer. The AlGaN and GaN sublayers in the superlattice structure are doped with low concentrations of Fe, and an AlN sublayer is introduced into the superlattice layer. Since AlN has a high barrier height, it can effectively block background carriers. That is, the non-AlN sublayers in the superlattice structure can be doped with low concentrations to achieve high resistance while ensuring the quality of the epitaxial epitaxial layer. This solves the problem in existing structures that high resistance needs to be achieved through high-concentration doping of the entire buffer layer while the crystal quality of the epitaxial layer cannot be guaranteed. That is, high resistance of the epitaxial layer can be achieved while ensuring crystal quality. On the other hand, the entire buffer layer structure gradually transitions from the AlN / AlGaN superlattice layer to the GaN bulk layer. The difference in lattice constants between AlN and GaN is used to form compressive stress to compensate for the tensile stress formed between the Si substrate and the AlN nucleation layer, thereby effectively reducing the dislocation and crack density in the epitaxial layer, further improving the crystal quality of the epitaxial layer, reducing buffer layer leakage, and thus facilitating improved pinch-off and withstand voltage characteristics. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] Figure 1 Schematic diagram of the structure of the epitaxial wafer in the first embodiment of the present invention;
[0022] Figure 2 This is a flow chart of a method for growing an epitaxial wafer according to a second embodiment of the present invention. DETAILED DESCRIPTION
[0023] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in this specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention.
[0024] Furthermore, as used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. In the detailed description and claims, a list of items connected by the term "one of" may mean any of the listed items. For example, if items A and B are listed, the phrase "one of A and B" means only A or only B. In another example, if items A, B, and C are listed, the phrase "one of A, B, and C" means only A; only B; or only C. Item A may contain a single element or multiple elements. Item B may contain a single element or multiple elements. Item C may contain a single element or multiple elements. In the detailed description and claims, a list of items connected by the terms "at least one of," "at least one of," or other similar terms may mean any combination of the listed items. For example, if items A and B are listed, the phrase "at least one of A and B" or "at least one of A or B" means only A; only B; or both A and B. In another example, if items A, B, and C are listed, the phrase "at least one of A, B, and C" or "at least one of A, B, or C" means only A; or only B; only C; A and B (excluding C); A and C (excluding B); B and C (excluding A); or all of A, B, and C. Item A may include a single element or multiple elements. Item B may include a single element or multiple elements. Item C may include a single element or multiple elements.
[0025] Example 1
[0026] See also Figure 1 , is an epitaxial wafer provided in the first embodiment of the present invention, comprising a Si substrate 2, a pre-laid Al layer 1, an AlN nucleation layer 3, a high-resistance buffer layer 4, a channel layer 5, an AlN insertion layer 6, an AlGaN barrier layer 7, and a GaN cap layer 8 stacked in sequence. The high-resistance buffer layer 4 comprises an AlN / AlGaN superlattice layer 40, an AlGaN bulk layer 41, an AlN / GaN superlattice layer 42, and a GaN bulk layer 43 stacked in sequence. The AlN / AlGaN superlattice layer 40 is disposed on a side close to the AlN nucleation layer 3.
[0027] The AlGaN sublayer in the AlN / AlGaN superlattice layer 40 and the GaN sublayer in the AlN / GaN superlattice layer 42 are both doped with low concentrations of Fe, and the doping concentration of the GaN sublayer is higher than that of the AlGaN sublayer.
[0028] In this embodiment, the buffer layer is configured to consist of an AlN / AlGaN superlattice layer 40, an AlGaN bulk layer 41, an AlN / GaN superlattice layer 42, and a GaN bulk layer 43. The AlGaN and GaN sublayers in the superlattice structure are doped with low concentrations of Fe, and an AlN sublayer is introduced into the superlattice layer. Since AlN has a relatively high barrier height, it can effectively block background carriers. This means that the non-AlN sublayers in the superlattice structure can be doped with low concentrations to achieve high resistance while ensuring the quality of the epitaxial layer. This solves the problem in existing structures where the entire buffer layer needs to be doped with high concentrations to achieve high resistance while failing to ensure the crystal quality of the epitaxial layer. This means that high resistance of the epitaxial layer can be achieved while ensuring crystal quality.
[0029] By way of example and not limitation, in some preferred embodiments of the present invention, the Al composition of AlGaN in the AlN / AlGaN superlattice layer 40 is 0.50-0.80; the doping concentration of the AlGaN sublayer is 5*10 16 cm -3 -5*10 18 cm -3 , for example, 5*10 16 cm -3 , 5*10 17 cm -3 , 5*10 18 cm -3 The doping concentration of the GaN sublayer in the AlN / GaN superlattice layer 42 is 5*10 16 cm -3 -5*10 18 cm -3 , for example, 5*10 16 cm -3 , 5*10 17 cm -3 , 5*10 18 cm -3 ;
[0030] The AlGaN content in the AlGaN bulk layer 43 is 0.20-0.50. Both the AlGaN bulk layer and the GaN bulk layer are doped with high concentrations of Fe, with a doping concentration of 5*10 19 cm -3 -5*10 20 cm -3 , for example, 5*10 19 cm -3 , 5*10 20 cm -3 ; Moreover, the doping concentration of the GaN bulk layer 44 is higher than the doping concentration of the AlGaN bulk layer;
[0031] Specifically, the thickness of the AlN / AlGaN superlattice layer 40 is 100-500 nm, the thickness of the AlN sublayer in a single period of the AlN / AlGaN superlattice layer 40 is 1.0-3.0 nm, the thickness of a single AlGaN sublayer is 5.0-10.0 nm, the thickness of the AlGaN bulk layer 41 is 0.5-1.5 μm, the thickness of the AlN / GaN superlattice layer 42 is 0.5-1.5 μm, and the thickness of a single AlGaN sublayer in the AlN / GaN superlattice layer 42 is 0.5-1.5 μm. The thickness of the AlN sublayer in each period is between 1.0 and 3.0 nm, the thickness of the GaN sublayer is between 10.0 and 30.0 nm, and the thickness of the GaN bulk layer 43 is between 0.5 and 1.5 μm. More specifically, the thickness of the AlN nucleation layer 3 is between 150 and 300 nm, the thickness of the GaN channel layer 5 is between 100 and 500 nm, the thickness of the insertion layer 6 is 1 nm, the thickness of the AlGaN barrier layer 7 is between 20 and 25 nm, and the thickness of the GaN cap layer 8 is between 3 and 10 nm.
[0032] Example 2
[0033] See also Figure 2 , is a method for growing an epitaxial wafer provided in a second embodiment of the present invention, which is used to grow the epitaxial wafer in the above-mentioned embodiment 1, and the method includes steps S20 to S21:
[0034] Step S20: providing a Si substrate, and pre-laying an Al layer on the Si substrate.
[0035] Specifically, the growth temperature of the pre-laid Al layer is 1000-1100° C., the pressure is 40-70 mbar, the flow rate of the Al source is 50-200 sccm, and the thickness is 1-5 nm.
[0036] In addition, in some optional embodiments of the present invention, in order to further improve the epitaxial growth effect, the step of providing a Si substrate and, before the step of pre-laying an Al layer on the Si substrate, further comprises:
[0037] The Si substrate is deoxidized by high-temperature treatment for 5 to 10 minutes in a chamber temperature of 1000 to 1200° C., a chamber pressure of 50 to 150 mbar, and a H 2 atmosphere.
[0038] The processing method includes but is not limited to MOCVD.
[0039] Step S21 , sequentially growing an AlN nucleation layer, an AlN / AlGaN superlattice layer, an AlGaN layer, an AlN / GaN superlattice layer, a GaN layer, a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer, and a GaN capping layer on the pre-laid Al layer.
[0040] Specifically, the growth temperature of the AlN / AlGaN superlattice layer is 1050℃-1200℃, and the pressure is 40-70mbar, the growth temperature of the AlGaN layer is 1050℃-1150℃, and the pressure is 40-70mbar, the growth temperature of the AlN / GaN superlattice layer is 1050℃-1150℃, and the pressure is 40-70mbar, and the growth temperature of the GaN layer is 1050℃-1150℃, and the pressure is 50-100mbar; more specifically, the growth temperature of the channel layer is 1050℃-1150℃, and the pressure is 150-250mbar; the growth temperature of the insertion layer is 1050℃-1150℃, and the pressure is 40-70mbar; the growth temperature of the barrier layer is 1050℃-1150℃, and the pressure is 40-70mbar; the growth temperature of the cap layer is 1050℃-1150℃, and the pressure is 40-70mbar. In a specific implementation, trimethylaluminum (TMAl), trimethylgallium (TMGa) or triethylgallium (TEGa), and NH3 are used as precursors of group III and group V sources, respectively, ferrocene (Cp2Fe) is used as a precursor of the iron (Fe) source, and N2 and H2 are used as carrier gases.
[0041] In summary, the epitaxial wafer and epitaxial wafer growth method in the embodiments of the present invention are configured such that the buffer layer is composed of an AlN / AlGaN superlattice layer, an AlGaN bulk layer, an AlN / GaN superlattice layer and a GaN bulk layer. The AlGaN and GaN sublayers in the superlattice structure are doped with low concentrations of Fe, and an AlN sublayer is introduced into the superlattice layer. Since AlN has a high barrier height, it can effectively block background carriers. That is, the non-AlN sublayers in the superlattice structure can be doped with low concentrations to achieve high resistance while ensuring the quality of the epitaxial epitaxial layer. This solves the problem in existing structures that high resistance needs to be achieved through high-concentration doping of the entire buffer layer while the crystal quality of the epitaxial layer cannot be guaranteed. That is, high resistance of the epitaxial layer can be achieved while ensuring crystal quality. On the other hand, the entire buffer layer structure gradually transitions from the AlN / AlGaN superlattice layer to the GaN bulk layer. The difference in lattice constants between AlN and GaN is used to form compressive stress to compensate for the tensile stress formed between the Si substrate and the AlN nucleation layer, thereby effectively reducing the dislocation and crack density in the epitaxial layer, further improving the crystal quality of the epitaxial layer, reducing buffer layer leakage, and thus facilitating improved pinch-off and withstand voltage characteristics.
[0042] Example 3
[0043] A third embodiment of the present invention provides a high electron mobility transistor, comprising the epitaxial wafer of the first embodiment. The epitaxial wafer can be obtained by epitaxial growth using the epitaxial growth method of the second embodiment.
[0044] The above-described embodiments merely illustrate several implementations of the present invention, and while their descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art would be able to make numerous variations and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.
Claims
1. An epitaxial wafer, characterized in that: It comprises a Si substrate, an AlN nucleation layer, a high-resistance buffer layer, a channel layer, an AlN insertion layer, an AlGaN barrier layer and a GaN cap layer stacked in sequence, wherein the high-resistance buffer layer comprises an AlN / AlGaN superlattice layer, an AlGaN bulk layer, an AlN / GaN superlattice layer and a GaN bulk layer stacked in sequence, and the AlN / AlGaN superlattice layer is arranged on one side close to the AlN nucleation layer; Wherein, the AlGaN sublayer in the AlN / AlGaN superlattice layer and the GaN sublayer in the AlN / GaN superlattice layer are both doped with a low concentration of Fe, and the doping concentration of the GaN sublayer is higher than the doping concentration of the AlGaN sublayer; The Al composition of AlGaN in the AlN / AlGaN superlattice layer is 0.50-0.80, and the doping concentration of the AlGaN sublayer is 5*10 16 cm -3 -5*10 18 cm -3 The doping concentration of the GaN sublayer in the AlN / GaN superlattice layer is 5*10 16 cm -3 -5*10 18 cm -3 ; The AlGaN content in the AlGaN bulk layer is 0.20-0.50, and both the AlGaN bulk layer and the GaN bulk layer are doped with high concentrations of Fe, with a doping concentration of 5*10 19 cm -3 -5*10 20 cm -3 .
2. The epitaxial wafer according to claim 1, characterized in that The doping concentration of the GaN bulk layer is higher than the doping concentration of the AlGaN bulk layer.
3. The epitaxial wafer according to claim 1, characterized in that The thickness of the AlN / AlGaN superlattice layer is 100~500nm, the thickness of the AlN sublayer in a single period of the AlN / AlGaN superlattice layer is 1.0~3.0nm, the thickness of a single AlGaN sublayer is 5.0~10.0nm, the thickness of the AlGaN bulk layer is 0.5~1.5μm, the thickness of the AlN / GaN superlattice layer is 0.5~1.5μm, the thickness of the AlN sublayer in a single period of the AlN / GaN superlattice layer is 1.0~3.0nm, the thickness of a single GaN sublayer is 10.0~30.0nm, and the thickness of the GaN bulk layer is 0.5~1.5μm.
4. A method for growing an epitaxial wafer, for growing the epitaxial wafer according to any one of claims 1 to 3, characterized in that: The method comprises: Providing a Si substrate, and pre-laying an Al layer on the Si substrate; An AlN nucleation layer, an AlN / AlGaN superlattice layer, an AlGaN bulk layer, an AlN / GaN superlattice layer, a GaN bulk layer, a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer and a GaN cap layer are sequentially grown on the pre-laid Al layer.
5. The epitaxial wafer growth method according to claim 4, wherein: The step of providing a Si substrate, before the step of pre-laying an Al layer on the Si substrate, further comprises: The Si substrate is deoxidized by high-temperature treatment for 5 to 10 minutes at a chamber temperature of 1000 to 1200° C., a chamber pressure of 50 to 150 mbar, and a H 2 atmosphere.
6. The epitaxial wafer growth method according to claim 4, characterized in that: In the step of providing a Si substrate and pre-laying an Al layer on the Si substrate, the growth temperature of the pre-layed Al layer is 1000-1100° C., the pressure is 40-70 mbar, the flow rate of the Al source is 50-200 sccm, and the thickness is 1-5 nm.
7. The epitaxial wafer growth method according to claim 4, wherein: In the steps of sequentially growing an AlN nucleation layer, an AlN / AlGaN superlattice layer, an AlGaN layer, an AlN / GaN superlattice layer, a GaN layer, a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer and a GaN cap layer on the pre-laid Al layer, the growth temperature of the AlN / AlGaN superlattice layer is 1050°C-1200°C and the pressure is 40-70 mbar, the growth temperature of the AlGaN bulk layer is 1050°C-1150°C and the pressure is 40-70 mbar, the growth temperature of the AlN / GaN superlattice layer is 1050°C-1150°C and the pressure is 40-70 mbar, and the growth temperature of the GaN layer is 1050°C-1150°C and the pressure is 50-100 mbar.
8. A high electron mobility transistor, characterized in that The epitaxial wafer comprises the epitaxial wafer according to any one of claims 1 to 3.
Citation Information
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